MEME LYFE CICLE STATE MACHINE

SYNCHRONOUS SEQUENTIAL
LOGIC
Finite State Machines
High level coding style

Digital Systems Design

OBJECTIVES
The objectives of the chapter are to describe:
• Synchronous sequential design
• Synthesis of a finite-state machine
• Analysis of a finite-state machine
• State assignment
• State optimization
• FSM VHDL programming
Finite State Machine (FSM)
Finite State Machine (FSM)
Finite State Machine (FSM)

Will require a
PROCESS
Finite State Machine (FSM)

can also be
implemented
using a PROCESS.

Will require a
PROCESS
Finite State Machine: Design Style

• The design of the sequential logic of

the state machine (is completely
separated from that of the
combinational logic section.

• All states of the machine are always

explicitly declared using an
enumerated data type.

• Standard coding style to infer a Finite

State Machine
Finite State Machine: Design Style
Finite State Machine: Design Style
Finite State Machine: Design Style
Finite State Machine: Design Style
Finite State Machine: Design Style
Finite State Machine: Design Style
Finite State Machine: Template
Finite State Machine: Template
Finite State Machine: Template
Finite State Machine: Template
FSM example: Synchronous Multiplexor

d=1

d=0
FSM example: Synchronous Multiplexor
FSM example: Synchronous Multiplexor
FSM example: Synchronous Multiplexor
 FSM example: String Detector
outputs a ‘1’ whenever the sequence ‘‘111’’ occurs
FSM example: String Detector
FSM example: String Detector
FSM example: String Detector
Testbench with FSM
Traditional testbech A higher entity is created which
clk includes:
• Stimuli generator (Built-in Self Test BIST),
DUT
reset Output
Input and • PLL
signals test • DUT
signals

FSM-based testbech
BIST is a FSM-based
clk circuit
BIST DUT
reset Output
and
Input signals test
signals
Work in class: Vending Machine Controller
• Create project “vendingMachine”

• Complete the code of “vendingController.vhd”

• Read and understand the code of “test_signal_generator.vhd”

• Include a PLL module named “my_pll.vhd”

• Simulate using “vendingMachine_tb.vhd”

• Download the circuit to the board. Use SignalTab to verify operation

Work in class: Vending Machine Controller
ni => nickel_in (5c)
di => dime_in (10c)
qi => quarter_in (25c)
no => nickel_out
do =>dime_out
co => candy_out
Work in class: Vending Machine Controller
Work in class: Vending Machine Controller
Work in class: Vending Machine Controller
Test signal generator
Test signal generator
Test signal generator
Test signal generator
Test signal generator
Test signal generator
Test signal generator