Chapter 3

Voltage Multiplier circuits

Voltage-multiplier circuits are used to maintain a relatively low transformer peak voltage while stepping up the
peak output voltage to two (doubler), three (tripler), four (quadrupler) , or more times the peak rectified voltage.

Voltage doubler

Fig 1

Fig 1 is a half wave voltage doubler.

Positive half cycle

During the positive voltage half cycle across the transformer, secondary diode D 1 conducts (short circuit) and
diode D 2 is non conductingcut off), charging capacitor C 1 up to the peak rectified voltage ( V m ). Diode D 1 is
ideally a short during this half-cycle, and the input voltage charges capacitor C 1 to V m with the polarity shown
in Fig 2

Fig 2

During the negative half-cycle of the secondary voltage, diode D 1 is cut off (open circuit)
and diode D 2 conducts (short circuit) charging capacitor C 2.
Applying KVL, we can sum the voltages around the outside loop :

Fig 3

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On the next positive half-cycle, diode D 2 is non-conducting and capacitor C 2 will discharge
through the load connected across it. If no load is connected across capacitor C 2 , both capacitors
stay charged, C 1 to V m and C 2 to 2 V m .
If there is a load connected to the output of the voltage doubler, the voltage across capacitor C 2
drops during the positive half-cycle (at the input) and the capacitor is recharged up to 2 V m during the
negative halfcycle.
The output waveform across capacitor C 2 is that of a half-wave signal filtered by a capacitor filter.

Fig 4

Full wave voltage doubler

Fig 5

The full-wave doubler is shown in Fig 5

During the positive half-cycle (Fig 6 a) of transformer secondary voltage diode D 1 conducts, charging
capacitor C 1 to a peak voltage V m . Diode D 2 is non-conducting at this time. During the negative half-cycle
(Fig 6 b) diode D 2 conducts, charging capacitor C 2 , while diode D 1 is non-conducting. If no load current is
drawn from the circuit, the voltage across capacitors C 1 and C 2 is 2 V m . If load current is drawn from the
circuit, the voltage across capacitors C 1 and C 2 is the same as that across a capacitor fed by a full-wave rectifier
circuit.

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Fig 6

Voltage tripler and quadrupler

Depending on the number and arrangement of the diodes and capacitors, the circuit can develop a
voltage output that is 3/4/5 etc times that of the peak input.

Fig 7

In operation, capacitor C 1 charges through diode D 1 to a peak voltage V m during the positive
half-cycle of the transformer secondary voltage. Capacitor C 2 charges to twice the peak
voltage, 2 V m , developed by the sum of the voltages across capacitor C 1 and the transformer
during the negative half-cycle of the transformer secondary voltage.
During the positive half-cycle, diode D 3 conducts and the voltage across capacitor C 2
charges capacitor C 3 to the same 2 V m peak voltage. On the negative half-cycle, diodes D 2
and D 4 conduct with capacitor C 3 , charging C 4 to 2 V m .
The voltage across capacitor C 2 is 2 V m , across C 1 and C 3 it is 3 V m , and across C 2 and C 4 it
is 4 V m . If additional sections of diode and capacitor are used, each capacitor will be charged
to 2 V m . Measuring from the top of the transformer winding ( Fig 6 ) will provide odd
multiples of V m at the output, whereas measuring the output voltage from the bottom of the
transformer will provide even multiples of the peak voltage V m .

Clamping Circuits

A circuit that places either the positive or negative peak of a signal at a desired d.c. level is known as
a clamping circuit.

A clamper is a network constructed of a diode, a resistor, and a capacitor that shifts a

waveform to a different dc level without changing the appearance of the applied signal.

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Clamper circuits can either be :

i. Positive clampers- these shift the input signal vertically upwards
ii. Negative clampers- these shift the input signal vertically downwards
A clamper circuit does not change the peak to peak value of the input signal, however it will
change the peak and average values of the signals.

Clamping networks have a capacitor connected directly from input to output with a resistive element
in parallel with the output signal. The diode is also in parallel with the output signal but may or may
not have a series dc supply as an added element.

Fig 8

Fig 8 shows a clamper circuit that does not have a dc supply as an added element.

To better understand how clampers operate, the following steps may be used:

i. Start the analysis by examining the response of the portion of the input signal
that will forward bias the diode.
ii. During the period that the diode is in the “on” state, assume that the capacitor
will charge up instantaneously to a voltage level determined by the surrounding
network.
iii. Assume that during the period when the diode is in the “off” state the capacitor
holds on to its established voltage level
iv. Throughout the analysis, maintain a continual awareness of the location and
defined polarity for v o to ensure that the proper levels are obtained.
v. Check that the total swing of the output matches that of the input

Fig 9

Fig 9 is a clamper circuit without dc supply as an added element.

Operation
During the negative half-cycle of the input signal, the diode is forward biased. Therefore the diode
behaves as a short .The capacitor will charge to V volts very quickly.
It is easy to see that during this interval, the output voltage is directly across the short circuit.

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Therefore,
Vout = 0.

When the input switches to +V state (i.e., positive half-cycle), the diode is reverse biased
and behaves as an open as shown in Fig 10 b . The capacitor remains almost fully charged to V volts
during the off time of the diode. Referring to Fig 10 b and applying Kirchhoff ’s voltage law to the
input loop, we have,
V + V − Vout = 0
or Vout = 2V

a b
Fig 10
The resulting output waveform is as shown below

Fig 11

The above circuit (Fig 9) is therefore a positive clamper since it shifted the input signal
vertically upwards.

Questions

For the following circuits, explain how they work and draw the resulating output
waveforms.

1.

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2.

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