SEMICONDUCTOR IRF640 Series RoHS

RoHS
Nell High Power Products
N-Channel Power MOSFET
(18A, 200Volts)
DESCRIPTION
The Nell IRF640 are N-channel enhancement mode
silicon gate power field effect transistors. D
They are designed, tested and guaranteed to withstand D
level of energy in breakdown avalanche made of operation.
They are designed as an extremely efficient and
reliable device for use in a wide variety of applications G
such as switching regulators, convertors, motor drivers D
and drivers for high power bipolar switching transistors G S
D
requiring high speed and low gate drive power. S
These transistors can be operated directly from
integrated circuits. TO-220AB TO-263(D2PAK)
(IRF640A) (IRF640H)
FEATURES
RDS(ON) = 0.180Ω @ VGS = 10V
Ultra low gate charge(63nC max.)
Low reverse transfer capacitance
(C RSS = 91pF typical)
Fast switching capability D (Drain)

100% avalanche energy specified

Improved dv/dt capability
150°C operation temperature

G
(Gate)
PRODUCT SUMMARY
ID (A) 18
VDSS (V) 200
S (Source)

RDS(ON) (Ω) 0.180 @ V GS = 10V

QG(nC) max. 63

ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise specified)

SYMBOL PARAMETER TEST CONDITIONS VALUE UNIT
VDSS Drain to Source voltage(Note 1) T J =25°C to 150°C 200
V DGR Drain to Gate voltage R GS =20KΩ 200 V
V GS Gate to Source voltage ±20
V GS =10V, T C =25°C 18
ID Continuous Drain Current
V GS =10V, T C =100°C 11
A
I DM Pulsed Drain current (Note 1) 72
I AR Repetitive avalanche current (Note 1) 18
E AR Repetitive avalanche energy(Note 1) I AR =18A, R GS =50Ω, V GS =10V 13 mJ
E AS Single pulse avalanche energy (Note 2) I AS =18A, L=2.7mH 580 mJ
dv/dt Peak diode recovery dv/dt(Note 3) 5 V /ns
Total power dissipation T C =25°C 125 W
PD
Derating factor above 25 ° C 0.98 W /°C
TJ Operation junction temperature -55 to 150
T STG Storage temperature -55 to 150 ºC

TL Maximum soldering temperature, for 10 seconds 1.6mm from case 300

Mounting torque, #6-32 or M3 screw 10 (1.1) lbf . in (N . m)
Note: 1. Repetitive rating: pulse width limited by junction temperature.
2 . V DD =50V,L=2.7mH,I AS =18A,R G =50Ω,starting T J =25˚C
3 . I SD ≤ 18A, di/dt ≤ 150A/µs, V DD ≤ V (BR)DSS , T J ≤ 150°C.

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 SEMICONDUCTOR IRF640 Series RoHS
RoHS
Nell High Power Products

THERMAL RESISTANCE
SYMBOL PARAMETER Min. Typ. Max. UNIT
Rth(j-c) Thermal resistance, junction to case 1.0
Rth(c-s) Thermal resistance, case to heatsink 0.5 ºC/W
Rth(j-a) Thermal resistance, junction to ambient 60

ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise specified)

SYMBOL PARAMETER TEST CONDITIONS Min. Typ. Max. UNIT
V(BR)DSS Drain to source breakdown voltage V GS = 0V, I D = 250µA 200 V
▲V (BR)DSS/▲T J Breakdown voltage temperature coefficient I D = 1mA, referenced to 25°C 0.29 V/ºC
V DS =200V, V GS =0V T C = 25°C 25
I DSS Drain to source leakage current μA
V DS =160V, V GS =0V T C =125°C 250
Gate to source forward leakage current V GS = 20V, V DS = 0V 100
I GSS nA
Gate to source reverse leakage current V GS = - 20V, V DS = 0V -100
R DS(ON) Static drain to source on-state resistance V GS = 10V, l D = 11A (Note 1) 0.15 0.18 Ω
V GS(TH) Gate threshold voltage V GS =V DS , I D =250μA 2 4 V
g fS Forward transconductance V DS =50V, I D =11A 6.7 S
C ISS Input capacitance 1300
C OSS Output capacitance V DS = 25V, V GS = 0V, f =1MHz 430 pF
C RSS Reverse transfer capacitance 130
t d(ON) Turn-on delay time 12
tr Rise time V DD = 100V, I D = 18A,R D = 5.4Ω, 50
V GS = 10V, R G =9.1Ω (Note 1) ns
t d(OFF) Turn-off delay time 45
tf Fall time 35
LD Internal drain inductance Between lead, 6mm from 4.5
nH
LS Internal source inductance package and center of die 7.5
QG Total gate charge 70
Q GS Gate to source charge V DS = 160V, V GS = 10V, I D = 18A 12 nC
Q GD Gate to drain charge (Miller charge) 40

SOURCE TO DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25°C unless otherwise specified)
SYMBOL PARAMETER TEST CONDITIONS Min. Typ. Max. UNIT
VSD Diode forward voltage I SD = 18A, V GS = 0V 2 V
I s (I SD ) Continuous source to drain current Integral reverse P-N junction 18
diode in the MOSFET
D (Drain)

A
I SM Pulsed source current 72
G
(Gate)

S (Source)

t rr Reverse recovery time I SD = 18A, V GS = 0V, 300 610 ns

dI F /dt = 100A/µs
Q rr Reverse recovery charge 3.4 7 μC
t ON Forward turn-on time Intrinsic turn-on time is negligible (turn-on is domonated by LS+LD)

Note: 1. Pulse test: Pulse width ≤ 300μs, duty cycle ≤ 2% .

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 SEMICONDUCTOR IRF640 Series RoHS
RoHS
Nell High Power Products

ORDERING INFORMATION SCHEME

IRF 640 A

MOSFET series
N-Channel, IR series

Current & Voltage rating, lD & VDS

18A / 200V

Package type
A = TO-220AB
H = TO-263 (D2PAK)

Fig.1 Typical output characteristics, Fig.2 Typical transfer characteristics

T C =25°C

V GS
Top: 15V
10V
Drain Current, l D (Amps)

8V
Drain Current,l D (Amps)

7V
6V 150°C
5.5V 10 1
5V
Bottorm: 4.5V
10 1 25°C

10 0

10 0
4.5V V DS =50V
20µs pulse width 20µs pulse width
T C =25°C 10 -1
10 -1
10 -1 10 0 10 1 4 5 6 7 8 9 10

Drain-to-Source voltage , V DS (volts) Gate-to-Source voltage , V GS (volts)

Fig.3 Typical output characteristics, Fig.4 Normalized On-Resistance vs. Temperature

T C =150°C
3
Drain-to-Source on resistance, R DS(on)

V GS
l D =18A
Top: 15V
10V 2.5
8V
10 1
Drain Current, l D (Amps)

7V
6V
5.5V
5V
2
(Normalized)

Bottorm: 4.5V

1.5

10 0 4.5V
1

0.5
20µs pulse width
T J =150°C V GS =10V
10 -1 0
10 -1 10 0 10 1 -60 -40 -20 0 20 40 60 80 100 120 140 160

Drain-to-Source voltage , V DS (volts) Junction Temperature,T J (°C)

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 SEMICONDUCTOR IRF640 Series RoHS
RoHS
Nell High Power Products

Fig.5 Typical capacitance vs. Drain-to-Source Fig.6 Typical source-drain diode forward
voltage voltage

3000
V GS = 0V, f =1MHZ
C iss = C gs +C gd ( C ds = shorted )
2500

Reverse drain current,I SD (A)

C rss = C gd 150°C
C oss = C ds +C gd
Capacitance, (pF)

25°C
2000
10 1

1500 Ciss

1000
Coss

500 Crss 10 0
V GS = 0V
0
10 0 10 1 0.5 0.7 0.9 1.1 1.3 1.5

Drain-to-Source voltage , V DS (volts)

Source-to-drain voltage, V SD (volts)

Fig.7 Typical gate charge vs. gate-to-source Fig.8 Maximum safe operating area
voltage

20 10³
Gate-to-source voltage , V GS (volts)

V DS = 160V Operation in This Area is Limited by R DS(ON)

Drain current , l D (Amps)

l D = 18A
V DS = 100V
16 V DS = 40V
10²
10µs

12 100µs

10
1ms
8
10ms

1 Note:
4 1. T C = 25°C
For test circuit 2. T J = 150°C
See figure 13 3. Single Pulse
0 0.1
0 15 30 45 60 75 0.1 ² ⁵ 1 ² ⁵ 10 ² ⁵ 10² ² ⁵ 10³

Total gate charge , Q G (nC) Drain-to-Source voltage, V DS (volts)

Fig.9 Maximum drain current vs.

Case temperature

20
Drain Current , l D (Amps)

16

12

0
25 50 75 100 125 150

Case temperature, T C ( ° C)

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 SEMICONDUCTOR IRF640 Series RoHS
RoHS
Nell High Power Products

Fig.10 Maximum effective transient thermal impedance,

Junction-to-Case

10
Thermal response (RthJc)

1
D = 0.5
0.2
0.1 0.1
0.05
0.02 PDM

0.01 Single pulse t1

10 - ² (Thermal response)
Notes: t2

1. Duty factor, D = t1/ t2

2. Peak TJ = PDM * Rth(j-c) +TC

10 - ³
10 - ₅ 10 -⁴ 10 - ³ 10 - ² 0.1 1 10

Rectangular Pulse Duration , t 1 (seconds)

Fig.11a. Switching time test circuit Fig.11b. Switching time waveforms

RD
V DS
V DS
V GS 90%

RG D.U.T. +
- V DD

10V 10%
Pulse width ≤ 1µs V GS
Duty Factor ≤ 0.1%
t d(ON) t d(OFF)
tR
tF

Fig.12a. Unclamped lnductive test circuit Fig.12b. Unclamped lnductive waveforms

BV DSS
L
V DS
l AS

RG D.U.T. + l D(t)
V
- DD V DS(t)
l AS A V DD
10V

tP 0.01Ω

Time
tp
Vary t p to obtain required I AS

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 SEMICONDUCTOR IRF640 Series RoHS
RoHS
Nell High Power Products

Fig.12c. Maximum avalanche energy vs.

Drain current

1400
lD

Single pulse energy, E AS (mJ)

1200 TOP 8A
11A
1000 BOTTOM 18A

800

600

400

200
V DG = 50 V
0
25 50 75 100 125 150

Starting Junction temperature, T J (°C)

Fig.13a. Basic gate charge waveform Fig.13b. Gate charge test circuit

Current Regulator
Same Type as D.U.T.
V GS

50KΩ
QG
12V 0.2µF
10V
0.3µF

Q GD
+
Q GS V DS
D.U.T. -

V GS

3mA

RG RD
Charge
Current Sampling Resistors

Fig.14 Peak diode recovery dv/dt test circuit for N-Channel MOSFET

Driver Gate Drive

D.U.T. Period D=
P.W.
+ Circuit Layout Considerations P.W. Period
• Low Stray lnductance
• Ground Plane VGS=10V *
• Low Leakage lnductance
Current Transformer
-
D.U.T. I SD Waveform
+
Reverse
Recovery Body Diode Forward
Current Current
- + di/dt
-
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
• dv/dt controlled by R G Voltage
RG + Body Diode Forward Drop
• Driver same type as D.U.T.
• l SD controlled by Duty Factor " D " V DD Inductor Curent
-
• D.U.T. -Device Under Test
Ripple ≤ 5% ISD

*V GS = 5V for Logic Level Devices and 3V for drive devices

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 SEMICONDUCTOR IRF640 Series RoHS
RoHS
Nell High Power Products

Case Style

TO-220AB
10.54 (0.415) MAX.

9.40 (0.370) 3.91 (0.154) 4.70 (0.185)

9.14 (0.360) 3.74 (0.148) 4.44 (0.1754)
1.39 (0.055)
2.87 (0.113)
1.14 (0.045)
2.62 (0.103)

3.68 (0.145)
3.43 (0.135)
16.13 (0.635) 15.32 (0.603)
15.87 (0.625) 14.55 (0.573)
PIN 8.89 (0.350)
1 2 3 8.38 (0.330)
4.06 (0.160) 29.16 (1.148)
3.56 (0.140) 28.40 (1.118)
2.79 (0.110)
2.54 (0.100)
1.45 (0.057)
1.14 (0.045) 14.22 (0.560)
13.46 (0.530)
2.67 (0.105)
2.41 (0.095) 0.90 (0.035)
2.65 (0.104) 0.70 (0.028)
5.20 (0.205) 0.56 (0.022)
2.45 (0.096)
4.95 (0.195) 0.36 (0.014)

TO-263(D 2 PAK)

10.45 (0.411) 4.83 (0.190)

9.65 (0.380) 4.06 (0.160) 1.40 (0.055)
1.14 (0.045)
6.22 (0.245)

1.40 (0.055)
9.14 (0.360)
1.19 (0.047)
8.13 (0.320) 15.85 (0.624)
15.00 (0.591)

0 to 0.254 (0 to 0.01)
2.79 (0.110)
2.29 (0.090)
0.940 (0.037)
0.686 (0.027) 0.53 (0.021)
0.36 (0.014)
2.67 (0.105)
2.41 (0.095) 3.56 (0.140)
5.20 (0.205) 2.79 (0.110) D (Drain)
4.95 (0.195)

G
(Gate)

S (Source)
All dimensions in millimeters(inches)

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