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Course Objective: This course provides the practical knowledge on application of Electronic
Devices like BJT, FET and analog IC's (Op-AMP & 555 timer)
Course Rationale:
The purpose of learning this course is to see what happens inside the
Electronic system. This course brings the design concepts of Electronic systems, which help
the student to bridge the relationship between modelling and system design. This generates
useful techniques in reality. Finally, student will get an idea to analyse Amplifiers, Oscillators
and different analog IC's.
1
COURSE OUTCOME INDICATORS (COIs):
PROGRAM OUTCOMES(POs):
PO Number Description
2
PO Number Description
12. Recognize the need for, and have the preparation and ability to engage in
independent and life-long learning in the broadest context of technological
Lifelong learning change.
SYLLABUS:
Transistor Amplifiers:
BJTs: Biasing, types of biasing, h-parameters, equivalent representation of a transistor using h -
parameter model, self bias design, amplifier design from biasing, amplifier analysis using h-
parameters (Gain, Bandwidth, input and output impedances), Design of a CE amplifier.
Negative feedback amplifiers: need for negative feedback, feedback characteristics, 4 topologies
(quantitative analysis only), comparison of the input and output impedances of all the four
topologies.
Power amplifiers: concept of power amplifiers, class A class B and class AB, class C and class D
power amplifiers, Distortion analysis. (Introductory level only).
Operational Amplifiers:
Basics: Ideal OPAMP, OPAMP characteristics, ideal and practical OPAMP, CMRR, slew rate, Virtual
Ground, inverting and non inverting amplifiers.
3
Applications of OPAMPs: Adders, subtractors, scaling amplifier (using LM324 - Quad OPAMP),
Integrator, Differentiator, comparator using 710 IC, Schmitt trigger, Instrumentation amplifier.
Active filters: design of LP, HP, BP, BS filters (Butterworth filter, first order and 2nd order).
Miscellaneous Topics:
Oscillators: Function generator using LM1428, Barkhausen's criteria for sustained oscillations,
Classification of oscillators, RCPS, WBO (using 741 OPAMP), Hartley and Colpitts oscillators (using
transistors), crystal oscillator, 555 Timer, functional architecture of 555, Astable, monostable and
bistable operation using 555.
Filters: Continued LC Filters, RC Filters, RLC Filters, ripple factor for Half Wave rectifier and Full wave
Rectifier.
Regulators: Concept of regulation, Design of voltage regulators using LM339, IC 723, 78XX and 79XX
series, SCR, Triac.
TEXT BOOKS:
Electronic Devices and Circuit Theory 12th Edition - Robert L. Boylestad
Electronic Devices and Circuits 5th Edition – David A. Bell
Linear IC Applications - RamakanthGaykwad
REFERENCE BOOKS:
Integrated Electronics by Millman&Halkias
Electronic Circuits by Schilling &Belove
Digital Integrated Electronics by Taub and Schilling
4
Examinations
6 1 2 Analysis of BJT biasing T2: T: Lecturing Sem-In
[CH L: Observes Examinations-
No:5.1-
understands I , Sem-End
5.4]
[180-196] Video synthesis Examinations
7 1 2 Analysis of h-parameters in T2 T: Lecturing Sem-In
various configurations [CH L: Observes Examinations-
No:6.3-
understands I , Sem-End
6.6]
[246-258] Video synthesis Examinations
8 1 2 Analysis of self biasing circuit T2: T: Questioning Sem-In
[CH /Discussion, Examinations-
No:5.4] L: PBL I , Sem-End
[196-202] Examinations
9 1 2 Design of CE amplifier T2: T:
Sem-In
[CH demonistration,
Examinations-
No:12.1] L: Practice by
I , Sem-End
[470-478] doing
Examinations
10 1 2 Analysis of feedback amplifiers T2: T: Sem-In
[CH No:13] demonistration, Examinations-
[553-562] L: Practice by
I , Sem-End
doing
Examinations
11 1 2 Analysis of different power T2: T: Sem-In
amplifiers [CH No:19] demonistration, Examinations-
[807-832] L: Practice by
I , Sem-End
doing,
Quiz Examinations
12 2 1 Understand the difference T2: Sem-In
between BJT and FET. And know [CH No:9] T: Chalk & Talk Examinations-
the principle involved in FET [345] L: Observes
I , Sem-End
understands
Examinations
13 2 1 Understand the operation of T2: T: Chalk & Talk Sem-In
JFET and know the significance [CH No:9] L: Observes Examinations-
of MOSFET. [346-367] understands, I , Sem-End
Problem solving Examinations
14 2 1 Understand various types of T2: Sem-In
MOSFETs and the datasheet of [CH No:9] T: Chalk & Talk Examinations-
BFW10 [367] L: Observes
I , Sem-End
understands
Examinations
15 2 1 Understand CMOS, VMOS and T3: Sem-In
TTL IC's. [CH No:4] T: Chalk & Talk Examinations-
[398] L: Observes
I , Sem-End
understands
Examinations
16 2 1 T3: T: Lecturing Sem-In
Know various types of IC's [CH No:4] L: Observes Examinations-
packages and fabrication [376-377] understands I , Sem-End
Examinations
17 2 2 Analyse the output T2: T: Chalk & Talk Sem-In
[CH No:9] L: Observes
characteristics FET and obtain Examinations-
[350-354] understands
5
various parameters of FET I , Sem-End
Examinations
18 2 2 Analyse Depletion & T2: Sem-In
Enhancement Characteristics of [CH No:9] T: Chalk & Talk Examinations-
D-MOSFET. [367-369] L: Observes
I , Sem-End
understands
Examinations
19 2 2 Analyse enhancement T2: Sem-In
[CH No:9] T: Lecturing
characteristics of E-Only Examinations-
[367] L: Observes
MOSFET. I , Sem-End
understands
Examinations
20 2 2 T2: Sem-In
Analysis of different FET biasing T: Lecturing
[CH No:10] Examinations-
circuits L: Problem based
[380-394] I , Sem-End
learning
Examinations
21 2 2 Analysis of practical FET T2:
[CH No:11] Sem-In
Amplifier and obtain parameters T: Lecturing
[439-451] Examinations-
like Gain, BW, I/P & O/P L: Problem based
I , Sem-End
impedances. learning
Examinations
6
Examinations
31 3 2 Analysis of Band stop filter T1: T: Lecturing Sem-In
(Butterworth filter) [CH No:1] L: Observes Examinations-
[1-5] II , Sem-End
understands
Examinations
32 3 2 Analysis of scaling amplifier T1: Sem-In
T: Lecturing
using LM 324. [CH No:1] Examinations-
L: Observes
II , Sem-End
understands
[6-13] Examinations
33 4 1 Understand oscillator and T1: Sem-In
T: Lecturing
principle involved in it for [CH No:1] Examinations-
L: Observes
sustained oscillations [14-25] II , Sem-End
understands
Examinations
34 4 1 Understand various types of T1: Sem-In
T: Chalk & Talk
oscillators [CH No:1] Examinations-
L: Observes
[84-87] II , Sem-End
understands
Examinations
35 4 1 Understand function generator T1: Sem-In
T: Explain
using LM 1428 [CH No:14] Examinations-
Monitoring
[756] II , Sem-End
L: Participates
Examinations
36 4 1 Understand LC, RC, RLC filter T1: Sem-In
T: Chalk & Talk
circuits [CH No:1] Examinations-
L: Observes ,
[29-33] II , Sem-End
understands
Examinations
37 4 1 Understand concept of T1:
regulation, SCR and TRIAC. [CH No:14] T: Chalk & Talk Sem-In
[756] L: Observes , Examinations-
II , Sem-End
understands
Examinations
7
SESSION WISE TEACHING – LEARNING PLAN
Session No. 01
Session Outcome: 1. Learner will get to learn the requirement of transistor biasing.
2. Learner will get to know the types of biasing with analysis and their merits and
demerits.
3. Learner will be able to determine different circuit parameters for given circuit
involving transistor biasing.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
5 BJT biasing definition, 2 Chalk & talk Video
Introduction, need for biasing synthesis
7 Discussion of transistor operating 2 Chalk & talk , PPT Statement-
region – cutoff, saturation, active opinion -
with figure summary
5 Q Point, Biasing of the junctions 2 Chalk & talk, PPT Video
of the transistor for operating in synthesis
the active, cut off and saturation
region.
8 Types of biasing with 2 PPT Video
configuration synthesis,
Statement-
opinion -
summary
15 Fixed bias, Emitter stabilized bias, 2 Chalk & talk, PPT Leading
voltage divider bias circuit questions
analysis with example. peer review
5 Summary and conclusion 1 PPT
Session No. 02
Session Outcome: 1. Learner will get to learn the requirement of transistor modelling.
2. Learner will get to know the types of transistor modelling and their merits and
demerits.
3. Learner will be able to determine and approximate equivalent hybrid model of
the transistor configuration.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
10 BJT transistor modeling, hybrid 2 Chalk & talk Video
model synthesis
5 h parameters definition 2 PPT Statement –
opinion-
8
summary
10 Different types of h parameters 1 Chalk & talk, PPT Video
with their values synthesis
Determination of h parameters 2 Leading
from general 2 port system and questions
completer hybrid equivalent
model of the same
10 Approximation of the hybrid 2 Chalk & talk, PPT Statement
equivalent model opinion
summary
10 equivalent representation of a 2 Chalk & talk, PPT Video
transistor (CB, CE) using h synthesis
parameter model
5 Summary and conclusion 1 PPT
Session No. 03
Session Outcome: 1. Learner will get to learn self bias circuit.
2. Learner will get to know the how to analyze the circuit the determination of
transistor parameters.
3. Learner will be able to determine the saturated current, collector emitter
voltage
and load line.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
8 Definition of self bias circuit with 2 Chalk & talk Statement-
configuration Summary
15 Analysis of input loop and output 2 Chalk & talk , PPT Leading
loop of the transistor to questions,
determine the base current, statement-
collector current and collector summary
emitter voltage.
8 Determination of IC Sat at self bias 3 Chalk & talk , PPT Video
configuration with associated synthesis,
circuit leading
questions
10 Self bias design 2 Chalk & talk Video
synthesis,
leading
questions
4 Summary and conclusion 1 PPT
Session No. 04
Session Outcome: 1. Learner will get to learn definition of design.
2. Learner will get to know how to determine the transistor circuit parameters.
9
3. Learner will be able to design the biasing circuit.
Time(Min) Topic BTL Teaching Learning Active
Method learning
method
5 Record of Attendance -- NA
15 What is design of transistor 2 Chalk & talk, PPT Peer review
amplifier with bias
15 Determination of VCC, RB, RC , R1, 2 Chalk & talk, PPT Video
R2 given the IBQ, ICQ and VCEQ. synthesis,
Leading
questions
10 Design of Self bias circuit 2 Chalk & talk, PPT Leading
questions
5 Summary and conclusion 1 PPT
Session No. 05
Session Outcome: 1. Learner will get to learn the procedure to follow the small signal a.c. analysis.
2. Learner will learn how to determine the approximate equivalent circuit of BJT.
3. Learner will be able to determination of input impedance, output impedance,
input
and output voltage, gain and bandwidth.
Time(Min) Topic BTL Teaching Active learning
Learning Method method
5 Record of Attendance -- NA
10 Small signal a.c. analysis 2 Chalk & talk, PPT Peer survey
procedure
15 Determination of approximated 2 Chalk & talk , PPT Video
equivalent circuit of a BJT using synthesis,
complete hybrid equivalent leading
model. questions
15 Determination of input 2 Chalk & talk , PPT Video
impedance, output impedance, synthesis,
input and output voltage, gain leading
and bandwidth. questions
5 Summary and conclusion 1 PPT
Session No. 06
Session Outcome: 1. Learner will get to learn the procedure to follow the small signal a.c. analysis.
2. Learner will learn how to determine the approximate equivalent circuit of BJT.
3. Learner will be able to determination of input impedance, output impedance,
input and output voltage, gain and bandwidth.
10
Time(Min) Topic BTL Teaching Active learning
Learning Method method
5 Record of Attendance -- NA
10 Recap of the transistor 1 PPT Brain storming
configuration and h parameters sessions
30 Design of a CE amplifier 2 Chalk & talk, PPT Video synthesis
By determination of input
impedance, output impedance,
voltage and current gain.
5 Summary and conclusion 1 PPT
Session No. 07
Session Outcome: 1. Learner will get to learn the about negative feedback and its need.
2. Learner will get to know the types of negative feedback configuration.
3. Learner will be able to know and compare the gain with and without negative
feedback.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
5 Negative Feedback amplifier: 2 Chalk & talk Video
Need for negative feedback, synthesis
10 feedback characteristics, 2 Chalk & talk , PPT Statement-
opinion -
summary
15 Configuration of Four different 2 Chalk & talk, PPT Video
feedback topology synthesis
10 Summary table of Gain with and 1 PPT Video
without feedback for all four synthesis,
topologies Statement-
opinion -
summary
5 Summary and conclusion Chalk & talk, PPT
Session No. 08
Session Outcome: 1. Learner will get to learn the input and out impedances of different negative
feedback topologies.
2. Learner will be able to compare the input and output impedances.
11
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
10 Input and output impedance of 2 Chalk & talk, PPT Video
voltage series feedback synthesis
10 Input and output impedance of 2 Chalk & talk , PPT Video
voltage shunt feedback synthesis,
Statement-
opinion -
summary
5 Input and output impedance of 2 Chalk & talk, PPT Video
current series feedback synthesis
5 Input and output impedance of 2 Chalk & talk, PPT Video
Current shunt feedback synthesis,
Statement-
opinion -
summary
10 Comparison of input and output 1 PPT Video
impedances of all four topologies synthesis
5 Summary and conclusion 1 PPT
Session No. 09
Session Outcome: 1. Learner will get to learn the power amplifier and its types.
2. Learner will be able to determine the input power, output power and efficiency
of the class A amplifier .
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
5 Concept of power amplifier 2 Chalk & talk, PPT Video
synthesis
10 Types of power amplifier, 2 Chalk & talk , PPT Video
Amplifier efficiency synthesis,
Statement-
opinion -
summary
5 Comparison of amplifier classes 1 PPT Video
for power efficiency synthesis
20 Series fed class A amplifier, 2 Chalk & talk, PPT Video
Output power, efficiency synthesis,
Statement-
opinion -
summary
5 Summary and conclusion 1 PPT
12
Session No. 10
Session Outcome: 1. Learner will get to learn the input and out impedances of different negative
feedback topologies.
2. Learner will be able to compare the input and output impedances.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
10 Transformer coupled class A 2 Chalk & talk, PPT Video
amplifier, d.c. load line , a.c. load synthesis
line
10 Class B amplifier operation, Class 2 Chalk & talk , PPT Video
B circuits synthesis,
Statement-
opinion -
summary
10 Transformer coupled Push-Pull 2 Chalk & talk, PPT Video
amplifier, synthesis
10 Complementary symmetry push 2 Chalk & talk, PPT Video
pull amplifier synthesis,
Statement-
opinion -
summary
5 Summary and conclusion 1 PPT
Session No. 11
Session Outcome: 1. Learner will get to learn the input and out impedances of different negative
feedback topologies.
2. Learner will be able to compare the input and output impedances.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
20 Class C Class D amplifier 2 Chalk & talk, PPT Video
synthesis
15 Amplifier distortion, Harmonic 2 Chalk & talk , PPT Video
Distortion, THD synthesis,
Statement-
opinion -
summary
5 Graphical description of 2 Chalk & talk, PPT Video
harmonic distortion synthesis
5 Summary and conclusion 1 PPT
Session No. 12
13
Session Outcome: 1. Learner will get to know the difference between BJT and FET.
2. Learner will get to know different types of FETs and their working principle
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
10 Basic Difference between BJT and 1 Chalk & talk Group
FET discussion
10 Important characteristics of FET 1 Chalk & talk quiz
Session No. 13
Session No. 14
Session Outcome: 1. Learner will be able to relate different parameters of JFET
2. Learner will get knowledge on JFET amplifier circuit.
3. Learner will be able to understand the constructional details of D and E
MOSFETs.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
15 Different parameters of JFET 2 Chalk & talk Problem
(rd, gfs, u) and Relation among solving
these parameters
14
15 Simple JFET as an Amplifier 1 Chalk & talk
10 Significance of MOSFET, 1 Chalk & talk , PPT Leading
Constructional details and questions,
Symbols for D-MOSFET and E- statement-
MOSFET. summary
5 Summary and conclusion PPT
Session No. 15
Session Outcome: 1. Learner will get to learn different MOSFET working principles
2. Learner will analyse the MOSFET based on the characteristics
Time(Min) Topic BTL Teaching Learning Active
Method learning
method
5 Record of Attendance -- NA
15 Working of D-MOSFET in 1 Chalk & talk, PPT Peer review
Depletian and Enhancement
modes.
15 Transfer characteristics of D- 2 Chalk & talk, PPT Critical
MOSFET thinking
10 E-MOSFET construction , 1 Chalk & talk, PPT Leading
Working and Characteristics questions
5 Summary and conclusion 1 PPT
Session No. 16
Session Outcome: 1. Learner will understand the concept of .channel length modulation
2. Learner will learn know various constructional details of CMOS and VMOS.
.
Time(Min) Topic BTL Teaching Active learning
Learning Method method
5 Record of Attendance -- NA
15 Channel length Modulation 1 PPT Statement-
opinion -
summary
10 Constructional details of CMOS 1 Chalk & talk , PPT Quiz
10 Constructional details of VMOS 1 Chalk & talk,PPT One minute
paper
5 Summary and conclusion PPT
Session No. 17
Session Outcome: 1. Learner will understand various CMOS and TTL ICs
2. Learner will understand the difference between CMOS and TTL ICs
15
Time(Min) Topic BTL Teaching Active learning
Learning Method method
5 Record of Attendance -- NA
15 Various CMOS ICs and their 1 PPT Brain storming
characteristics sessions
15 Various TTL ICs and their 1 PPT Quiz
characteristics
10 Differences between CMOS and 1 Chalk & Talk , Group
TTL ICs PPT discussion
5 Summary and conclusion Chalk & Talk ,
PPT
Session No. 18
Session Outcome: 1. Learner will be able to design a circuit using different JFET biasing
arrangements.
2. Learner will understand the DC load line analysis.
Session No. 19
Session Outcome: 1. Learner will able to design FET Amplifier
2. Learner will understand different parameters of practical FET component.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
15 Practical FET Amplifier 2 Chalk & talk, PPT quiz
20 Mathematical Analysis of 3 Chalk & talk , PPT Problem
equivalent circuit of FET and solving
obtain different values of Gain ,
16
Bandwidth ,input and output
impedances
5 FET (BFW10) data sheet 1 PPT Group
discussion
5 Summary and conclusion Chalk & talk, PPT
Session No. 20
Session Outcome: 1.Introduction to different types of IC's
.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
15 Introduction 2 Chalk & talk, PPT Quiz
20 Different types if IC's and 2 Chalk & talk , PPT Quiz
packagings
5 IC- 555 & 741 1 PPT Group
discussion
5 Summary and conclusion Chalk & talk, PPT
Session No. 21
Session Outcome: 1.Understand general IC design and fabrication
.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
15 Various IC design 1 Chalk & talk, PPT Quiz
25 Fabrication steps involved in IC 1 Chalk & talk , PPT Animation
design.
5 Summary and conclusion Chalk & talk, PPT
Session No. 22
Session Outcome: 1.A student will understand Op-amp
17
Ideal Op-amp and its Peer
15 characteristics 2 Chalk & Talk Learning
5 Summary and conclusion 1 PPT
Session No. 23
Session Outcome: 1. Understand the characteristics of Op-Amp.
Session No. 24
Session Outcome: 1 Understand the various linear applications of opamp.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
Visual
20 Op Amp ... Inverting amplifiers 2 Chalk & Talk Learning
Op Amp ... Non Inverting Visual
15 amplifiers 2 Chalk & Talk Learning
5 Summary and conclusion 1 PPT
Session No. 25
Session Outcome: 1.Understand the concepts of OP-AMP as Adder and Subtractor
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
Visual
15 OP-AMP as Adder 1 Chalk & Talk Learning
Visual
15 Op-AMP as subtractors 1 Chalk & Talk Learning
10 LM 324 IC 2 Chalk & Talk
5 Summary and conclusion 1 PPT
18
Session No. 26
Session Outcome: 1. Learner will able to design a scaling amplifier
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
15 Concept of scaling amplifier Chalk & Talk
25 Design of scaling amplifier Chalk & Talk
5 Summary and conclusion 1 PPT
Session No. 27
Session Outcome: 1. Learner will get to design an opamp based Integrator and Differentiator
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
Visual
15 Op Amp ... Integrator 1 Chalk & Talk Learning
Visual
15 Op Amp ... Differentiator 1 Chalk & Talk Learning
10 710 IC 2 Chalk & Talk
5 Summary and conclusion 1 PPT
Session No. 28
Session Outcome: 1. Learner will get to know the 710 IC based Comparator & Schmitt trigger using
opamp
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
20 Comparator using IC 710 2 Chalk & Talk
One minute
20 Schmitt trigger using opamp 1 Chalk & Talk paper
5 Summary and conclusion 1 PPT
Session No. 29
Session Outcome: 1. Learner will get to know the Op-Amp based instrumentation amplifier
19
Session No. 30
Session Outcome: 1. Learner will get to know the LPF and HPF active filters.
Session No. 33
Session Outcome: Students will be able to
1. Understand the concept of Barkhausen’s criterion.
2. Design an RC phase shift oscillator
20
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
10 Barkhausen’s criterion 2 Chalk & talk Statement-
opinion -
summary
10 Function generator using 1 Chalk & talk, PPT Video
LM1428 synthesis
5 Classification of oscillators 1 Chalk & talk Statement-
opinion -
summary
15 RC Phase shift oscillator using 2 Chalk & talk Video
741 synthesis
5 Summary and conclusion PPT
Session No. 34
Session No. 35
Session Outcome: Students will be able to
1. understand the operation and architecture of a 555 IC
2. Design astable multi vibrator.
21
Summary
10 functional architecture of 555 1 Chalk & talk Leading
questions
15 Astable operation and design 2 Chalk & talk , PPT Leading
questions,
statement-
summary
5 Summary and conclusion PPT
Session No. 36
Session Outcome: Students will be able to
1. Design Astable and monostable multivibrator.
Session No. 37
Session Outcome: Students will be able to
1. Design monostable multi vibrator.
2. understand bistable operation
.
Time(Min) Topic BTL Teaching Active learning
Learning Method method
5 Record of Attendance -- NA
10 Recap- monostable 1 PPT Video
synthesis,
Statement-
opinion -
summary
15 Problem solving monostable 2 Chalk & talk , PPT Video
synthesis,
leading
questions
15 Bistable operation 2 Chalk & talk,PPT Video
22
synthesis,
leading
questions
5 Summary and conclusion PPT
Session No. 38
Session Outcome: 1.Learner will understand various filters
2. Learner will understand the different operations of the filters
Time(Min) Topic BTL Teaching Active learning
Learning Method method
5 Record of Attendance -- NA
10 Types of filters 2 PPT Brain storming
sessions
15 LC filters 2 PPT Video synthesis
15 Operation of LC filters 1 Chalk & Talk , Video synthesis
PPT
5 Summary and conclusion PPT
Session No. 39
Session Outcome: 1. Learner will be able to design the RC filters
2. Learner will understand the operation of the RC filters
Session No. 40
Session Outcome: 1. Learner will able to understand the concept of ripple factor
2. Learner will understand half wave and full wave rectifiers ripple factors
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
23
5 Record of Attendance -- NA
20 Ripple factor for half wave 2 Chalk & talk, PPT Video
rectifier synthesis
20 Ripple factor for full wave 2 Chalk & talk , PPT Video
rectifier synthesis,
Statement-
opinion -
summary
5 Summary and conclusion Chalk & talk, PPT
Session No. 41
Session Outcome: Students will be able to
1. Understand the function of a voltage regulator IC.
2. Design a voltage regulator using LM339 ND 723.
Time(Min) Topic BTL Teaching Active
Learning Method learning
method
5 Record of Attendance -- NA
10 Concept of regulation 2 Chalk & talk, PPT Video
synthesis
15 Design of voltage regulators 3 Chalk & talk , PPT Video
using LM339 synthesis,
Statement-
opinion -
summary
15 Design of voltage regulators 3 Chalk & talk , PPT Video
using IC723 synthesis
5 Summary and conclusion Chalk & talk, PPT
Session No. 42
Session Outcome: Students will be able to
1. Design Voltage regulators using 78XX and 79XX.
2. Operation of SCR and Triac
24
PRACTICAL COMPONENT
List of Experiments supposed to finish in Open Lab Sessions:
CO-
Lab session no List of Experiments
Mapping
1 Batch division, Demonistration of first cycle Lab Experiments
( From session no.2 to session no. 7 1st cycle experments )
2 CO5
Transistor as a squarer and an opto driver
Design of Astable multivibrator with relay driven blinking LED using 555 CO5
12
LIST OF TUTORIALS: NA
Tutorial CO-
Topics
session no Mapping
NA
25
and non linear), Active filters
12 A05 Miscellaneous Topics Designs of - RCPS oscillator, WB CO4
Oscillator, Hartley and Colpitt's
oscillator, Ripple factor using C -
filters, 555 multivibrators, Voltage
regulators
Hour 1 2 3 4 5 6 7 8 9
Day Component 9:00-9:50 9:50-10:40 11:00-11:50 11:50-12:40 12:40-1:30 1:30-2:20 2:20-3:10 3:20-4:10 4:10-5:00
Theory S1, S11
Mon Lab S4, S13, S23
Theory
Tue Lab
Theory
Wed Lab
Theory
Thu Lab
Theory
Fri Lab
Theory
Sat Lab
REMEDIAL CLASSES:
Supplement course handout, which may perhaps include special lectures and discussions that would be
planned, and schedule notified accordingly.
SELF-LEARNING:
Assignments to promote self-learning, survey of contents from multiple sources.
26
DELIVERY DETAILS OF CONTENT BEYOND SYLLABUS:
Content beyond syllabus covered (if any) should be delivered to all students that would be planned, and
schedule notified accordingly.
EVALUATION:
27
Weightage 5M
Attendance Max Continuous evaluation
5M
Marks
Lab
Weightage 16M 16
End- External
SE Lab Max
Semester 40M Dates 1½ 40
Expt. Marks
Summative
Evaluation
Total = 40 Weightage 24 End Sem 6 6 6 6
% Semester
Max Exam 3 hrs
End Exam 100M 25 25 25 25
Marks Dates
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ATTENDANCE POLICY
Every student is expected to be responsible for regularity of his/her attendance in class rooms and laboratories,
to appear in scheduled tests and examinations and fulfill all other tasks assigned to him/her in every course. For
Promotion, a Minimum of 50% of internal marks must be obtained. In every course, student has to maintain a
minimum of 85% attendance to be eligible for appearing in Semester end examination of the course, for cases of
medical issues and other unavoidable circumstances the students will be condoned if their attendance is between
75% to 85% in every course, subjected to submission of medical certificates, medical case file and other needful
documental proof to the concerned departments.
DETENTION POLICY
In any course, a student has to maintain a minimum of 85% attendance and must secure a minimum of 50%
marks in In-Semester Examinations to be eligible for appearing to the Semester End Examination, failing to
fulfill these conditions will deem such student to have been detained in that course.
PLAGIARISM POLICY
Use of unfair means in any of the evaluation components will be dealt with strictly, and the case will be
reported to the examination committee.
Chamber
Chamber Chamber
Consultation Signature of
S.No. Name of Faculty Consultation Consultation
Timings for each Course faculty
Day (s) Room No:
day
Thursday, Any time Thursday,
1 Mr. K Gopiram Lunch hour of Lunch break during R402 4C11
any day other days
Thursday, Any time Thursday,
Dr.Mithun
2 Lunch hour of Lunch break during R102 A1
Chakarborty any day other days
Thursday, Any time Thursday,
3 Mr. P.Syam Sundar Lunch hour of Lunch break during R102 1C15
any day other days
Thursday, Any time Thursday,
4 Mr. K. Uday Kiran Lunch hour of Lunch break during R402
any day other days
Thursday, Any time Thursday,
5 Ms. P. Poorna Priya Lunch hour of Lunch break during R402
any day other days
Thursday, Any time Thursday,
6 Mr. M. Anil Kumar Lunch hour of Lunch break during E014
any day other days
Thursday, Any time Thursday,
7 Ms. S. A. Sivs Sankari Lunch hour of Lunch break during R102 1C13
any day other days
Thursday, Any time Thursday,
8 Ms. Girija Sravani Lunch hour of Lunch break during L709
any day other days
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GENERAL INSTRUCTIONS
Students should come prepared for classes and carry the text book(s) or material(s) as prescribed by the Course
Faculty to the class.
NOTICES
Most of the notices are available on the LMS platform.
All notices will be communicated through the institution email.
All notices concerning the course will be displayed on the respective Notice Boards.
HEAD OF DEPARTMENT:
Provisionally Approved
DEAN-ACADEMICS
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