1.

Problem: NMOS Inverter (Solution)

As shown in the plot, 5
Pull−Up−Characteristics

the resistor has a depletion

4.5
linear voltage to
current behavior. The 4
depletion FET works
2. Exercise: NMOS and CMOS Inverter as a current source as 3.5

soon it reaches 3 resistive

Solution Suggestions saturation since VGS

Vout (V)
2.5
is always 0.
The VGS of the 2

enhancement 1.5
enhancement

transistor is the
difference between 1

VOUT and VDD; so VGS 0.5

and therefore IDS
VLSI- Design of Integrated Circuits,
depends on VOUT and 0
0 0.05 0.1 0.15 0.2 0.25 0.3
WS 2002/03 VT. I
out
(mA)

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Microelectronic 2. Exercise: NMOS and Microelectronic
Systems CMOS Inverter Systems 2

1. Problem: NMOS Inverter (Solution) 1. Problem: NMOS Inverter (Solution)

With the depletion
V =5.0V 3.0V 2.75V
At VDS= 0.8V and VGS= 2.5V VGS=5.0V
3.5V
3.0V 2.75V MOSFET the same GS
3.5V

the MOSFET sinks about 4.5V problem occurs. 4.5V

0.25
0.25
With VGS= 2.5V the VGS=3V: ca. 56 µA sink capability
176µA. This is less then VGS=3V: ca. 46 µA sink capability
2.5V 4.0V 2.5V
the current required for
4.0V
VGS=2.5V: ID to small
MOSFET sinks less V =2.5V: I to small
GS D
the voltage drop of VDD- 0.2 than the required 0.2
2.4V
2.4V
VDS= 5V- 0.8V= 4.2V 2.3V
200µA. 2.3V

ID (mA)
ID (mA)

corresponding to 210µA 0.15 0.15

current through the 20kΩ 2.2V

2.1V At VGS= 3V the
2.2V
2.1V
resistor. 2.0V inverter can sink up 2.0V
0.1 0.1
1.9V to 56µA. 1.9V
1.8V 1.8V
At VGS= 3V the transistor 1.7V 1.7V
0.05 0.05
can sink up to 256µA, so 1.6V
1.5V
1.6V
1.5V
that 46µA remain for the
load. 0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
VDS (V)
VDS (V)

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2. Exercise: NMOS and Microelectronic 2. Exercise: NMOS and Microelectronic
CMOS Inverter Systems 3 CMOS Inverter Systems 4
 1. Problem: NMOS Inverter (Solution) 1. Problem: NMOS Inverter (Solution)
Determination of Voltage Transfer Characteristic (VTC)
VTC of NMOS−Inverter
V_in V_out 5
3.5V
3.0V
2.75V 0.00 4.0000
Pull−Up−Characteristic of Enhancement−Load
1.00 4.0000 4.5
0.25 1.50 2.5858
4.0V
4
4.5V 2.5V 1.60 2.3030
V =5.0V 1.70 2.0202
GS 3.5
0.2 1.80 1.7372
2.4V
1.90 1.4544 3
2.3V
2.00 1.1716
I (mA)

Vout (V)
0.15 2.10 0.9274 2.5
D

2.2V
2.1V
2.20 0.8000
2
2.30 0.7156
2.0V
0.1 2.40 0.6522
1.9V 1.5
2.50 0.6018
1.8V 2.75 0.5092 1
1.7V
0.05 3.00 0.4444
1.6V
1.5V 3.50 0.3572 0.5
4.00 0.3002
4.50 0.2594 0
0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
V (V) 5.00 0.2288 V (V)
in
DS
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2. Exercise: NMOS and Microelectronic 2. Exercise: NMOS and Microelectronic
CMOS Inverter Systems 5 CMOS Inverter Systems 6

1. Problem: NMOS Inverter (Solution) Review - Logic Voltage Levels

v
V DD VOL: Nominal voltage corresponding to a O
For the saturated-load nMOS inverter presented in figure, calculate: low logic state at the output of a logic V
+
a) VOH gate for vI = VOH. V
OH Slope = -1
Generally V- ≤ VOL.
b) VOL
c) VIH M2
v VOH: Nominal voltage corresponding to a
if O high logic state at the output of a logic
gate for vI = VOL.
VDD = 5V KR = βR = β1/ β2 = 8 vI Generally VOH ≤ V+.
Slope = -1
VT0 = 1.0V γ= 0.37V1/2 2|φF| = 0.6V M1
VIL: Maximum input voltage that will be
recognised as a low input logic level. V
OL
NM v
NML H I
VIH: Minimum input voltage that will be 0
V- 0 V V V V V
recognised as a high input logic level. OL IL IH OH +

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2. Exercise: NMOS and Microelectronic 2. Exercise: NMOS and Microelectronic
CMOS Inverter Systems 7 CMOS Inverter Systems 8
 1. Problem: NMOS Inverter (Solution) 1. Problem: NMOS Inverter (Solution)
V DD

D Remarks: a1) Analytical solution using substitution:

1) VDS2 = VGS2 ⇒ M2 is always in saturation! x 2 = VOH + 2 φ F x = VOH + 2 φ F
B
M2 S
v
D O
2) Body-effect affects the threshold voltage of the M2 transistor: x 2 − 2 φ F = VDD − VT 0 − γx + γ 2 φ F
vI
M1 S
B
VT 2 = VT 0 + γ (V SB + 2 φF − 2 φF ) 2nd degree equation:

a) Assume: M1 is cutoff for VI = VOL

(
x 2 + γx − VDD + 2 φ F − VT 0 + γ 2 φ F = 0 )
VOH = VDD − VT 2 (VSB ) = VDD − VT 2 (VOH ) ⇒ x 2 + 0.37 V ⋅ x − 4.8866V = 0
[
VOH = VDD − VT 0 + γ (V OH + 2 φF − 2 φF )]  0.37
x1, 2 =  −

± 2.2183  V
x1 = −2.4033 V
 2  x2 = 2.0333 V
There are two methods for solving this equation
• Analytically VOH ,1 = 5.1758 V - impossible!
• Numerically VOH = x 2 − 2 φ F
VOH = 3.5343 V

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2. Exercise: NMOS and Microelectronic 2. Exercise: NMOS and Microelectronic
CMOS Inverter Systems 9 CMOS Inverter Systems 10

1. Problem: NMOS Inverter (Solution) 1. Problem: NMOS Inverter (Solution)

Iterative Solution of the Equation: x = cos(x)

1.6 a2) Iterative method:

Numerical solution using an 1.4 [

VOH = VDD − VT 0 + γ (V OH + 2 φF − 2 φF )]= 4 − 0.37( V
OH + 0.6 − 0.6 )
iterative method: y=x
1.2

Algorithm for solving n 0 1 2 3 4

equations of type x = f(x): 1 VOH(n) (V) 4.0000 3.4930 3.5380 3.5339 3.5343
• choose a initial value x0 VOH(n+1) (V) 3.4930 3.5380 3.5339 3.5343 3.5343
• repeat xn+1 = f(xn) until
y

0.8
convenient precision is
reached 0.6
y = cos(x)
Example: Solve x = cos(x) 0.4

0.2
X =0 Solution: x = 0.7391
0

0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
x

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2. Exercise: NMOS and Microelectronic 2. Exercise: NMOS and Microelectronic
CMOS Inverter Systems 11 CMOS Inverter Systems 12
 1. Problem: NMOS Inverter (Solution) 1. Problem: NMOS Inverter (Solution)
b) c) Assume: M1 in linear region (M2 is always in saturation)
VOL - is defined for VI = VOH ⇒ M1 linear, M2 saturation
Equating the currents through the two transistors:
β1
I1 =
β1
[2(VGS 1 − VT 1 )VDS 1 − VDS
2
1]= I2 =
β2
[VGS 2 − VT 2 (VOL )]2 ⇒ ID =
2
[ β
2(VI − VT 1 )VO − VO2 ] = I L = 2 [VDD − VO − VT 2 (VO )] (1)
2
2

2 2
β1
[2(VI − VT 1 )VOL − VOL2 ] = β22 [(VDD − VOL ) − VT 2 (VOL )]2 [VDD − VO − VT 2 (VO )]2 (2)
1 1
⇒ ⇒ VI = VT 1 + VO +
2 2 2 β RVO

2 β R (VI − VT 1 )VOL − β RVOL = [VDD − VOL − VT 2 (VOL )]

2 2
Using the total differential we get from ID = IL:

VOL =
[VDD − VOL − VT 2 (VOL )] 2
+
2
VOL
For
VI = VOH = 3.5343V VDD = 5V ∂I D ∂I ∂I ∂I ∂I L
dVI + D dVO = L dVI + L dVO =0
2 β R (VI − VT 1 ) 2(VI − VT 1 ) VT1 = VT0 =1.0V βR = 8 ∂VI ∂VO ∂VI ∂VO
with:
∂VI
n 0 1 2 3 4 5 ∂I D
VOL(n) (V) 0 0.3946 0.3368 0.3405 0.3402 0.3403
dVO ∂VI
VOL(n+1) (V) 0.3946 0.3368 0.3405 0.3402 0.3403 0.3403 And therefore: =
dVI ∂I L ∂I D
−
VOL < VT1 ⇒ M1 is cutoff for VI = VOL ⇒ Assumption from a) confirmed ∂VO ∂VO
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2. Exercise: NMOS and Microelectronic 2. Exercise: NMOS and Microelectronic
CMOS Inverter Systems 13 CMOS Inverter Systems 14

1. Problem: NMOS Inverter (Solution) 1. Problem: NMOS Inverter (Solution)

dVO
VIH is defined for: = −1
dVI Using equations (4) and (5):
dVI = dVIH

β1VO , 0
So that,
 dV 
= 1 (3) [V − VT 2 (VO ,0 )] + 2η (VO ,0 )VO ,0 [VDD − VT 2 (VO ,0 )]
2

VO , 0 =
DD

β 2 (VDD − VO ,0 − VT 2 (VO ,0 ))1 + T 2  + β (V − V − V ) 1 + 3β R + 2η (VO ,0 )

 dVO VO =VO , 0 
1 IH T1 O,0
 
n 0 1 2
with: VO , 0 = VO (VIH ) ⇔ VIH = VI (VO , 0 ) VO,0(n) (V) 0.5000 0.7916 0.7895
γ 0.7916 0.7895 0.7895
= η (VO , 0 ) =
dVT 2 VO,0(n+1) (V)
dVO VO =VO , 0 2 VO ,0 + 2 φ F
VO ,0 = 0.7895V
 1 + η (VO ,0 )  1
⇒ VIH = VT 1 + VO ,0  2 +  − [VDD − VT 2 (VO,0 )](1 + η (VO,0 )) (4) From equations (4) or (5) we get the desired voltage VIH:
 βR  βR VIH = 2.136 V
From Equation (2) we get:
Thus, the assumption has been right.
VIH
1
= VT 1 + VO ,0 +
1
[VDD − VO,0 − VT 2 (VO,0 )]2 (5)
2 2 β RVO ,0
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2. Exercise: NMOS and Microelectronic 2. Exercise: NMOS and Microelectronic
CMOS Inverter Systems 15 CMOS Inverter Systems 16
 2. Problem: VIL and VIH for a CMOS Inverter 2. Problem: VIL and VIH for a CMOS Inverter
(Solution) (Solution)
∂I D ∂I ∂I ∂I
a) VIL: P- channel: VDS > VGS- VT → non saturation ⋅ dVin + D ⋅ dVout = L ⋅ dVin + L ⋅ dVout
∂Vin ∂Vout ∂Vm& ∂Vout
N-channel: VDS > VGS - VT → saturation 14243
0
βn
(VGS ,n − VT ,n )2 = β p (2[VGS , p − VT , p ]⋅VDS , p − VDS2 , p ) dVout
=
∂I D
∂Vin − ∂∂VILin
=
2 ⋅ (VIL − VTn ) − 2 ⋅ (VO − VDD )
VO = Vout (VIL )
2 442443 1
1 2 444442444443 dVin ∂I L
∂Vout Vin =VIL
2 ⋅ (VIL − VDD − VTp ) − 2 ⋅ (VO − VDD )
VGS ,n = Vin
ID IL

VIL − VTn − VO + VDD !

VGS , p = −VDD + Vin = =− 1
VIL − VTp − VO
VDS , p = −VDD + Vout VIL − VTn − VO + VDD = −VIL + VTp + VO
β
βn
(
(Vin − VTn )2 = p 2[Vin − VDD − VTp ][Vout − VDD ] − [Vout − VDD ]2 ) βn = β p − 2VO = −2VIL + VTn + VTp − VDD
VO = VIL − 12 (VTn + VTp − VDD )
2 2
VT = −VTp = VTn
(Vin − VTn ) = 2 ⋅ (Vin − VDD − VTp )(Vout − VDD ) − (Vout − VDD )
2 2
(1)
VO = VIL + 12 VDD ( 2)

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2. Exercise: NMOS and Microelectronic 2. Exercise: NMOS and Microelectronic
CMOS Inverter Systems 17 CMOS Inverter Systems 18

2. Problem: VIL and VIH for a CMOS Inverter 2. Problem: VIL and VIH for a CMOS Inverter
(Solution) (Solution)
Eq. (1) must also be satisfied: 3 2
VDD − VDD ⋅ VT + VT2
VIL = 4

(VIL − VT )2 = 2 ⋅ (VIL − VDD + VT )(VO − VDD ) − (VO − VDD )2 (3) 2VDD − 4VT
VDD (V) 5.0 10.0 15.0
Combining eq. (2) and (3) yields: VIL (V) 2.075 3.950 5.825

(VIL − VT )2 = 2 ⋅ (VIL − VDD + VT )(VIL − 12 VDD ) − (VIL − 12 VDD )2 The value for VIH can be deduced from the symmetry.
V − 2 ⋅ VIL ⋅VT + V =
2
IL T
2

(
2 ⋅ VIL2 − VIL ⋅ VDD + VIL ⋅ VT − 12 VIL ⋅VDD + 12 VDD
2
)
− 12 VDD ⋅ VT − VIL2 + VIL ⋅ VDD − 14 VDD
2

= VIL2 − 2VIL ⋅ VDD + 2 ⋅VIL ⋅ VT + 34 VDD

2
− VDD ⋅ VT

VIL (2VDD − 4VT ) = 34 VDD

2
− VDD ⋅ VT + VT2

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2. Exercise: NMOS and Microelectronic 2. Exercise: NMOS and Microelectronic
CMOS Inverter Systems 19 CMOS Inverter Systems 20
 2. Problem: Power consumption of a CMOS
Inverter (Solution)

b) The current consumption reaches its maximum for

VGS = Vin = Vth = VDD/2

βn
c) both MOSFETs are in saturation: I DS = (VGS − VTn )2
2

I DS , max =
βn
2
( VDD
2 − VTn )
2

= 20 µA2
V
(VDD
2
− 0.8V )
2

VDD (V) 5.0 10.0 15.0

Imax (µA) 57.8 352.8 897.8

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2. Exercise: NMOS and Microelectronic
CMOS Inverter Systems 21