FIELD EFFECT TRANSISTOR

A field effect transistor is a voltage controlled device i.e. the output characteristics of the device are
controlled by input voltage. There are two basic types of field effect transistors:
1. Junction field effect transistor (JFET)
2. Metal oxide semiconductor field effect transistor (MOSFET)

Junction Field Effect Transistor (JFET)

A JFET is a three terminal semiconductor device in which current conduction is by one type of carrier i.e.
either by electrons or holes.
The current conduction is controlled by means of an electric field between the gate and the conducting
channel of the device.
The JFET has high input impedance and low noise level.

Construction Details:
A JFET consists of a p-type or n-type silicon bar containing two pn junctions at the sides as shown in fig.

The bar forms the conducting channel for the

charge carriers.

If the bar is of p-type, it is called p-channel JFET

as shown in fig.(i) and if the bar is of n-type, it is
called n-channel JFET as shown in fig.(ii).

The two pn junctions forming diodes are

connected internally and a common terminal
called gate is taken out.

Other terminals are source and drain taken out

from the bar as shown in fig.1.

Thus a JFET has three terminals such as , gate (G), source (S) and drain (D).

JFET Schematic symbols

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JFET Polarities
Fig.(i) shows the n-channel JFET polarities and fig.(ii) shows the p-channel JFET polarities.

In each case, the voltage between the gate and source is such that the gate is reverse biased.
The source and the drain terminals are interchangeable.
The following points may be noted:
1. The input circuit (i.e. gate to source) of a JFET is reverse biased. This means that the device has high
input impedance.
2. The drain is so biased w.r.t. source that drain current ID flows from the source to drain.
3. In all JFETs, source current IS is equal to the drain current i.e IS = ID.

Principle and Working of JFET

Principle of operation of JEFT
Fig. shows the circuit of n-channel JFET with normal polarities. The two pn junctions at the sides form two
depletion layers.
The current conduction by charge carriers (i.e. electrons) is through the
channel between the two depletion layers and out of the drain.
The width and hence resistance of this channel can be controlled by
changing the input voltage VGS. The greater the reverse voltage VGS, the
wider will be the depletion layer and narrower will be the conducting
channel. The narrower channel means greater resistance and hence source to
drain current decreases. Reverse will happen when VGS decreases.
Thus JFET operates on the principle that width and hence resistance of the
conducting channel can be varied by changing the reverse voltage VGS.
In other word, the magnitude of drain current ID can be changed by altering
VGS.

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Working of JEFT
Case-i:

When a voltage VDS is applied between drain and source terminals and voltage on
the gate is zero as shown in fig., the two pn junctions at the sides of the bar
establish depletion layers.

The electrons will flow from source to drain through a channel between the
depletion layers.

The size of the depletion layers determines the width of the channel and hence
current conduction through the bar.

Case-ii:

When a reverse voltage VGS is applied between gate and source terminals, as shown in fig., the width of
depletion layer is increased.

This reduces the width of conducting channel, thereby increasing the resistance
of n-type bar.

Consequently, the current from source to drain is decreased.

On the other hand, when the reverse bias on the gate is decreased, the width of
the depletion layer also decreases.

This increases the width of the conducting channel and hence source to drain current.

A p-channel JFET operates in the same manner as an n-channel JFET except that channel current carriers will
be the holes instead of electrons and polarities of VGS and VDS are reversed.

P-Channel Operation of JFET

Case I: If VDS = 0 and VGS = 0, the device will be idle with no current i.e. IDS = 0.

Case II: Now consider VDS to be –ve while VGS is 0. At this state, the current flows from the source to the
drain (as per conventional direction) as the holes within the p-substrate move towards the drain while being
repelled from the source. The value of this current is restricted only by the channel-resistance and is seen to
increase with a decrease in VDS (Ohmic region). However once the pinch-off occurs (VDS = VP), the current
IDS saturates at a particular level IDSS, during which the device acts like a constant current source

N-Channel JFET Characteristics

The N-channel JFET characteristics or transconductance curve is shown in the figure below which is graphed
between drain current and gate-source voltage. There are multiple regions in the transconductance curve and
they are ohmic, saturation, cutoff, and breakdown regions.

Ohmic Region
The only region in which transconductance curve shows linear response and drain current is opposed by the
JFET transistor resistance is termed as Ohmic region.

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Saturation Region
In the saturation region, the N-channel junction field effect
transistor is in ON condition and active, as maximum current
flows because of the gate-source voltage applied.

Cutoff Region
In this cutoff region, there will be no drain current flowing
and thus, the N-channel JFET is in OFF condition.

Breakdown Region
If the VDD voltage applied to the drain terminal exceeds the
maximum necessary voltage, then the transistor fails to resist
the current and thus, the current flows from drain terminal to
source terminal. Hence, the transistor enters into the breakdown region.

P-Channel JFET Characteristics

The P-channel JFET characteristics or transconductance curve
is shown in the figure below which is graphed between drain
current and gate-source voltage. There are multiple regions in
the transconductance curve and they are ohmic, saturation,
cutoff, and breakdown regions.
Ohmic Region
The only region in which transconductance curve shows linear
response and drain current is opposed by the JFET transistor
resistance is termed as Ohmic region.

Saturation Region
In the saturation region, the N-channel junction field effect transistor is in ON condition and active, as
maximum current flows because of the gate-source voltage applied.

Cutoff Region
In this cutoff region, there will be no drain current flowing and thus, the N-channel JFET is in OFF condition.

Breakdown Region
If the VDD voltage applied to the drain terminal exceeds the maximum necessary voltage, then the transistor
fails to resist the current and thus, the current will flow from drain terminal to source terminal. Hence, the
transistor enters into the breakdown region.

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 METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR(MOSFET)

The MOSFET (Metal Oxide Semiconductor Field Effect Transistor) transistor is a semiconductor device
which is widely used for switching and amplifying electronic signals in the electronic devices. The MOSFET is
a four terminal device with source(S), gate (G), drain (D) and body (B) terminals.

Types of MOSFET Devices

The MOSFET is classified into two types such as;

 Depletion mode MOSFET

 Enhancement mode MOSFET

Based on Depletion and enhancement mode MOSFET are classified as

 N channel Depletion mode MOSFET

 N channel Enhancement mode MOSFET
 P channel Depletion mode MOSFET
 P channel Enhancement mode MOSFET

Depletion Mode: When there is zero voltage on the gate terminal, the channel shows its maximum conductance. As the
voltage on the gate is negative or positive, then decreases
the channel conductivity.

Enhancement mode: When there is no voltage on the gate the device does not conduct. More is the voltage
on the gate, the better the device can conduct.

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The symbols and basic construction for both configurations of MOSFETs are shown below.

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P-Channel MOSFET
The drain and source are heavily doped p+ region and the substrate is in n-type.

The current flows due to the flow of positively

charged holes also known as p-channel
MOSFET.

When we apply negative gate voltage, the

electrons present beneath the oxide layer
experience repulsive force and they are pushed
downward in to the substrate, the depletion
region is populated by the bound positive
charges which are associated with the donor
atoms.

The negative gate voltage also attracts holes

from p+ source and drain region into the
channel region.

N-Channel MOSFET

The drain and source are heavily doped n+ region and the substrate is p-type.

The current flows due to the flow of negatively

charged electrons, also known as n-channel MOSFET.

When we apply the positive gate voltage the holes

present beneath the oxide layer experience repulsive
force and the holes are pushed downwards in to the
bound negative charges which are associated with the
acceptor atoms.

The positive gate voltage also attracts electrons from

n+ source and drain region in to the channel thus an electron reach channel is formed.

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Characteristic Curves

n-channel Enhancement-type MOSFET

figure 1a shows the transfer characteristics (drain-to-source current IDS versus gate-to-source
voltage VGS) of n-channel Enhancement-type MOSFETs. From this, it is evident that the
current through the device will be zero until the VGS exceeds the value of threshold voltage
VT. This is because under this state, the device will be void of channel which will be
connecting the drain and the source terminals. Under this condition, even an increase in VDS
will result in no current flow as indicated by the corresponding output characteristics (IDS
versus VDS) shown by Figure 1b. As a result this state represents nothing but the cut-off region
of MOSFET’s operation.

once VGS crosses VT, the current through the device increases with an increase in IDS initially
(Ohmic region) and then saturates to a value as determined by the VGS (saturation region of
operation) i.e. as VGS increases, even the saturation current flowing through the device also
increases. This is evident by Figure 1b where IDSS2 is greater than IDSS1 as VGS2 > VGS1, IDSS3 is
greater than IDSS2 as VGS3 > VGS2, so on and so forth. Further, Figure 1b also shows the locus of
pinch-off voltage (black discontinuous curve), from which VP is seen to increase with an
increase in VGS.

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p-channel Enhancement-type MOSFET
Figure 2a shows the transfer characteristics of p-type enhancement MOSFETs from
which it is evident that IDS remains zero (cutoff state) untill VGS becomes equal to -VT. This
is because, only then the channel will be formed to connect the drain terminal of the
device with its source terminal. After this, the IDS is seen to increase in reverse direction
(meaning an increase in ISD, signifying an increase in the device current which will flow
from source to drain) with the decrease in the value of VDS. This means that the device is
functioning in its ohmic region wherein the current through the device increases with an
increase in the applied voltage (which will be VSD).

However as VDS becomes equal to –VP, the device enters into saturation during which a
saturated amount of current (IDSS) flows through the device, as decided by the value of
VGS. Further it is to be noted that the value of saturation current flowing through the
device is seen to increase as the VGS becomes more and more negative i.e. saturation
current for VGS3 is greater than that for VGS2 and that in the case of VGS4 is much greater
than both of them as VGS3 is more negative than VGS2 while VGS4 is much more negative
when compared to either of them (Figure 2b). In addition, from the locus of the pinch-off
voltage it is also clear that as VGS becomes more and more negative, even the negativity
of VP also increases.

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n-channel Depletion-type MOSFET
The transfer characteristics of n-channel depletion MOSFET shown by Figure 3a
indicate that the device has a current flowing through it even when VGS is 0V. This
indicates that these devices conduct even when the gate terminal is left unbiased, which
is further emphasized by the VGS0 curve of Figure 3b. Under this condition, the current
through the MOSFET is seen to increase with an increase in the value of VDS (Ohmic
region) untill VDS becomes equal to pinch-off voltage VP. After this, IDS will get saturated
to a particular level IDSS (saturation region of operation) which increases with an increase
in VGS i.e. IDSS3 > IDSS2 > IDSS1, as VGS3 > VGS2 > VGS1. Further, the locus of the pinch-off voltage
also shows that VP increases with an increase in VGS.

However it is to be noted that, if one needs to operate these devices in cut-off state, then
it is required to make VGS negative and once it becomes equal to -VT, the conduction
through the device stops (IDS = 0) as it gets deprived of its n-type channel (Figure 3a).

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p-channel Depletion-type MOSFET
The transfer characteristics of p-channel depletion mode MOSFETs (Figure 4a)
show that these devices will be normally ON, and thus conduct even in the absence of
VGS. This is because they are characterized by the presence of a channel in their default
state due to which they have non-zero IDS for VGS = 0V, as indicated by the VGS0 curve of
Figure 4b. Although the value of such a current increases with an increase in VDS initially
(ohmic region of operation), it is seen to saturate once the VDS exceeds VP (saturation
region of operation). The value of this saturation current is determined by the VGS, and is
seen to increase in negative direction as VGS becomes more and more negative. For
example, the saturation current for VGS3 is greater than that for VGS2 which is however
greater when compared to that for VGS1. This is because VGS2 is more negative when
compared to VGS1, and VGS3 is much more negative when compared to either of them.
Next, one can also note from the locus of pinch-off point that even VP starts to become
more and more negative as the negativity associated with the VGS increases.

Lastly, it is evident from Figure 4a that inorder to switch these devices OFF, one needs to
increase VGS such that it becomes equal to or greater than that of the threshold voltage VT.
This is because, when done so, these devices will be deprived of their p-type channel,
which further drives the MOSFETs into their cut-off region of operation.

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Applications of MOSFET

 MOSFETs are used in digital integrated circuits, such as microprocessors.

 Used in calculators.
 Used in memories and in logic CMOS gates.
 Used as analog switches.
 Used as amplifiers.
 Used in the applications of power electronics and switch mode power supplies.
 MOSFETs are used as oscillators in radio systems.
 Used in automobile sound systems and in sound reinforcement systems.

Applications of JFET

o The JFET is used as a constant current source.

o The JFET is used as a buffer amplifier.
o The JFET is used as an electronic switch.
o The JFET is used as a phase shift oscillator.
o The JFET is used as high impedance wide band amplifier.
o The JFET is used as a voltage variable resistor (VVR) or voltage development resistor (VDR).
o The JFET is used as a chopper.
o It is used for High Input Impedance Amplifier.
o It is used as a chopper.

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