CS302 Final Exam (Fall 2009)

Time 2 Hours

Total questions 41

Objective questions 31
Subjective question 10

Question (Marks 1)
The group of bits 10111 is serially shifted (right-most bit first) into an 5-bit parallel
output shift register with an initial state 01110. What will be the contents of register after
three clock pulses the register contains?

Question (Marks 1)
How clock skew is eliminated?

Question (Marks 2)
Give the circuit diagram of the Gated SR Latch.

Gated SR Latch.

Question (Marks 2)
How erase operation works in context to Flash memory?

Flash memory is an electronic (solid-state) non-volatile computer storage medium that can
be electrically erased and reprogrammed.
Although flash memory is technically a type of EEPROM, the term "EEPROM" is generally
used to refer specifically to non-flash EEPROM which is erasable in small blocks, typically
bytes.[citation needed] Because erase cycles are slow, the large block sizes used in flash memory
erasing give it a significant speed advantage over non-flash EEPROM when writing large
amounts of data. As of 2013, flash memory costs much less than byte-programmable
EEPROM and had become the dominant memory type wherever a system required a
significant amount of non-volatile solid-state storage.

Question (Marks 3)
How the frequency of an unknown signal is calculated?

Question (Marks 3)

Given the statement in PLD programming;

Y PIN 23 ISTYPE ‘COM’;

Explain what does this statement mean?

Question: 38 (Marks 5)
Flash analogue to digital converter

Question: 39 (Marks 5)
How 12(1100) is detected by the third NAND Gate?
Why clock signal is added to all the three gates?

Question: 40 (Marks 10)

The One-Shot is triggered by applying a short pulse at the input of the NOR gate
at time interval t1. The One-Shot is in its stable state with output at logic zero at time
interval < t1. The logic high triggering pulse at the input of the NOR gate sets its output to
logic low.
Give step wise working of One-Shot Mono-stable multi-vibrator after triggering pulse is
applied.
Question: 41 (Marks 10)
Give pin names of 4-bit Synchronous Counter 74HC163

Q#1 Find bytes of 34K×4?

Ans 34 * 1024 =34814 bytes
Q#2 Name two mode IN Which PAL are programmed
Ans The PAL has programmable AND array and a fixed OR array

Q#3 Three types of error while converting Analogue signal into digital.(447)
Ans Analogue to Digital converters exhibit three different types of errors during their
conversion operation. The three errors encountered during the conversion operation are
the
Missing Code, Incorrect Code and the Offset error. Q#4 Calculate power dissipation of
circuit by using formula. Ans flip-flop consumes power during its operation. The power
consumed by a flip-flop is
defined by P = Vcc x Icc. The flip-flop is connected to +5 volts and it draws 5 mA of
current
during its operation, therefore the power dissipation of the flip-flop is 25 mW. Q#5 In
state machine, how the two states are said to be equivalent. Ans Two states are considered
equivalent if for the same set of inputs the states change to the
same next state or equivalent next states and give identical outputs. Q#6 Mealy Machine
truth table given , draw diagram. 5

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Ans Pg(334)
Q#7 Explain the difference between 1-to-4 Demultiplexer and 2-to-4 Binary Decoder?
Ans: The circuit of the 1-to-4 Demultiplexer is similar to the 2-to-4 Binary Decoder. The
only
difference between the two is the addition of the Data Input line, which is used as enable
line in
the 2-to-4 Decoder circuit. Q#8 Define state variable. Ans A state variable is one of the
set of variables that are used to describe the mathematical "state" of a dynamical system
Q#9 What does function E(bar) signals perform in DRAM. Ans The E(bar) signal enables
the DRAM chip. When the E(bar) signal is in low state, the chip
becomes enabled. Q#10 Tri-state buffer control input can b connected in four ways. Write
any three names. Ans
1.Connected to Vcc. The output is always enabled. 2. Connected to GND. The output is
disabled and the output pin is configured as an input pin. 3. Connected to the external pin
(11) which can be connected to Vcc or GND. The tri-state
buffer is therefore controlled externally by applying an appropriate signal at the pin. 4.
Connected to the output of one of the eight AND gates connected to the OLMC. Thus the
tri-state buffer is controlled by a logical expression. Q#11 Design a test vector for a 2-bit
comparator circuit. Ans Pg(206)
[0, 0, 0, 0] → [0, 1, 0];
[0, 0, 0, 1] → [0, 0, 1];
[0, 0, 1, 0] → [0, 0, 1];
[0, 0, 1, 1] → [0, 0, 1];
[0, 1, 0, 0] → [1, 0, 0];
[0, 1, 0, 1] → [0, 1, 0];
[0, 1, 1, 0] → [0, 0, 1];
[0, 1, 1, 1] → [0, 0, 1];
[1, 0, 0, 0] → [1, 0, 0];
[1, 0, 0, 1] → [1, 0, 0];
[1, 0, 1, 0] → [0, 1, 0];
[1, 0, 1, 1] → [0, 0, 1];
[1, 1, 0, 0] → [1, 0, 0];
[1, 1, 0, 1] → [1, 0, 0];
[1, 1, 1, 0] → [1, 0, 0];

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[1, 1, 1, 1] → [0, 1, 0];
Figure 20.19a Test Vector of a 2-bit Comparator
Q#12 You are required to draw block diagram of rotate left operation of shift register and
also
write it’s working. Ans
Q#13 Truth table for a gated S-R Latch. Ans
Q#14 Three differences between SRAM and DRAM. Ans The Static Ram (SRAM) is
non-volatile and is not a high density memory as a latch is
required to store a single bit of information. Implementation of a latch requires almost six
transistors. The Dynamic Ram is also non-volatile however it offers high density
memories as
each storage cell requires a single transistor and a capacitor. Q#15 Explain Analogue to
Digital conversion errors. Ans Analogue to Digital converters exhibit three different types
of errors during their
conversion operation. The three errors encountered during the conversion operation are
the
Missing Code, Incorrect Code and the Offset error. The three errors are represented
through
graphs. A test signal which is an ideal linear ramp is assumed for testing for the three
errors. Q#16 What is JK flip flop's "Set-up time"?
Ans The minimum time required for the input logic levels to remain stable before the
clock
transition occurs is known as the Set-up time. Q#17 Differentiate between negatively
triggered JK flip flop and positively triggered JK flip flop.

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Ans In positive edge triggered flip flop the clock samples the input line at the positive
edge of
the clock pulse.while in negative edge triggered flip flop the clock samples the input line
at the
negative edge of the clock pulse. The state of the output of the flip flop is set or reset
depending upon the state of the input at
positive edge of the clock while in negative edge triggered flip flop the output of the flip
flop is
set or reset at the negative edge of the clock pulse. Q#18 next state table bnan tha,.....(5)

Q#19 how split the memory in rows and columns ...how memory get slow wd highr
data.......(5)
Ans As the memories get larger the decoders that decode and select a unique memory
location also
become very large with large number of gates. Due to the increased level of gates of the
decoding
circuitry the delay in decoding the input address increases, thereby slowing the memory
access. Q#20 Define quantization?
Ans The process of converting the analogue signal into a digital representation (code) is
known as quantization
Q#21 Draw next state table having 3-bit up/counter

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Q#22 Write down the names of two basic operations are performed by memory and
explain
signals with diagram 5 marks

Ans Read and Write Signals

Address Signals
Data Signals
Memory Select or Enable Signal

Q#23 Draw the state diagram of 3-bit up-down counter, use an external input X, when X
sets to
logic 1, the counter counts downwards, otherwise upward. 5 marks
Ans adjust it according to the question

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Q#24 Draw the Flash A/D Converter diagram........ 5 marks

Q#25 Draw the table of S-R latches. 3 marks

Q#26 how PROMs is differ from ROMs

The difference between a PROM and a ROM (read-only memory) is that a PROM is
manufactured as
blank memory, whereas a ROM is programmed during the manufacturing process. To
write data onto
a PROM chip, you need a special device called a PROM programmer or PROM burner.
Q#27 explain the statement:
Y PIN 23 ISTYPE ‘com’;

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Q#28 How can a serial in/parallel out register be used as a serial in/serial out register
Ans The 74HC195 is a 4-bit Parallel In/Parallel Out Register. It also has a Serial In input,
therefore the register can also be used as a Serial In/Parallel Out or as a Serial In/ Serial
Out
register
Q#29 . Connect two 74HC164 – 4bit Synchronous Counter to implement decade
cascading
counter. (5 mark)

Q#30 Write the names of the operations which can be performed on memory, also draw
signals. (5 marks)
Ans The basic operations are performed on memories, that is, reading of information
from the memory
and writing of data to the memory. Q#31 Describe Working of Operational amplifier also
write voltage gain of op-amp. (5 marks)
Ans Operational Amplifier is a linear amplifier which has two inputs (inverting and
noninverting) and one
output. It has a high voltage gain, high input impedance and low output impedance. The
Op-Amp
amplifies the difference signal between its inverted and non-inverted inputs. voltage gain
of op-amp
Vout/Vin = - Rf/Ri

Q#32 -Why do we use start stop bit in asynchronous transmission. Ans In Asynchronous
Serial data transmission mode, a character which is constituted of 8- bits (which
can include a parity bit) is transmitted. To separate one character from another and to
indicate when data
is being transmitted and when the serial transmission line is idle (no data is being
transmitted) a set of
start bit and stop bits are appended at both ends of the 8-bit character. Q#17 -Name Types
of D/A converters

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Ans Generally two types of D/A Converters are used, the Binary-Weighted-Input D/A
Converter and
R/2R Ladder D/A Converter.

How many bytes will be

there in 16K x 8 memory?
(Marks 2)

Ans.

A 16 K x 8 memory, stores
16K bytes or 16 x 1024 =
16384 bytes or 131072 bits.

Q2.
Draw state diagram of Moore
machine.
Ans.
Q3.
Write down at least two
applications of a
shiftregister. Answer:-
(Page 356) The two
applications of the shift
registers are 1. Serial to
Parallel converter 2. Keyboard
encoder

Draw the NOR based S-

R Latch
Ans.
Q4.

Explain application of
demultiplexer
Ans.
Demultiplexer is used to
connect a single source to
multiple destinations. One use
of the Demultiplexer is at the
output of the ALU circuit.

Baki book se dikh len

Q5.
context of Flash
Memory
Ans muje nai ata tha. Ap past
paper ya book me dikh len

Q6.
3: Explain
the next-
state
table with
the help
of a table
for any
sequentia
l circuit?
Answer:-
(Page
306)Once
the state
diagram of
the
sequential
circuit is
defined, a
Next-State
Table is
derived Next
which lists State
each
present
state and
the
correspond
ing next
state. The
next state
is the state
to which
the
sequential
circuit
switches
when a
clock
transition
occurs.
Present
State
Q2
Q Q
Q1 Q0 Q2
1 0
0
0 0 0 0 1
0
0 1 0 1 0
0
1 0 0 1 1
0
1 1 1 0 0
1
0 0 1 0 1
1
0 1 1 1 0
1
1 0 1 1 1
1
1 1 0 0 0

Q7.
Explain
Programmable
Logic Devices?
Ans.

Programmable
Logic Devices
are used in
many
applications to
replace the Logic
gates and MSI
chips. PLDs save
circuit space and
reduce and save
the cost of
components in a
Digital Circuit.
PLDS consists of
Arrays of AND
gates and OR
gates that can
be programmed
to perform
specific
functions.
 Q8.add-13and+7
and give the
answer in
binary?

Load Previous Replies


+ M.Tariq Malik
1)R/2R lodder D/A counverter ke diagram
2)pos exp.ko simplifi krna tha
3)dif. between Rom and p rom
4)2 applications of rom
5)dif between asynchronous ram and synchronous ram
6)state diagram of mealy machine table dyya tha
7)2 input nor gat ka table bnana tha
8)3 applications of shift registers
9)applications of serial in/out
10)difference b/w state assignment and state reduction
11) four uses of multiplexers
Jul 24, 2013


+ M.Tariq Malik
My Today CS302 FINAL PAPER (25-7-2013)
 Total Questions: 52

40 MCQ’S : 40 Marks 4 Questions: 2 Marks

4 Questions: 3 Marks 4 Questions: 5

Marks
Subjective:

2 MARKS:

Write down 4 uses of multiplexer.

What is meant by state assignment process?

The groups of bits 10110111 is serially shifted (right-most

bit first) into an 8-bit parallel output shift register with an
initial state 11110000. What will be the contents of
register after 2 clock pulses?

What is the function of quantization process?

3 MARKS:

Convert the following expression in SOP form:

1. AB+B(CD+EF)

2. (A+B)+C
Write 3 points of difference between DRAM and SRAM.

Given the following statement used in PLD programming: Y PIN 23

ISTYPE „com‟; Explain what this statement means?
Answer:- (Page 360)
The statement describes Y available at output pins 23. The Y variable is
a ‘Combinational’ output available directly from the AND-OR gate array
output. The active-low or active-high output of the Registered Mode
can also be specified in the declaration statement.

Draw circuit diagram of operational amplifier used as an inverting

amplifier.

5MARKS:

Analyze and explain what is happening in this diagram?

Draw the state diagram of a 3-bit-up-down counter. Use an

external input X, when X sets to logic 1, the counter
counts downwards otherwise counts upward.

Analog to digital converters exhibit different types of

errors during their conversion operation. Explain at least
two.

Given below is an incomplete circuit diagram of parallel in

/ serial out shift register, in which Q0, Q1, Q2, Q3, and
 Clock input are disconnected. Connect above mentioned
connections in such a way that functionality of the given
circuit is not affected.

2
Jul 25, 2013


+ M.Tariq Malik
CS302 final term 2013
Today paper CS 302.
About 34 mcqs out of 40 was from past papers.
3 to 4 question from past papers,
difference between asycronous ram and sycronous ram
types of error in memory
convert the decimal number to octal( fraction involved)
and 1 t 3 question from the last 5 lecutres, question
yaad nahi, last k lectures mere thk say prepere nahi
thy, is laye Question sar k uper say guzar gay.
the mcqs was very easy,, nd i prepare this file for mcqs

-------------------------------------------------------------------
Total 40 MCQS All Were From Mid + Finals (Past Papers
Of MOAz FILE )
SubJEctive Of My Today’s Cs302 PaPer!
Q1 Separate the following into digital and analog
componenets
1)Inverter 2) AND Gate
3) Transistor 4) Diode
Q2: Which is the function of start bit and stop bit in an
asynchronous transmission.?
Q3) Given the following statement used in PLD
programming:
Y PIN 23 ISTYPE „com‟;
Explain what does this statement mean?
Answer:- (Page 360)
Q4) conversion of caveman number system into binary
number.
a) Ω↑∑
b) ↑∆∆∑
Q5) Draw the next-state table of a 3-bit up counter?
Answer :handouts Pg no 306 Table 28.1
Q6) draw the circuit diagram of a Static Memory Cell
based on a flip-flop?
Ans : 399 pg per Figure 39.6
Q7)Draw the circuit diagram of operational amplifier
used as an nverting amplifiers?
Ans: handouts pg no 447
Q8: Performance of D/A Converter .what are the five
parameter of it…
Ans:Five Parameters are :

a) Resolution
b) Linearity
c) Monotonicity
d) Setting time
e) Accuracy

---------------------------------------------------------------------
52 Question total
Mcqs were from handouts and much difficult :/
Difference between mealy and Moore machine
Modes of EProm
operational amplifier
missing code
4 question of State diagrams
SOP expression for the given truth table
derive the equation for the above truth table

---------------------------------------------------------------------
RCO stand for........
State machine is a generic name given to...............
the output of the circuit xORe
A bi-directional 4-bit 1110 shift register is 0111
The voltage gain of the inverting amlifier is given by..
Draw circuit diagram of operational amplifier used as
inverting amplifier
Analogue to digital conversion exhabit different types
of error during their conversion operation describe any
2 of them
what is the function of row and column decoders
from the given truth table detemine SOP
Draw circuit diagram of FLIP-FLOP based static memory
cell
Write down three characteristics of serial in/serial out
4-bit left shift register
(A'+B'+C')=...

---------------------------------------------------------------------
MCQS all from past papers,Subj are new,

Q. What is a state variable?

Q.Draw diagram of 4-bit BCD adder?
Q. Draw diagram of operational amlifier as invering
amlifier?
Q from the given truth table detemine SOP
Q Draw circuit diagram of FLIP-FLOP based static
memory cell
Q Write down three characteristics of serial in/serial out
4-bit left shift register
Q Draw circuit diagram of R/2R Ladder D/A converter/
Q Why memory is divided into row column grid ? and
why large memory slows down access time?
Q from graph need to show which error was in output
answer was a missing code error?
Q draw next state table for a 3-bit up counter?
prepare the last semester's march papers mostly paper
is from these paperz........

----------------------------------------------------------------------
CS302 20 July 2013 Final Term Paper
45% MCQS From Past Papers
Subjective:

2 Marks Question:
1. In ABEL, an Input (source) file contains the module
which has three sections. Name any two.
2. Write down two functions of registers.
3. Suppose a 2-bit up-counter, having states, “A, B, C,
D”. Write down GOTO statements to show how present
states change to next states.
4. Missing code is one of the Analog-to-Digital
converters errors. Name other two types of errors.

3 Marks Question:

5. Convert the decimal 5846 number to octal using

repeated division method, write down all steps.
6. Write down three characteristics of serial in/serial
out 4-bit right shift register.
7. Draw a circuit diagram of flip-flop based static
memory cell.
8. Draw the circuit diagram of operational amplifier
used as an inverting amplifier.

5 Marks Question:

9. Convert the following numbers into its equivalent

decimal number with complete procedure
1101101.1011.
10. Consider a state sequence a,f,d,c,a,b,c,f,d,c.
Starting from initial state “a”. draw a table for the
inputs and outputs for the state diagram given below.
11. Mealy Machine Per Tha. State Table
12. Draw the circuit diagram of binary-weighted-input
digital to analog converter.

---------------------------------------------------------------------
1. 392 decimal ko binary main convert karna tha.
2. ak na mukamal diagram thi us ko mukamal karna tha.
3. difference b/w ROM and PROM.
4. Two use of PROM
5. ak amplifir main sy tha shiad. wo yad ni.
6. agr 4 bit k shift reg main jo k serial to parallel hai aur
initially clear hai is main 4 clock puls pr kea status ho
ga.
7. aur mcq's easy hi thy mery to past paper main sy 5 to
10 percnet hi ay jo past paper ki file mary pas thi but
easy thy.
best of luck.

--------------------------------------------------------------------
Cs 302 total 52 question
40 mcqs
12 question thy 2 3 nd 5 marks k

1) Convert binary number 0110101011000001 into

Hexadecimal number.

2) A general Sequential circuit consists of a

combinational circuit and a memory element. How this
memory element is implemented?

3) How many bytes will be there in 16 K x 8 memory?

4) What is meant by linearity of Digital-to-Analogue

Converters?

5) As NOR gate is a universal gate; we can perform the

operation of every gate with the combination of some
NOR gates: Implement NAND gate using NOR gates.

6) What does the statement (used in PLD programming)

given below mean?

" X PIN 22 ISTYPE ‘reg’ "

7) How DRAMs are different from SRAMs? Write three

point of differences.
 A 4-bit flash A/D converter is tested for faults. The
resulting reconstructed analog output is shown below.
Identify the problem and the most probable reason due
to which this fault is occurred.

9) Convert the expression into standard SOP form and

draw truth table for it.

10) Consider the table given below, apply the state

reduction process on the states given in the table and
reduce the number of states as much as possible.

Present State
Next State
Output

X=0
X=1
X=0
X=1
a
f
b
0
0
b
b
c
1
1
c
a
f
0
1
d
e
d
1
0
e
a
g
0
1
f
d
e
0
0
g
d
e
0
0

11) Given below is an incomplete circuit diagram of

parallel in / serial out shift register, in which Q0, Q1, Q2,
Q3, and Clock input are disconnected. Connect above
mentioned connections in such a way that functionality
of the given circuit is not affected.

12) Draw the circuit diagram of Flash A/D Converter.

 The simplest and most commonly used decoders are the ________
n to 2n (n-1) to 2n n to 2n-1 (n-1) to (2n-1)

 OLMC consists of a _______

Encoder decoder logic gate flip-flop

 A Quad 1-to-4 MUX has ________ multiplexer.

2 3 4 1

 The 4bit 2’s complement representation of “+5” is ________

1010 1110 1011 0101
  The binary representation of 20 is __________
01100 10100 00101 11100

 A latch has ______ stable states.

1 2 3 4

 Invalid state of NOR based SR latch occurs when ________

S=0,R=0 S=0,R=1 S=1,R=0 S=1,R=1

 _________ is used to simplify the circuit that determines the next

state.
State diagram next state table state reduction
state assignment

 A particular full adder has _______inputs and _______ outputs.

2,3 2,2 3,2 3,3

 A counted implemented using three flip flops will have maximum _____
output.
3 7 8 15

 The high density FLASH memory cell is implemented using_____

1-floating gate MOS 2-floating gate MOS 4-floating gate MOS
6-floating gate MOS

 In a binary weighted D/A converter, the resistors on the inputs are:

Limit the power consumption Prevent loading on the source
Determine the weights of the digital inputs
Determine the amplitude of the digital inputs

Subjective:

2 MARKS:

Write down 4 uses of multiplexer.

What is meant by state assignment process?

The groups of bits 10110111 is serially shifted (right-most bit first) into an 8-
bit parallel output shift register with an initial state 11110000. What will be
the contents of register after 2 clock pulses?

What is the function of quantization process?

3 MARKS:

Convert the following expression in SOP form:

1. AB+B(CD+EF)

1. (A+B)+C

Write 3 points of difference between DRAM and SRAM.

Given the following statement used in PLD programming: Y PIN 23 ISTYPE

„com‟; Explain what this statement means?
Answer:- (Page 360)
The statement describes Y available at output pins 23. The Y variable is a
‘Combinational’ output available directly from the AND-OR gate array output.
The active-low or active-high output of the Registered Mode can also be specified
in the declaration statement.

Draw circuit diagram of operational amplifier used as an inverting amplifier.

5MARKS:

Analyze and explain what is happening in this diagram?

Draw the state diagram of a 3-bit-up-down counter. Use an external input X,

when X sets to logic 1, the counter counts downwards otherwise counts
upward.

Analog to digital converters exhibit different types of errors during their

conversion operation. Explain at least two.

Given below is an incomplete circuit diagram of parallel in / serial out shift

register, in which Q0, Q1, Q2, Q3, and Clock input are disconnected. Connect
 above mentioned connections in such a way that functionality of the given
circuit is not affected.

Q. Performance characteristics of D/A converter? Write
them. (5)
Q. How DRAM’s are different from
SRAM’s? (3)
Q. Draw the circuit diagram of operational amplifiers as an inverting
amplifier. (3)
Q. If a certain Boolean expression has a domain of variables. How many
binary
Values will be in Truth
table?
(2)
Q. Name the single change which can make combinational circuit to
sequential
Circuit.
(2)
Q. What is the function of row and column
decoder? (2)
Q. Name at least one device that converts digital signals to analog and vice
Versa.
(2)
Q. Perform hexadecimal subtraction of
8416 –
D616
(3)
Q. Write three characteristics of serial in/out 4-bit left shift
register. (3)

1)R/2R lodder D/A counverter ke diagram
2)pos exp.ko simplifi krna tha
3)dif. between Rom and p rom
4)2 applications of rom
5)dif between asynchronous ram and synchronous ram
6)state diagram of mealy machine table dyya tha
7)2 input nor gat ka table bnana tha
8)3 applications of shift registers
9)applications of serial in/out
10)difference b/w state assignment and state reduction
11) four uses of multiplexers


2 MARKS:

Write down 4 uses of multiplexer.

What is meant by state assignment process?

The groups of bits 10110111 is serially shifted (right-most bit first) into an 8-
bit parallel output shift register with an initial state 11110000. What will be
the contents of register after 2 clock pulses?

What is the function of quantization process?

3 MARKS:

Convert the following expression in SOP form:

1. AB+B(CD+EF)

1. (A+B)+C

Write 3 points of difference between DRAM and SRAM.

Given the following statement used in PLD programming: Y PIN 23 ISTYPE

„com‟; Explain what this statement means?
Answer:- (Page 360)
The statement describes Y available at output pins 23. The Y variable is a
‘Combinational’ output available directly from the AND-OR gate array output.
The active-low or active-high output of the Registered Mode can also be specified
in the declaration statement.

Draw circuit diagram of operational amplifier used as an inverting amplifier.

Analyze and explain what is happening in this diagram?

Draw the state diagram of a 3-bit-up-down counter. Use an external input X,

when X sets to logic 1, the counter counts downwards otherwise counts
upward.

Analog to digital converters exhibit different types of errors during their

conversion operation. Explain at least two.
 Given below is an incomplete circuit diagram of parallel in / serial out shift
register, in which Q0, Q1, Q2, Q3, and Clock input are disconnected. Connect
above mentioned connections in such a way that functionality of the given
circuit is not affected.



difference between asycronous ram and sycronous ram

types of error in memory

convert the decimal number to octal( fraction involved)

-------------------------------------------------------------------

Q1 Separate the following into digital and analog componenets

1)Inverter 2) AND Gate
3) Transistor 4) Diode

Q2: Which is the function of start bit and stop bit in an asynchronous
transmission.?

Q3) Given the following statement used in PLD programming:

Y PIN 23 ISTYPE „com‟;

Explain what does this statement mean?

Answer:- (Page 360)

Q4) conversion of caveman number system into binary number.

a) Ω↑∑
b) ↑∆∆∑

Q5) Draw the next-state table of a 3-bit up counter?

Answer :handouts Pg no 306 Table 28.1

Q6) draw the circuit diagram of a Static Memory Cell based on a flip-flop?
Ans : 399 pg per Figure 39.6
Q7)Draw the circuit diagram of operational amplifier used as an nverting
amplifiers?
Ans: handouts pg no 447

Q8: Performance of D/A Converter .what are the five parameter of it…
Ans:Five Parameters are :

a) Resolution
b) Linearity
c) Monotonicity
d) Setting time
e) Accuracy

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52 Question total
Mcqs were from handouts and much difficult :/

Difference between mealy and Moore machine

Modes of EProm

operational amplifier

missing code
4

question of State diagrams

SOP expression for the given truth table

d

erive the equation for the above truth table

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RCO stand for........

State machine is a generic name given to...............

the output of the circuit xORe
A bi-directional 4-bit 1110 shift register is 0111

The voltage gain of the inverting amlifier is given by..

Draw circuit diagram of operational amplifier used as inverting amplifier

Analogue to digital conversion exhabit different types of error during their

conversion operation describe any 2 of them

what is the function of row and column decoders

from the given truth table detemine SOP

Draw circuit diagram of FLIP-FLOP based static memory cell

Write down three characteristics of serial in/serial out 4-bit left shift
register
(A'+B'+C')=...

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State Table
The state table representation of a sequential circuit consists of three
sections labeled present state, next state and output. The present state
designates the state of flip-flops before the occurrence of a clock pulse.
The next state shows the states of flip-flops after the clock pulse, and
the output section lists the value of the output variables during the
present state.

Q. What is a state variable?

Q.Draw diagram of 4-bit BCD adder?

Q from the given truth table detemine SOP

Q Write down three characteristics of serial in/serial out 4-bit left

shift register
 Q Why memory is divided into row column grid ? and why large
memory slows down access time?

Q from graph need to show which error was in output answer was a
missing code error?

Q draw next state table for a 3-bit up counter?

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1. In ABEL, an Input (source) file contains the module which has

three sections. Name any two.

2. Write down two functions of registers.

A Register is a device which is used to store such information.

The information stored within these registers can be transferred with the help
of shift registers.

3. Suppose a 2-bit up-counter, having states, “A, B, C, D”. Write down

GOTO statements to show how present states change to next states.

4. Missing code is one of the Analog-to-Digital converters errors. Name

other two types of errors.

Quantization error
Dither
Accuracy
Nonlinearity

5. Convert the decimal 5846 number to octal using repeated division

method, write down all steps.

6. Write down three characteristics of serial in/serial out 4-bit right

shift register.
 7. Draw a circuit diagram of flip-flop based static memory cell.

Shift registers are basically of 4 types. These are:

1. Serial In Serial Out shift register
2. Serial In parallel Out shift register
3. Parallel In Serial Out shift register
4. Parallel In parallel Out shift register

Serial-In Serial-Out Shift Register (SISO) –

The shift register, which allows serial input (one bit after the other through a
single data line) and produces a serial output is known as Serial-In Serial-Out
shift register. Since there is only one output, the data leaves the shift register one
bit at a time in a serial pattern, thus the name Serial-In Serial-Out Shift Register.
The logic circuit given below shows a serial-in serial-out shift register. The circuit
consists of four D flip-flops which are connected in a serial manner. All these flip-
flops are synchronous with each other since the same clock signal is applied to
each flip flop.

The above circuit is an example of shift right register, taking the serial data input
from the left side of the flip flop. The main use of a SISO is to act as a delay
element.
Serial-In Parallel-Out shift Register (SIPO) –

The shift register, which allows serial input (one bit after the other through a
single data line) and produces a parallel output is known as Serial-In Parallel-Out
shift register.
The logic circuit given below shows a serial-in-parallel-out shift register. The
circuit consists of four D flip-flops which are connected. The clear (CLR) signal is
connected in addition to the clock signal to all the 4 flip flops in order to RESET
them. The output of the first flip flop is connected to the input of the next flip flop
and so on. All these flip-flops are synchronous with each other since the same
clock signal is applied to each flip flop.

The above circuit is an example of shift right register, taking the serial data input
from the left side of the flip flop and producing a parallel output. They are used in
communication lines where demultiplexing of a data line into several parallel lines
is required because the main use of the SIPO register is to convert serial data
into parallel data.

Parallel-In Serial-Out Shift Register (PISO) –

The shift register, which allows parallel input (data is given separately to each flip
flop and in a simultaneous manner) and produces a serial output is known as
Parallel-In Serial-Out shift register.
The logic circuit given below shows a parallel-in-serial-out shift register. The
circuit consists of four D flip-flops which are connected. The clock input is directly
connected to all the flip flops but the input data is connected individually to each
flip flop through a multiplexer at the input of every flip flop. The output of the
previous flip flop and parallel data input are connected to the input of the MUX
and the output of MUX is connected to the next flip flop. All these flip-flops are
synchronous with each other since the same clock signal is applied to each flip
flop.

A Parallel in Serial out (PISO) shift register us used to convert parallel data to
serial data.

Parallel-In Parallel-Out Shift Register (PIPO) –

The shift register, which allows parallel input (data is given separately to each flip
flop and in a simultaneous manner) and also produces a parallel output is known
as Parallel-In parallel-Out shift register.
The logic circuit given below shows a parallel-in-parallel-out shift register. The
circuit consists of four D flip-flops which are connected. The clear (CLR) signal
and clock signals are connected to all the 4 flip flops. In this type of register, there
are no interconnections between the individual flip-flops since no serial shifting of
the data is required. Data is given as input separately for each flip flop and in the
same way, output also collected individually from each flip flop.
A Parallel in Parallel out (PIPO) shift register is used as a temporary storage
device and like SISO Shift register it acts as a delay element.

Bidirectional Shift Register –

If we shift a binary number to the left by one position, it is equivalent to

multiplying the number by 2 and if we shift a binary number to the right by one
position, it is equivalent to dividing the number by 2.To perform these operations
we need a register which can shift the data in either direction.
Bidirectional shift registers are the registers which are capable of shifting the data
either right or left depending on the mode selected. If the mode selected is
1(high), the data will be shifted towards the right direction and if the mode
selected is 0(low), the data will be shifted towards the left direction.
The logic circuit given below shows a Bidirectional shift register. The circuit
consists of four D flip-flops which are connected. The input data is connected at
two ends of the circuit and depending on the mode selected only one and gate is
in the active state.
Shift Register Counter –

Shift Register Counters are the shift registers in which the outputs are connected
back to the inputs in order to produce particular sequences. These are basically
of two types:
1. Ring Counter –
A ring counter is basically a shift register counter in which the output of the
first flip flop is connected to the next flip flop and so on and the output of the
last flip flop is again fed back to the input of the first flip flop, thus the name
ring counter. The data pattern within the shift register will circulate as long
as clock pulses are applied.
The logic circuit given below shows a Ring Counter. The circuit consists of
four D flip-flops which are connected. Since the circuit consists of four flip
flops the data pattern will repeat after every four clock pulses as shown in
the truth table below:
 A Ring counter is generally used because it is self-decoding. No extra
decoding circuit is needed to determine what state the counter is in.
2. Johnson Counter –
A Johnson counter is basically a shift register counter in which the output of
the first flip flop is connected to the next flip flop and so on and the inverted
output of the last flip flop is again fed back to the input of the first flip flop.
They are also known as twisted ring counters.
The logic circuit given below shows a Johnson Counter. The circuit consists
of four D flip-flops which are connected. An n-stage Johnson counter yields
a count sequence of 2n different states, thus also known as a mod-2n
counter. Since the circuit consists of four flip flops the data pattern will
repeat every eight clock pulses as shown in the truth table below:
 The main advantage of Johnson counter is that it only needs n number of
flip-flops compared to the ring counter to circulate a given data to generate
a sequence of 2n states.

Applications of shift Registers –

 The shift registers are used for temporary data storage.

 The shift registers are also used for data transfer and data manipulation.
 The serial-in serial-out and parallel-in parallel-out shift registers are used
to produce time delay to digital circuits.
 The serial-in parallel-out shift register is used to convert serial data into
parallel data thus they are used in communication lines where
demultiplexing of a data line into several parallel line is required.
 A Parallel in Serial out shift register us used to convert parallel data to
serial data.

8. Draw the circuit diagram of operational amplifier used as an

inverting amplifier.
 5 Marks Question:

9. Convert the following numbers into its equivalent decimal number

with complete procedure 1101101.1011.

10. Consider a state sequence a,f,d,c,a,b,c,f,d,c. Starting from initial

state “a”. draw a table for the inputs and outputs for the state
diagram given below.

11. Mealy Machine

1. Output depends on present state as well as present input.
2. If input changes, output also changes.
3. Less number of states are required.
4. There is less hardware requirement.
5. They react faster to inputs.
6. Asynchronous output generation.
7. Output is placed on transitions.
8. It is difficult to design.

12. Draw the circuit diagram of binary-weighted-input digital to

analog converter.

Q Draw circuit diagram of R/2R Ladder D/A converter/

---------------------------------------------------------------------

4. Two use of PROM

including cell phones, video game consoles, RFID (Radio-

Frequency Identification Devices) tags, medical devices, and
other electronics.

--------------------------------------------------------------------

1) Convert binary number 0110101011000001 into Hexadecimal

number.

2) A general Sequential circuit consists of a combinational circuit and

a memory element. How this memory element is implemented?

3) How many bytes will be there in 16 K x 8 memory?

16384

4) What is meant by linearity of Digital-to-Analogue Converters?

In electronics, a digital-to-analog converter (DAC, D/A, D2A, or D-to-A) is a

system that converts a digital signal into an analog signal. An analog-to-digital
converter (ADC) performs the reverse function.

5) As NOR gate is a universal gate; we can perform the operation of

every gate with the combination of some NOR gates: Implement
NAND gate using NOR gates.
 6) What does the statement (used in PLD programming) given below
mean?

" X PIN 22 ISTYPE ‘reg’ "

7) How DRAMs are different from SRAMs? Write three point of

differences.

SRAM and DRAM are the modes of integrated-circuit

RAM where SRAM uses transistors and latches in construction
while DRAM uses capacitors and transistors. These can be
differentiated in many ways, such as SRAM is comparatively
faster than DRAM; hence SRAM is used for cache memory while
DRAM is used for main memory.

BASIS FOR COMPARISON SRAM DRAM

Speed Faster Slower

Size Small Large

Cost Expensive Cheap

Used in Cache Main memory

 BASIS FOR COMPARISON SRAM DRAM

memory

Density Less dense Highly dense

Construction Complex and Simple and

uses uses

transistors capacitors and

and latches. very few

transistors.

Single block of memory requires 6 transistors Only one

transistor.

Charge leakage property Not present Present hence

require power

refresh

circuitry

Power consumption Low High

1. SRAM is an on-
chip memory whose access
time is small while DRAM is
an off-chip memory which
has a large access time.
BASIS FOR COMPARISON SRAM DRAM

Therefore SRAM is faster

than DRAM.
2. DRAM is available
in larger storage capacity
while SRAM is
of smaller size.
3. SRAM
is expensive whereas
DRAM is cheap.
4. The cache memory is an
application of SRAM. In
contrast, DRAM is used
in main memory.
5. DRAM is highly dense. As
against, SRAM is rarer.
6. The construction of SRAM
is complex due to the
usage of a large number of
transistors. On the contrary,
DRAM is simple to design
and implement.
7. In SRAM a single block of
memory
requires six transistors
whereas DRAM needs just
one transistor for a single
block of memory.
8. DRAM is named as
dynamic, because it uses
capacitor which
produces leakage
current due to the
dielectric used inside the
capacitor to separate the
conductive plates is not a
perfect insulator hence
require power refresh
circuitry. On the other hand,
there is no issue of charge
BASIS FOR COMPARISON SRAM DRAM

leakage in the SRAM.

9. Power consumption is
higher in DRAM than SRAM.
SRAM operates on the
principle of changing the
direction of current through
switches whereas DRAM
works on holding the
charges.

A 4-bit flash A/D converter is tested for faults. The resulting

reconstructed analog output is shown below. Identify the problem
and the most probable reason due to which this fault is occurred.

9) Convert the expression into standard SOP form and draw truth
table for it.

10) Consider the table given below, apply the state reduction process
on the states given in the table and reduce the number of states as
much as possible.

Present State
 Next State
Output

X=0
X=1
X=0
X=1
a
f
b
0
0
b
b
c
1
1
c
a
f
0
1
d
e
d
1
0
e
a
g
0
1
f
d
e
0
0
g
d
e
0
0

11) Given below is an incomplete circuit diagram of parallel in / serial

out shift register, in which Q0, Q1, Q2, Q3, and Clock input are
disconnected. Connect above mentioned connections in such a way
that functionality of the given circuit is not affected.


Q1.WWrite POS expression on the following karnaugh map?
 Q2. Draw circuit diagram of FLIP-FLOP based static memory cell

Q3.Draw diagram of mealy machine from the given table?

Q4.What are the type of Analogue to digital converters?

Q5. Difference b/w ROM and PROM and describe PROM?

The difference between a PROM and a ROM (read-only memory) is that a PROM is manufactured as blank

memory, whereas a ROM is programmed during the manufacturing process. To write data onto a PROM

chip, you need a special device called a PROM programmeror PROM burner. The process of programming

a PROM is sometimes called burningthe PROM.

An EPROM (erasable programmable read-only memory) is a special type of PROM that can be erased by

exposing it to ultraviolet light. Once it is erased, it can be reprogrammed. An EEPROM is similar to a PROM,

but requires only electricity to be erased.

ROM is Read Only Memory. The fab house makes these parts with the program.
It can't be erased or written too.

PROM is Programmable Read Only Memory. It can be programmed only once by

blowing internal fuses permanently.

EPROM is Electrically Programmable Read Only Memory. It can be programmed

using a higher voltage and erased using intense ultraviolet light. These are the old
style memories with a glass window.

EEPROM is Electrically Eraseable Programmable Read Only Memory. It can be

programmed and erased many times over using the supply rail. You don't need a
high voltage.

Q6.

What does the statement (used in PLD programming) given below mean?

" X PIN 22 ISTYPE ‘reg’ "

Q7.Draw the circuit diagram of Flash A/D Converter.