1. What are program control instructions and what purpose do they serve?

2. Explain in brief the four conditions which cause the change in flow of a program.
3. What are the distinguishing characteristics of RISC organization?
4. Briefly explain the basic approaches used to minimize register-memory operations of
RISC machines?
5. Explain the organization of four stage pipeline. (AKTU 2016 - 2017)
6. The stage delays in a 4-stage pipeline are 800, 500, 400 and 300 picoseconds. The first
stage (with delay 800 picoseconds) is replaced with a functionally equivalent design
involving two stages with respective delays 600 and 350 picoseconds. What percentage
will be the increase in the throughput increase of the pipeline? (GATE 2016)
7. What is Hardwired control? List various design methods for Hardwired control. (AKTU
2017 - 2018)
8. Explain Micro programmed control unit including its basic structure, microinstruction
format and control unit organization. (AKTU 2017 - 2018)
9. What are the differences between Horizontal and Vertical micro codes? (AKTU 2018 -
2019)
10. With proper example, show how the control signals are obtained when using Vertical
micro-instructions.
11. What do you mean by memory hierarchy?
12. How the three characteristics of memory, namely cost, capacity and access time, changes
when one goes down in the memory hierarchy?
13. What is the difference between RAM and DRAM? (AKTU 2018 - 2019)
14. You are designing a computer which needs 512 bytes of RAM and 512 bytes of ROM.
Four 128x8 RAM chips and one 512x8 ROM chips is available to you. With neat
diagram show how these chips are connected to the CPU of your computer. Also describe
in brief the operation of this system.
15. Write short note on organization of 2D and 2 1/2D memory. (AKTU 2018 - 2019)
16. What is ROM? How does PROM differ from EEPROM? (AKTU 2014 - 2015)
17. Discuss the various types of address mapping used in cache memory. (AKTU 2017 -
2018)
18. A certain processor uses a fully associative cache of size 16kB. The cache block size is
16 bytes. Assume that the main memory is byte addressable and uses a 32-bit address.
How many bits are required for the Tag and the Index fields respectively in the addresses
generated by the processor?
19. Explain in details, how data is written onto and read from a magnetic disk? (AKTU 2015
- 2016)
20. Consider a magnetic disk with 4 surfaces, 64 tracks per surface, 128 sectors per tracks
and 256 Bytes per sector. (i) What is the total capacity of the disk in MB. (ii) If the disk
rotates at 3600 rpm (rotations per minute), what is the transfer rate of the disk in MB/sec.
21. Explain in brief how the concept of Virtual Memory is implemented using Pages and
Frames.
22. Consider a main memory with five page frames and the following sequence of page
references: 3, 8, 2, 3, 9, 1, 6, 3, 8, 9, 3, 6, 2, 1, 3. If First In First Out (FIFO) and Least
Recently Used (LRU) page replacement policies are used separately, calculate the
number of page faults occurred in each replacement policy. Which page replacement
policy resulted in more page faults?
23. What is an I/O interface and why is it needed?
24. Explain the difference between vectored and non-vectored interrupt. Explain stating
examples of each. (AKTU 2018 - 2019)
25. Explain the difference between the programmed I/O and interrupt driven I/O. (AKTU
2015 - 2016)
26. Write short notes on DMA based data transfer. (AKTU 2018 - 2019)
27. Explain the working of DMA controller with help of suitable diagrams. (AKTU 2017 -
2018)