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c SiFive, Inc.
August 1, 2016
2 SiFive Freedom U500 VC707 FPGA Getting Started Guide 0.2
SiFive Freedom U500 VC707 FPGA
Getting Started Guide
Proprietary Notice
Copyright
c 2016, SiFive Inc. All rights reserved.
Information in this document is provided “as is”, with all faults.
SiFive expressly disclaims all warranties, representations and conditions of any kind, whether ex-
press or implied, including, but not limited to, the implied warranties or conditions of merchantabil-
ity, fitness for a particular purpose and non-infringement.
SiFive does not assume any liability rising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation indirect, incidental, special,
exemplary, or consequential damages.
SiFive reserves the right to make changes without further notice to any products herein.
Release Information
Version Date Changes
0.1 July 11, 2016 First Release
0.2 Aug 01, 2016 Updated Configuration Memory File (MCS) link to static.dev.sifive.com
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ii SiFive Freedom U500 VC707 FPGA Getting Started Guide 0.2
Contents
1 Required Hardware 1
1.1 Xilinx Virtex-7 FPGA VC707 Evaluation Kit . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 16GB SDHC Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 HiTechGlobal X8 PCI Express Gen1/2/3 FMC Module (Vita57.1) . . . . . . . . . . . 1
1.4 Optional Max Expansion uCube3 PCIe switch . . . . . . . . . . . . . . . . . . . . . . 1
1.5 Supported PCIe Endpoint cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.5.1 NIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.5.2 USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Board Setup 3
2.1 Set VC707 boot mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2 Setup PCIe Root FMC card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3 Connect PCIe Switch (Optional) and PCIe Endpoint cards . . . . . . . . . . . . . . . 4
2.4 Install SDCard for Linux boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.5 VC707 power and UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
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iv SiFive Freedom U500 VC707 FPGA Getting Started Guide 0.2
Chapter 1
Required Hardware
The Freedom U500 VC707 FPGA Dev Kit requires the following hardware to be purchased:
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2 SiFive Freedom U500 VC707 FPGA Getting Started Guide 0.2
1.5.1 NIC
Intel “EXPI9301CTBLK Pro/1000 CT PCI-E 1x” NIC
http://www.intel.com/content/www/us/en/ethernet-products/gigabit-server-adapters/
gigabit-ct-desktop-adapter.html
Realtek based PCIe NIC for instance, ST Lab “PCIe Gigabit Ethernet 1-Port Card N-313”
http://www.st-lab.com/assign.asp?keyid=bu16
1.5.2 USB
xHCI PCIe-USB3 NEC based controller, Bytec “BT-PEU310 PCIe NEC Chipset USB 3.0 3 Ports
Card”
http://byteccusa.com/index.php/i-o-card/pci-e/bt-peu310-html.html
Chapter 2
Board Setup
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4 SiFive Freedom U500 VC707 FPGA Getting Started Guide 0.2
After removing the Kapton tape, set the FMC Module FSEL jumpers to ”101”, as shown in Fig-
ure 2.3. This programs the clock generator for the correct 100MHz PCIe REFCLK operation
frequency.
Figure 2.4: Connected Max Expansion “uCube” PCIe switch and USB+NIC PCIe endpoint cards
The Xilinx Virtex-7 XCVX485T FPGA configures on power-on from an on-board BPI linear flash
chip.
The Freedom U500 VC707 FPGA BPI linear flash programming file for can be downloaded from:
https://static.dev.sifive.com/freedom-u500-vc707-mcs-0-1.zip
Xilinx Vivado Design Suite is used for flash programming. A single node-locked license of Vivado
2016.1 is included with VC707 purchase from Xilinx. Alternatively, Vivado Lab Edition 2016.1 is
available free of charge from Xilinx.
To program the flash with Vivado :
1. Launch Vivado
2. Open Hardware Manager, open target board
3. Right click on the FPGA device and select “Add Configuration Memory Device”
4. Select
Part mt28gu01gaax1e-bpi-x16
Manufacturer Micron
Alias 28f00ag18f
Family g18
Type bpi
Density 1024
Width x16
5. Click OK to “Do you want to program the configuration memory device now ?”
6. Add freedom-u500-vc707-0-1.mcs and freedom-u500-vc707-0-1.prm
7. Select RS Pins = 25:24
8. Select OK
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8 SiFive Freedom U500 VC707 FPGA Getting Started Guide 0.2
Chapter 4
After the FPGA is powered and configured from BPI linear flash, the Coreplex boots Linux+root
filesystem from the SD Card.
The Freedom U500 Software Development Kit provides everything required to compile and cus-
tomize this SD Card image - GCC 6.1.0 cross compilation toolchain, Linux 4.6.2 kernel and build-
root managed root filesystem.
To clone the Freedom U500 SDK git repository :
cd freedom-u-sdk; make
To reconfigure the linux kernel, for instance to add driver support for new PCIe cards :
make linux-menuconfig
make buildroot-menuconfig
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10 SiFive Freedom U500 VC707 FPGA Getting Started Guide 0.2
Chapter 5
Using a program such as Minicom or Screen on Linux, or Teraterm on Windows, open a termi-
nal connection from the host computer to the Freedom U500 VC707 FPGA Dev Board. Set the
following parameters
Speed 115200
Parity None
Data bits 8
Stop bits 1
Hardware Flow None
If present, plug in the Max Expansion uCube3 PCIe switch and power on the VC707 board.
Linux will proceed to boot with tty output and keyboard input over the terminal connection. Log in
with root password sifive.
The terminal log at the end of this Chapter demonstrates a session comprising Linux boot, login
and program execution with attached PCIe switch and NIC, USB and Sata controller PCIe cards.
In summary, during boot :
1. The kernel image is loaded from SDCard by the bootloader, displaying the SiFive logo
2. PCIe probing occurs. Many devices are enumerated and BARs are reserved for PCIe switch,
Ethernet, USB and Sata Controller PCIe cards.
3. The USB xHCI Host Controller driver identifies and takes ownership of PCIe device
0000:04:0.0, a BT-PEU310 PCIe NEC Chipset USB 3.0 3 Ports Card and two USB hubs
are enumerated. Later in the boot log, xHCI identifies a connected SanDisk Ultra USB Mass
Storage Device (USB flash drive)
4. The SATA aHCI driver identifies and takes ownership of PCIe device 0000:05:0.0, a MAR-
VELL VIRTUALL PCIe controller card. 8 Sata channels are enumerated and a Patriot Blaze
SSD hard drive is identified.
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12 SiFive Freedom U500 VC707 FPGA Getting Started Guide 0.2
5. The Realtek NIC driver identifies and takes ownership of PCIe device 0000:03:00.0, a ST
Lab “PCIe Gigabit Ethernet 1-Port Card N-313”. It brings up eth0. An IP address is acquired
through DHCP and Dropbear sshd is started.
1. Dump the system information string with uname -a : identifying Linux 4.6.2 running on RISC-
V
2. Scan the PCIe bus with lspci, correctly identifying 6 PLC PCIe bridges via the PCIe switch,
Realtek Ethernet card, Renesas USB controller, Marvell SATA controller and ATI video card
(unused)
3. Scan the USB bus with lsusb, correctly identifying two busses, the second of which has a
root and endpoint (USB Mass storage device)
6. SSH to localhost
7. Mount the EXT2 formatted USB Mass Storage Device which has been pre-loaded with native
RISC-V gnu compilation tools from https://github.com/riscv/riscv-poky
SIFIVE, INC.
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5555 5555555555555555555555
5555 555555555555555555555555
5555 5555
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5555555555555555555555555555 55555
55555 555555555 55555
55555 55555 55555
55555 5 55555
55555 55555
55555 55555
55555 55555
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55555 55555
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5
[ 12.660000] scsi 8:0:0:0: Direct-Access SanDisk SanDisk Ultra PMAP PQ: 0 ANSI: 6
[ 12.690000] sd 8:0:0:0: [sdb] 61767680 512-byte logical blocks: (31.6 GB/29.5 GiB)
[ 12.700000] sd 8:0:0:0: [sdb] Write Protect is off
[ 12.700000] sd 8:0:0:0: [sdb] Write cache: disabled, read cache: enabled, doesn’t support DPO or FUA
Starting mdev...
[ 12.920000] sdb: sdb1 sdb2
[ 13.040000] sd 8:0:0:0: [sdb] Attached SCSI removable disk
modprobe: can’t change directory to ’/lib/modules’: No such file or directory
Initializing random number generator...
[ 34.330000] random: dd urandom read with 14 bits of entropy available
done.
Starting network...
[ 35.710000] r8169 0000:03:00.0: Direct firmware load for rtl_nic/rtl8168e-3.fw failed with error -2
[ 35.710000] r8169 0000:03:00.0 eth0: unable to load firmware patch rtl_nic/rtl8168e-3.fw (-2)
[ 35.740000] r8169 0000:03:00.0 eth0: link down
[ 35.750000] r8169 0000:03:00.0 eth0: link down
udhcpc (v1.24.2) started
Sending discover...
[ 38.110000] r8169 0000:03:00.0 eth0: link up
Sending discover...
Sending select for 10.14.3.190...
Lease of 10.14.3.190 obtained, lease time 3163
deleting routers
adding dns 10.14.0.3
Starting dropbear sshd: OK
Welcome to Buildroot
buildroot login: root
Password:
# uname -a
Linux buildroot 4.6.2-ga9474b8 #11 Sat Jul 9 19:12:05 PDT 2016 riscv GNU/Linux
# lspci
00:00.0 PCI bridge: Xilinx Corporation Device 7111
01:00.0 PCI bridge: PLX Technology, Inc. PEX 8632 32-lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch (rev bb)
02:00.0 PCI bridge: PLX Technology, Inc. PEX 8632 32-lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch (rev bb)
02:01.0 PCI bridge: PLX Technology, Inc. PEX 8632 32-lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch (rev bb)
02:02.0 PCI bridge: PLX Technology, Inc. PEX 8632 32-lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch (rev bb)
02:03.0 PCI bridge: PLX Technology, Inc. PEX 8632 32-lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch (rev bb)
02:04.0 PCI bridge: PLX Technology, Inc. PEX 8632 32-lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch (rev bb)
03:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd.
RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 06)
04:00.0 USB controller: Renesas Technology Corp. uPD720202 USB 3.0 Host Controller (rev 02)
05:00.0 SATA controller: Marvell Technology Group Ltd. 88SE9230 PCIe SATA 6Gb/s Controller (rev 11)
06:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] RV370 [Radeon X300]
06:00.1 Display controller: Advanced Micro Devices, Inc. [AMD/ATI] RV370 [Radeon X300 SE]
# lsusb
Bus 002 Device 002: ID 0781:5581
Bus 001 Device 001: ID 1d6b:0002
Bus 002 Device 001: ID 1d6b:0003
# cat /proc/interrupts
CPU0
0: 151 riscv xilinx-pcie-rv
2: 29 Xilinx PCIe MSI 0 eth0
3: 72 Xilinx PCIe MSI 1 xhci_hcd
4: 0 Xilinx PCIe MSI 2 xhci_hcd
5: 14 Xilinx PCIe MSI 3 ahci[0000:05:00.0]
# cat /proc/softirqs
CPU0
HI: 2
TIMER: 15502
NET_TX: 19
NET_RX: 169
BLOCK: 59
18 SiFive Freedom U500 VC707 FPGA Getting Started Guide 0.2
BLOCK_IOPOLL: 0
TASKLET: 63
SCHED: 0
HRTIMER: 0
RCU: 1210
# ping google.de
PING google.de (216.58.192.3): 56 data bytes
64 bytes from 216.58.192.3: seq=0 ttl=56 time=5.526 ms
64 bytes from 216.58.192.3: seq=1 ttl=56 time=4.702 ms
64 bytes from 216.58.192.3: seq=2 ttl=56 time=3.980 ms
^C
--- google.de ping statistics ---
3 packets transmitted, 3 packets received, 0% packet loss
round-trip min/avg/max = 3.980/4.736/5.526 ms
# [ 285.640000] random: nonblocking pool is initialized
# ifconfig
eth0 Link encap:Ethernet HWaddr 00:0A:CD:29:9E:45
inet addr:10.14.3.190 Bcast:10.14.15.255 Mask:255.255.240.0
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:528 errors:0 dropped:11 overruns:0 frame:0
TX packets:8 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:45151 (44.0 KiB) TX bytes:1167 (1.1 KiB)
# ssh root@10.14.3.190