Provisional Grade History

Register No. 19MVD0024

Name DEBOLINA ROY
Program M.Tech. - VLSI Design
School SENSE - School of Electronics Engineering

Grade History
Course Credits Grade Result Declared Course Course
Sl.No Course Code Course Title Exam Month
Type On Option Distrib
ution

1 ECE5015 Digital IC Design ETP 4 A Nov-2019 14-Dec-2019 NIL PC

2 ECE5017 Digital Design with FPGA ETLP 4 C Nov-2019 14-Dec-2019 NIL PC

3 ECE5018 Physics of VLSI Devices TH 3 A Nov-2019 14-Dec-2019 NIL PC

Computer Aided Design

4 ECE5019 TH 3 D Nov-2019 14-Dec-2019 NIL PE
for VLSI

Scripting Languages for

5 ECE5030 ETL 3 C Nov-2019 14-Dec-2019 NIL PE
VLSI Design Automation

Advanced Computer
6 MAT5009 TH 3 E Nov-2019 14-Dec-2019 NIL UC
Arithmetic
N1 : Student fails to clear one or more components of a course
N2 : Student who has been debarred due to lack of attendance
N3 : Student who has been absent in the Final Assessment Test
N4 : Student debarred in Final Assessment Test due to indiscipline/malpractice

Curriculum Details
Curriculum Distribution Type Credits Required Credits Earned
Programme Core 19 11
University Core 27 3
Programme Elective 18 6
University Elective 6 0
Basket Course - 0
Total Credits 70 20

Basket Details
Basket Title Distribution Type Credits Required Credits Earned
Soft Skills M.Tech. UC 2 0
English and Foreign Language UC 2 0

CGPA Details
Credits Credits CGPA S Grades A Grades B Grades C Grades D Grades E Grades F Grades N Grades
Registered Earned
20 20 7.25 0 2 0 2 1 1 0 0

Note : eGenerated Doc - To be verified with Institution for Authenticity

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