Esquema Notebook Acer A515

A B C D E
Compal Confidential
Model Name : Charmander_UMA
Compal Project Name : C5V01 / D7W01
1 File Name : LA-E891P 1
Compal Confidential 2
C5V01 MB Schematic Document

LA-E891P
3 3
Rev: 1A
2017.06.12
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E891P
Date: Monday, June 12, 2017 Sheet 1 of 46
A B C D E
A B C D E
HDMI Conn. eDP Interleaved Memory
DDR4-ON BOARD 4G 8Gbx16
page 19
page 22 page 21 Memory BUS
1
DDI1 Dual Channel 1
260pin DDR4-SO-DIMM X1
HDMI x 4 lanes
eDP Intel Kabylake U 1.2V DDR4 1866/2133
DDI page 20
Kabylake U USB 2.0
eMMC eMMC Kabylake PCH-LP(MCP) USB 3.0 conn x2 CMOS USB TypeC
page 27 (KBL-U_2+2) conn x1 USB port3,4 Camera conn x1
USB port 1 on Sub/B USB port 7 USB (port 2,3)
(KBL-RU_4+2)
Processor
page 24
PCIE 3.0 x4 Dual Core + GT2
8GT/s Flexible IO Fingerprint
2
Port 9-12 Base-U PCIE2.0 Quad Core + GT2 USB port8

2
Premium-U PCIE3.0
page 29 page 29 page 21 page 28 page 31
NGFF SATA3.0 SATA3.0 USBx8

PCIe 1.0 PCIe 1.0 6.0 Gb/s 6.0 Gb/s 48MHz
WLAN 2.5GT/s 2.5GT/s port 7 port 8
USB port 5 port 6 port 5 (SATA0) (SATA1) 3.3V 24MHz
HD Audio
page 24 Touch
LAN(GbE) SATA HDD SATA CDROM 15W Screen
Realtek 8411B Conn. Conn. HDA Codec
1356pin BGA USB port 6
page 23
page 07~18 SPI SPI ROM ALC255page 25 page 21
64Mb page 9
LPC/eSPI BUS SMBUS

SD conn. RJ45 conn.
CLK=24MHz
3
page 26
page 26 Gensor 3
page 26
ENE TPM
KB9022 Int. Speaker Int. DMIC UAJ
page 30 page 31
on Camera on Sub/B
page 25 page 21 page 29
RTC CKT. Fan Control
page 32
page 15 Touch Pad
Int.KBD PS2 (from EC) / I2C (from SOC)
Power On/Off CKT. Sub Board
page 31
LS-E891
page 31 page 31
IO/B
page 29
4 DC/DC Interface CKT. 4
page 33
LS-E892
Hall Sensor/B Security Classification Compal Secret Data Compal Electronics, Inc.
Power Circuit DC/DC page 31
Issued Date 2016/11/04 Deciphered Date 2018/11/04 Title
Block Diagrams
page 34~43 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
A B C D E
A B C D E
Board ID Table for AD channel

Vcc 3.3V +/- 5%
Ra 100K +/- 1% Power State
Board ID Rb V BID min V BID typ V BID max EC AD3 PCB Revision SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
0 0 0 V 0 V 0.300 V 0x00 - 0x13 0.1(EVT)
1 12K +/- 1% 0.347 V 0.345 V 0.360 V 0x14 - 0x1E 1.0(DVT) S0 (Full ON) HIGH HIGH HIGH ON ON ON ON
2 15K +/- 1% 0.423 V 0.430 V 0.438 V 0x1F - 0x25 1A(PVT) S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
1
3 20K +/- 1% 0.541 V 0.550 V 0.559 V 0x26 - 0x30 1A(MP) 1
4 27K +/- 1% 0.691 V 0.702 V 0.713 V 0x31 - 0x3A D7W01(PVT) S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
5 33K +/- 1% 0.807 V 0.819 V 0.831 V 0x3B - 0x45 D7W01(MP) S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
6 43K +/- 1% 0.978 V 0.992 V 1.006 V 0x46 - 0x54
7 56K +/- 1% 1.169 V 1.185 V 1.200 V 0x55 - 0x64
BOM Structure Table Voltage Rails

Power Plane Description S0 S3 S4/S5
BOM Option Table BOM Option Table +19V_VIN Adapter power supply N/A N/A N/A
Item BOM Structure Item BOM Structure +17.4V_BATT Battery power supply N/A N/A N/A
Unpop @ MB Stage EVT@/DVT@/PVT@/MP@ +19VB AC or battery power rail for power circuit. N/A N/A N/A
+VCC_CORE Processor IA Cores Power Rail ON OFF OFF
Connector CONN@ BOM Select X76@
+VCC_GT Processor Graphics Power Rails ON OFF OFF
Acer BYOC BYOC@ / NBYOC@ Memory Select X76M01@ ~ X76M03@
+VCC_SA System Agent power rail ON OFF OFF
CODEC(ALC255) 255@ Memory Mode SDP@ / DDP@
+0.6VS_VTT DDR +0.6VS power rail for DDR terminator . ON OFF OFF
EC Mode Select LPC@ / ESPI@ SATA Redriver Select X76TI@ / X76PAR@
For Intel CMC CMC@ DAZ PN DAZ@ +1.0VALW_PRIM +1.0V Always power rail ON ON ON*1
+1.0V_VCCSTU Sustain voltage for processor in Standby modes ON ON OFF
LAN Mode Select SWR@ / LDO@ PCB PN PCB@
+VCCIO CPU IO power rail ON OFF OFF
EMI requirement EMI@ / @EMI@ HDMI LOGO 45@
2 2
+1.0VS_VCCSTG +1.0VALW_PRIM Gated version of VCCST ON OFF OFF
ESD requirement ESD@ / @ESD@
+1.2V_VDDQ DDR4 +1.2V Power Rail ON ON OFF
RF requirement @RF@
CPU Selection U42@/U22@ +1.8VALW_PRIM +1.8V Always power rail ON ON ON*1
+1.8VS System +1.8V power rail ON OFF OFF
TPM TPM@
Finger Print FP@ +3VLP +19VB to +3VLP power rail for suspend power ON ON ON
UMA or DGPU UMA@/VGA@ CPU Code QKJW@ +3VALW System +3VALW always on power rail ON ON ON*1
+3VS System +3V power rail ON OFF OFF
ODD Support ODD@
G Sensor BA@ +5VALW +5V Always power rail ON ON ON
3S@ +5VS System +5V power rail ON OFF OFF

For over 3 cell battery
+RTCVCC RTC Battery Power ON ON ON
43 level BOM table

43 Level Description BOM Structure
431A72BOL01 SMT MB AE891 C5V01 UMA I36006U HDMI SR2UW@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@
431A72BOL02 SMT MB AE891 C5V01 UMA I3 QLDP1.4 HDMI QLDP@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@
431A72BOL03 SMT MB AE891 C5V01 UMA I5 QLDM1.4 HDMI QLDM@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@
431A72BOL04 SMT MB AE891 C5V01 UMA I7 QLDN1.4 HDMI QLDN@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@ Note : ON*1 means power plane is ON only when WOL enable and RTC wake at BIOS setting, otherwise it is OFF.
3 431A72BOL05 SMT MB AE891 C5V01 UMA I3 QLYK2.2 HDMI QLYK@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@ 3
431A72BOL06 SMT MB AE891 C5V01 UMA I3-7100 1.4 HDMI I37100@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@

431A72BOL07 SMT MB AE891 C5V01 UMA I5 QLYJ2.2 HDMI QLYJ@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@
431A72BOL09 SMT MB AE891 C5V01 UMA I7 QLYH2.2 HDMI QLYH@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@
431A72BOL10 SMT MB AE891 C5V01 UMA I7 QLYH2.2 HDMI I77500@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@
431A72BOL14 SMT MB AE891 C5V01 UMA I3-7100 U42 HDMI I3710022@/CMC@/LPC@/UMA@/U42@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@
431A72BOL15 SMT MB AE891 C5V01 UMA I5 QN5D U42 HDMI QN5D@/CMC@/LPC@/UMA@/U42@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@
431A72BOL16 SMT MB AE891 C5V01 UMA I7 QN5C U42 HDMI QN5C@/CMC@/LPC@/UMA@/U42@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@
431A72BOL51 SMT MB AE891 C5V01 UMA I7 QN5C U42 HDMI SR2UW@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/EA17PVT@/X4E@/X76M@/EA17DAZ@/X76PAR@/D7W01@/ODD@
431A72BOL52 SMT MB AE891 D7W01 UMA I3-6006 HDMI I3710022@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/EA17PVT@/X4E@/X76M@/EA17DAZ@/X76PAR@/D7W01@/ODD@
431A72BOL55 SMT MB AE891 D7W01 UMA QNEF HDMI U42I5@/CMC@/LPC@/UMA@/U42@/3S@/LDO@/NBYOC@/255@/CHG@/EA17PVT@/X4E@/X76M@/EA17DAZ@/X76PAR@/D7W01@/ODD@
4 431A72BOL56 SMT MB AE891 D7W01 UMA QNBF HDMI U42I7@/CMC@/LPC@/UMA@/U42@/3S@/LDO@/NBYOC@/255@/CHG@/EA17PVT@/X4E@/X76M@/EA17DAZ@/X76PAR@/D7W01@/ODD@ 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Notes List
A B C D E
A B C D E
DRVON NCP81253MNTBG
(PU9001) +VCC_CORE
NCP81151MNTBG +VCC_GT
(PU9003) R-Short +TS_PWR
(RX8)
NCP81253MNTBG R-Short
(PU9004) +VCC_SA (RC208) +1.2V_VDDQC AP2330W
+HDMI_5V_OUT
(UY1)
1 SYSON JUMP JUMP R-Short 1
+1.2VP (PJ501) +1.2V_VDDQ (JPC1,JPC2) +1.2V_VDDQ_CPU +1.2V_VCCSFR_OC R-Short

(RC141) +5VS_HDD
RT8207KGQW (RO3)
SM_PG_CTRL (PU501) JUMP
ADAPTER +0.6VSP (PJ502) +0.6VS_VTT 0 ohm
(RO2) +5VS_ODD
5V_EN SY8286CRAC JUMP SUSP# EM5209VF JUMP JUMP
+5VALWP (PJ402) +5VALW +5VS_OUT (JPQ2) +5VS (JPA1) +VDDA
(PU402) (UQ1)
USB_EN SY6288C20AAC R-Short
BATTERY +19VB +USB3_VCCA +VCC_FAN1
(US21) (RF1)
SYSON APL5336KAI R-Short
(PU502) +2.5VP (RC197) +3VALW_1.8VALW_PGPPA
3V_EN SY8286BRAC JUMP R-Short R-Short
(PU401) +3VALWP (PJ401) +3VALW (RC173) +3VALW_DSW (RC161) +3VALW_PGPPB
CHARGER
JUMP R-Short
(JPC7) +3VALW_PRIM (RC163) +3VALW_PGPPC
LDO SYSON APL5336KAI R-Short R-Short
2
(PU502) +2.5VP (RC172) +3VALW_1.8VALW_PGPPD (RC178) +1.8VS_3VS_PGPPA 2
+3VLP
LAN_PWR_EN SY6288C20AAC R-Short 0 ohm
(UL1) +3V_LAN (RC167) +3VALW_PGPPE (RM1) +3VS_WLAN
TP_PWR_EN SY6288C20AAC R-Short R-Short
+3V_PTP +3VALW_PGPPG +3VS_DVDDIO
(UK1) (RC187) (RA2)
WLAN_ON SY6288C20AAC R-Short R-Short
(UM1) +3VS_WLAN (RC171) +3VALW_RTC (RA5) +3VS_DVDD
SUSP# EM5209VF JUMP SOC_ENVDD SY6288C20AAC
(UQ1) +3VS_OUT (JPQ1) +3VS (UX1) +LCDVDD
SPOK G971ADJF11U JUMP SUSP# EM5209VF R-Short
(PU702) +1.8VALWP (PJ702) +1.8VALW_PRIM (UC5) +1.8VS (RA6) +1.8VS_VDDA
EN_1VALW SY8288RAC JUMP R-Short R-Short

(PU601) +1.0VALWP (PJ601) +1.0VALW_PRIM (RC148) +1.0VALW_APLL (RC209) +1.0VALW_MPHYGT
JUMP R-Short
3
(JPC9) +1.0VALW_MPHYPLL (RC149) +1.0VALW_AMPHYPLL 3
R-Short R-Short
(RC162) +1.0VALW_DTS (RC176) +1.0VALW_SRAM
R-Short R-Short
(RC169) +1.0VALW_CLK6_24TBT (RC156) +1.0VALW_APLLEBB
R-Short
(RC164) +1.0VALW_VCCCLK2
R-Short
(RC190) +1.0VALW_CLK4_F100OC
R-Short
(RC152) +1.0VALW_CLK5_F24NS
R-Short R-Short
(RC175) +1.0VALW_MPHYAON (RC143) +1.0V_VCCSFR
SYSON EM5209VF R-Short
(UC5) +1.0V_VCCSTU (RC140) +1.0V_VCCST
4 SUSP# AOZ1336 R-Short 4
(UC8) +1.0VS_VCCSTG_IO (RC188) +1.0VS_VCCSTG
JUMP
(JPC5) +VCCIO

2016/11/04 2018/11/04 Title
Issued Date Deciphered Date Power Rail
A B C D E
A B C D E
2.2K 2.2K
2.2K
+3VALW_PRIM 2.2K
+3VS
BH10 SOC_SMBCLK
BG12 SOC_SMBDATA 2N7002DW

1
Skylake SO-DIMM 2 1
SOC
SOC_SML0CLK 499
499
+3VALW_PRIM
SOC_SML0DATA
2.2K
2.2K
+3VALW_PRIM
SOC_SML1CLK
SOC_SML1DATA
2 2
2.2K
2.2K
+3VLP_EC
77 EC_SMB_CK1 100 ohm 7

SCL1 BATTERY
78 EC_SMB_DA1 100 ohm 6
SDA1 CONN
0 ohm EC_SMB_CK1_CHGR
12
0 ohm EC_SMB_DA1_CHGR Charger
11
KBC SCL2 79 SOC_SML1CLK
SDA2 80 SOC_SML1DATA
3
KB9022 Need check
3
I2C Address Table

Address(8bit)
BUS Device Address(7 bit)
Write Read
I2C_0 (+3VS) Reserved (Touch Panel)
TM-P2969-001 (TP) 0x2C
I2C_1 (+3VS)
SB8787-1200 (TP-ELAN) 0x15
DIMM2 0xA4
SOC_SMBCLK +3VS
PCH-LP (SOC) 0x90
SOC_SML1CLK
+3VALW_PRIM
BQ24780 (Charger IC) 0x12

EC_SMB_CK1 +3VLP
4 BATTERY PACK 0x16 4
2016/11/04
Compal Secret Data
2018/11/04 Title
SMBUS_Routing_Table
A B C D E
A B C D E
PWR Sequence_SKL-U2+2_DDR3L_Value_NON CS
+RTCVCC
tPCH01_Min : 9 ms
SOC_RTCRST#
1 1
+19VB
+3VLP
EC_ON
tPCH04_Min : 9 ms
+5VALW/+3VALW(+3VALW_DSW...)
tPCH34_Max : 20 ms
SPOK tPCH06_Min : 200 us (+3VALW stable (@95% of full value) to +1.0VALW_PRIM starting to ramp)
+1.8VALW_PRIM
+1.8VALW_PG
+VCCPRIM_CORE/+1.0VALW_PRIM
tPCH03_Min : 10 ms
EC_RSMRST#
ON/OFF
2
PBTN_OUT# tPCH43_Min : 95 ms 2
Minimum duration of PWRBTN# assertion = 16mS. PWRBTN# can assert before or after RSMRST#
PM_SLP_S5#
tPCH18_Min : 90 us
ESPI_RST#
PM_SLP_S4#
SYSON
+1.0V_VCCSTU
+1.2V_VDDQ
PM_SLP_S3#
SUSP#
tCPU04 Min : 100 ns
+1.0VS_VCCSTG
tCPU10 Min : 1 ms
+VCCIO
3 3
+5VS/+3VS/+1.8VS/+1.5VS
tCPU00 Min : 1 ms
EC_VCCST_PG
VR_ON
tCPU19 Max : 100 ns
SM_PG_CTRL
tCPU18 Max : 35 us
+0.6VS_VTT
tCPU09 Min : 1 ms
+VCC_SA
VR_PWRGD
tCPU16 Min : 0 ns
PCH_PWROK (SYS_PWROK) tPLT05 Min : Platform dependent
H_CPUPWRGD
PLT_RST#
+VCC_CORE / +VCC_GT
4 4
2016/11/04
Compal Secret Data
2018/11/04 Title
Power Sequence
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A B C D E
A B C D E
1 1
UC1A SKL-U
Rev_0.53
E55 C47
<22> SOC_DP1_N0 F55 DDI1_TXN[0] EDP_TXN[0] C46 EDP_TXN0 <21>
<22> SOC_DP1_P0 E58 DDI1_TXP[0] EDP_TXP[0] D46 EDP_TXP0 <21>
<22> SOC_DP1_N1 F58 DDI1_TXN[1] EDP_TXN[1] C45 EDP_TXN1 <21>
<22> SOC_DP1_P1 F53 DDI1_TXP[1] EDP_TXP[1] A45 EDP_TXP1 <21>
HDMI <22> SOC_DP1_N2 G53 DDI1_TXN[2] EDP_TXN[2] B45 EDP_TXN2 <21> eDP
Functional Strap Definitions <22>
<22>
SOC_DP1_P2
SOC_DP1_N3
F56 DDI1_TXP[2]
DDI1_TXN[3]
EDP_TXP[2]
EDP_TXN[3]
A47 EDP_TXP2
EDP_TXN3
<21>
<21>
G56 B47
<22> SOC_DP1_P3 DDI1_TXP[3] EDP_TXP[3] EDP_TXP3 <21>
#543016 PDG2.0 P.844 C50 E45
EDP_AUXN <21>
D50 DDI2_TXN[0] DDI EDP EDP_AUXN F45
DDPB_CTRLDATA C52 DDI2_TXP[0] EDP_AUXP EDP_AUXP <21>
DDI2_TXN[1]
DDPC_CTRLDATA D52
A50 DDI2_TXP[1] EDP_DISP_UTIL
B52
Display Port B/C Detected B50 DDI2_TXN[2]

DDI2_TXP[2] DDI1_AUXN
G50
NC =Port is not detected. D51
C51 DDI2_TXN[3] DDI1_AUXP
F50
E48
PU =Port is detected. DDI2_TXP[3] DDI2_AUXN
DDI2_AUXP
F48
G46
HDMI DDC (Port B) DISPLAY SIDEBANDS DDI3_AUXN F46
SOC_DP1_CTRL_CLK L13 DDI3_AUXP RC212 +3VS
<22> SOC_DP1_CTRL_CLK SOC_DP1_CTRL_DATA L12 GPP_E18/DDPB_CTRLCLK L9 SOC_DP1_HPD
SOC_DP1_HPD <22> From HDMI 10K_0402_5%
2 <22> SOC_DP1_CTRL_DATA GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 L7 EC_SCI# 1 2 2
@
N7 GPP_E14/DDPC_HPD1 L6
N8 GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 N9 EC_SCI#
GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 L10 CPU_EDP_HPD EC_SCI# <30>
GPP_E17/EDP_HPD CPU_EDP_HPD <21> From eDP EC_SCI# SOC internal PU
+VCCIO N11
N12 GPP_E22/DDPD_CTRLCLK R12 ENBKL
GPP_E23/DDPD_CTRLDATA EDP_BKLTEN R11 SOC_BKL_PWM ENBKL <30>
RC1 1 2 24.9_0402_1% EDP_COMP EDP_COMP E52 1 OF 20 EDP_BKLTCTL U13 SOC_ENVDD SOC_BKL_PWM <21> #545659 PCH EDS1.51 P.131
EDP_RCOMP EDP_VDDEN SOC_ENVDD <21> SCI capability is available on all GPIOs, while
SKL-U_BGA1356 NMI and SMI capability is available on only
#543016 PDG2.0 P.225 @ select GPIOs.
COMPENSATION PU for eDP Below are the PCH GPIOs that can be
Trace width=5 mils,Spacing=25mil,Max length=600mils routed to generate SMI# or NMI:
‧ GPP_B14, GPP_B20, GPP_B23
‧ GPP_C 23 : 22
+1.0V_VCCST #543016 PDG2.0 P.857 ‧ GPP_ D 4 : 0
PU 1K to VCCST +1.0VS_VCCSTG ‧ GPP_E 8 : 0 , GPP_E 16 : 13
1
RC2 1 2 1K_0402_5% H_THERMTRIP#

RC3
Reserved CATERR# for UC1D SKL-U
1 2 1K_0402_5%
sight i ngs i ss ue c heck Rev_0.53 @ESD@ CC81
CC132 ESD@ RC4 H_CATERR# D63 .1U_0402_16V7K
@ T166 H_PECI CATERR# SOC_XDP_TRST#
1000P_0402_50V7K PVT pop 1000p 02/20 499_0402_1% A54 1 2
<30> H_PECI
2
1 2 H_PROCHOT#_R C65 PECI

<30> H_PROCHOT# H_THERMTRIP# C63 PROCHOT# JTA G
A65 THERMTRIP# B61 CPU_XDP_TCK0

SKTOCC# PROC_TCK D60 SOC_XDP_TDI
CPU MISC PROC_TDI
XDP_BPM#0 C55 A61 SOC_XDP_TDO
@ T160 XDP_BPM#1 BPM#[0] PROC_TDO SOC_XDP_TMS
@ T161 D55 C60
3 B54 BPM#[1] PROC_TMS B59 SOC_XDP_TRST# 3
BPM#[2] PROC_TRST# T194 @
C56
BPM#[3] B56 PCH_JTAG_TCK1
PCH_JTAG_TCK SOC_XDP_TDI T195 @
CC52 @ESD@ A6 D59
.1U_0402_16V7K A7 GPP_E3/CPU_GP0 PCH_JTAG_TDI A56 SOC_XDP_TDO
2 1 H_PECI RC137 2 @ 1 0_0402_5% TP_INT# BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDO C59 SOC_XDP_TMS
<30,31> EC_TP_INT# AY5 GPP_B3/CPU_GP2 PCH_JTAG_TMS C61 SOC_XDP_TRST#
GPP_B4/CPU_GP3 PCH_TRST# A59 CPU_XDP_TCK0
RC5 2 1 49.9_0402_1% CPU_POPIRCOMP AT16 JTAGX
2 1 H_PROCHOT#_R RC6 2 1 49.9_0402_1% PCH_OPIRCOMP AU16 PROC_POPIRCOMP
ESD@ CC53 RC7 2 1 49.9_0402_1% EDRAM_OPIO_RCOMP H66 PCH_OPIRCOMP
1000P_0402_50V7K RC8 2 1 49.9_0402_1% EOPIO_RCOMP H65 OPCE_RCOMP
OPC_RCOMP
4 OF 20
PVT Change to 1000P 02/20 SKL-U_BGA1356
#543016 PDG2.0 P.873 @
PROC_POPIRCOMP/PCH_OPIRCOMP
For Intel debug, place to CPU side. PD 50ohm
+1.0VS_VCCSTG
#543016 PDG2.0 P.629
#544669 CRB1.1 P.52
RC11 2 CMC@ 1 51_0402_5% SOC_XDP_TMS EDRAM_OPIO_RCOMP/EOPIO_RCOMP
PD 50ohm
RC13 2 @ 1 51_0402_5% SOC_XDP_TDI
RC15 2 CMC@ 1 51_0402_5% SOC_XDP_TDO
RC35 2 CMC@ 1 51_0402_5% CPU_XDP_TCK0
4 4
2016/11/04
Compal Secret Data
2018/11/04 Title
SKL-U(1/12)DDI,MSIC,XDP,EDP
A B C D E
A B C D E
Interleaved Memory
SKL-U
UC1B SKL-U UC1C
Rev_0.53 Rev_0.53
AU53 DDR_A_CLK#0
<19> DDR_A_D[0..15] DDR_A_D0 DDR0_CKN[0] DDR_A_CLK0 DDR_A_CLK#0 <19> <20> DDR_B_D[0..15] DDR_B_D0 DDR_B_CLK#0
AL71 AT53 AF65 AN45
1 DDR_A_D1 DDR0_DQ[0] DDR0_CKP[0] DDR_A_CLK#1 DDR_A_CLK0 <19> DDR_B_D1 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] DDR_B_CLK#1 DDR_B_CLK#0 <20> 1
AL68 AU55 AF64 AN46
DDR_A_D2 DDR0_DQ[1] DDR0_CKN[1] DDR_A_CLK1 @ T240 DDR_B_D2 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] DDR_B_CLK0 DDR_B_CLK#1 <20>
AN68 AT55 AK65 AP45
DDR_A_D3 DDR0_DQ[2] DDR0_CKP[1] @ T241 DDR_B_D3 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] DDR_B_CLK1 DDR_B_CLK0 <20>
AN69 AK64 AP46
DDR_A_D4 DDR0_DQ[3] DDR_A_CKE0 DDR_B_D4 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] DDR_B_CLK1 <20>
AL70 BA56 AF66
DDR_A_D5 DDR0_DQ[4] DDR0_CKE[0] DDR_A_CKE1 DDR_A_CKE0 <19> DDR_B_D5 DDR1_DQ[4]/DDR0_DQ[20] DDR_B_CKE0
AL69 BB56 AF67 AN56
DDR_A_D6 DDR0_DQ[5] DDR0_CKE[1] @ T247 DDR_B_D6 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] DDR_B_CKE1 DDR_B_CKE0 <20>
AN70 AW56 AK67 AP55
DDR_A_D7 DDR0_DQ[6] DDR0_CKE[2] @ T14 DDR_B_D7 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] DDR_B_CKE1 <20>
AN71 AY56 AK66 AN55
DDR_A_D8 DDR0_DQ[7] DDR0_CKE[3] @ T15 DDR_B_D8 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] @ T17
AR70 AF70 AP53
DDR_A_D9 DDR0_DQ[8] DDR_A_CS#0 DDR_B_D9 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3] @ T18
AR68 AU45 AF68
DDR_A_D10 DDR0_DQ[9] DDR0_CS#[0] DDR_A_CS#1 DDR_A_CS#0 <19> DDR_B_D10 DDR1_DQ[9]/DDR0_DQ[25] DDR_B_CS#0
AU71 AU43 AH71 BB42
DDR_A_D11 DDR0_DQ[10] DDR0_CS#[1] DDR_A_ODT0 @ T242 DDR_B_D11 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] DDR_B_CS#1 DDR_B_CS#0 <20>
AU68 AT45 AH68 AY42
DDR_A_D12 DDR0_DQ[11] DDR0_ODT[0] DDR_A_ODT1 DDR_A_ODT0 <19> DDR_B_D12 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] DDR_B_ODT0 DDR_B_CS#1 <20>
AR71 AT43 AF71 BA42
DDR_A_D13 DDR0_DQ[12] DDR0_ODT[1] @ T243 DDR_B_D13 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] DDR_B_ODT1 DDR_B_ODT0 <20>
AR69 AF69 AW42
DDR_A_D14 DDR0_DQ[13] DDR_A_MA5 DDR_B_D14 DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1] DDR_B_ODT1 <20>
AU70 BA51 AH70
DDR_A_D15 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR_A_MA9 DDR_A_MA5 <19> DDR_B_D15 DDR1_DQ[14]/DDR0_DQ[30] DDR_B_MA5
AU69 BB54 AH69 AY48
<19> DDR_A_D[16..31] DDR_A_D16 DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR_A_MA6 DDR_A_MA9 <19> <20> DDR_B_D[16..31] DDR_B_D16 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR_B_MA9 DDR_B_MA5 <20>
BB65 BA52 AT66 AP50
DDR_A_D17 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR_A_MA8 DDR_A_MA6 <19> DDR_B_D17 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR_B_MA6 DDR_B_MA9 <20>
AW65 AY52 AU66 BA48
DDR_A_D18 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR_A_MA7 DDR_A_MA8 <19> DDR_B_D18 DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR_B_MA8 DDR_B_MA6 <20>
AW63 AW52 AP65 BB48
DDR_A_D19 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR_A_BG0 DDR_A_MA7 <19> DDR_B_D19 DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR_B_MA7 DDR_B_MA8 <20>
AY63 AY55 AN65 AP48
DDR_A_D20 DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR_A_MA12 DDR_A_BG0 <19> DDR_B_D20 DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR_B_BG0 DDR_B_MA7 <20>
BA65 AW54 AN66 AP52
DDR_A_D21 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR_A_MA11 DDR_A_MA12 <19> DDR_B_D21 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR_B_MA12 DDR_B_BG0 <20>
AY65 BA54 AP66 AN50
DDR_A_D22 DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR_A_ACT# DDR_A_MA11 <19> DDR_B_D22 DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR_B_MA11 DDR_B_MA12 <20>
BA63 BA55 AT65 AN48
DDR_A_D23 DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR_A_BG1 DDR_A_ACT# <19> DDR_B_D23 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR_B_ACT# DDR_B_MA11 <20>
BB63 AY54 AU65 AN53
DDR_A_D24 DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR_A_BG1 <19> DDR_B_D24 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR_B_BG1 DDR_B_ACT# <20>
BA61 AT61 AN52
DDR_A_D25 DDR0_DQ[24]/DDR0_DQ[40] DDR_A_MA13 DDR_B_D25 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR_B_BG1 <20>
AW61 AU46 AU61
DDR_A_D26 DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR_A_MA15 DDR_A_MA13 <19> DDR_B_D26 DDR1_DQ[25]/DDR0_DQ[57] DDR_B_MA13
BB59 AU48 AP60 BA43
DDR_A_D27 DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR_A_MA14 DDR_A_MA15 <19> DDR_B_D27 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR_B_MA15 DDR_B_MA13 <20>
AW59 AT46 AN60 AY43
DDR_A_D28 DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR_A_MA16 DDR_A_MA14 <19> DDR_B_D28 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR_B_MA14 DDR_B_MA15 <20>
BB61 AU50 AN61 AY44
DDR_A_D29 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR_A_BA0 DDR_A_MA16 <19> DDR_B_D29 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR_B_MA16 DDR_B_MA14 <20>
AY61 AU52 AP61 AW44
DDR_A_D30 DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR_A_MA2 DDR_A_BA0 <19> DDR_B_D30 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR_B_BA0 DDR_B_MA16 <20>
BA59 AY51 AT60 BB44
DDR_A_D31 DDR0_DQ[30]/DDR0_DQ[46] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR_A_BA1 DDR_A_MA2 <19> DDR_B_D31 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR_B_MA2 DDR_B_BA0 <20>
AY59 AT48 AU60 AY47
<19> DDR_A_D[32..47] DDR_A_D32 DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR_A_MA10 DDR_A_BA1 <19> <20> DDR_B_D[32..47] DDR_B_D32 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR_B_BA1 DDR_B_MA2 <20>
AY39 AT50 AU40 BA44
2 DDR_A_D33 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR_A_MA1 DDR_A_MA10 <19> DDR_B_D33 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR_B_MA10 DDR_B_BA1 <20> 2
AW39 BB50 AT40 AW46
DDR_A_D34 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR_A_MA0 DDR_A_MA1 <19> DDR_B_D34 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR_B_MA1 DDR_B_MA10 <20>
AY37 AY50 AT37 AY46
DDR_A_D35 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR_A_MA3 DDR_A_MA0 <19> DDR_B_D35 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR_B_MA0 DDR_B_MA1 <20>
AW37 BA50 AU37 BA46
DDR_A_D36 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] DDR_A_MA4 DDR_A_MA3 <19> DDR_B_D36 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR_B_MA3 DDR_B_MA0 <20>
BB39 BB52 AR40 BB46
DDR_A_D37 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] DDR_A_MA4 <19> DDR_B_D37 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3] DDR_B_MA4 DDR_B_MA3 <20>
BA39 AP40 BA47
DDR_A_D38 DDR0_DQ[37]/DDR1_DQ[5] DDR_A_DQS#0 DDR_B_D38 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4] DDR_B_MA4 <20>
BA37 AM70 AP37
DDR_A_D39 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] DDR_A_DQS0 DDR_A_DQS#0 <19> DDR_B_D39 DDR1_DQ[38]/DDR1_DQ[22] DDR_B_DQS#0
BB37 AM69 AR37 AH66
DDR_A_D40 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] DDR_A_DQS#1 DDR_A_DQS0 <19> DDR_B_D40 DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] DDR_B_DQS0 DDR_B_DQS#0 <20>
AY35 AT69 AT33 AH65
DDR_A_D41 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] DDR_A_DQS1 DDR_A_DQS#1 <19> DDR_B_D41 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] DDR_B_DQS#1 DDR_B_DQS0 <20>
AW35 AT70 AU33 AG69
DDR_A_D42 DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] DDR_A_DQS#2 DDR_A_DQS1 <19> DDR_B_D42 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] DDR_B_DQS1 DDR_B_DQS#1 <20>
AY33 BA64 AU30 AG70
DDR_A_D43 DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] DDR_A_DQS2 DDR_A_DQS#2 <19> DDR_B_D43 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] DDR_B_DQS#2 DDR_B_DQS1 <20>
AW33 AY64 AT30 AR66
DDR_A_D44 DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] DDR_A_DQS#3 DDR_A_DQS2 <19> DDR_B_D44 DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] DDR_B_DQS2 DDR_B_DQS#2 <20>
BB35 AY60 AR33 AR65
BA35 BA60 AP33 AR61
DDR_A_D46 DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] DDR_A_DQS#4 DDR_A_DQS3 <19> DDR_B_D46 DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] DDR_B_DQS3 DDR_B_DQS#3 <20>
BA33 BA38 AR30 AR60
BB33 AY38 AP30 AT38
<19> DDR_A_D[48..63] DDR_A_D48 DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] DDR_A_DQS#5 DDR_A_DQS4 <19> <20> DDR_B_D[48..63] DDR_B_D48 DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2] DDR_B_DQS4 DDR_B_DQS#4 <20>
AY31 AY34 AU27 AR38
DDR_A_D49 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] DDR_A_DQS5 DDR_A_DQS#5 <19> DDR_B_D49 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] DDR_B_DQS#5 DDR_B_DQS4 <20>
AW31 BA34 AT27 AT32
DDR_A_D50 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] DDR_A_DQS#6 DDR_A_DQS5 <19> DDR_B_D50 DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] DDR_B_DQS5 DDR_B_DQS#5 <20>
AY29 BA30 AT25 AR32
DDR_A_D51 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] DDR_A_DQS6 DDR_A_DQS#6 <19> DDR_B_D51 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] DDR_B_DQS#6 DDR_B_DQS5 <20>
AW29 AY30 AU25 AR25
DDR_A_D52 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] DDR_A_DQS#7 DDR_A_DQS6 <19> DDR_B_D52 DDR1_DQ[51] DDR1_DQSN[6] DDR_B_DQS6 DDR_B_DQS#6 <20>
BB31 AY26 AP27 AR27
DDR_A_D53 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] DDR_A_DQS7 DDR_A_DQS#7 <19> DDR_B_D53 DDR1_DQ[52] DDR1_DQSP[6] DDR_B_DQS#7 DDR_B_DQS6 <20>
BA31 BA26 AN27 AR22
DDR_A_D54 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] DDR_A_DQS7 <19> DDR_B_D54 DDR1_DQ[53] DDR1_DQSN[7] DDR_B_DQS7 DDR_B_DQS#7 <20>
BA29 AN25 AR21
DDR_A_D55 DDR0_DQ[54]/DDR1_DQ[38] DDR_A_ALERT# DDR_B_D55 DDR1_DQ[54] DDR1_DQSP[7] DDR_B_DQS7 <20>
BB29 AW50 AP25
DDR_A_D56 DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# DDR_A_PAR DDR_A_ALERT# <19> DDR_B_D56 DDR1_DQ[55] DDR_B_ALERT#
AY27 AT52 AT22 AN43
DDR_A_D57 DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR DDR_A_PAR <19> DDR_B_D57 DDR1_DQ[56] DDR1_ALERT# DDR_B_PAR DDR_B_ALERT# <20>
AW27 AU22 AP43
DDR_A_D58 DDR0_DQ[57]/DDR1_DQ[41] +0.6V_A_VREFCA DDR_B_D58 DDR1_DQ[57] DDR1_PAR DDR_B_PAR <20>
AY25 AY67 AU21 AT13
DDR_A_D59 DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA +0.6V_A_VREFCA DDR_B_D59 DDR1_DQ[58] DRAM_RESET# SM_RCOMP0 DDR_DRAMRST# <19,20>
AW25 AY68 AT21 AR18
DDR_A_D60 BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR CH - A
DDR0_VREF_DQ BA67 +0.6V_B_VREFCA DDR_B_D60 AN22 DDR1_DQ[59] DDR_RCOMP[0] AT18 SM_RCOMP1
DDR_A_D61 DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ +0.6V_B_VREFCA DDR_B_D61 DDR1_DQ[60] DDR CH - B DDR_RCOMP[1] SM_RCOMP2
BA27 AP22 AU18
DDR_A_D62 BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR_PG_CTRL DDR_B_D62 AP21 DDR1_DQ[61] DDR_RCOMP[2] PVT change to 121 ohm
DDR_A_D63 BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL #543016 PDG2.0 P.190 DDR_B_D63 AN21 DDR1_DQ[62]
DDR0_DQ[63]/DDR1_DQ[47] 2 OF 20 Trace width/Spacing >= 20mils DDR1_DQ[63] 3 OF 20 SDP@
3 Place componment near SODIMM RC38 3
SKL-U_BGA1356 SKL-U_BGA1356 121_0402_1%
@ @ SD034121090
Pre-MP Update DAZ / PCB PN 03/27
ZZZ DAZ@ ZZZ EA17DAZ@ ZZZ1 PCB@ +1.2V_VDDQ
+3VS
SM_RCOMP0 RC38 1 DDP@ 2 121_0402_1%
Intel DOC: 549352 SM_RCOMP1 RC39 1 2 80.6_0402_1%
0.1U_0201_10V6K 2 1 CC57 SM_RCOMP2 RC40 1 2 100_0402_1%
1
PCB C5V01 LA-E891P LS-E891P/E892P PCB D7W01 LA-E891P LS-E892P/E893P PCB 20X LA-E891P REV1A MB 2
DAZ20X00102 DAZ24C00201 DA8001AT01A UC7 RC10
D7W01 Pre-MP Update DAZ / PCB PN 06/12 1 5
NC VCC 100K_0402_5% #543016 PDG2.0 P.139
DDR_PG_CTRL 2 W=12-15 Space= 20/25 L=500mil
2
UC1 UC1 UC1 UC1 A 4

3 Y SM_PG_CTRL <38>
@ESD@
GND DDR_DRAMRST# CC70 1 2 .1U_0402_16V7K
2
74AUP1G07SE-7_SOT353_5P DDR_VTT_CNTL to DDR

RC16
@ 1M_0402_5% VTT supplied ramped
KBL i3-7100U QS KBL i3-7100U MP KBL i3-7100U HDCP2.2 KBL i3-7100U HDCP2.2 MP ZZZ 45@ DVT Change PN to SA00007WE00 <35uS 2015MOW02, Can't install Cap on DRAMRST
QLDP@ I37100@ QLYK@ I3710022@
01/11 (tCPU18)
1
SA0000A3820 SA0000A3860 SA0000A38K0 SA0000A38M0
UC1 UC1 UC1 UC1

HDMI LOGO
RO0000002HM UC1 UC1 U42
4 KBL i5-7200U QS KBL i5-7200U MP KBL i5-7200U HDCP2.2 KBL i3-7100U HDCP2.2 MP 4
QLDM@ I57200@ QLYJ@ I5720022@
SA0000A3720 SA0000A3760 SA0000A37L0 SA0000A37N0 KBL i5 U42 KBL i7 U42
Skylake QN5D@ QN5C@
SA0000AR010 SA0000AQZ10
UC1 UC1 UC1 UC1 UC1 UC1 UC1
2016/11/04
Compal Secret Data
2018/11/04 Title
KBL i7-7500U QS KBL i7-7500U MP KBL i7-7500U HDCP2.2 KBL i7-7500U HDCP2.2 MP SKL i3-6006U KBL i5 U42 MP KBL i7 U42 MP
SKL-U(2/12)DDR4
QLDN@ I77500@ QLYH@ I7750022@ SR2UW@ U42I5@ U42I7@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
SA0000A3400 SA0000A3450 SA0000A34J0 SA0000A34L0 SA0000ACL30 SA0000AWB40 SA0000AWC40 Custom 1A
A B C D E
A B C D E
+3VS
SOC_SMBCLK_1 RC222 1 2 2.2K_0402_5%

SOC_SMBDATA_1RC223 1 2 2.2K_0402_5%
+3VALW_PRIM
SOC_SML0CLK RC49 1 2 499_0402_1%

SOC_SML0DATA RC50 1 2 499_0402_1%
1 1
RPC7
SOC_SML1CLK 1 8
SOC_SML1DATA 2 7
SOC_SMBCLK 3 6
SOC_SMBDATA 4 5
SKL-U
UC1E 2.2K_0804_8P4R_5%
SPI - FLASH +3VS
SMBUS, SMLINK
SOC_SPI_CLK AV2
SOC_SPI_SO AW3 SPI0_CLK R7 SOC_SMBCLK
SOC_SPI_SI AV3 SPI0_MISO GPP_C0/SMBCLK R8 SOC_SMBDATA
SPI0_MOSI GPP_C1/SMBDATA SMB (to DDR, G sensor)
5
SOC_SPI_IO2 AW2 R10 SOC_SMBALERT#
SPI ROM
G
SOC_SPI_IO3 SPI0_IO2 GPP_C2/SMBALERT# @ T239
AU4 QC2B
SOC_SPI_CS#0 AU3 SPI0_IO3 R9 SOC_SML0CLK +3VALW_PRIM 2N7002KDW_SOT363-6
AU2 SPI0_CS0# GPP_C3/SML0CLK W2 SOC_SML0DATA Strap Pin
AU1 SPI0_CS1# GPP_C4/SML0DATA W1 SOC_SML0ALERT# 4.7K_0402_5% 2 ESPI@ 1 RC202 SOC_SMBCLK 3 4 SOC_SMBCLK_1
S
SPI0_CS2# GPP_C5/SML0ALERT# SOC_SMBCLK_1 <20,26>
2
W3 SOC_SML1CLK
G
SPI - TOUCH GPP_C6/SML1CLK SOC_SML1DATA SOC_SML1CLK <30>
V3 SML1 ( to EC, Thermal sensor) QC2A
GPP_C7/SML1DATA SOC_SML1ALERT# SOC_SML1DATA <30>
M2 AM7 2N7002KDW_SOT363-6
GPP_D1/SPI1_CLK GPP_B23/SML1ALERT#/PCHHOT# @ T234
M3
J4 GPP_D2/SPI1_MISO SOC_SMBDATA 6 1 SOC_SMBDATA_1
SOC_SMBDATA_1 <20,26>
S
V1 GPP_D3/SPI1_MOSI
D
SPI Touch V2 GPP_D21/SPI1_IO2 Change RC144~RC147, RC45 to 15ohm when use ESPI
M1 GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
LPC
AY13 LPC_AD0 RC144 1 @ 2 0_0402_5%
ESPI / LPC Bus
GPP_A1/LAD0/ESPI_IO0 BA13 LPC_AD1 1 2 LPC_AD0_R <30,31>
RC145 @ 0_0402_5% ESPI : +1.8V
C LINK GPP_A2/LAD1/ESPI_IO1 BB13 LPC_AD2 1 2 LPC_AD1_R <30,31>
RC146 @ 0_0402_5%
G3
G2 CL_CLK
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
AY12
BA12
LPC_AD3
LPC_FRAME#
RC147 1 @ 2 0_0402_5%
LPC_AD2_R
LPC_AD3_R
<30,31>
<30,31> * LPC : +3.3V +1.8VS_3VS_PGPPA
2 G1 CL_DATA GPP_A5/LFRAME#/ESPI_CS# BA11 ESPI_RST# LPC_FRAME# <30,31> 2
CL_RST# GPP_A14/SUS_STAT#/ESPI_RESET# ESPI_RST# <30>
PM_CLKRUN# RC107 1 2 10K_0402_5%
AW13 AW9 CLKOUT_LPC0 RC45 2 LPC@ 1 22_0402_5%
GPP_A0/RCIN# GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_LPC_TPM_R RC46 2 TPM@ 1 22_0402_5% CLK_LPC_EC <30> To EC TPM_SERIRQ
AY9 RC112 1 2 10K_0402_5%
TPM_SERIRQ AY11 GPP_A10/CLKOUT_LPC1 AW11 PM_CLKRUN# CLK_LPC_TPM <31>
<30,31> TPM_SERIRQ GPP_A6/SERIRQ GPP_A8/CLKRUN# PM_CLKRUN# <31>
5 OF 20
LPC Mode
SKL-U_BGA1356
@
SML0ALERT# / GPP_C5 (Internal Pull Down):
(Sampled: Rising edge of RSMRST# )
eSPI or LPC
*0 = LPC is selected for EC --> For KB9022/9032 Use
1 = eSPI is selected for EC --> For KB9032 Only.
SPI ROM ( 8MByte ) +3VALW_SPI CC8 SMBALERT# / GPP_C2 (Internal Pull Down):
UC2 1 2
0.1U_0201_10V6K (Sampled: Rising edge of RSMRST# )
SOC_SPI_CS#0 1 8
SOC_SPI_SO_0_R /CS VCC SOC_SPI_IO3_0_R
SOC_SPI_IO2_0_R
2
3 DO(IO1) /HOLD(IO3)
7
6 SOC_SPI_CLK_0_R TLS Conf i dent ial i ty
4 /WP(IO2)
GND
CLK
DI(IO0)
5 SOC_SPI_SI_0_R
* 0 = Disable Intel ME Crypto Transport Layer Security
W25Q64FVSSIQ_SO8 (TLS) cipher suite (no conf i dent ial i ty).
SA000039A40 1 = Enable Intel ME Crypto (TLS) (with conf i dent iali ty).
3 RPC5 and RC52 are close UC2 Must be pulled up to support Intel AMT with TLS and Intel 3
RPC5 PVT Change to SA000039A40 03/06
SOC_SPI_IO3 8 1 SOC_SPI_IO3_0_R 2015MOW06 no need PU1K on SPI_IO2/IO3 SBA (Small Business Advantage) with TLS.
SOC_SPI_SI 7 2 SOC_SPI_SI_0_R +3VALW_SPI
SOC_SPI_CLK 6 3 SOC_SPI_CLK_0_R
SOC_SPI_SO 5 4 SOC_SPI_SO_0_R SOC_SPI_CLK_0_R 1 @EMI@ 2 1 2
RC24 0_0402_5% CC9 @EMI@ SOC_SPI_IO2 RC47 1 @ 2 1K_0402_1%
15_0804_8P4R_5% 10P_0402_50V8J
SOC_SPI_IO3 RC48 1 @ 2 1K_0402_1%
SOC_SPI_IO2 2 1 SOC_SPI_IO2_0_R
RC52 15_0402_5%
+3VALW_SPI
ROM Socket, co-lay with UC2.
JC1
SOC_SPI_CS#0 1 8
SOC_SPI_IO2_0_R 3 CS# VCC 6 SOC_SPI_CLK_0_R
SOC_SPI_IO3_0_R 7 WP# SCLK 5 SOC_SPI_SI_0_R
4 HOLD# SI/SIO0 2 SOC_SPI_SO_0_R
GND SO/SIO1
ACES_91960-0084N_MX25L3206EM2I
CONN@
ACES_91960-0084N_8P-NPM
DVT JC1 solder mask 01/19
4 4
2016/11/04
Compal Secret Data
2018/11/04 Title
SKL-U(3/12)SPI,ESPI,SMB,LPC
Custom 1A
A B C D E
A B C D E
1 1
UC1G SKL-U
Rev_0.53
AUDIO
HDA for AUDIO HDA_SYNC

HDA_BIT_CLK
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_SDOUT BB22 HDA_BLK/I2S0_SCLK
SDIO/SDXC
HDA_SDIN0 HDA_SDIN0 BA21 HDA_SDO/I2S0_TXD
<25> HDA_SDIN0
AY21 HDA_SDI0/I2S0_RXD AB11
#543016 PDG2.0 P.403
RPC9 HDA_RST# AW22 HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD AB13 SDIO signals are mult i pl exed w i t h GPI Os and def aul t
1 8 HDA_BIT_CLK J5 HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0 AB12 to GPIO funct i onali t y ( as i nput). If S DI Oi nt erf acei s
<25> HDA_BIT_CLK_R HDA_SYNC GPP_D23/I2S_MCLK GPP_G2/SD_DATA1
2 7 AY20 W12 not used, the signals can be used as GPIOs instead.
<25> HDA_SYNC_R HDA_SDOUT I2S1_SFRM GPP_G3/SD_DATA2
3 6 AW20 W11
<25> HDA_SDOUT_R
4 5 HDA_RST# I2S1_TXD GPP_G4/SD_DATA3 W10 If the GPIO funct i onali t yi s al s o not us ed, t he si gnal s
<25> HDA_RST#_R GPP_G5/SD_CD# can be lef t as no- c onnect.
AK7 W8
33_0804_8P4R_5% AK6 GPP_F1/I2S2_SFRM GPP_G6/SD_CLK W7
AK9 GPP_F0/I2S2_SCLK GPP_G7/SD_WP
1 @ 2 AK10 GPP_F2/I2S2_TXD BA9
<30> ME_EN GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7
RC77 0_0402_5% BB9 RC76
GPP_A16/SD_1P8_SEL 200_0402_1%
PCH_DMIC_CLK H5 AB7 SD_RCOMP 2 1
HDA_SDO / I2S_TXD0 (Internal Pull Down): <25> PCH_DMIC_CLK PCH_DMIC_DATA D7 GPP_D19/DMIC_CLK0 SD_RCOMP
(Sampled: Rising edge of PCH_PWROK ) <25> PCH_DMIC_DATA GPP_D20/DMIC_DATA0
Flash Descriptor Security Override DMIC_CLK1 D8 AF13
#543016 PDG2.0 P.879
@ T265 DMIC_DATA1 GPP_D17/DMIC_CLK1 GPP_F23
0 = Enable security measures def i nedi n t he Fl as h @ T264 C8
GPP_D18/DMIC_DATA1
2 Descriptor. PCH_SPKR AW5 2
<25> PCH_SPKR GPP_B14/SPKR
1 = Disable Flash Descriptor Security (override). This
strap should only be asserted high using external 7 OF 20
SKL-U_BGA1356
pull-up in manufacturing/debug environments ONLY. @
SPKR / GPP_B14 (Internal Pull Down):

SKL_ULT
(Sampled:Rising edge of PCH_PWROK) UC1I
Rev_0.53
CSI-2
TOP Swap Override A36 C37 +3VALW_1.8VALW_PGPPD
* 0 = Disable TOP Swap mode. B36
C38
CSI2_DN0
CSI2_DP0
CSI2_CLKN0
CSI2_CLKP0
D37
C32
1 = Enable TOP Swap Mode. CSI2_DN1 CSI2_CLKN1
1
D38 D32
C36 CSI2_DP1 CSI2_CLKP1 C29 RC133
D36 CSI2_DN2 CSI2_CLKN2 D29 UMA@
CSI2_DP2 CSI2_CLKP2 10K_0402_5%
A38 B26
B38 CSI2_DN3 CSI2_CLKN3 A26
Intel HD Audio link capabilit i es #543016 PDG2.0 P.551
2
CSI2_DP3 CSI2_CLKP3
> Two SDI signals to support two external codecs. C31 E13 CSI2_COMP RC80 2 1 100_0402_1% DGPU_PRSNT#
> Drivers variable requency (5MHz to 24MHz) BCLK to support: D31 CSI2_DN4 CSI2_COMP B7 DGPU_PRSNT#
CSI2_DP4 GPP_D4/FLASHTRIG
-- SDO double pumped up to 48 Mb/s C33
CSI2_DN5
D33
-- SDI's single pumped up to 24 Mb/s CSI2_DP5
1
EMMC
A31
> Provides cadence for 44.1 kHz based sample rate output. B31 CSI2_DN6 AP2 EMMC_D0 RC134
CSI2_DP6 GPP_F13/EMMC_DATA0 EMMC_D1 EMMC_D0 <27>
> Support 1.5V, 1.8V, and 3.3V modes. A33
CSI2_DN7 GPP_F14/EMMC_DATA1
AP1
EMMC_D1 <27>
VGA@ 10K_0402_5%
B33 AP3 EMMC_D2
3 CSI2_DP7 GPP_F15/EMMC_DATA2 AN3 EMMC_D3 EMMC_D2 <27> 3
2
A29 GPP_F16/EMMC_DATA3 AN1 EMMC_D4 EMMC_D3 <27>
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN2 EMMC_D5 EMMC_D4 <27>
C28 CSI2_DP8 GPP_F18/EMMC_DATA5 AM4 EMMC_D6 EMMC_D5 <27>
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1 EMMC_D7 EMMC_D6 <27>
A27 CSI2_DP9 GPP_F20/EMMC_DATA7 EMMC_D7 <27> GPIO67
B27 CSI2_DN10 AM2 EMMC_RCLK
CSI2_DP10 GPP_F21/EMMC_RCLK EMMC_RCLK <27> DGPU_PRSNT#
C27 AM3 EMMC_CLK
CSI2_DN11 GPP_F22/EMMC_CLK EMMC_CMD EMMC_CLK <27>
D27 AP4
CSI2_DP11 GPP_F12/EMMC_CMD EMMC_CMD <27> DIS,Optimus 0
9 OF 20 AT1 EMMC_RCOMP 2 1
EMMC_RCOMP RC89 200_0402_1%
UMA 1
SKL-U_BGA1356
@ #543016 PDG2.0 P.393
4 4
2016/11/04
Compal Secret Data
2018/11/04 Title
SKL-U(4/12)HDA,EMMC,SDIO,CSI2
Custom 1A
A B C D E
A B C D E
Pre-MP change to 33 ohm 03/28
SOC_XTAL24_IN RC235 1 U22@ 2 33_0402_1% SOC_XTAL24_IN_R

+RTCVCC
U22@
RC91 1 2 20K_0402_5% SOC_SRTCRST# SOC_XTAL24_OUT RC236 1 U22@ 2 33_0402_1% SOC_XTAL24_OUT_R 1 2
RC92 1M_0402_5%
CC10 1 2 1U_0402_6.3V6K
YC1 U22@
1 563377 Intel MOW 33 24MHZ_18PF_XRCGB24M000F2P51R0 1
UC1J SKL_ULT
RC93 1 2 20K_0402_5% SOC_RTCRST# Rev_0.53 3 1
SOC_RTCRST# <30> 3 1
CLOCK SIGNALS
CC11 1 2 1U_0402_6.3V6K NC NC
1 1
27P_0402_50V8J
CC12
27P_0402_50V8J
CC13
D42
JCMOS1 1 @ 2 0_0603_5% C42 CLKOUT_PCIE_N0 U22@ 4 2 U22@
CLR CMOS DIS CLKOUT_PCIE_P0
CLKREQ_PCIE#0 AR10
GPP_B5/SRCCLKREQ0# 2 2
Place at RAM DOOR CLK_PCIE_N1 B42
<23> CLK_PCIE_N1 CLK_PCIE_P1 A42 CLKOUT_PCIE_N1 F43 CLK_CPU_ITP#
SM_INTRUDER#
GLAN <23> CLK_PCIE_P1 CLKREQ_PCIE#1 CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N CLK_CPU_ITP T164 @
RC941 2 1M_0402_5%
<23> CLKREQ_PCIE#1
AT7 E43 T165 @
DVT
GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P
CLK_PCIE_N2 D41 BA17 SUSCLK
<24> CLK_PCIE_N2 CLK_PCIE_P2 CLKOUT_PCIE_N2 GPD8/SUSCLK T185 @
WLAN C41
+3VS <24> CLK_PCIE_P2 CLKREQ_PCIE#2 AT8 CLKOUT_PCIE_P2 E37 SOC_XTAL24_IN
<24> CLKREQ_PCIE#2 GPP_B7/SRCCLKREQ2# XTAL24_IN SOC_XTAL24_OUT
E35
RC121 1 2 10K_0402_5% CLKREQ_PCIE#1 CLK_PCIE_N3 D40 XTAL24_OUT
<24> CLK_PCIE_N3 CLK_PCIE_P3 C40 CLKOUT_PCIE_N3 E42 XCLK_BIASREF Follow 2014MOW48
CLKREQ_PCIE#0
mSATA/SSD <24> CLK_PCIE_P3 CLKREQ_PCIE#3 AT10 CLKOUT_PCIE_P3 XCLK_BIASREF Skylake U PU 2.7k ohm to 1V
R115 1 2 10K_0402_5%
<24> CLKREQ_PCIE#3 GPP_B8/SRCCLKREQ3#
RTCX1
AM18 SOC_RTCX1 Cannonlake U PD 60.4 ohm
B40 AM20 SOC_RTCX2 +1.0VALW_CLK5_F24NS
RPC12 A40 CLKOUT_PCIE_N4 RTCX2
8 1 CLKREQ_PCIE#5 CLKREQ_PCIE#4 AU8 CLKOUT_PCIE_P4 AN18 SOC_SRTCRST# XCLK_BIASREF RC96 1 2 2.7K_0402_1%
7 2 CLKREQ_PCIE#4 GPP_B9/SRCCLKREQ4# SRTCRST# AM16 SOC_RTCRST#
6 3 CLKREQ_PCIE#3 E40 RTCRST#
5 4 CLKREQ_PCIE#2 E38 CLKOUT_PCIE_N5 RC136 1 @ 2 60.4_0402_1%
CLKREQ_PCIE#5 AU7 CLKOUT_PCIE_P5
10K_0804_8P4R_5% GPP_B10/SRCCLKREQ5#
XCLK_BIASREF
10 OF 20
+1.0V_VCCST T:50ohm S:12/15 L:1000 Via:2
2 SKL-U_BGA1356 2
@
From EC(open-drain)
1
RC113
1K_0402_5%
RC116
2014MOW48:
60.4_0402_1% UC1K SKL-U Skylake-U use 24M 50 ohm ESR
2
1 2 EC_VCCST_PG Rev_0.53 Cannonlake U use 38.4M 30 ohm ESR

<30,33> EC_VCCST_PG_R SYSTEM POWER MANAGEMENT
AT11 PM_SLP_S0#
GPP_B12/SLP_S0# AP15 PM_SLP_S3# PM_SLP_S0# <30> SOC_RTCX2
Note for VCCST_PWRGD PLT_RST# AN10 GPD4/SLP_S3# BA16 PM_SLP_S4# PM_SLP_S3# <30,33>
1. 1.0V tolerance <27,30,31> PLT_RST# SYS_RESET# B5 GPP_B13/PLTRST# GPD5/SLP_S4# AY16 PM_SLP_S5# PM_SLP_S4# <30,33>
SYS_RESET# GPD10/SLP_S5# @ T84
2. PDG2.0 P.598 Figure43-5 note17: when failure events, <30> EC_RSMRST#
EC_RSMRST# AY17
RSMRST#
SOC_RTCX1 1 2
AN15 SLP_SUS#
VCCST_PWRGD and PCH_PWROK de-assert at the same t i me H_CPUPWRGD A68 SLP_SUS# AW15 SLP_LAN# @ T90 RC98 10M_0402_5%
T95 @ EC_VCCST_PG PROCPWRGD SLP_LAN# SLP_WLAN# @ T87
B65 BB17
VCCST_PWRGD GPD9/SLP_WLAN# PM_SLP_A# @ T88
AN16
T89 @ SYS_PWROK GPD6/SLP_A# @ T94
B6 YC2
+3VALW_PRIM <30,33> SYS_PWROK PCH_PWROK_R BA20 SYS_PWROK PBTN_OUT#_R
1 2 BA15 1 2
<30,33> PCH_PWROK PCH_DPWROK BB20 PCH_PWROK GPD3/PWRBTN# AC_PRESENT
RC20 10_0402_5% AY15
+3VALW_DSW RPC11 DSW_PWROK GPD1/ACPRESENT PM_BATLOW# AC_PRESENT <30>
AU13 32.768KHZ_9PF_X1A000141000200
8 1 PCH_PWROK SUSPWRDNACK AR13 GPD0/BATLOW#
<30> SUSPWRDNACK
Change PN to SJ10000Q400
7 2 EC_RSMRST# SUSACK# AP11 GPP_A13/SUSWARN#/SUSPWRDNACK
SYS_RESET# GPP_A15/SUSACK# 1 1
6 3 T92 @ AU11 CC15 CC16
LAN_WAKE# GPP_A11/PME# SM_INTRUDER# @ T91
5 4 WAKE# BB15 AP16 6.8P_0402_50V8C 6.8P_0402_50V8C
LAN_WAKE# AM15 WAKE# INTRUDER#
10K_0804_8P4R_5% AW17 GPD2/LAN_WAKE# AM10 EXT_PWR_GATE# 2 2
GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# SOC_VRALERT# @ T93
AT15 AM11
GPD7/RSVD GPP_B2/VRALERT# DVT
11 OF 20
RC110 2 1 10K_0402_5% SYS_PWROK
SKL-U_BGA1356
3 @ 3
2 @ 1 PBTN_OUT#_R +3VALW_DSW
<30> PBTN_OUT#
RC109 0_0402_5% PCH internal PU
PBTN_OUT#_R RC111 1 @ 2 100K_0402_5%
EC_RSMRST# 2 @ 1 PCH_DPWROK
+3VALW_DSW RC114 0_0402_5%
AC_PRESENT RC106
EC1 internal
@
PU
2 10K_0402_5%
RC104 1 2 1K_0402_5% WAKE# SYS_PWROK 2 @ 1 PCH_PWROK
RC122 0_0402_5%
PM_BATLOW# RC103 1 2 10K_0402_5%
WAKE# (DSX wake event)
10 KΩ pull- up t o Vcc DS W3_3.
The pull-up is required even if PCIe* interface
is not used on the plat f or m
. +3VALW_PRIM
PCH PLTRST Buffer SOC_VRALERT# RC115

Default
2 @
: GPI
1 10K_0402_5%
ESD@ PVT Change to 1000P 02/20
2 1 EC_VCCST_PG +3VS
CC131 1000P_0402_50V7K
5
@ESD@
CC51 2 1 .1U_0402_16V7K SYS_RESET# PLT_RST# 2
P
B 4 PLT_RST_BUF#
1 Y PLT_RST_BUF# <23,24>
ESD@ PVT Change to 1000P 02/20
A
1
2 1 H_CPUPWRGD @
CC50 1000P_0402_50V7K UC3 3 RC118
@ESD@ MC74VHC1G08DFT2G_SC70-5 100K_0402_5%
CC66 2 1 .1U_0402_16V7K SYS_PWROK PLT_RST_BUF#
1
2
ESD@ PVT Change to 1000P 02/20 2 1
4 2 1 PCH_PWROK_R @ RC125 0_0402_5% CC130 4
CC65 1000P_0402_50V7K 100P_0402_50V8J
@ESD@ 2 @ESD@
CC69 2 1 .1U_0402_16V7K EC_RSMRST#
PVT Reserved
Reserved for ESD place near UC2.1
#543016 PDG2.0 P.599

2016/11/04
Compal Secret Data
2018/11/04 Title
PROCPWRGD is used only for power sequence Issued Date Deciphered Date
debug and is not required to be connected to THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SKL-U(5/12)CLK,GPIO
anything on the plat f or m. AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1A
A B C D E
A B C D E
+3VALW_1.8VALW_PGPPD
1
PVT identify U22 , U42 CPU 03/02 RC215
10K_0402_5%
U22@
2
CPU_ID
CPU_ID
1
1 1
RC214
U22 1 10K_0402_5%
U42 0 U42@
2
+3VALW_1.8VALW_PGPPD
PROJECT_ID0 RC207 2 @ 1 10K_0402_5%

UC1F SKL-U RC210 1 2 10K_0402_5%
Rev_0.53 C5V01@
LPSS ISH
PROJECT_ID1 RC211 2 @ 1 10K_0402_5%
TS_EN AN8 RC213 1 2 10K_0402_5%
<21,30> TS_EN AP7 GPP_B15/GSPI0_CS# P2 C5V01@
AP8 GPP_B16/GSPI0_CLK GPP_D9 P3 CPU_ID
GSPI0_MOSI AR7 GPP_B17/GSPI0_MISO GPP_D10 P4 PROJECT_ID0
@ T111 GPP_B18/GSPI0_MOSI GPP_D11 PROJECT_ID1
P1
AM5 GPP_D12
AN7 GPP_B19/GSPI1_CS# M4 ISH_I2C0_SDA D7W01@ D7W01@
+3VS AP5 GPP_B20/GSPI1_CLK GPP_D5/ISH_I2C0_SDA N3 ISH_I2C0_SCL RC207 RC213
GSPI1_MOSI AN5 GPP_B21/GSPI1_MISO GPP_D6/ISH_I2C0_SCL ISH sensor HUB
@ T112 10K_0402_5% 10K_0402_5%
1 2 UART_2_CRXD_DTXD GPP_B22/GSPI1_MOSI N1 ISH_I2C1_SDA (Reserve for Verify) SD028100280 SD028100280
RC62 49.9K_0402_1% AB1 GPP_D7/ISH_I2C1_SDA N2 ISH_I2C1_SCL
1 2 UART_2_CTXD_DRXD AB2 GPP_C8/UART0_RXD GPP_D8/ISH_I2C1_SCL Add D7W01 Project ID setting
RC63 49.9K_0402_1% W4 GPP_C9/UART0_TXD AD11 I2C_5_SDA
GPP_C10/UART0_RTS# GPP_F10/I2C5_SDA/ISH_I2C2_SDA T105 @
1 @ 2 UART_2_CRTS_DCTS AB3 AD12 I2C_5_SCL T106 @ no use
RC64 49.9K_0402_1% GPP_C11/UART0_CTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
2 1 @ 2 UART_2_CCTS_DRTS UART_2_CRXD_DTXD AD1 Project_ID1 Project_ID0 2
RC65 49.9K_0402_1%
<24> UART_2_CRXD_DTXD UART_2_CTXD_DRXD AD2 GPP_C20/UART2_RXD U1 RAM_ID0 Project ID
<24> UART_2_CTXD_DRXD UART_2_CRTS_DCTS AD3 GPP_C21/UART2_TXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA U2 RAM_ID1 GPP_D12 GPP_D11
UART_2_CCTS_DRTS AD4 GPP_C22/UART2_RTS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL U3 RAM_ID2
GPP_C23/UART2_CTS# GPP_D15/ISH_UART0_RTS# U4 RAM_ID3 * C5V01 0 0
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
I2C_0_SDA U7 AC1 D7W01 0 1
I2C_0_SCL U6 GPP_C16/I2C0_SDA GPP_C12/UART1_RXD/ISH_UART1_RXD AC2
+3VALW_PGPPC GPP_C17/I2C0_SCL GPP_C13/UART1_TXD/ISH_UART1_TXD AC3 Reserved 1 0
I2C_1_SDA U8 GPP_C14/UART1_RTS#/ISH_UART1_RTS# AB4
<31>
<Touch PAD> <31>
I2C_1_SDA I2C_1_SCL U9 GPP_C18/I2C1_SDA GPP_C15/UART1_CTS#/ISH_UART1_CTS# Reserved 1 1
+3VS I2C_1_SCL GPP_C19/I2C1_SCL AY8
I2C_2_SDA AH9 GPP_A18/ISH_GP0 BA8
1 2 1K_0402_5% I2C_0_SDA no use T135 @ I2C_2_SCL AH10 GPP_F4/I2C2_SDA GPP_A19/ISH_GP1 BB7 G_INT#
RC126 @ T134 @ G_INT# <26>
RC127 1 @ 2 1K_0402_5% I2C_0_SCL GPP_F5/I2C2_SCL GPP_A20/ISH_GP2 BA7
I2C_3_SDA AH11 GPP_A21/ISH_GP3 AY7
1 2 2.2K_0402_5% I2C_1_SDA no use T131 @ I2C_3_SCL AH12 GPP_F6/I2C3_SDA GPP_A22/ISH_GP4 AW7
RC128 T130 @
RC129 1 2 2.2K_0402_5% I2C_1_SCL GPP_F7/I2C3_SCL GPP_A23/ISH_GP5 AP13
I2C_4_SDA AF11 GPP_A12/BM_BUSY#/ISH_GP6
no use T128 @ I2C_4_SCL AF12 GPP_F8/I2C4_SDA
T129 @ GPP_F9/I2C4_SCL +3VALW_1.8VALW_PGPPD
6 OF 20
RPC19
SKL-U_BGA1356 ISH_I2C1_SCL 1 8
@ ISH_I2C1_SDA 2 7
ISH_I2C0_SCL 3 6
ISH_I2C0_SDA 4 5
@
1K_0804_8P4R_5%
Functional Strap Definitions Memory Down Strap

3 GSPI0_MOSI /GPP_B18 (Internal Pull Down): DVT +3VALW_1.8VALW_PGPPD 3
(Rising edge of PCH_PWROK)

No Reboot
1
1
* 0 = Disable No Reboot mode. --> AAX05 Use RC151 RC150 RC153 RC224
+3VS
1 = Enable No Reboot Mode. (PCH will disable the TCO 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% +1.8VS_3VS_PGPPA +1.8VS
Timer system reboot feature). This function is useful X76@ X76@ X76@ X76@
2
2
RAM_ID0 RC177
when running ITP/XDP. RAM_ID1 0_0402_5%2 ESPI@ 1
RAM_ID2
RAM_ID3 RC178
GSPI1_MOSI / GPP_B22 (Internal Pull Down): 0_0402_5%2 @ 1
1
1
(Rising edge of PCH_PWROK) RC155 RC225 RC226 RC227
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
Boot BIOS Strap Bit X76@ X76@ X76@ X76@
* 0 = SPI Mode --> AAX05 Use

2
2
1 = LPC Mode
RAM_ID3 RAM_ID2 *RAM_ID1 *RAM_ID0 PartNumber - Description

ZZZ Hynix4GB
X76M01@ X76731BOL01 Hynix 4Gb SA0000A1H20 (S IC D4 512M16 H5AN8G6NAFR-UHC FBGA ABO!)
0 0 0 0
ZZZ Samsung4GB Micron 4Gb SA00009V220 (S IC D4 512M16 MT40A512M16JY-083E:B ABO!)
X76M02@ X76731BOL02 0 0 0 1
4 4
Samsung 4Gb 0 0 1 0 SA00009U420 (S IC D4 512M16 K4A8G165WB-BCRC FBGA 96P ABO !)
ZZZ Micron4GB
X76M03@ X76731BOL03 No on 1 1 1 1
board memory
2016/11/04
Compal Secret Data
2018/11/04 Title
SKL-U(6/12)GPIO
Custom 1A
A B C D E
A B C D E
UC1H SKL-U
Rev_0.53
SSIC / USB3
PCIE/USB3/SATA
H8
USB3_1_RXN USB3_CRX_DTX_N1 <29>
G8
USB3_1_RXP USB3_CRX_DTX_P1 <29>
H13 C13 USB3 MB
G13 PCIE1_RXN/USB3_5_RXN USB3_1_TXN D13 USB3_CTX_DRX_N1 <29>
1 B17 PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB3_CTX_DRX_P1 <29> 1
A17 PCIE1_TXN/USB3_5_TXN J6
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN USB3_CRX_DTX_N2 <28>
H6
USB3_2_RXP/SSIC_1_RXP USB3_CRX_DTX_P2 <28>
G11 B13
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN A13 USB3_CTX_DRX_N2 <28>
D16 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP USB3_CTX_DRX_P2 <28>
C16 PCIE2_TXN/USB3_6_TXN J10
USB TypeC
PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN USB3_CRX_DTX_N3 <28>
H10
USB3_3_RXP/SSIC_2_RXP USB3_CRX_DTX_P3 <28>
H16 B15
G16 PCIE3_RXN USB3_3_TXN/SSIC_2_TXN A15 USB3_CTX_DRX_N3 <28>
D17 PCIE3_RXP USB3_3_TXP/SSIC_2_TXP USB3_CTX_DRX_P3 <28>
C17 PCIE3_TXN E10
PCIE3_TXP USB3_4_RXN F10
G15 USB3_4_RXP C15
F15 PCIE4_RXN USB3_4_TXN D15
B19 PCIE4_RXP USB3_4_TXP
A19 PCIE4_TXN AB9 USB20_N1
PCIE4_TXP USB2N_1 AB10 USB20_P1 USB20_N1 <29>
PCIE_CRX_DTX_N5 F16 USB2P_1 USB20_P1 <29> USB3 MB
<23> PCIE_CRX_DTX_N5 PCIE_CRX_DTX_P5 E16 PCIE5_RXN AD6 USB20_N2
<23> PCIE_CRX_DTX_P5 PCIE_CTX_DRX_N5 PCIE5_RXP USB2N_2 USB20_P2 USB20_N2 <28>
GLAN CC25 2 1 .1U_0402_16V7K C19 AD7 USB TypeC
<23> PCIE_CTX_C_DRX_N5 PCIE_CTX_DRX_P5 PCIE5_TXN USB2P_2 USB20_P2 <28>
CC26 2 1 .1U_0402_16V7K D19
<23> PCIE_CTX_C_DRX_P5 PCIE5_TXP AH3 USB20_N3
PCIE_CRX_DTX_N6 G18 USB2N_3 AJ3 USB20_P3 USB20_N3 <29>
<24> PCIE_CRX_DTX_N6 PCIE_CRX_DTX_P6 F18 PCIE6_RXN USB2P_3 USB20_P3 <29>
<24> PCIE_CRX_DTX_P6 1 2 .1U_0402_16V7K PCIE_CTX_DRX_N6 D20 PCIE6_RXP AD9 USB20_N4 TO D/B USB2
NGFF WLAN+BT(Key E) CC60
<24> PCIE_CTX_C_DRX_N6 1 2 .1U_0402_16V7K PCIE_CTX_DRX_P6 C20 PCIE6_TXN USB2N_4 AD10 USB20_P4 USB20_N4 <29>
CC62
<24> PCIE_CTX_C_DRX_P6 PCIE6_TXP USB2P_4 USB20_P4 <29>
F20 AJ1 USB20_N5
<26> SATA_CRX_DTX_N0 E20 PCIE7_RXN/SATA0_RXN USB2N_5 AJ2 USB20_P5 USB20_N5 <24>
<26> SATA_CRX_DTX_P0 B21 PCIE7_RXP/SATA0_RXP USB2P_5 USB20_P5 <24> BT
HDD <26> SATA_CTX_DRX_N0 PCIE7_TXN/SATA0_TXN
USB2
USB20_N6
A21 AF6
2 <26> SATA_CTX_DRX_P0 PCIE7_TXP/SATA0_TXP USB2N_6 AF7 USB20_P6 USB20_N6 <21> 2
G21 USB2P_6 USB20_P6 <21> TS
<26> SATA_CRX_DTX_N1 F21 PCIE8_RXN/SATA1A_RXN AH1 USB20_N7
<26> SATA_CRX_DTX_P1 D21 PCIE8_RXP/SATA1A_RXP USB2N_7 AH2 USB20_P7 USB20_N7 <21>
ODD <26> SATA_CTX_DRX_N1 PCIE8_TXN/SATA1A_TXN USB2P_7 USB20_P7 <21> Camera
C21
<26> SATA_CTX_DRX_P1 PCIE8_TXP/SATA1A_TXP AF8 USB20_N8
E22 USB2N_8 AF9 USB20_P8 USB20_N8 <31>
<24> PCIE_CRX_DTX_N9 E23 PCIE9_RXN USB2P_8 USB20_P8 <31> FP
<24> PCIE_CRX_DTX_P9 B23 PCIE9_RXP AG1 USB20_N9
<24> PCIE_CTX_DRX_N9 PCIE9_TXN USB2N_9 USB20_P9 T266 @
A23 AG2 T267 @
PVT Remove USB2.0 PORT9 02/22
<24> PCIE_CTX_DRX_P9 PCIE9_TXP USB2P_9
F25 AH7
<24> PCIE_CRX_DTX_N10 E25 PCIE10_RXN USB2N_10 AH8
<24> PCIE_CRX_DTX_P10 D23 PCIE10_RXP USB2P_10 2015MOW10, USB2_ID Connected to GND Directly
<24> PCIE_CTX_DRX_N10 C23 PCIE10_TXN AB6 USB2_COMP RC119 1 2 113_0402_1%
<24> PCIE_CTX_DRX_P10 PCIE10_TXP USB2_COMP AG3 USB2_ID RC130 1 2 0_0402_5%
RC1201 2 100_0402_1% PCIE_RCOMPN F5 USB2_ID AG4 USB2_VBUSSENSE RC131 1 2 0_0402_5%
PCIE_RCOMPP E5 PCIE_RCOMPN USB2_VBUSSENSE
NGFF SSD(Key M) #543016 PDG2.0 P.285 PCIE_RCOMPP USB_OC0#
A9
PCIE_RCOMPN/PCIE_RCOMPP +3VALW_PRIM
@ T196
XDP_PRDY# D56 GPP_E9/USB2_OC0# C9
USB_OC0# <29>
BO=4 W=12 S=12 R=100ohm XDP_PREQ# D61 PROC_PRDY# GPP_E10/USB2_OC1# D9
RC135 2 @
@ T197
1 10K_0402_5% PIRQA# BB11 PROC_PREQ# GPP_E11/USB2_OC2# B9
Unused OC pin need set to GPI.
GPP_A7/PIRQA# GPP_E12/USB2_OC3# +3VALW_PRIM
E28 J1
<24> PCIE_CRX_DTX_N11 E27 PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 J2
<24> PCIE_CRX_DTX_P11 D24 PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1 J3 SSD_DEVSLP2 USB_OC0# RC132 1 2 10K_0402_5%
<24> PCIE_CTX_DRX_N11 PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 SSD_DEVSLP2 <24>
C24
<24> PCIE_CTX_DRX_P11 E30 PCIE11_TXP/SATA1B_TXP H2
<24> PCIE_CRX_DTX_N12 F30 PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 H3
<24> PCIE_CRX_DTX_P12 A25 PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1 G4 SATA_GP2
<24> PCIE_CTX_DRX_N12 B25 PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2 SATA_GP2 <24>
<24> PCIE_CTX_DRX_P12 PCIE12_TXP/SATA2_TXP H1 1 2
3 GPP_E8/SATALED# +3VS 3
8 OF 20 RH16
SKL-U_BGA1356 10K_0402_5%
@ M.2 SSD PCIE/SATA select pin
SSD_DET# (SATA_GP2)
SATA Device 0
PCIE Device 1
GPIO DEVICE CONTROL
USB_OC0# USB2 Port 1 DEVSLP[2:0] Implementation
DEVSLP is a host-controlled hardware signal which enables a SATA host and device to
USB_OC1# NA enter an ultra-low interface power state, including the possibility to completely power
down host and device PHYs.
USB_OC2# NA The processor provides three SATA DEVSLP signals, DEVSLP[2:0] for SKL U.
USB_OC3# NA
‧When hi gh, DEVSLP reWuests t he SATA devi ce t o ent er i nt o t he DEVSLP po wer st at e.
‧When l o w
, DEVSLP reWuests t he SATA devi ce t o eWit f r o mt he DEVSLP po wer st at e
DEVSLP0 NA and transition to active state.
DEVSLP1 NA
DEVSLP2 NA SATA General Purpose (SATAGP[2:0]) Signals

‧The pr ocess or provi des t hree SATA general pur pose i nput si gnal s, SATAGP[ 2: 0] f or S KL U.
SATA_GP0 NA These signals can be configured as interlock switch inputs corresponding to a given SATA port.
NA ‧When used as an i nt erl oc k s wit c h st at us i ndi cati on, t hi s si gnal s houl d be dri ven t o 0
4
SATA_GP1 to indicate that the switch is closed and to a 1 to indicate that the switch is open. 4
SATA_GP2 NA
‧If mec hani cal presence s wit c hes will not be used on t he pl atf or m , SATAGP[ 2: 0]
signals can be configured as GPP_E[2:0] GPIOs signals.
2016/11/04
Compal Secret Data
2018/11/04 Title
SKL-U(7/12)PCIE,USB,SATA
Custom 1A
A B C D E
A B C D E
+1.0VALW_PRIM TO +1.0V_VCCSTU / +1.0VCCST

+5VALW +1.0VALW_PRIM +1.0V_VCCSTU +1.2V_VDDQ +1.2V_VDDQ_CPU +VCCIO
UC1N SKL-U
Rev_0.53
CPU POWER 3 OF 4
JPC1
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 2 AU23 AK28
VDDQ_AU23 VCCIO
CC98
CC97
1 @ AU28 AK30
VDDQ_AU28
JUMP_43X118 AU35
VDDQ_AU35
2.73A VCCIO
VCCIO
AL30
CC96 AU42 AL42
2 2 0.1U_0201_10V6K JPC2 BB23 VDDQ_AU42 VCCIO AM28
VDDQ_BB23
6.35A VCCIO
2 1 2 BB32 AM30
@ BB41 VDDQ_BB32 VCCIO AM42
1 UC5 JUMP_43X118 BB47 VDDQ_BB41 VCCIO 1
CC105 2 1 .1U_0402_16V7K 1 14 BB51 VDDQ_BB47 AK23
VIN1 VOUT1 VDDQ_BB51 VCCSA +VCC_SA
2 13 AK25
VIN1 VOUT1 VCCSA G23
RC142 1 2 20K_0402_5% EN_1.0V_VCCSTU 3 12 1 2 AM40 VCCSA G25
ON1 CT1 +1.2V_VDDQC VDDQC
0.09A VCCSA
<30,33,38> SYSON CC95 G27
4 11 1000P_0402_50V7K A18 VCCSA G28
DVT VBIAS GND +1.0V_VCCST VCCST
0.04A VCCSA
6A J22
RC168 1 2 49.9K_0402_1% EN_1.8VS 5 10 1 2 A22 VCCSA J23
ON2 CT2 +1.0VS_VCCSTG VCCSTG_A22
0.04A VCCSA
<30,33,36,38,40> SUSP# CC94 J27
2 1 CC104 6 9 1000P_0402_50V7K AL23 VCCSA K23
VIN2 VOUT2 +1.2V_VCCSFR_OC VCCPLL_OC
0.26A VCCSA
.1U_0402_16V7K +1.8VALW_VS 7 8 K25
VIN2 VOUT2 +1.8VS K20 VCCSA K27
+1.0V_VCCSFR VCCPLL_K20
0.12A VCCSA
15 K21 K28
1 2 GPAD VCCPLL_K21 VCCSA K30
+1.8VALW_PRIM 1 2 VCCSA
EM5209VF_DFN14_2X3
VCCIO_SENSE
1U_0402_6.3V6K
JPC8 1 1 AM23 T124 @
VCCIO_SENSE VSSIO_SENSE
CC99
JUMP_43X39 AM22 T125 @
@ CC100 VSSIO_SENSE
0.1U_0201_10V6K H21 VSSSA_SENSE
2
+1.8VALW_PRIM TO +1.8VS 2 VSSSA_SENSE
14 OF 20VCCSA_SENSE
H20 VCCSA_SENSE VSSSA_SENSE <41>
VCCSA_SENSE <41>
SKL-U_BGA1356
@
+1.0VALW_PRIM TO +1.0VS_VCCSTG
+1.0VALW_PRIM
2 +1.0VALW_PRIM_JP 2
VCCSTG,VCCIO SLEW RATE <=10ms +1.2V_VDDQ_CPU +1.2V_VDDQC
JPC4
1 2 PSC Side
1 2 +1.0VS_VCCSTG #543016 PDG2.0 P.750
+1.35V_VDDQC : 1x 10uF
1U_0402_6.3V6K
Imax : 3.44 AJUMP_43X79 1 RC208 1 @ 2 0_0402_5% CC47 1 2 10U_0603_6.3V6M

CC117
@ RC188 1 @ 2 0_0402_5%
For Power consumption UC6
Measurement 1
2 2 VIN1 +VCCIO +1.0V_VCCSTU +1.0V_VCCST
+5VALW VIN2 @ JPC5 PSC Side
CC107 7 6 +1.0VS_VCCSTG_IO 1 2 #543016 PDG2.0 P.750
VIN thermal VOUT 1 2
0.1U_0201_10V6K
2 1 3 JUMP_43X79 Imax : 3.4 A
RC140 1 @ 2 0_0402_5% CC48 1 2 1U_0402_6.3V6K +1.0V_VCCST : 1x 1uF
VBIAS 1
@
SUSP# 1 @ 2 SUSP#_R1 4 5 CC127 +1.0V_VCCSFR PSC Side
RC186 ON GND 0.1U_0201_10V6K
2 #543016 PDG2.0 P.750
1U_0402_6.3V6K
0_0402_5% 1
+1.0V_VCCSFR : 1x 1uF Reference GND as possible.
CC106
AOZ1334DI-02_DFN8-7_3X3 RC143 1 @ 2 0_0402_5% CC55 1 2 1U_0402_6.3V6K
@
2
DVT +1.2V_VDDQ_CPU +1.2V_VCCSFR_OC BSC Side
UC6 Change to SA000070V00 #543016 PDG2.0 P.750
RC141 1 @ 2 0_0402_5% CC49 1 2 1U_0402_6.3V6K +1.35V_VCCSFR_OC : 1x 1uF
BSC Side
+1.0VS_VCCSTG CC56 1 2 1U_0402_6.3V6K #543016 PDG2.0 P.750

@ +1.0V_VCCSTG : 1x 1uF (Placeholder)
3 3
+VCCIO +1.2V_VDDQ_CPU
BSC Side PSC Side PSC Side BSC Side
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
DVT
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC58
CC59
CC37
CC41
CC54
CC27
CC28
CC33
CC34
CC35
CC36
CC38
CC39
CC40
CC42
CC43
CC44
CC45
CC46
@ @ @ @ @ @ @
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
4 #543016 PDG2.0 P.750 #543016 PDG2.0 P.750 4
+VCCIO : 4x 1uF 0402 +1.35V_VDDQ_CPU :

4x 10uF 0402
3x 22uF 0603
2016/11/04
Compal Secret Data
2018/11/04 Title
SKL-U(8/12)Power
Custom 1A
A B C D E
A B C D E
+3VALW_PRIM
+1.0VALW_PRIM UC1O SKL-U +3VALW_1.8VALW_PGPPA +1.8VALW_PRIM

CC91 Rev_0.53
CPU POWER 4 OF 4
2 1 1U_0402_6.3V6K
+1.0VALW_MPHYAON @ AB19 0_0402_5% 2 ESPI@ 1 RC196
+1.0VALW_PRIM AB20 VCCPRIM_1P0 AK15 0_0402_5% 2 @ 1 RC197
Near AB19 (<10 mm) VCCPRIM_1P0
0.89A VCCPGPPA +3VALW_1.8VALW_PGPPA SPI Touch
P18 AG15
VCCPRIM_1P0 VCCPGPPB +3VALW_PGPPB
RC175 1 @ 2 0_0402_5% 1 2 CC87 Y16
+1.0VALW_PRIM VCCPGPPC +3VALW_PGPPC
1U_0402_6.3V6K AF18 Y15
VCCPRIM_CORE VCCPGPPD +3VALW_1.8VALW_PGPPD +3VALW_PRIM
2 1 CC76 AF19 2.57A T16 +3VALW_PGPPB
CC87 near K17 (<3 mm) @ 1U_0402_6.3V6K V20 VCCPRIM_CORE VCCPGPPE AF16
+3VALW_PGPPE
VCCPRIM_CORE VCCPGPPF +1.8VALW_PRIM
V21 AD15
1 +1.0VALW_PRIM +1.0VALW_APLL near AF18 (<10 mm) VCCPRIM_CORE VCCPGPPG +3VALW_PGPPG No use CC102 2 1 0_0402_5% 2 @ 1 RC161 1
CC85 2 1 DCPDSW_1P0 AL1 V19 1U_0402_6.3V6K @
DCPDSW_1P0 VCCPRIM_3P3_V19 +3VALW_PRIM
1U_0402_6.3V6K CC102 near AG15 (<3 mm)
RC148 1 @ 2 0_0603_5% 1 2 CC123 K17 T1
+1.0VALW_MPHYAON VCCMPHYAON_1P0 VCCPRIM_1P0_T1 +1.0VALW_DTS +3VALW_PRIM
10U_0603_6.3V6M L1 +3VALW_PGPPC
VCCMPHYAON_1P0 AA1
VCCATS_1P8 +1.8VALW_PRIM
DVT N15
+1.0VALW_MPHYGT VCCMPHYGT_1P0_N15
N16 AK17 CC73 2 1 0_0402_5% 2 @ 1 RC163
+3VALW VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3 +3VALW_RTC
+3VALW_DSW N17 HSIO 1U_0402_6.3V6K @
P15 VCCMPHYGT_1P0_N17 AK19
VCCMPHYGT_1P0_P15
2.1A VCCRTC_AK19 +RTCVCC CC73 near Y16 (<10 mm)
P16 BB14
RC173 1 @ 2 0_0402_5% VCCMPHYGT_1P0_P16 VCCRTC_BB14 +3VALW_1.8VALW_PGPPD +3VALW_PRIM
K15 BB10 CC71 1 2 0.1U_0201_10V6K +1.8VALW_PRIM
+1.0VALW_AMPHYPLL VCCAMPHYPLL_1P0 HSIO DCPRTC
L15
VCCAMPHYPLL_1P0 A14 0_0402_5% 1 @ 2 RC206
+3VALW_PRIM +3VALW_HDA VCCCLK1 +1.0VALW_CLK6_24TBT
V15 CC103 2 1 0_0402_5% 2 @ 1 RC172
+1.0VALW_APLL VCCAPLL_1P0 K19 1U_0402_6.3V6K
VCCCLK2 +1.0VALW_VCCCLK2
RC198 1 @ 2 0_0402_5% 1 2 CC63 AB17
+1.0VALW_PRIM VCCPRIM_1P0_AB17 +3VALW_PRIM
@ 1U_0402_6.3V6K Y18 L21 +3VALW_PGPPE
VCCPRIM_1P0_Y18 VCCCLK3 +1.0VALW_APLL
CC63 near AJ19 (<10 mm) AD17 N20
+3VALW_DSW VCCDSW_3P3_AD17 VCCCLK4 +1.0VALW_CLK4_F100OC
+3VALW_SPI AD18 CC74 2 1 0_0402_5% 2 @ 1 RC167
AJ17 VCCDSW_3P3_AD18 L19 1U_0402_6.3V6K @
VCCDSW_3P3_AJ17 VCCCLK5 +1.0VALW_CLK5_F24NS
RC154 1 @ 2 0_0402_5%
AJ19 A10
CC74 near T16 (<10 mm)
+3VALW_HDA VCCHDA VCCCLK6 +1.0VALW_CLK6_24TBT
+3VALW_PRIM
AJ16 AN11 PRIMCORE_VID0 +3VALW_PGPPG
+3VALW_SPI VCCSPI GPP_B0/CORE_VID0 PRIMCORE_VID1 T136 @
AN13 T138 @
AF20 GPP_B1/CORE_VID1 CC83 2 1 0_0402_5% 2 @ 1 RC187
+3VALW +3VALW_PRIM +1.0VALW_SRAM VCCSRAM_1P0
AF21 HSIO 1U_0402_6.3V6K @
JPC7 T19 VCCSRAM_1P0
1 2 T20 VCCSRAM_1P0
2 1 2 VCCSRAM_1P0 CC67 2 1 2
+3VALW_PRIM
JUMP_43X39 AJ21 1U_0402_6.3V6K @
+3VALW_PRIM VCCPRIM_3P3_AJ21
@ CC67 near V19 (<3 mm)
AK20
+1.0VALW_PRIM VCCPRIM_1P0_AK20
N18 +1.0VALW_DTS +1.0VALW_PRIM
+1.0VALW_APLLEBB VCCAPLLEBB HSIO 15 OF 20
0_0402_5% 2 @ 1 RC162
SKL-U_BGA1356
@
#543016 PDG2.0 P.764 CC72 2 1
+1.8VALW_PRIM
1U_0402_6.3V6K
HSIO +1.0VALW_MPHYPLL CC72 near AA1 (<10 mm)
+1.0VALW_PRIM +1.0VALW_MPHYGT
Imax : 3.5 A +3VALW_RTC +3VALW_PRIM
JPC9
1 2 RC209 1 @ 2 0_0603_5% CC82 1 2 22U_0603_6.3V6M CC78 2 1 0_0402_5% 2 @ 1 RC171
1 2 @ 0.1U_0201_10V6K
JUMP_43X79 CC77 2 1
@ CC80 1 2 1U_0402_6.3V6K #543016 PDG2.0 P.758 1U_0402_6.3V6K
+1.0VALW_PRIM +3VALW_PRIM +1.8VALW_PRIM CC77,CC78 near AK17 (<3 mm)
CC80 near N15 (<3mm)
CC82 near N15 (<10mm) +1.0VALW_CLK6_24TBT +1.0VALW_PRIM
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
+1.0VALW_AMPHYPLL 1 1 1 1 1 1 CC86 2 1 0_0402_5% 2 @ 1 RC169
CC111
CC112
CC113
CC114
CC116
CC115
1U_0402_6.3V6K @
CC61 near K15 (<3 mm) @ @ @ @ @ @
CC86 near A10 (<3 mm)
RC149 1 @ 2 0_0603_5% CC61 1 2 1U_0402_6.3V6K 2 2 2 2 2 2
@ +1.0VALW_VCCCLK2 +1.0VALW_PRIM
+1.0VALW_SRAM
3 CC75 2 1 0_0603_5% 2 @ 1 RC164 3
CC122 near AF20 (<10mm) 1U_0402_6.3V6K @
RC176 1 @ 2 0_0603_5% CC1221 2 1U_0402_6.3V6K CC124 2 1
@ 22U_0603_6.3V6M @
+1.0VALW_APLLEBB
+1.0VALW_CLK4_F100OC +1.0VALW_PRIM
CC68 near N18 (<3mm)
RC156 1 @ 2 0_0402_5% CC68 1 2 1U_0402_6.3V6K CC125 2 1 0_0603_5% 2 @ 1 RC190
22U_0603_6.3V6M @
+1.0VALW_CLK5_F24NS +1.0VALW_PRIM
0_0603_5% 2 @ 1 RC152
#543016 PDG2.0 P.470

VCCRTC does not exceed 3.2 V. RTC Battery +RTCBATT
JRTC1
1
Power Rail Voltage 2 1
+RTCBATT 2
RH163 3
+CHGRTC 3.383V(MAX) 1K_0402_5% DC1 +RTCVCC 4 GND
1 2 3 GND
BAT54C(VF) 240 mV 1
ACES_50271-0020N-001
CONN@
1
2
+RTCVCC 3.143V +CHGRTC
CC84
SP02000RO00
0.1U_0201_10V6K
4 CHN202UPT_SC70-3 2 4
Result : Pass
2016/11/04
Compal Secret Data
2018/11/04 Title
SKL-U(9/12)Power
Custom 1A
A B C D E
A B C D E
#544924 SKL EDS1.2 P.136

VCCGT U(15W)-dual core GT2 31A(MAX)
0.55-1.5V
+VCC_GT +VCC_GT
UC1M SKL-U
#544924 SKL EDS1.2 P.134 Rev_0.53
VCC U(15W)-dual core GT2 29A(MAX) +VCC_GT_VCORE CPU POWER 2 OF 4
0.55-1.52V VCCGT
N70
+VCC_CORE +VCC_CORE A48 N71
A53 VCCGT VCCGT R63
1 SKL-U
+VCC_GT_VCORE A58 VCCGT VCCGT R64 1
UC1L
Rev_0.53 U22 --> +VCC_GT A62 VCCGT VCCGT R65
CPU POWER 1 OF 4 VCCGT VCCGT
U42 --> +VCC_CORE A66 R66
A30 G32 AA63 VCCGT VCCGT R67
A34 VCC_A30 VCC_G32 G33 AA64 VCCGT VCCGT R68
AK33 VCC_A44 VCC_G37 G38 AA69 VCCGT VCCGT R71
AK35 VCC_AK33 VCC_G38 G40 AA70 VCCGT VCCGT T62
AK37 VCC_AK35 VCC_G40 G42 AA71 VCCGT VCCGT U65
AK38 VCC_AK37 VCC_G42 J30 AC64 VCCGT VCCGT U68
AK40 VCC_AK38 VCC_J30 J33 AC65 VCCGT VCCGT U71
AL33 VCC_AK40 VCC_J33 J37 AC66 VCCGT VCCGT W63
AL37 VCC_AL33 VCC_J37 J40 AC67 VCCGT VCCGT W64
AL40 VCC_AL37 VCC_J40 K33 AC68 VCCGT VCCGT W65
AM32 VCC_AL40 VCC_K33 K35 AC69 VCCGT VCCGT W66
AM33 VCC_AM32 VCC_K35 K37 AC70 VCCGT VCCGT W67
AM35 VCC_AM33 VCC_K37 K38 AC71 VCCGT VCCGT W68
AM37 VCC_AM35 VCC_K38 K40 J43 VCCGT VCCGT W69
AM38 VCC_AM37 VCC_K40 K42 J45 VCCGT VCCGT W70
G30 VCC_AM38 VCC_K42 K43 J46 VCCGT VCCGT W71
VCC_G30 VCC_K43 J48 VCCGT VCCGT Y62
K32 E32
Trace Length < 25 mils J50 VCCGT VCCGT +VCC_GTX_VCORE
RSVD_K32 VCC_SENSE E33 VCCSENSE <41> J52 VCCGT
AK32 VSS_SENSE VSSSENSE <41> J53 VCCGT AK42
#544924 SKL EDS1.2 P.141 RSVD_AK32 SOC_SVID_ALERT# VCCGT VCCGTX_AK42 +VCC_GTX_VCORE
VCCOPC 1.0V 3.2A B63 J55 AK43
AB62 VIDALERT# A63 SOC_SVID_CLK +VCC_GT J56 VCCGT VCCGTX_AK43 AK45 U22 --> NC
VCC_OPC_1P8 1.8V 50mA VCCOPC_AB62 VIDSCK SOC_SVID_CLK <41> VCCGT VCCGTX_AK45
VCCEOPIO 0.8V,1.0V 2A P62 D64 SOC_SVID_DAT J58 AK46 U42 --> +VCC_CORE
V62 VCCOPC_P62 VIDSOUT J60 VCCGT VCCGTX_AK46 AK48
VCCOPC_V62 G20 +1.0VS_VCCSTG RC229 K48 VCCGT VCCGTX_AK48 AK50
H63 VCCSTG_G20 0_0402_5% K50 VCCGT VCCGTX_AK50 AK52
VCC_OPC_1P8_H63 +VCC_GT_K52 VCCGT VCCGTX_AK52 @ T248
For CPU2+3e SKU 1 @ 2 K52 AK53
2 G61 K53 VCCGT VCCGTX_AK53 AK55 2
VCC_OPC_1P8_G61 K55 VCCGT VCCGTX_AK55 AK56
VCCOPC_SENSE AC63
+1.0VS(SUSP#) 569110 U42/U22 common K56 VCCGT VCCGTX_AK56 AK58
T132 @ VSSOPC_SENSE AE63 VCCOPC_SENSE baord K52/AK52 NC K58 VCCGT VCCGTX_AK58 AK60
T133 @ VSSOPC_SENSE VCCGT VCCGTX_AK60
K60 AK70
AE62 L62 VCCGT VCCGTX_AK70 AL43
AG62 VCCEOPIO L63 VCCGT VCCGTX_AL43 AL46
For CPU2+3e SKU
VCCEOPIO L64 VCCGT VCCGTX_AL46 AL50
VCCEOPIO_SENSE AL63 L65 VCCGT VCCGTX_AL50 AL53
T137 @ VSSEOPIO_SENSE AJ62 VCCEOPIO_SENSE VCCGT VCCGTX_AL53
L66 AL56
T139 @ VSSEOPIO_SENSE VCCGT VCCGTX_AL56
12 OF 20 L67 AL60
L68 VCCGT VCCGTX_AL60 AM48
SKL-U_BGA1356 L69 VCCGT VCCGTX_AM48 AM50
@ L70 VCCGT VCCGTX_AM50 AM52
L71 VCCGT VCCGTX_AM52 AM53
M62 VCCGT VCCGTX_AM53 AM56
N63 VCCGT VCCGTX_AM56 AM58
N64 VCCGT VCCGTX_AM58 AU58
N66 VCCGT VCCGTX_AU58 AU63
N67 VCCGT VCCGTX_AU63 BB57
N69 VCCGT VCCGTX_BB57 BB66
VCCGT VCCGTX_BB66
VCCGT_SENSE J70 AK62 VCCGTX_SENSE
<41> VCCGT_SENSE VSSGT_SENSE VCCGT_SENSE VCCGTX_SENSE T155 @
J69 AL61 VSSGTX_SENSE T219 @
<41> VSSGT_SENSE VSSGT_SENSE VSSGTX_SENSE
+1.0V_VCCST 13 OF 20
#543016 PDG2.0 P.273 Trace Length < 25 mils SKL-U_BGA1356
@
1
RC179 RC181
56_0402_5% 100_0402_1%
3 3
Place the PU
resistors close to CPU
2
RC180
220_0402_5%
SOC_SVID_ALERT# 1 2
SOC_SVID_ALERT#_R <41>
SOC_SVID_DAT To VR
SOC_SVID_DAT <41>
4 4
2016/11/04
Compal Secret Data
2018/11/04 Title
SKL-U(10/12)Power,SVID
Custom 1A
A B C D E
A B C D E
1 1
UC1P SKL-U UC1Q SKL-U
Rev_0.53 Rev_0.53 UC1R SKL-U
GND 1 OF 3 GND 2 OF 3
GND 3 OF 3 Rev_0.53
A5 AL65 AT63 BA49 F8 L18
A67 VSS VSS AL66 AT68 VSS VSS BA53 G10 VSS VSS L2
A70 VSS VSS AM13 AT71 VSS VSS BA57 G22 VSS VSS L20
AA2 VSS VSS AM21 AU10 VSS VSS BA6 G43 VSS VSS L4
AA4 VSS VSS AM25 AU15 VSS VSS BA62 G45 VSS VSS L8
AA65 VSS VSS AM27 AU20 VSS VSS BA66 G48 VSS VSS N10
AA68 VSS VSS AM43 AU32 VSS VSS BA71 G5 VSS VSS N13
AB15 VSS VSS AM45 AU38 VSS VSS BB18 G52 VSS VSS N19
AB16 VSS VSS AM46 AV1 VSS VSS BB26 G55 VSS VSS N21
AD13 VSS VSS AM68 AV71 VSS VSS BB43 G63 VSS VSS P17
AD16 VSS VSS AM71 AW10 VSS VSS BB55 G66 VSS VSS P19
AD19 VSS VSS AM8 AW12 VSS VSS BB6 H15 VSS VSS P20
AD20 VSS VSS AN20 AW14 VSS VSS BB60 H18 VSS VSS P21
AD21 VSS VSS AN23 AW16 VSS VSS BB64 H71 VSS VSS R13
AD62 VSS VSS AN28 AW18 VSS VSS BB67 J11 VSS VSS R6
AD8 VSS VSS AN30 AW21 VSS VSS BB70 J13 VSS VSS T15
AE64 VSS VSS AN32 AW23 VSS VSS C1 J25 VSS VSS T17
AE67 VSS VSS AN37 AW30 VSS VSS D10 J35 VSS VSS T21
AE68 VSS VSS AN38 AW32 VSS VSS D11 J38 VSS VSS T4
2 AE69 VSS VSS AN40 AW34 VSS VSS D14 J42 VSS VSS U10 2
AF1 VSS VSS AN42 AW36 VSS VSS D18 J8 VSS VSS U63
AF10 VSS VSS AN58 AW38 VSS VSS D22 K16 VSS VSS U64
AF15 VSS VSS AN63 AW41 VSS VSS D25 K18 VSS VSS U66
AF17 VSS VSS AP10 AW43 VSS VSS D26 K22 VSS VSS U67
AF63 VSS VSS AP23 AW49 VSS VSS D39 K64 VSS VSS V16
AG16 VSS VSS AP28 AW51 VSS VSS D44 K65 VSS VSS V17
AG17 VSS VSS AP32 AW53 VSS VSS D45 K66 VSS VSS V18
AG18 VSS VSS AP35 AW55 VSS VSS D47 K67 VSS VSS W13
AG21 VSS VSS AP58 AW60 VSS VSS D58 K71 VSS VSS Y17
AG71 VSS VSS AP63 AW62 VSS VSS D6 L11 VSS VSS Y19
AH13 VSS VSS AP68 AW64 VSS VSS D62 L16 VSS VSS Y20
AH6 VSS VSS AP70 AW66 VSS VSS D66 L17 VSS VSS Y21
AH63 VSS VSS AR11 AW8 VSS VSS D69 VSS VSS
AH64 VSS VSS AR15 AY66 VSS VSS E11
AH67 VSS VSS AR16 B10 VSS VSS E15 18 OF 20
AJ15 VSS VSS AR20 B14 VSS VSS E18
AJ18 VSS VSS AR23 B18 VSS VSS E21 SKL-U_BGA1356
AJ20 VSS VSS AR28 B22 VSS VSS E46 @
AJ4 VSS VSS AR35 B30 VSS VSS E50
AK11 VSS VSS AR42 B34 VSS VSS E53
3 AK27 VSS VSS AR5 B58 VSS VSS F1 3
AK63 VSS VSS AR50 B62 VSS VSS F13
AK8 VSS VSS AR55 BA1 VSS VSS F23
AL2 VSS VSS AR58 BA10 VSS VSS F27
AL35 VSS VSS AT2 BA2 VSS VSS F33
AL52 VSS VSS AT4 F68 VSS VSS F40
AL58 VSS VSS AT56 VSS VSS BA41
AL64 VSS VSS AT58 VSS
VSS VSS
16 OF 20 17 OF 20
SKL-U_BGA1356 SKL-U_BGA1356
@ @
4 4
2016/11/04
Compal Secret Data
2018/11/04 Title
SKL-U(11/12)GND
A B C D E
A B C D E
1 1
UC1S SKL-U
Rev_0.53
RESERVED SIGNALS-1
@ T167 CFG0 E68 BB68 T156 @

CFG1 B67 CFG[0] RSVD_TP_BB68 BB69
@ T168 CFG[1] RSVD_TP_BB69 T157 @
@ T169 CFG2 D65
CFG3 D67 CFG[2] AK13
@ T170 CFG[3] RSVD_TP_AK13 T158 @
@ T171 CFG4 E70 AK12 T159 @
CFG5 C68 CFG[4] RSVD_TP_AK12
@ T172 CFG[5]
@ T173 CFG6 D68 BB2
CFG7 C67 CFG[6] RSVD_BB2 BA3
@ T174 CFG[7] RSVD_BA3
@ T175 CFG8 F71
CFG9 G69 CFG[8]
@ T176 CFG[9]
@ T177 CFG10 F70 AU5 T162 @
CFG11 G68 CFG[10] TP5 AT5
@ T178 CFG[11] TP6 T163 @
CFG12 H70 +1.8VALW_PRIM
@ T179 CFG[12]
@ T180 CFG13 G71
CFG14 H69 CFG[13] D5
@ T181 CFG[14] RSVD_D5
@ T182 CFG15 G70 D4 UC1T SKL-U
CFG[15] RSVD_D4
2
B2
RSVD_B2 Rev_0.53
@ T183 CFG16 E63 C2 @ RC57 SPARE
CFG17 F63 CFG[16] RSVD_C2
@ T184 CFG[17] 0_0402_5%
B3 AW69 F6
CFG18 E66 RSVD_B3 A3 AW68 RSVD_AW69 RSVD_F6 E3 SOC_XTAL24_IN_U42
@ T186
1
CFG19 F66 CFG[18] RSVD_A3 AU56 RSVD_AW68 RSVD_E3 C11
@ T188 CFG[19] RSVD_AU56 RSVD_C11
AW1 AW48 B11
CFG_RCOMP E60 RSVD_AW1 SOC_XTAL24_OUT_U42 C7 RSVD_AW48 RSVD_B11 A11
CFG_RCOMP E1 U12 RSVD_C7 RSVD_A11 D12
XDP_ITP_PMODE E8 RSVD_E1 E2 U11 RSVD_U12 RSVD_D12 C12
2
@ T189 ITP_PMODE RSVD_E2 RSVD_U11 RSVD_C12 2
H11 F52
AY2 BA4 RSVD_H11 RSVD_F52
AY1 RSVD_AY2 RSVD_BA4 BB4 20 OF 20
RSVD_AY1 RSVD_BB4 1
D1 A4 CC79 SKL-U_BGA1356
D3 RSVD_D1 RSVD_A4 C4 @
RSVD_D3 RSVD_C4 1U_0402_6.3V6K
2
@
K46 BB5 T199 @
K45 RSVD_K46 TP4
RSVD_K45 A69
CC79 near U11,U12 (<10 mm)
AL25 RSVD_A69 B69
AL27 RSVD_AL25 RSVD_B69
RSVD_AL27 AY3 RC182 1 @ 2 0_0402_5%
14MOW52, Connect U11, U12 to 1.8V for
C71 RSVD_AY3 Cannonlake-U PCH compat i bili t y
B70 RSVD_C71 D71 PVT 02/22
RSVD_B70 RSVD_D71 C70
F60 RSVD_C70
RSVD_F60 C54
A52 RSVD_C54 D54
RSVD_A52 RSVD_D54
BA70 AY4
For 2+3e Solut i on
T213 @ RSVD_TP_BA70 TP1 T214 @
BA68 BB3 T216 @
T215 @ RSVD_TP_BA68 TP2 PM_ZVM#
J71 AY71 RC183 1 @ 2 0_0402_5% PVT 02/22 Zero Voltage Mode: Control Signal to OPC
2 1 CFG_RCOMP J68 RSVD_J71 VSS_AY71 AR56 PM_ZVM#
49.9_0402_1% RC185 RSVD_J68 ZVM# T225 @ VR, when low OPC VR output is 0V.
RC237 1 @ 2 F65 AW71 T221 @
2 1 CFG4 0_0201_5% G65 VSS_F65 RSVD_TP_AW71 AW70 PM_MSM#
VSS_G65 RSVD_TP_AW70 T223 @
1K_0402_1% RC193 Minimum Speed Mode: Control signal to
F61 AP56 PM_MSM# +1.0V_VCCST
PVT 02/22 E61 RSVD_F61 MSM# C64
T230 @ VccEOPIO VR (connected only in 2 VR
RSVD_E61 PROC_SELECT# solut i on f or OPC).
3 19 OF 20 SKL_CNL# 1 @ 2 3
RC184 100K_0402_5%
SKL-U_BGA1356
@ #544669 CRB1.1 P.54
#544924 SKL EDS1.2 P.125
PROC_SELECT#
Display Port Presence Strap This pin is for compat i bili t y wit h f ut ur e
plat f or ms. It s houl d be unc onnect ed f or
1 : Disabled; No Physical Display Port the processor.
CFG4 at t ac hed t o E mbedded Dis pl ay Port Pre-MP change to 33 ohm 03/28
568813_KBL_U42 Rev0.5
0 : Enabled; An external Display Port device is SOC_XTAL24_IN_U42 RC233 1 U42@ 2 33_0402_1% SOC_XTAL24_IN_U42_R
connected to the Embedded Display Port
SOC_XTAL24_OUT_U42 RC234 1 U42@ 2 33_0402_1% SOC_XTAL24_OUT_U42_R 1 U42@ 2
RC228 1M_0402_5%
YC3 U42@
563377 Intel MOW 33 24MHZ_18PF_XRCGB24M000F2P51R0
3 1
3 1
NC NC
4 2
27P_0402_50V8J
27P_0402_50V8J
1 1
CC128 CC129
U42@ U42@
4 2 2 4
Pre-MP change to 27pF 03/28
2016/11/04
Compal Secret Data
2018/11/04 Title
SKL-U(12/12)RSVD
Custom 1A
A B C D E
5 4 3 2 1
+DDR_VREF_CA +DDR_VREF_CA
+DDR_VREF_CA +DDR_VREF_CA
SWAP for Daisy-Chain
U2 U3 SWAP for Daisy-Chain
U4 U5
M1 G2 DDR_A_D5 M1 G2 DDR_A_D25
VREFCA DQL0 DDR_A_D6 VREFCA DQL0 DDR_A_D29 DDR_A_D40 DDR_A_D56
0.047U_0402_25V7K
0.047U_0402_25V7K
F7 F7 M1 G2 M1 G2
DQL1 DDR_A_D1 DQL1 DDR_A_D27 VREFCA DQL0 DDR_A_D43 VREFCA DQL0 DDR_A_D58
0.047U_0402_25V7K
0.047U_0402_25V7K
H3 H3 F7 F7
DDR_A_MA0 P3 DQL2 H7 DDR_A_D2 DDR_A_MA0 P3 DQL2 H7 DDR_A_D26 DQL1 H3 DDR_A_D44 DQL1 H3 DDR_A_D57
A0 DQL3 A0 DQL3 DQL2 DQL2
1
DDR_A_MA1 P7 H2 DDR_A_D4 DDR_A_MA1 P7 H2 DDR_A_D24 DDR_A_MA0 P3 H7 DDR_A_D42 DDR_A_MA0 P3 H7 DDR_A_D59
CD124
CD125
A1 DQL4 A1 DQL4 A0 DQL3 A0 DQL3
1
DDR_A_MA2 R3 H8 DDR_A_D7 DDR_A_MA2 R3 H8 DDR_A_D31 DDR_A_MA1 P7 H2 DDR_A_D41 DDR_A_MA1 P7 H2 DDR_A_D61
CD126
CD127
DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D0 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D28 DDR_A_MA2 R3 A1 DQL4 H8 DDR_A_D46 DDR_A_MA2 R3 A1 DQL4 H8 DDR_A_D62
2
DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D3 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D30 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D45 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D60
2
DDR_A_MA5 P8 A4 DQL7 DDR_A_MA5 P8 A4 DQL7 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D47 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D63
DDR_A_MA6 P2 A5 DDR_A_MA6 P2 A5 DDR_A_MA5 P8 A4 DQL7 DDR_A_MA5 P8 A4 DQL7
DDR_A_MA7 R8 A6 A3 DDR_A_D13 DDR_A_MA7 R8 A6 A3 DDR_A_D16 DDR_A_MA6 P2 A5 DDR_A_MA6 P2 A5
DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D14 DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D18 DDR_A_MA7 R8 A6 A3 DDR_A_D37 DDR_A_MA7 R8 A6 A3 DDR_A_D52
D DDR_A_MA9 A8 DQU1 DDR_A_D9 DDR_A_MA9 A8 DQU1 DDR_A_D17 DDR_A_MA8 A7 DQU0 DDR_A_D39 DDR_A_MA8 A7 DQU0 DDR_A_D55 D
R7 C3 R7 C3 R2 B8 R2 B8
DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D15 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D23 DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_D32 DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_D53
DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D8 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D20 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D35 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D54
DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D10 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D22 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D34 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D49
DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D12 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D21 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D33 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D50
DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D11 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D19 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D36 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D48
A14/WE DQU7 A14/WE DQU7 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D38 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D51
DDR_A_BA0 N2 DDR_A_BA0 N2 A14/WE DQU7 A14/WE DQU7
<8> DDR_A_BA0 DDR_A_BA1 BA0 DDR_A_BA1 BA0 DDR_A_BA0 DDR_A_BA0
<8> DDR_A_BA1 N8 B3 +1.2V_VDDQ N8 B3 +1.2V_VDDQ N2 N2 +1.2V_VDDQ
BA1 VDD B9 BA1 VDD B9 DDR_A_BA1 N8 BA0 B3 DDR_A_BA1 N8 BA0 B3
VDD VDD BA1 VDD +1.2V_VDDQ BA1 VDD
+1.2V_VDDQ E2 D1 +1.2V_VDDQ E2 D1 B9 B9
E7 DMU/DBIU VDD G7 E7 DMU/DBIU VDD G7 E2 VDD D1 E2 VDD D1
DML/DBIL VDD DML/DBIL VDD +1.2V_VDDQ DMU/DBIU VDD +1.2V_VDDQ DMU/DBIU VDD
J1 J1 E7 G7 E7 G7
VDD J9 VDD J9 DML/DBIL VDD J1 DML/DBIL VDD J1
VDD L1 VDD L1 VDD J9 VDD J9
DDR_A_CLK0 K7 VDD L9 DDR_A_CLK0 K7 VDD L9 VDD L1 VDD L1
<8> DDR_A_CLK0 DDR_A_CLK#0 CK_t VDD DDR_A_CLK#0 CK_t VDD DDR_A_CLK0 VDD DDR_A_CLK0 VDD
<8> DDR_A_CLK#0 K8 R1 K8 R1 K7 L9 K7 L9
DDR_A_CKE0 K2 CK_c VDD T9 DDR_A_CKE0 K2 CK_c VDD T9 DDR_A_CLK#0 K8 CK_t VDD R1 DDR_A_CLK#0 K8 CK_t VDD R1
<8> DDR_A_CKE0 CKE VDD CKE VDD DDR_A_CKE0 CK_c VDD DDR_A_CKE0 CK_c VDD
K2 T9 K2 T9
CKE VDD CKE VDD
A1 A1
VDDQ A9 VDDQ A9 A1 A1
VDDQ C1 VDDQ C1 VDDQ A9 VDDQ A9
VDDQ D9 VDDQ D9 VDDQ C1 VDDQ C1
VDDQ F2 VDDQ F2 VDDQ D9 VDDQ D9
VDDQ F8 VDDQ F8 VDDQ F2 VDDQ F2
DDR_A_ODT0 K3 VDDQ G1 DDR_A_ODT0 K3 VDDQ G1 VDDQ F8 VDDQ F8
<8> DDR_A_ODT0 DDR_A_CS#0 ODT VDDQ DDR_A_CS#0 ODT VDDQ DDR_A_ODT0 VDDQ DDR_A_ODT0 VDDQ
<8> DDR_A_CS#0 L7 G9 L7 G9 K3 G1 K3 G1
DDR_A_MA16 L8 CS VDDQ J2 DDR_A_MA16 L8 CS VDDQ J2 DDR_A_CS#0 L7 ODT VDDQ G9 DDR_A_CS#0 L7 ODT VDDQ G9
DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA16 L8 CS VDDQ J2 DDR_A_MA16 L8 CS VDDQ J2
CAS VDDQ CAS VDDQ DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA15 M8 RAS VDDQ J8
B2 RD206 B2 RD207 CAS VDDQ CAS VDDQ
VSS 10mils VSS 10mils
E1 240_0402_1% E1 240_0402_1% B2 10mils RD208 B2 10mils
VSS E9 VSS_E9_U2 1 DDP@ 2 VSS E9 VSS_E9_U3 1 DDP@ 2 VSS E1 240_0402_1% VSS E1
VSS G8 VSS G8 VSS E9 VSS_E9_U4 1 DDP@ 2 VSS E9 VSS_E9_U5
DDR_A_DQS#1 A7 VSS K1 RD79 DDR_A_DQS#2 A7 VSS K1 VSS G8 VSS G8
DDR_A_DQS1 DQSU_c VSS 10mils DDR_A_DQS2 DQSU_c VSS 10mils DDR_A_DQS#4 VSS DDR_A_DQS#6 VSS
B7 K9 0_0402_5% B7 K9 A7 K1 10mils A7 K1
DDR_A_DQS#0 F3 DQSU_t VSS M9 DDR_A_BG1_R 1 SDP@ 2 DDR_A_DQS#3 F3 DQSU_t VSS M9 DDR_A_BG1_R DDR_A_DQS4 B7 DQSU_c VSS K9 DDR_A_DQS6 B7 DQSU_c VSS K9
DQSL_c VSS DQSL_c VSS DQSU_t VSS DQSU_t VSS
1
DDR_A_DQS0 DDR_A_DQS3 DDR_A_DQS#5 DDR_A_BG1_R DDR_A_DQS#7
240_0402_1%
RD209
G3 N1 G3 N1 F3 M9 F3 M9
DQSL_t VSS DQSL_t VSS DDR_A_DQS5 DQSL_c VSS DDR_A_DQS7 DQSL_c VSS
DDP@
T1 RD78 T1 G3 N1 G3 N1
DDR_A_BG1_R
MEMRST# P1 VSS 0_0201_1% MEMRST# P1 VSS DQSL_t VSS T1 DQSL_t VSS T1
RESET 1 DDP@ 2 DDR_A_BG1 RESET MEMRST# P1 VSS MEMRST# P1 VSS
1 2 RD210 F9 1 2 RD211 F9 RESET RESET
2
240_0402_1% ZQ 240_0402_1% ZQ 1 2 RD212 F9 1 2 RD213 F9
DDR_A_BG1(RD78, Intel:549352) ZQ ZQ
C 1. Near SOC side 240_0402_1% 240_0402_1% C
DDR_A_ACT# L3 A2 DDR_A_ACT# L3 A2
<8> DDR_A_ACT# DDR_A_BG0 ACT VSSQ 2. BO1+BO2+M small then other DDR_A_BG0 ACT VSSQ DDR_A_ACT# DDR_A_ACT# 10mils
<8> DDR_A_BG0 M2 A8 CMD 25mils M2 A8 L3 A2 L3 A2
N9 BG0 VSSQ C9 N9 BG0 VSSQ C9 DDR_A_BG0 M2 ACT VSSQ A8 DDR_A_BG0 M2 ACT VSSQ A8
DDR_A_ALERT# TEN VSSQ 3. BO1+BO2 small then 800mils DDR_A_ALERT# TEN VSSQ BG0 VSSQ BG0 VSSQ
<8> DDR_A_ALERT# P9 D2 P9 D2 N9 C9 N9 C9
DDR_A_PAR T3 ALERT VSSQ D8 DDR_A_PAR T3 ALERT VSSQ D8 DDR_A_ALERT# P9 TEN VSSQ D2 DDR_A_ALERT# P9 TEN VSSQ D2
<8> DDR_A_PAR PAR VSSQ PAR VSSQ DDR_A_PAR ALERT VSSQ DDR_A_PAR ALERT VSSQ
E3 E3 T3 D8 T3 D8
T7 VSSQ E8 T7 VSSQ E8 PAR VSSQ E3 PAR VSSQ E3
B1 NC VSSQ F1 B1 NC VSSQ F1 T7 VSSQ E8 T7 VSSQ E8
+2.5V VPP VSSQ +2.5V VPP VSSQ NC VSSQ NC VSSQ
R9 H1 R9 H1 +2.5V B1 F1 +2.5V B1 F1
VPP VSSQ H9 VPP VSSQ H9 R9 VPP VSSQ H1 R9 VPP VSSQ H1
<8> DDR_A_MA[0..16] VSSQ VSSQ VPP VSSQ VPP VSSQ
96-BALL 96-BALL H9 H9
SDRAM DDR4 SDRAM DDR4 96-BALL VSSQ 96-BALL VSSQ
<8> DDR_A_DQS#[0..7]
K4A8G165WB-BCPB_FBGA96 K4A8G165WB-BCPB_FBGA96 SDRAM DDR4 SDRAM DDR4
X76@ X76@ K4A8G165WB-BCPB_FBGA96 K4A8G165WB-BCPB_FBGA96
<8> DDR_A_DQS[0..7]
X76@ X76@
<8> DDR_A_D[0..63]
<8> DDR_A_BG1
TERMINATION
+0.6VS_VTT
DDR4 mapping SDP DDP +1.2V_VDDQ +0.6VS_VTT RP17
DDR_A_MA14 1 8
E9 VSS UZQ +0.6V_A_VREFCA DDR_A_CLK0 RD214 1 2 36_0402_1% DDR_A_CS#0 2 7
DDR_A_CLK#0 RD215 1 2 36_0402_1% DDR_A_MA15 3 6
M9 VSS BG1
2
DDR_A_MA12 4 5
T7 NC VSS RD195
1.8K_0402_1% +0.6VS_VTT 36_0804_8P4R_5%
RD11 +DDR_VREF_CA
RCOMP[0] 2.7_0402_1% RP18
(SOC side) 200_1% 121_1%
1
2 1 DDR_A_BG1_R RD86 1 DDP@ 2 36_0402_1% DDR_A_MA13 1 8
DDR_A_MA8 2 7
DDR_A_PAR 3 6
+1.2V_VDDQ DDR_A_MA11 4 5
4 as near each on board RAM device as possible Follow MA51 1
+1.2V_VDDQ SDP@ SDP@
RD206 RD208 CD24 36_0804_8P4R_5%
DDR_A_ALERT#
CD230
CD231
CD232
CD233
CD234
CD235
CD236
CD211
CD210
CD212
CD213
CD214
CD215
CD216
CD217
CD218
CD229
CD225
CD226
CD227
CD228
0_0402_5% 0_0402_5% 0.022U_0402_16V7K RD41 2 1 49.9_0402_1%

SD028000080 SD028000080 2 RP19
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 DDR_A_MA1
B
INTEL suggest 50ohm 1% 1 8 B
2
+ CD237 SDP@ SDP@ DDR_A_MA5 2 7
DDR_A_MA7
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
330U_D2_2V_Y RD207 RD209 RD13 RD200 3 6

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 @ 0_0402_5% 0_0402_5% DDR_A_MA9 4 5
2 SGA00009S00 SD028000080 SD028000080
24.9_0402_1% 1.8K_0402_1%
330U 2V H1.9 36_0804_8P4R_5%
1
9mohm POLY
RP20
DDR_A_BG0 1 8
DDR_A_MA10 2 7
DDR_A_MA3 3 6
DDR_A_BA1 4 5
36_0804_8P4R_5%
RP21
DDR_A_CKE0 1 8
DDR_DRAMRST# 1 2 MEMRST# DDR_A_MA16 2 7
<8,20> DDR_DRAMRST# DDR_A_ODT0
RD202 0_0402_5% 3 6
DDR_A_ACT# 4 5
DVT
1
36_0804_8P4R_5%
+2.5V @ CD219
.1U_0402_16V7K
2
CD238
CD239
CD240
CD241
CD242
CD243
CD244
CD245
CD220
CD221
CD222
DDR_A_MA2 1 2 RD216
1 1 1 1 1 1 1 1 1 1 1
36_0402_1%
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2 2 2 2 2 2 2 2 2 2 2
RP24
DDR_A_MA4 1 8
DDR_A_BA0 2 7
DDR_A_MA0 3 6
DDR_A_MA6 4 5
36_0804_8P4R_5%
2 as near each on board RAM device as possible
+0.6VS_VTT
A A
Page12
CD246
CD247
CD248
CD249
CD250
CD251
CD252
CD253
CD224
CD223
1 1 1 1 1 1 1 1 1 1 RAM_ID3 RAM_ID2 *RAM_ID1 *RAM_ID0 PartNumber - Description

Hynix 4Gb 0 0 0 0 SA0000A1H20 (S IC D4 512M16 H5AN8G6NAFR-UHC FBGA ABO!)
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
2 2 2 2 2 2 2 2 2 2
Micron 4Gb 0 0 0 1 SA00009V220 (S IC D4 512M16 MT40A512M16JY-083E:B ABO!)
Samsung 4Gb 0 0 1 0 SA00009U420 (S IC D4 512M16 K4A8G165WB-BCRC FBGA 96P ABO !)
No on 1 1 1 1
board memory

2 as near each on board RAM device as possible Issued Date 2016/11/04 Deciphered Date 2018/11/04 Title
DDR4 ON BOARD CHIPS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
5 4 3 2 1
A B C D E
<8> DDR_B_DQS#[0..7]
JDIMM2A
<8> DDR_B_D[0..63]
DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CLK1
137
139 CK0(T)
CK0#(C)
STD
DQ0
DQ1
8
7
DDR_B_D10
DDR_B_D14
DDR_B_D9
Standard Type
138 20
<8> DDR_B_DQS[0..7] DDR_B_CLK#1 140 CK1(T) DQ2 21 DDR_B_D12
CK1#(C) DQ3 4 DDR_B_D11 2-3A to 1 DIMMs/channel
DDR_B_CKE0 109 DQ4 3 DDR_B_D15
<8> DDR_B_MA[0..16] DDR_B_CKE1 110 CKE0 DQ5 16 DDR_B_D13
DDR_B_BA0 +3VS CKE1 DQ6 17 DDR_B_D8
<8> DDR_B_BA0 DDR_B_BA1 DDR_B_CS#0 149 DQ7 13 DDR_B_DQS1
<8> DDR_B_BA1 DDR_B_BG0 DDR_B_CS#1 157 S0# DQS0(T) 11 DDR_B_DQS#1
<8> DDR_B_BG0 DDR_B_BG1 162 S1# DQS0#(C) +1.2V_VDDQ +1.2V_VDDQ
<8> DDR_B_BG1 S2#/C0
1
1 DDR_B_ACT# 165 28 DDR_B_D1 JDIMM2B 1
<8> DDR_B_ACT# DDR_B_ALERT# S3#/C1 DQ8 DDR_B_D0
0_0402_5%
RD52
29 STD
<8> DDR_B_ALERT# DDR_B_PAR DDR_B_ODT0 155 DQ9 41 DDR_B_D7 111 141
<8> DDR_B_PAR DDR_B_ODT1 161 ODT0 DQ10 42 DDR_B_D2 112 VDD1 VDD11 142
@ ODT1 DQ11 24 DDR_B_D5 117 VDD2 VDD12 147
2
DDR_B_BG0 115 DQ12 25 DDR_B_D4 118 VDD3 VDD13 148
DDR_B_CLK0 DDR_B_BG1 113 BG0 DQ13 38 DDR_B_D3 +1.2V_VDDQ 123 VDD4 VDD14 153
<8> DDR_B_CLK0 DDR_B_CLK#0 DDR_B_SA2 DDR_B_BA0 150 BG1 DQ14 37 DDR_B_D6 124 VDD5 VDD15 154
<8> DDR_B_CLK#0 DDR_B_CLK1 DDR_B_SA1 DDR_B_BA1 145 BA0 DQ15 34 DDR_B_DQS0 +0.6V_B_VREFCA 129 VDD6 VDD16 159
<8> DDR_B_CLK1 BA1 DQS1(T) VDD7 VDD17
1
DDR_B_CLK#1 DDR_B_SA0 32 DDR_B_DQS#0 130 160
<8> DDR_B_CLK#1 DDR_B_MA0 144 DQS1#(C) RD46 135 VDD8 VDD18 163
A0 VDD9 VDD19
1
DDR_B_MA1 DDR_B_D17
0_0402_5%
RD54
0_0402_5%
RD56
133 50 1K_0402_1% 136
DDR_B_CKE0 DDR_B_MA2 132 A1 DQ16 49 DDR_B_D21 +0.6V_DDRB_VREFCA VDD10
<8> DDR_B_CKE0 DDR_B_CKE1 DDR_B_MA3 131 A2 DQ17 62 DDR_B_D19 255 258
RD49 +3VS +0.6VS_VTT
2
<8> DDR_B_CKE1 DDR_B_CS#0 DDR_B_MA4 128 A3 DQ18 63 DDR_B_D23 VDDSPD VTT
@ @ 2_0402_1% 10mils
<8> DDR_B_CS#0 DDR_B_CS#1 DDR_B_MA5 126 A4 DQ19 46 DDR_B_D16 2 1 164 257
+2.5V
2
<8> DDR_B_CS#1 DDR_B_MA6 127 A5 DQ20 45 DDR_B_D20 VREFCA VPP1 259
DDR_B_MA7 A6 DQ21 DDR_B_D18 1 VPP2
122 58
SOC_SMBDATA_1 DDR_B_MA8 125 A7 DQ22 59 DDR_B_D22 CD66 1 99
<9,26> SOC_SMBDATA_1 A8 DQ23 1 VSS VSS
1
SOC_SMBCLK_1 DDR_B_MA9 121 55 DDR_B_DQS2 0.022U_0402_16V7K 2 102
<9,26> SOC_SMBCLK_1 DDR_B_MA10 146 A9 DQS2(T) 53 DDR_B_DQS#2 2 5 VSS VSS 103
RD47 CD65
DDR_B_MA11 120 A10_AP DQS2#(C) 1K_0402_1% 0.1U_0201_10V6K 6 VSS VSS 106
A11 VSS VSS
1
DDR_B_ODT0 DDR_B_MA12 119 70 DDR_B_D25 2 9 107
<8> DDR_B_ODT0 DDR_B_ODT1 DDR_B_MA13 158 A12 DQ24 71 DDR_B_D28 10 VSS VSS 167
RD50
2
<8> DDR_B_ODT1 DDR_B_MA14 151 A13 DQ25 83 DDR_B_D31 14 VSS VSS 168
A14_WE# DQ26 24.9_0402_1% VSS VSS
DDR_B_MA15 156 84 DDR_B_D27 15 171
DDR_B_MA16 152 A15_CAS# DQ27 66 DDR_B_D24 18 VSS VSS 172
2
A16_RAS# DQ28 67 DDR_B_D29 19 VSS VSS 175
DDR_B_ACT# 114 DQ29 79 DDR_B_D30 22 VSS VSS 176
ACT# DQ30 80 DDR_B_D26 23 VSS VSS 180
DDR_B_PAR 143 DQ31 76 DDR_B_DQS3 26 VSS VSS 181
DDR_B_ALERT# 116 PARITY DQS3(T) 74 DDR_B_DQS#3 27 VSS VSS 184
Layout Note:
2
Place near JDIMM2 +1.2V_VDDQ RD63 2 1 240_0402_1% DDR_B_EVENT# 134
DDR_DRAMRST# 108
ALERT#
EVENT#
DQS3#(C)
DDR_B_D37
Place near to SO-DIMM connector. 30 VSS
VSS
VSS
VSS
185 2
174 31 188
<8,19> DDR_DRAMRST# RESET# DQ32 173 DDR_B_D32 35 VSS VSS 189
RD1 1 2 470_0402_5% DQ33 187 DDR_B_D39 36 VSS VSS 192
+1.2V_VDDQ SOC_SMBDATA_1 254 DQ34 DDR_B_D35 VSS VSS
186 39 193
CD30 2 1 .1U_0402_16V7K SOC_SMBCLK_1 253 SDA DQ35 170 DDR_B_D36 40 VSS VSS 196
@ESD@ SCL DQ36 169 DDR_B_D33 43 VSS VSS 197
+1.2V_VDDQ DDR_B_SA2 166 DQ37 183 DDR_B_D38 44 VSS VSS 201
DDR_B_SA1 260 SA2 DQ38 182 DDR_B_D34 47 VSS VSS 202
DDR_B_SA0 256 SA1 DQ39 179 DDR_B_DQS4 48 VSS VSS 205
SA0 DQS4(T) DDR_B_DQS#4 VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
177 51 206
DQS4#(C) 52 VSS VSS 209
1 1 1 1 1 1 1 1 DDR_B_D41 VSS VSS
92 195 56 210
CB0_NC DQ40 DDR_B_D45 VSS VSS
CD32
CD33
CD34
CD35
CD36
CD37
CD69
CD70
91 194 57 213
101 CB1_NC DQ41 207 DDR_B_D46 60 VSS VSS 214
2 2 2 2 2 2 2 2 105 CB2_NC DQ42 208 DDR_B_D42 61 VSS VSS 217
RD61 2 1 240_0402_1% DDR_B_DQS8 97 CB7_NC DQ47 200 DDR_B_DQS5 72 VSS VSS 227
+1.2V_VDDQ DDR_B_DQS#8 DQS8(T) DQS5(T) DDR_B_DQS#5 VSS VSS
RD62 2 1 240_0402_1% 95 198 73 230
DQS8#(C) DQS5#(C) 77 VSS VSS 231
+1.2V_VDDQ 216 DDR_B_D53 78 VSS VSS 234
12 DQ48 215 DDR_B_D49 81 VSS VSS 235
+1.2V_VDDQ DM0#/DBI0# DQ49 DDR_B_D54 VSS VSS
33 228 82 238
54 DM1#/DBI1# DQ50 229 DDR_B_D51 85 VSS VSS 239
DM3#/DBI3# DQ52 DDR_B_D52 VSS VSS
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
178 212 89 244

1 1 1 1 1 1 1 1 DM5#/DBI5# DQ54 DDR_B_D50 VSS VSS
CD38
CD39
CD40
CD41
CD42
CD43
CD44
CD45
220 225 93 248

241 DM6#/DBI6# DQ55 221 DDR_B_DQS6 94 VSS VSS 251
3 96 DM7#/DBI7# DQS6(T) 219 DDR_B_DQS#6 98 VSS VSS 252 3
2 2 2 2 2 2 2 2 DM8#/DBI8# DQS6#(C) VSS VSS
262 261
GND GND
237 DDR_B_D61
DQ56 236 DDR_B_D57 FOX_AS0A821-H4SB-7H
DQ57 249 DDR_B_D58 CONN@
DQ58 250 DDR_B_D63
DQ59 DDR_B_D60
SP07001GA00
232
DQ60 233 DDR_B_D56
DQ61 245 DDR_B_D59
DQ62 246 DDR_B_D62
DQ63 242 DDR_B_DQS7
DQS7(T) 240 DDR_B_DQS#7
DQS7#(C)
Layout Note:
Place near JDIMM1.258
FOX_AS0A821-H4SB-7H
CONN@
SP07001GA00
Layout Note: Layout Note: +0.6VS_VTT

Place near JDIMM1.257,259 Place near JDIMM2.255
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1
CD64
CD62
CD63
+2.5V +3VS
2 2 2
4 4
10U_0603_6.3V6M
1U_0402_6.3V6K
2.2U_0402_6.3V6M
1 1
1
CD68
CD67
CD55
2
2 2
2016/11/04
Compal Secret Data
2018/11/04 Title
DDR4_DIMMB
Custom 1A
A B C D E
A B C D E
LX1.1 change to +19VB_CPU for layout routing request
LCD POWER CIRCUIT

+3VS +LCDVDD +19VB_CPU +INVPW R_B+ Place closed to JEDP1
UX1
W=60mils +LCDVDD
1U_0402_6.3V6K
CX1
5 1
1
IN OUT W=60mils LX1 W=60mils +3VS
2 1 1 HCB2012KF-221T30_0805
GND 1 2
1 1
4 3 CX4 3S@ 1 1
2 EN OC
1000P_0402_50V7K
CX5
0.1U_0201_10V6K SM01000EJ00 3000ma 1 1
SY6288C20AAC_SOT23-5 CX3 2 2 @ CX2 CX6 CX7
220ohm@100mhz
4.7U_0402_6.3V6M DCR 0.04 68P_0402_50V8J 0.1U_0201_10V6K .1U_0402_16V7K
2 2
@EMI@
@EMI@ @
<7> SOC_ENVDD 2 2
1
RX9
100K_0402_5%
@
2
Note: Unmount LX1 when panel boost

circuit was use. (2S battery cell)
<7> EDP_TXP0
CX8 1 2 .1U_0402_16V7K EDP_TXP0_C
EDP_TXN0_C
LED PANEL Conn.
CX9 1 2 .1U_0402_16V7K
<7> EDP_TXN0 EDP_TXP1_C
CX10 1 2 .1U_0402_16V7K W=60mils JEDP1
<7> EDP_TXP1 EDP_TXN1_C
CX11 1 2 .1U_0402_16V7K +INVPW R_B+ 1
<7> EDP_TXN1 EDP_TXP2_C 1
CX17 1 2 .1U_0402_16V7K 2
<7> EDP_TXP2 EDP_TXN2_C SOC_BKL_PW M 2
CX16 1 2 .1U_0402_16V7K RX1 1 @ 2 100K_0402_5% 3
<7> EDP_TXN2 EDP_TXP3_C <7> SOC_BKL_PW M 3
CX19 1 2 .1U_0402_16V7K 4
<7> EDP_TXP3 EDP_TXN3_C 4
CX18 1 2 .1U_0402_16V7K @EMI@ 5
<7> EDP_TXN3 SOC_BKL_PW M 5
CX12 1 2 220P_0402_50V7K 6
CX14 1 2 .1U_0402_16V7K EDP_AUXP_C @EMI@ BKOFF# 7 6
<7> EDP_AUXP EDP_AUXN_C EDP_HPD 7
<7> EDP_AUXN CX15 1 2 .1U_0402_16V7K BKOFF# CX13 1 2 220P_0402_50V7K 8
<30> BKOFF# 8
2
+LCDVDD 9 2
RX2 1 @ 2 10K_0402_5% 10 9
+3VS 11 10
W=60mils 12 11
100K_0402_5% 1 @ 2 RX3 EDP_AUXN_C 13 12
100K_0402_5% 1 @ 2 RX4 EDP_AUXP_C EDP_AUXN_C 14 13
RX5 EDP_AUXP_C 15 14
0_0402_5% 16 15
1 @ 2 EDP_HPD EDP_TXP0_C 17 16
<7> CPU_EDP_HPD EDP_TXN0_C 17
18
RX6 19 18
100K_0402_5% EDP_TXP1_C 20 19
2 1 EDP_TXN1_C 21 20
22 21
EDP_TXP2_C 23 22
Touch Screen EDP_TXN2_C 24 23
24
25
+5VS +3VS +TS_PW R EDP_TXP3_C 26 25
EDP_TXN3_C 27 26
RX7 1 @ 2 0_0603_5% 28 27
RX8 1 @ 2 0_0603_5% USB20_P6 29 28
<13> USB20_P6 USB20_N6 29
30
<13> USB20_N6 30
31
32 31
Touch Screen +TS_PW R 32
33
TS_EN 34 33
<12,30> TS_EN 34
+3VS 35
USB20_N7_CAMERA 36 35 41
USB20_P7_CAMERA 37 36 G1 42
3 Camera For Camera DMIC_CLK_R
38 37
38
G2
G3
43 3
39 44
<25> DMIC_CLK_R DMIC_DATA_R 39 G4
@EMI@ 40 45
USB20_N7 USB20_N7_CAMERA <25> DMIC_DATA_R 40 G5
RX10 1 2 0_0402_5%
<13> USB20_N7
ACES_50398-04041-001
@EMI@ CONN@
USB20_P7 RX11 1 2 0_0402_5% USB20_P7_CAMERA
<13> USB20_P7 DMIC_DATA_R
DMIC_CLK_R
SP010013I00
3
DX1
@ESD@
YSLC05CH_SOT23-3
1
4 4

eDP Connector
A B C D E
A B C D E
DVT ESD Request to POP DY2, DY3 01/13

ESD Bom Change to SC300002800 01/23
+5VS W=40mils +HDMI_5V_OUT @EMI@ DY2 ESD@

HDMI_C_CLK- RY1 1 2 0_0402_5% HDMI_R_CK- HDMI_R_D0- 1 1 10 9 HDMI_R_D0-
UY1 HDMI_R_D0+ HDMI_R_D0+
@EMI@ 2 2 9 8
HDMI_C_CLK+ RY2 1 2 0_0402_5% HDMI_R_CK+
3 HDMI_R_CK- 4 4 7 7 HDMI_R_CK-
OUT
1
1 HDMI_R_CK+ 5 5 6 6 HDMI_R_CK+
IN CY9
1 1
2 0.1U_0201_10V6K 3 3
GND 2
8
AP2330W -7_SC59-3
@EMI@ TVW DF1004AD0
HDMI_C_TX0- RY3 1 2 0_0402_5% HDMI_R_D0-
SC300002800
@EMI@
HDMI_C_TX0+ RY4 1 2 0_0402_5% HDMI_R_D0+ DY3 ESD@
HDMI_R_D1- 1 1 10 9 HDMI_R_D1-
HDMI_R_D1+ 2 2 9 8 HDMI_R_D1+
HDMI_R_D2- 4 4 7 7 HDMI_R_D2-
RPY1
470_8P4R_5% HDMI_R_D2+ 5 5 6 6 HDMI_R_D2+
<7> SOC_DP1_N1 CY4 2 1 .1U_0402_16V7K HDMI_C_TX1- 1 8
<7> SOC_DP1_P1 CY3 2 1 .1U_0402_16V7K HDMI_C_TX1+ 2 7 3 3
<7> SOC_DP1_N0 CY2 2 1 .1U_0402_16V7K HDMI_C_TX2- 3 6 @EMI@
<7> SOC_DP1_P0 CY1 2 1 .1U_0402_16V7K HDMI_C_TX2+ 4 5 HDMI_C_TX1- RY5 1 2 0_0402_5% HDMI_R_D1- 8
HDMI_GND
<7> SOC_DP1_N2 CY6 2 1 .1U_0402_16V7K HDMI_C_TX0- 1 8 @EMI@ TVW DF1004AD0
<7> SOC_DP1_P2 CY5 2 1 .1U_0402_16V7K HDMI_C_TX0+ 2 7 HDMI_C_TX1+ RY7 1 2 0_0402_5% HDMI_R_D1+
SC300002800
<7> SOC_DP1_N3 CY8 2 1 .1U_0402_16V7K HDMI_C_CLK- 3 6
<7> SOC_DP1_P3 CY7 2 1 .1U_0402_16V7K HDMI_C_CLK+ 4 5
RPY2
470_8P4R_5%
2 2
6
D
+3VS 2 QY1A
G 2N7002KDW _SOT363-6 @EMI@
HDMI_C_TX2- RY8 1 2 0_0402_5% HDMI_R_D2-
S
1
@EMI@
HDMI_C_TX2+ RY10 1 2 0_0402_5% HDMI_R_D2+
+3VS
+3VS
1
RY6
G
1M_0402_5%
HDMI connector
2
4 3 HDMI_HPD
S
<7> SOC_DP1_HPD JHDMI1

D
HDMI_HPD 19
QY1B RY9 18 HP_DET
2N7002KDW _SOT363-6 +HDMI_5V_OUT +5V
100K_0402_5% 17
HDMI_SDATA 16 DDC/CEC_GND
HDMI_SCLK 15 SDA
2
14 SCL
13 Reserved
HDMI_R_CK- 12 CEC
11 CK-
3 HDMI_R_CK+ 10 CK_shield 3
DY1 ESD@ HDMI_R_D0- 9 CK+
HDMI_HPD 6 3 HDMI_SDATA 8 D0-
RPY3 I/O4 I/O2 HDMI_R_D0+ D0_shield
7
1 8 SOC_DP1_CTRL_CLK HDMI_R_D1- 6 D0+
+3VS HDMI_SDATA D1-
+HDMI_5V_OUT 2 7 5
3 6 SOC_DP1_CTRL_DATA 5 2 HDMI_R_D1+ 4 D1_shield 20
HDMI_SCLK +HDMI_5V_OUT VDD GND HDMI_R_D2- D1+ GND
4 5 3 21
2 D2- GND 22
HDMI_R_D2+ 1 D2_shield GND 23
2.2K_0804_8P4R_5% HDMI_SCLK 4 1 D2+ GND
I/O3 I/O1
AZC199-04S.R7G SOT23-6 CCM_C100042GR019M298ZL
SC300002900 CONN@
+3VS
DVT keep EVT design 01/17 , DC232003500
Pre-MP Bom change to SC300002900 03/29
2
G
1 6 HDMI_SDATA
<7> SOC_DP1_CTRL_DATA
S
QY2B
PJT138KA-2N_SOT363-6
5
G
4 HDMI_SCLK 4
4 3
<7> SOC_DP1_CTRL_CLK
S
QY2A
PJT138KA-2N_SOT363-6
Intel spec Ron/Cout : 3ohm/10pF. Issued Date 2016/11/04 Deciphered Date 2018/11/04 Title
SB000016K00, S TR PJT138KA 2N SOT363-6 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI CONN.
A B C D E
A B C D E
LDO mode
W=60mil RL1 2 LDO@ 1 0_0603_5% W=60mil
LAN-RTL8411B +LAN_VDD +3V_LAN
W=60mil
300mA 1.4A
LL1 SWR@ IDC=1200mA
+REGOUT 1 2
2.2UH_HPC252012NF-2R2M_20%
4.7U_0402_6.3V6M
1U_0402_6.3V6K
CL8
1
0.1U_0201_10V6K
CL2
+3VALW +3V_LAN LDO@ Using for Switch mode 1 1 1 1 1 1 1 1 1 1 1 1
CL1
0.1U_0201_10V6K
CL3
0.1U_0201_10V6K
CL4
0.1U_0201_10V6K
CL5
0.1U_0201_10V6K
CL6
0.1U_0201_10V6K
CL7
0.1U_0201_10V6K
CL9
0.1U_0201_10V6K
CL11
0.1U_0201_10V6K
CL12
0.1U_0201_10V6K
CL13
The trace length from
RL2 Lx to PIN48 (REGOUT)
0_0805_5% 2
and from C to Lx must 2 2 2 2 2 2 2 2
1 2 < 200mils. CL10 2 2 2 2
4.7U_0402_6.3V6M
1
60mil 60mil 1
UL1
5 1
IN OUT
Place near Pin 3,8,33,46 Place near Pin 20 Using for Switch mode Place near Pin 11,32,48
2 11/27: P/N change to SH00000RT00
GND
The trace length
4 3 ( S COIL 2.2UH +-20% from C to
EN OC HPC252012NF-2R2M 1.3A)
2 PIN34,35(VDDREG)
SY6288C20AAC_SOT23-5 must < 200mils.
CL14 @
1U_0402_6.3V6K LAN_PWR_EN
1 LAN_PWR_EN <30>
UL2
From EC reserve EC_PME# pull high 100K to +3VALW_EC Power Manahement/Isolation
ISOLATEB 31
1 2 0_0402_5% LAN_PME# 39 ISOLATEBPIN
High active. <30> EC_PME# RL3 @
LANWAKEB
EN threshold voltage min:1.2V Card Reader
DVT modify 12/04 RL8 1 2 10K_0402_5% 15 SD_D0 RL9 1 @ 2 0_0402_5% SD_D0_R
typ:1.6V max:2.0V for WOL pull high to +3V_LAN +3V_LAN SD_D0/MS_D1 SD_D1 SD_D1_R
Current limit threshold 1.5~2.8A PCI-Express 14 RL4 1 @ 2 0_0402_5%
CLK_PCIE_P1 23 SD_D1 16 SD_CLK RL10 1 2 10_0402_5% SD_CLK_R
<11> CLK_PCIE_P1 CLK_PCIE_N1 REFCLK_P SD_CLK/MS_D0 SD_CMD SD_CMD_R
+3V_LAN Rising time must >0.5ms and <100ms 24 17 RL5 1 @ 2 0_0402_5%
<11> CLK_PCIE_N1 REFCLK_N SD_CMD/MS_D2 SD_D3 SD_D3_R
18 RL6 1 @ 2 0_0402_5% 2
PLT_RST_BUF# 30 SD_D3/MS_D3 19 SD_D2 RL7 1 @ 2 0_0402_5% SD_D2_R
<11,24> PLT_RST_BUF# CLKREQ_PCIE#1 29 PERSTBPIN SD_D2/MS_CLK 28 SD_WP
PU at PCH side CL16
<11> CLKREQ_PCIE#1 CLKREQBPIN SD_WP/MS_BS
5P_0402_50V8C
CL17 1 2 .1U_0402_16V7K PCIE_CRX_C_DTX_P5 25 1
<13> PCIE_CRX_DTX_P5 PCIE_CRX_C_DTX_N5 HSOP @EMI@
CL15 1 2 .1U_0402_16V7K 26
<13> PCIE_CRX_DTX_N5 21 HSON 42 SD_CD#
<13> PCIE_CTX_C_DRX_P5 HSIP SD_CD# close to pin17
22 43
<13> PCIE_CTX_C_DRX_N5 HSIN MS_CD#
Transceiver Interface
2 LAN_MIDI0+ 1 2
LAN_MIDI0- 2 MDIP0
LAN_MIDI1+ 4 MDIN0
+3V_LAN LAN_MIDI1- 5 MDIP1 48 +3V_LAN
SWR mode LAN_MIDI2+ 6 MDIN1 AVDD33 11 Protect cotact Card contact
+3V_LAN LAN_MIDI2- 7 MDIP2 AVDD33 12
MDIN2 DVDD33
1400mA
RL11 1 SWR@2 0_0402_5% LAN_MIDI3+ 9 32
MDIP3 DVDD33 Write protect Write Enable
1
LAN_MIDI3- 10
MDIN3
RL12 RL13 1 LDO@2 0_0402_5% ENSWREG (Lock) (Unlock)
10K_0402_5% RL14
LDO mode 0_0402_5% XTLI 44 33
@
GPO XTLO_R 1 2 XTLO 45 CKXTAL1 Clock DVDD10 3
+LAN_VDD Card Uninsert Open Open Open
2
CKXTAL2 AVDD10 8 300mA

AVDD10 Card insert Open Close Close
Regulator and Reference
+REGOUT 36 20
+3VS 35 REG_OUT EVDD10
+3V_LAN VDDREG
ENSWREG 34 800mA
46 ENSWREG_H 13
YL1 +LAN_VDD AVDD10 Card_3V3 +CARD_3V3
1
25MHZ_10PF_XRCGB25M000F2P34R0 RL15 2 RL16 1 LAN_RST 47

1K_0402_5% 2.49K_0402_1% RSET 27 +VDD33_18
XTLI 1 3 XTLO_R DV33/18
1 3 @ T261
0.1U_0201_10V6K
CL20
41
2
NC NC LED0
0.1U_0201_10V6K
CL22
1 1 ISOLATEB RL17 1 @ 2 GPO 38 1 1 1
<30> LAN_GPO 37 LED1/GPO LEDs
10P_0402_50V8J 0_0402_5%
LED3
2
10P_0402_50V8J 2 4 CL19 for disable PHY 40

reserve 0 ohm @ T262 LED_CR
CL18 RL18 @ T263 49 @
2 2 E_Pad 2 2 CL21 2
15K_0402_5%
4.7U_0402_6.3V6M
1
3 3
Place near Pin 27
RTL8411B-CGT_QFN48_6X6
LAN Connector
SD Write protect inverter circuit +CARD_3V3 Card Reader Connector
TL1 JRJ45
JSD1
LAN_TERMAL1 24 MCT1 12
LAN_MIDI0+ 2 TCT1 MCT1 23 RJ45_MIDI0+ RJ45_MIDI3- 8 GND 6
LAN_MIDI0- 3 TD1+ MX1+ 22 RJ45_MIDI0- PR4- 11 SD_CMD_R 3 VDD
TD1- MX1- RJ45_MIDI3+ GND DVT 01/12 SD_CLK_R CMD
0.1U_0201_10V6K
CL24
7 7
4 21 MCT2 PR4+ 5 CLK
LAN_MIDI1+ TCT2 MCT2 RJ45_MIDI1+ RJ45_MIDI1- 1 1 VSS1
5 20 6 +3VS +3V_LAN 8
LAN_MIDI1- 6 TD2+ MX2+ 19 RJ45_MIDI1- PR2- CL23 VSS2
TD2- MX2- RJ45_MIDI2- 5 4.7U_0402_6.3V6M SD_D0_R 9
PR3- 2 2 SD_D1_R DAT0
100K_0402_5%
RL20
100K_0402_5%
RL21
7 18 MCT3 IC side 10
LAN_MIDI2+ 8 TCT3 MCT3 17 RJ45_MIDI2+ RJ45_MIDI2+ 4 SD_D2_R 1 DAT1
TD3+ MX3+ PR3+ DAT2
1
LAN_MIDI2- 9 16 RJ45_MIDI2- SD_D3_R 2
B88069X9231T203_4P5X3P2-2
TD3- MX3- RJ45_MIDI1+ 3 SD_WP CD/DAT3

10 15 MCT4 PR2+ CL25 @ 12
LAN_MIDI3+ 11 TCT4 MCT4 14 RJ45_MIDI3+ RJ45_MIDI0- 2
40mil 10P_0402_50V8J
40mil GND 13
TD4+ MX4+ PR1- Close to Card Reader CONN GND
1
LAN_MIDI3- RJ45_MIDI3- RJ45_GND D SD_WP#
12 13 10 LANGND 2 1 11
2
TD4- MX4- RJ45_MIDI0+ GND SD_WP# SD_CD# W/P
MESC5V02BD03_SOT23-3
1 2 4
PR1+ CD
1
1 9 G QL1
GND
3
Connector side S TAITW_PSDATQ09GLBS1NN4H1
3
4
3
2
1
CL26 GST5009-E L2N7002LT1G_SOT23-3 SD_WP# SD_WP CONN@

.1U_0402_16V7K SP050006B10 RPL1 SINGA_2RJ1660-000111F @ Card unlock 1 0
2 SP011611110
@ESD@
75_0804_8P4R_1% CONN@ JPL1 Card Lock 0 1

JP1
Place close to TCT pin DC234009H00 JUMP_43X118

2
ESD@
4 RL19 4
5
6
7
8
SD_CLK_R 1 @EMI@ 2 0_0402_5%1 2

DL1
LANGND CL27 @EMI@

RJ45_GND SD_WP# 1 @ 2 SD_WP 10P_0402_50V8J
1
RL22 0_0402_5%
Close to JREAD1 for EMI

LAN RTL8411B
A B C D E
A B C D E
Wireless LAN
+3VS
60mil +3VS_WLAN
NGFF WL+BT (KEY E) NBYOC@
RM11 2 0_0805_5%
+3VALW
UM1 W=60mils
1U_0402_6.3V6K
CM4
5 1
KEY E +3VS_WLAN
1
IN OUT
2
GND 1 1 1
1 JNGFF1 @ CM1 1
1 2 4 3 @ CM3
USB20_P5 3 GND_1 3.3VAUX_2 4 2 EN OC 4.7U_0402_6.3V6M CM2 0.1U_0201_10V6K
<13> USB20_P5 USB20_N5 5 USB_D+ 3.3VAUX_4 6 2 2 2
SY6288C20AAC_SOT23-5
For BT <13> USB20_N5 7 USB_D- LED1# 8 BYOC@ 0.1U_0201_10V6K
9 GND_7 PCM_CLK 10
11 SDIO_CLK PCM_SYNC 12
13 SDIO_CMD PCM_OUT 14 <30> WLAN_ON
15 SDIO_DAT0 PCM_IN 16
17 SDIO_DAT1 LED2# 18
19 SDIO_DAT2 GND_18 20
21 SDIO_DAT3 UART_WAKE 22 UART_2_CRXD_DTXD
23 SDIO_WAKE UART_TX UART_2_CRXD_DTXD <12>
SDIO_RST
24
PH +3VS at SOC
UART_2_CTXD_DRXD side, for win7 USB3 debug
25 UART_RX 26 UART_2_CTXD_DRXD <12>
PCIE_CTX_C_DRX_P6 27 GND_33 UART_RTS 28 RM3 1 2 100K_0402_5%
<13> PCIE_CTX_C_DRX_P6 PCIE_CTX_C_DRX_N6 29 PET_RX_P0 UART_CTS 30 E51TXD_P80DATA_R 2 1 0_0402_5%
RM2 @
<13> PCIE_CTX_C_DRX_N6 31 PET_RX_N0 CLink_RST 32 E51RXD_P80CLK_R 2 1 0_0402_5% E51TXD_P80DATA <30>
RM7 @
PCIE_CRX_DTX_P6 33 GND_39 CLink_DATA 34 E51RXD_P80CLK <30>
<13> PCIE_CRX_DTX_P6 PCIE_CRX_DTX_N6 PER_TX_P0 CLink_CLK
35 36
<13> PCIE_CRX_DTX_N6 PER_TX_N0 COEX3
37 38
CLK_PCIE_P2 39 GND_45 COEX2 40
<11> CLK_PCIE_P2 CLK_PCIE_N2 41 REFCLK_P0 COEX1 42 SUSCLK_R
<11> CLK_PCIE_N2 REFCLK_N0 SUSCLK(32KHz) WL_RST#_R T205 @ PLT_RST_BUF#
43 44 RM4 1 @ 2 0_0402_5%
CLKREQ_PCIE#2 45 GND_51 PERST0# 46 BT_ON PLT_RST_BUF# <11,23>
<11> CLKREQ_PCIE#2 WLAN_PME# CLKREQ0# W_DISABLE2# WL_OFF# BT_ON <30>
47 48
<30> WLAN_PME# 49 PEWAKE0# W_DISABLE1# 50 WL_OFF# <30>
51 GND_57 I2C_DAT 52
RM6 53 RSVD/PCIE_RX_P1 I2C_CLK 54
+3VS_WLAN
2 1 10K_0402_5% 55 RSVD/PCIE_RX_N1 I2C_IRQ 56 P80CLK and BT_ON enable seperate.
57 GND_63 RSVD_64 58
2 59 RSVD/PCIE_TX_P1 RSVD_66 60 2
61 RSVD/PCIE_TX_N1 RSVD_68 62
63 GND_69 RSVD_70 64
65 RSVD_71 3.3VAUX_72 66
67 RSVD_73 3.3VAUX_74
GND_75 68
69 GND1
GND2
BELLW_80152-3221
CONN@
SP070013E00
mSATA/SSD JSSD1
KEY M
+3VS +3VS_SSD_NGFF
1 2 @ RM9
GND 3P3VAUX +3VS_SSD_NGFF
3 4 0_0805_5%
PCIE_CRX_DTX_N9 5 GND 3P3VAUX 6 1 2
<13> PCIE_CRX_DTX_N9 PCIE_CRX_DTX_P9 7 PERn3 NC 8
<13> PCIE_CRX_DTX_P9 PERp3 NC SSD_LED#
10U_0603_6.3V6M
9 10 DVT CM141 2 1
PCIE_CTX_C_DRX_N9 GND DAS/DSS# @ T245
CM5 1 2 0.22U_0402_16V7K 11 12
<13> PCIE_CTX_DRX_N9 CM6 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P9 13 PETn3 3P3VAUX 14 + CS29
<13> PCIE_CTX_DRX_P9 15 PETp3 3P3VAUX 16 150U_B2_6.3VM_R35M
PCIE_CRX_DTX_N10 17 GND 3P3VAUX 18 2 1 CM13 SGA00009M00
<13> PCIE_CRX_DTX_N10 PCIE_CRX_DTX_P10 19 PERn2 3P3VAUX 20 2
3 <13> PCIE_CRX_DTX_P10 21 PERp2 NC 22 0.1U_0201_10V6K 3
CM7 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_N10 23 GND NC 24
<13> PCIE_CTX_DRX_N10 CM8 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P10 25 PETn2 NC 26
<13> PCIE_CTX_DRX_P10 27 PETp2 NC 28
PCIE_CRX_DTX_N11 29 GND NC 30
<13> PCIE_CRX_DTX_N11 PCIE_CRX_DTX_P11 31 PERn1 NC 32
<13> PCIE_CRX_DTX_P11 33 PERp1 NC 34
<13> PCIE_CTX_DRX_N11 CM10 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P11 37 PETn1 NC 38 RM21 1 @ 2 0_0402_5%
<13> PCIE_CTX_DRX_P11 39 PETp1 DEVSLP 40 SSD_DEVSLP2 <13>
RM16 1 2 0_0402_5% PCIE_CRX_R_DTX_P12 41 GND NC 42 RM20 1 2 0_0402_5%
<13> PCIE_CRX_DTX_P12 RM17 1 2 0_0402_5% PCIE_CRX_R_DTX_N12 43 PERn0/SATA-B+ NC 44
<13> PCIE_CRX_DTX_N12 45 PERp0/SATA-B- NC 46 ESD@ CM15 1 2 1000P_0402_50V7K DVT ESD Request to POP CM15 1000P 01/23
<13> PCIE_CTX_DRX_N12 CM12 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P12 49 PETn0/SATA-A- NC 50 NGFF_SSD_RST#_R RM18 1 @ 2 0_0402_5% PLT_RST_BUF#
<13> PCIE_CTX_DRX_P12 51 PETp0/SATA-A+ PERST# 52 NGFF_CLKREQ#_R RM5 1 @ 2 0_0402_5%
GND CLKREQ# CLKREQ_PCIE#3 <11>
53 54
<11> CLK_PCIE_N3 REFCLKN PEWake#
Port P and N follow SATA 55 56
<11> CLK_PCIE_P3 REFCLKP NC
57 58
GND NC
+3VS_SSD_NGFF 59 60 SUSCLK_SSD
NC SUSCLK(32kHz) @ T246
RM22 61 62
10K_0402_5% 63 PEDET(NC-PCIE/GND-SATA) 3P3VAUX 64
1 @ 2 65 GND 3P3VAUX 66
GND 3P3VAUX +3VS_SSD_NGFF
67
@ GND 68
1 2 SSD_DET# GND1 69
<13> SATA_GP2 GND2
RM23 BELLW_80159-3221
4 0_0402_5% 4
CONN@
1
D
QM1 2
DVT
SP070018L00
BSS138W-7-F_SOT323-3 G
@ S
3
SSD_DET# (SATA_GP0)
SATA Device 0
PCIE Device 1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
M.2 Key E (WLAN)/Key M(SSD)
A B C D E
A B C D E
HD Audio Codec +PVDD_HDA
SM01000EJ00 3000mA 220ohm@100mhz DCR 0.04 +5VS (output = 300 mA) +VDDA
40mil 40mil JPA1 40mil Int. Speaker Conn.
+VDDA
LA1 2 1 1
1 2
2 40mil SPK_R+
JSPK1
HCB2012KF-221T30_0805 1 1 1 SPKR+ LA2 EMI@ 1 2 PBY160808T-121Y-N_2P 1
1
1
SPK_R-
10U_0603_6.3V6M
CA1
0.1U_0201_10V6K
CA2
0.1U_0201_10V6K
CA3
.1U_0402_16V7K
CA4
JUMP_43X79 4.75V SPKR- LA3 EMI@ 1 2 PBY160808T-121Y-N_2P 2
@ SPKL+ LA4 EMI@ 1 2 PBY160808T-121Y-N_2P SPK_L+ 3 2
SPKL- LA5 EMI@ 1 2 PBY160808T-121Y-N_2P SPK_L- 4 3
2
2 2 @ +AVDD1_HDA 2 5 4
@ESD@ 6 G1
GND & GNDA moat EMI request for solve EMI noise, SM01000OW00. G2
GND GND
3
GND ACES_50278-00401-001
Place near Pin41 Place near Pin46 GND CONN@
@ESD@ @ESD@
1
DA1 DA2 SP02000RR00 1
TVNST52302AB0_SOT523-3 TVNST52302AB0_SOT523-3
20mil
1
CA5 1 2 10U_0603_6.3V6M RA1 1 @ 2
GND +VDDA
10U_0603_6.3V6M
CA9
1
1
0.1U_0201_10V6K
CA8
Pin9 need to matching with SOC HDA CA6 1 2 0.1U_0201_10V6K 0_0603_5% GND GND
interface. +3VS_DVDDIO
RA2 2 @ 1 0_0402_5% Place near Pin9
+3VS
2
2 @
+3VS_DVDD GND & GNDA moat
20mil GNDA
RA5 2 @ 1 0_0402_5% Place near Pin26
+3VS
1 1 +1.8VS_VDDA
0.1U_0201_10V6K
CA11
CA10 RA6 2 @ 1 +1.8VS
1
1
0.1U_0201_10V6K
CA12
CA13
10U_0603_6.3V6M
10U_0603_6.3V6M 0_0402_5%
2 2
2
1 2 DMIC_CLK 2 @
CA32 @EMI@ Place near Pin1 GND GNDA
10P_0402_50V8J
41
46
26
40
1
9
Reserved for EMI UA1 Place near Pin40
GND
DVDD
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
DVT
LINE1-L 22
LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL-
UA1 LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPKL+
24 SPK-OUT-L+
23 LINE2-L(PORT-E-L) 45 SPKR+
LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPKR-
2 RING2 17 SPK-OUT-R- 2
40mil SLEEVE 18 MIC2-L(PORT-F-L) /RING2
ALC233-VB2-CG_MQFN48_6X6 MIC2-R(PORT-F-R) /SLEEVE 32 HP_LEFT
Combo MIC
233@ +MICBIAS
+MICBIAS 31
LINE1-VREFO-L
HPOUT-L(PORT-I-L)
HPOUT-R(PORT-I-R)
33 HP_RIGHT Digital MIC
SA00007BF10 30
LINE1-VREFO-R 10 HDA_SYNC_R
DMIC_DATA SYNC HDA_BIT_CLK_R HDA_SYNC_R <10>
2 6
DMIC_CLK GPIO0/DMIC-DATA BCLK HDA_BIT_CLK_R <10>
3
GPIO1/DMIC-CLK 1 @EMI@ 2 1 2 CA15 @EMI@ PCH_DMIC_DATA 2 @ 1
GND <10> PCH_DMIC_DATA
RA10 0_0402_5% 22P_0402_50V8J 33_0402_5% RA36
EC_MUTE# 47 5 HDA_SDOUT_R PCH_DMIC_CLK 2 @ 1
<30> EC_MUTE# HDA_RST#_R 11 PDB SDATA-OUT 8 HDA_SDIN0_AUDIO 1 RA33 2
HDA_SDOUT_R <10> <10> PCH_DMIC_CLK TO eDP Conn
<10> HDA_RST#_R HDA_SDIN0 <10> 33_0402_5% RA11
RESETB SDATA-IN 33_0402_5%
48 DMIC_DATA 2 EMI@ 1 DMIC_DATA_R
MONO_IN 12 SPDIF-OUT/GPIO2 0_0402_5% RA35 DMIC_DATA_R <21>
10mil Close codec1
PCBEEP 16 DMIC_CLK 2 EMI@ 1 DMIC_CLK_R
HP_PLUG# RA13 2 200K_0402_1% SENSE_A 13 MONO-OUT BLM15PX221SN1D RA34 DMIC_CLK_R <21>
<29> HP_PLUG# SENSE A +MIC2_VREFO
RA14 2 1 100K_0402_1% 14 SM01000NY00
+3VS SENSE B
1 29 10U_0603_6.3V6M 2 1 CA18 GND
37 MIC2-VREFO
CA19 35 CBP 7 10U_0603_6.3V6M 2 1 CA20 DVT EMI request change 0ohm to Bead
CBN LDO3-CAP GNDA
2.2U_0402_6.3V6M 39
2 LDO2-CAP 27 10U_0603_6.3V6M 2 1 CA21
LDO1-CAP GNDA
36
+3VS_DVDD CPVDD 1 RA15 2
Pin20 28 CODEC_VREF 100K_0402_5% 10mil
RA16 1 @ 2 0_0402_5% 20 VREF
ALC283 : NC +3VALW CPVREF 1 1
Headphone Out
0.1U_0201_10V6K
CA23
2.2U_0402_6.3V6M
CA24
15
ALC255/256/233 : Power for combo jack depop 10U_0603_6.3V6M 2 1 CA22 19 JDREF 34 CPVEE
GNDA MIC-CAP CPVEE
circuit at system shutdown mode 2 2
1 @
4 +MIC2_VREFO
Pin4 49 DVSS 25 CA26
ALC283 : DVSS Thermal PAD AVSS1 38 2.2U_0402_6.3V6M
ALC255/256/233 : DC DET (For Japen customer only) AVSS2 2
3 3
ALC255-CG_MQFN48_6X6
Place near pin28
1
SA000082700 GND
GND 255@ RA19 RA20
GNDA 2.2K_0402_5% 2.2K_0402_5%
GNDA
2
RA21 CA27 SLEEVE
SLEEVE <29>
DOS mode 22K_0402_5% .1U_0402_16V7K Pin15 RING2 RING2 <29>
2 1 BEEP#_R 1 2 MONO_IN
<30> BEEP# ALC283 : Ref. Resistor for Jack Detect
ALC255/256/233 : Jack Detect for SPDIF-OUT and SPK-OUT port
2
RA22 1 10/20 vendor review change to 0.1uF.

100P_0402_50V8J
CA28 @EMI@
OS mode 22K_0402_5%
4.7K_0402_5%
RA23
2 1
<10> PCH_SPKR
2
1
HP_LEFT RA24 1 @ 2 0_0603_5% HPOUT_L_1

HPOUT_L_1 <29>
HP_RIGHT RA27 1 @ 2 0_0603_5% HPOUT_R_1 HPOUT_R_1 <29>
GND
LINE1-L 1 2
CA29 4.7U_0402_6.3V6M
LINE1-R 1 2
CA30 4.7U_0402_6.3V6M
+MICBIAS DA5
2 2 RA29 1
GND & GNDA moat 4.7K_0402_5%
JPA2 JPA3 1
JUMP_43X39 JUMP_43X39
1 2 1 2 3 2 RA32 1
@ 1 2 @ 1 2 4.7K_0402_5%
BAT54A-7-F_SOT23-3
4 JPA4 JPA5 JUMP_43X39 4
JUMP_43X39 1 2
1 2 @ 1 2
@ 1 2
JPA6 JUMP_43X39
CA31 @EMI@ 1 2
.1U_0402_16V7K @ 1 2
1 2
JPA7 JUMP_43X39
1 2
RA25 1 @EMI@ 2 0_0402_5% @ 1 2 Security Classification Compal Secret Data Compal Electronics, Inc.
HD Audio Codec ALC255/ALC233 Colay
GND GNDA GND GNDA AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
A B C D E
A B C D E
G-Sensor reserved for BA serial SATA ODD Conn.

(Reserved)
1 1
+3VS
JODD1
1
RZ1 +3VS 1 2
10K_0402_5% ODD@ CO5 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_P1 3 1 2 4
<13> SATA_CTX_DRX_P1 SATA_CTX_C_DRX_N1 3 4
BA@ UZ1 BA@ <13> SATA_CTX_DRX_N1 ODD@ CO6 1 2 0.01U_0402_16V7K 5 6
1 CZ1 1 2 10U_0603_6.3V6M 7 5 6 8
2
8 Vdd_IO ODD@ CO7 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_N1 9 7 8 10
CS <13> SATA_CRX_DTX_N1 SATA_CRX_C_DTX_P1 9 10
4 14 CZ2 1 2 BA@ ODD@ CO8 1 2 0.01U_0402_16V7K 11 12
<9,20> SOC_SMBCLK_1 SCLSPC Vdd <13> SATA_CRX_DTX_P1 11 12
6 0.1U_0201_10V6K 13 14
<9,20> SOC_SMBDATA_1 SDA/SDI/SDO 13 14
+3VS RZ2 1 @ 2 10K_0402_5% 7 15 16
RO25 1 BA@ 2 10K_0402_5% SDO/SA0 11 G_INT# +5VS @ RO2 +5VS_ODD 17 15 16 18
INT1 G_INT2 G_INT# <12> 17 18
16 9 0_0805_5% 80mils 19 20
15 ADC1 INT2 1 2 +5VS_ODD 21 19 20 22
13 ADC2 10 INT1/2 all High Active 23 21 22 24
ADC3 RES 23 24
10U_0603_6.3V6M
1 1
CO9
2 CO10 25 26
3 NC 5 0.1U_0201_10V6K GNDGND
NC GND 12 ODD@ ODD@ ACES_50673-0120N-P01
GND 2 2
CONN@
LIS3DHTR_LGA16_3X3
BA@ SP01002HK00
LIS3DH
SA0 ->0, Address is 0011 000 (0x30h)
2 SA0 ->1, Address is 0011 001 (0x32h) 2
JHDD2
1
2 1
SATA Re-Driver and cable HDD Conn. 3 2

4 3
+3VS 4
5
6 5
+3VS DVT 7 6
@ 8 7
RO3 1 2 0_0805_5% +5VS_HDD 9 8
+5VS 9
B_EQ1
A_EQ2
A_EQ1
10
CO14 10
DEW
11
2 1 G_INT2 RO4 1 @ 2 0_0402_5% JHDD_P9 12 11
Check INT pin 12
13
0.01U_0402_16V7K UO2 14 13
20
19
18
17
16
PS8527CTQFN20GTR2A_TQFN20_4X4 RDSATA_CRX_DTX_P0 CO4 1 2 0.01U_0402_16V7K RDSATA_CRX_C_DTX_P0 15 14

SA00007JU10 RDSATA_CRX_DTX_N0 CO3 1 2 0.01U_0402_16V7K RDSATA_CRX_C_DTX_N0 16 15
VDD2
B_EQ1
A_EQ2
A_EQ1
DEW
X76PAR@ 17 16
RDSATA_CTX_DRX_N0 CO2 1 2 0.01U_0402_16V7K RDSATA_CTX_C_DRX_N0 18 17
3 CO16 2 1 SATA_CTX_C_DRX_P0 0.01U_0402_16V7K 1 15 RDSATA_CTX_DRX_P0 RDSATA_CTX_DRX_P0 CO1 1 2 0.01U_0402_16V7K RDSATA_CTX_C_DRX_P0 19 18 3
<13> SATA_CTX_DRX_P0 SATA_CTX_C_DRX_N0 A_INP A_OUTP RDSATA_CTX_DRX_N0 19
<13> SATA_CTX_DRX_N0 CO17 2 1 0.01U_0402_16V7K 2 14 20
3 A_INN A_OUTN 13 B_EQ2 close to CONN. 21 20
CO18 2 1 SATA_CRX_C_DTX_N0 0.01U_0402_16V7K 4 GND1 B_EQ2 12 RDSATA_CRX_DTX_N0 22 G1
<13> SATA_CRX_DTX_N0 SATA_CRX_C_DTX_P0 B_OUTN B_INN RDSATA_CRX_DTX_P0 G2
CO19 2 1 0.01U_0402_16V7K 5 11 23
<13> SATA_CRX_DTX_P0 B_OUTP B_INP G3
21 24
GND2 G4
REXT
VDD1
B_DE
A_DE
+5VS_HDD ACES_50406-02071-001
EN
CONN@
100mils SP010016L00
6
7
8
9
10
+3VS
+3VS
10U_0603_6.3V6M
CO12
1 1
1
RO10 1 @ 2 4.7K_0402_5% A_DE CO15 CO13
B_DE
A_DE
RO15 1 @ 2 4.7K_0402_5% RO6 2 1 0.1U_0201_10V6K 0.1U_0201_10V6K

4.99K_0402_1% @
2
RO13 1 @ 2 4.7K_0402_5% A_EQ1 +3VS 2 2
RO18 1X76PAR@ 2 4.7K_0402_5%
RO5 1 @ 2
RO14 1 @ 2 4.7K_0402_5% A_EQ2 4.7K_0402_5%
RO19 1X76PAR@ 2 4.7K_0402_5%
RO11 1 @ 2 4.7K_0402_5% B_DE DVT remove JHDD1 symbol 01/18

RO16 1 @ 2 4.7K_0402_5%
RO12 1 @ 2 4.7K_0402_5% B_EQ1 X76TI@ X76TI@ UO2

RO17 1X76PAR@ 2 4.7K_0402_5% RO18 RO19
4.7K_0402_5% 0_0402_5%
RO20 1 @ 2 4.7K_0402_5% B_EQ2 SD028470180 SD028000080
4 4
RO21 1X76PAR@ 2 4.7K_0402_5%
X76TI@ X76TI@
RO22 1 X76TI@ 2 4.7K_0402_5% DEW RO17 RO21 SN75LVCP601RTJR_A.4_TQFN20_4X4
4.7K_0402_5% 0_0402_5% X76TI@
SD028470180 SD028000080 SA00003ZX00
DVT update re-driver EQ setting
HDD/ODD/ HDD Re-Driver
A B C D E
5 4 3 2 1
DVT
+3VS @ R1 +3VS_EMMC +1.8VS_EMMC @ R2 +1.8VS

0_0805_5% 0_0805_5%
1 2 1 2
1 1 1 1
DVT C71 EMMC@ C72 EMMC@ C73 EMMC@ C74 EMMC@
10U_0603_6.3V6M .1U_0402_16V7K 10U_0603_6.3V6M .1U_0402_16V7K
2 2 2 2
AA3
AA5
T10
W4
M6
N5
U9
K6
Y4
D U6 D
A4
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VCC
VCC
VCC
VCC
A6 NC DVT
A9 NC
A11 NC W5 EMMC_CMD_R R3 1 @ 2 0_0402_5% EMMC_CMD
NC CMD EMMC_CMD <10>
U6 B2
B13 NC
D1 NC
D14 NC EMMC@
H1 NC U5 EMMC_PLT_RST# C76 1 2 .1U_0402_16V7K
H2 NC RST_n
EMMC32G-M525-A01 H6 NC W6 EMMC_CLK_R R5 1 EMMC@ 2 0_0402_5% EMMC_CLK
NC CLK EMMC_CLK <10>
KINGSTON32G@ H7
H8 NC
SA00009KE10 NC
H9 DVT
H10 NC
H11 NC H3 EMMC_D0_R R36 1 @ 2 0_0402_5% EMMC_D0
NC DAT0 EMMC_D1_R EMMC_D1 EMMC_D0 <10>
H12 H4 R39 1 @ 2 0_0402_5%
H13 H5 R40 1 @ 2 0_0402_5%
H14 J2 R34 1 @ 2 0_0402_5%
J1 J3 R41 1 @ 2 0_0402_5%
J7 J4 R38 1 @ 2 0_0402_5%
J8 J5 R35 1 @ 2 0_0402_5%
J9 J6 R37 1 @ 2 0_0402_5%
NC DAT7 EMMC_D7 <10> +1.8VS_EMMC
J10
J11 NC
J12 NC EMMC@
J13 NC K2 EMMC_VDDI C75 1 2 .1U_0402_16V7K EMMC_D0_R R46 1 EMMC@ 2 20K_0402_5%
J14 NC VDDi EMMC_D1_R R50 1 EMMC@ 2 20K_0402_5%
C K1 NC EMMC_D2_R R44 1 EMMC@ 2 20K_0402_5% C
K3 NC U1 EMMC_D3_R R43 1 EMMC@ 2 20K_0402_5%
K5 NC NC U2 EMMC_D4_R R51 1 EMMC@ 2 20K_0402_5%
K10 NC NC U10
K11 NC NC U12 EMMC_CMD_R R47 1 EMMC@ 2 20K_0402_5%
K12 NC NC U13
K13 NC NC U14 EMMC_CLK_R R52 1 EMMC@ 2 20K_0402_5%
K14 NC NC V1
L1 NC NC V2 EMMC_RCLK_R R48 1EMMC V5.0@
2 20K_0402_5%
L2 NC NC V3
L3 NC NC V12
L4 NC NC V13 Check if need pop for 5.0
L12 NC NC V14
L13 NC NC W1
L14 NC NC W2
M1 NC NC W3
M2 NC NC W7
M3 NC
NC
NC
NC
W8 Level shif t +1.8VS_EMMC
M5 W9
M8 NC NC W10
EMMC_VSF2 M9 NC NC W11 +3VS
@ T2 NC NC
1
EMMC_VSF3 M10 W12
@ T3 NC NC
M12 W13 U7 R23
M13 NC NC W14 1 5 10K_0402_5%
M14 NC NC Y1 NC VCC EMMC@
N1 NC NC Y3 2
<11,30,31> PLT_RST#
2
B N2 NC NC Y6 IN A 4 EMMC_PLT_RST# B
N3 NC NC Y7 3 Y
N10 NC NC Y8 GND
N12 NC NC Y9 NL17SZ07DFT2G_SC70-5
N13 NC NC Y10 @
N14 NC NC Y11
P1 NC NC Y12
P2 NC NC Y13
P3 NC NC Y14 +1.8VS_EMMC
P10 NC NC AA1
P12 NC NC AA2
P13 NC NC AA7
P14 NC NC AA8
NC NC
2
R1 AA9
G
R2 NC NC AA10
For eMMC5.0 EMMC V5.0@ R3 NC NC AA11 PLT_RST# 1 3 EMMC_PLT_RST#
2 1 EMMC_RCLK_R R5 NC NC AA12
S
<10> EMMC_RCLK NC NC
0_0402_5% R53 R12 AA13
R13 NC NC AA14 Q8 EMMC@
R14 NC NC AE1 MESS138W -G_SOT323-3
T1 NC NC AE14
T2 NC NC AG2
T3 NC NC AG13
PN : SB00000T000
T5 NC NC AH4
T12 NC NC AH6
T13 NC NC AH9
T14 NC NC AH11
NC NC
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
A A
KE4CN5B6A_FBGA169 Pad size 9 mils, BI trace width/space : 3.5/3.5 mils

K4
Y2
Y5
AA4
AA6
M7
P5
R10
U8
2016/11/04
Compal Secret Data
2018/11/04 Title
EMMC STORAGE
5 4 3 2 1
5 4 3 2 1
@EMI@
USB3.0 (Port 3) RS1

RS2
1
1
@EMI@
2 0_0402_5%
2 0_0402_5% For ESD request
USB3_CTX_C_DRX_N3 USB3_CTX_L_DRX_N3 DVT DS1,DS2,DS3,DS4 Change to SC300002800
<13> USB3_CTX_DRX_N3 CS1 1 2 3 4
.1U_0402_16V7K
DS1 ESD@
<13> USB3_CTX_DRX_P3 CS2 1 2 USB3_CTX_C_DRX_P3 2 1 USB3_CTX_L_DRX_P3 TBTA_SBU1 1 1 10 9
TBTA_SBU1
.1U_0402_16V7K
LS1 @EMI@ SM070003V00 TBTA_SBU2 2 2 9 8
TBTA_SBU2
HCM1012GH900BP_4P
USB3_CRX_L_DTX_P3 4 7 7
USB3_CRX_L_DTX_P3
INPAQ_HCM1012GH900BP_4P-NPM 4
@EMI@ USB3_CRX_L_DTX_N3 5 6 6
USB3_CRX_L_DTX_N3
D 5 D
RS3 1 2 0_0402_5%
RS4 1 2 0_0402_5% 3 3
@EMI@
8
USB3_CRX_DTX_P3 2 1 USB3_CRX_L_DTX_P3
<13> USB3_CRX_DTX_P3
TVWDF1004AD0
USB3_CRX_DTX_N3 3 4 USB3_CRX_L_DTX_N3
<13> USB3_CRX_DTX_N3 DS2 ESD@
LS3 @EMI@ SM070003V00 USB3_CTX_L_DRX_P2 1 USB3_CTX_L_DRX_P2
1 10 9
HCM1012GH900BP_4P
INPAQ_HCM1012GH900BP_4P-NPM USB3_CTX_L_DRX_N2 2 9 8
USB3_CTX_L_DRX_N2
2
USB3_CTX_L_DRX_P3 4 7 7 USB3_CTX_L_DRX_P3
4
@EMI@
RS5 1 2 0_0402_5% USB3_CTX_L_DRX_N3 5 6 6
USB3_CTX_L_DRX_N3
5
USB3.0 (Port 4) RS6 1

@EMI@
2 0_0402_5%
LS5 EMI@
3 3
8
CS3 1 2 USB3_CTX_C_DRX_N2 3 4 USB3_CTX_L_DRX_N2 USB20_P2 2 1 USB20_P2_L
<13> USB3_CTX_DRX_N2 <13> USB20_P2
.1U_0402_16V7K TVWDF1004AD0
CS4 1 2 USB3_CTX_C_DRX_P2 2 1 USB3_CTX_L_DRX_P2 USB20_N2 3 4 USB20_N2_L

<13> USB3_CTX_DRX_P2 <13> USB20_N2
.1U_0402_16V7K
LS4 @EMI@ SM070003V00 MCM1012B900F06BP_4P DS3 ESD@
CC2_VCONN 1 1 CC2_VCONN
HCM1012GH900BP_4P SM070003Z00 10 9
INPAQ_HCM1012GH900BP_4P-NPM
2 2 9 8
@EMI@
RS7 1 2 0_0402_5% 4 4 7 7
RS8 1 2 0_0402_5%
@EMI@ CC1_VCONN 5 5 6 6 CC1_VCONN
USB3_CRX_DTX_N2 2 1 USB3_CRX_L_DTX_N2 3 3
C <13> USB3_CRX_DTX_N2 C
8
USB3_CRX_DTX_P2 3 4 USB3_CRX_L_DTX_P2
<13> USB3_CRX_DTX_P2
TVWDF1004AD0
LS6 @EMI@ SM070003V00
HCM1012GH900BP_4P
DS4 ESD@
INPAQ_HCM1012GH900BP_4P-NPM USB20_P2_L USB20_P2_L
1 1 10 9
PVT Remove USB20_PORT9 02/22 USB20_N2_L USB20_N2_L
2 2 9 8
DVT LS1,LS3,LS4,LS6 cover solder mask 01/19 USB3_CRX_L_DTX_N2 4 7 7

USB3_CRX_L_DTX_N2
4
DVT RS1,RS2,RS3,RS4,RS5,RS6,RS7,RS8 R-short 01/19
USB3_CRX_L_DTX_P2 5 6 6 USB3_CRX_L_DTX_P2
5
3 3
TVWDF1004AD0
+5VALW +5VALW_CC +3VALW +3VALW_CC +5VALW_CC_VOUT

120mils 3A
JPS2 @
1 2 RS10 1 2 0_0402_5% 1
1 2 CS8
1
0.1U_0201_10V6K
CS9
0.01U_0402_16V7K
CS10
JUMP_43X79 DVT 10U_0603_6.3V6M

1 1 2 1
@ CS5 + CS6 CS7
10U_0603_6.3V6M 150U_B2_6.3VM_R35M 10U_0603_6.3V6M 2
SGA00009M00
2 2 2 1 2
+USB3_VCCC +USB3_VCCC
@ JPS1
1 2
B 1 2 B
+3VALW_CC JUMP_43X118
RPS1 +USB3_VCCC CC1_VCONN/CC2_VCONN 20mils JUSB4
100K_0804_8P4R_5% +5VALW_CC +5VALW_CC_VOUT A1 B12
1 8 CC_AUDIO# US1
30V 10mOhm
@ QS1 AON6405L 1P DFN GND GND
2 7 CC_POL# +3VALW_CC 120mils 3A 120mils 3A 1
120mils 3A USB3_CTX_L_DRX_P3 A2 B11 USB3_CRX_L_DTX_P3
3 6 CC_UFP# 2 14 2 USB3_CTX_L_DRX_N3 A3 SSTXP1 SSRXP1 B10 USB3_CRX_L_DTX_N3
4 5 CC_LD_DET# 3 IN1 OUT 15 5 3 0.47U_0402_25V6K 2 1 CS11 SSTXN1 SSRXN1
4 IN1 OUT A4 B9 CS12 1 2 0.47U_0402_25V6K
1
IN2 VBUS VBUS
3
5 RS15 RS12 CC1_VCONN A5 B8 TBTA_SBU2
4
AUX CC1 SBU2
1
+3VALW_CC 1 CC_FAULT# +3VALW_CC 100K_0402_5% @ 1M_0402_5% CS13
@ FAULTb 20 CC_LD_DET# @ 10U_0805_25V6K USB20_P2_L A6 B7 USB20_N2_L
1 2 CC_EN 6 LD_DETb DS5 USB20_N2_L A7 DP1 DN2 B6 USB20_P2_L
<30> EC_TYPEC_EN
2
2
1
RS13 1 2 100K_0402_5% CC_FAULT# RS37 0_0402_5% EN MESC5V02BD03_SOT23-3 DN1 DP2

RS18 1 2 100K_0402_5% CC_DEBUG# DVT RS42 ESD@ TBTA_SBU1 A8 B5 CC2_VCONN
CC_CHG 7 11 CC1_VCONN @ 10K_0402_5% SBU1 CC2
CC_CHG_HI 8 CHG CC1 13 CC2_VCONN 0.47U_0402_25V6K 2 1 CS14 A9 B4 CS15 1 2 0.47U_0402_25V6K
CHG_HI CC2 VBUS VBUS
3
RS20 1 2 100K_0402_5% CC_CHG D

2
1
RS40 1 @ 2 100K_0402_5% CC_CHG_HI 5 QS2B USB3_CRX_L_DTX_N2 A10 B3 USB3_CTX_L_DRX_N2
16 CC_DEBUG# G 2N7002KDW_SOT363-6 USB3_CRX_L_DTX_P2 A11 SSRXN2 SSTXN2 B2 USB3_CTX_L_DRX_P2
RS41 1 @ 2 100K_0402_5% CC_EN CC_REF 10 DEBUGb 17 CC_AUDIO# @ SSRXP2 SSTXP2
REF AUDIOb
6
18 CC_POL# D S A12 B1
4
POLb 19 CC_UFP# 2 QS2A GND GND

DVT modify to pull up with 100K ohm 01/19 RS39 1 2 100K_0402_1% 9 UFPb G 2N7002KDW_SOT363-6
12 GND1 21 @ 1 5
@ GND2 powerpad S 2 GND GND 6
1
1 2 CC_CHG_HI 3 GND GND 7

<30> TYPEC_3A_1P5A# GND GND
RS38 0_0402_5% 4 8
DVT GND GND
TPS25810RVCR_QFN20_4X3 LOTES_AUSB0181-P001A
US1 update -s footprint DC021702230

CONN@
A PVT Change Type-c symbol 03/01 A

CC+USB TYPE C
Note : 2017 BIOS SPEC define DC mode 30% stop charge AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
5 4 3 2 1
A B C D E
USB3.0 (Port 1) +5VALW

For ESD request +USB3_VCCA
CS23
DS21 ESD@ 1U_0402_6.3V6K US21
USB3_CTX_L_DRX_P1 1 1 USB3_CTX_L_DRX_P1
@RF@ 10 9 1 2 5
IN OUT
1 W=100mils
CS21 1 2 USB3_CTX_C_DRX_N1 RS21 1 2 0_0402_5% USB3_CTX_L_DRX_N1
<13> USB3_CTX_DRX_N1 USB3_CTX_L_DRX_N1 2 2 USB3_CTX_L_DRX_N1
.1U_0402_16V7K 9 8 2
@RF@ GND
CS22 1 2 USB3_CTX_C_DRX_P1 RS22 1 2 0_0402_5% USB3_CTX_L_DRX_P1 USB3_CRX_L_DTX_P1 4 4 7 7 USB3_CRX_L_DTX_P1 4 3 RS23 1 @ 2 0_0402_5%
1 <13> USB3_CTX_DRX_P1 <30> USB_CHARGE_2A EN OC USB_OC0# <13> 1
.1U_0402_16V7K
USB3_CRX_L_DTX_N1 5 6 6 USB3_CRX_L_DTX_N1 SY6288C20AAC_SOT23-5
5 1
CS24
3 3 1000P_0402_50V7K
ESD@
8 2
TVWDF1004AD0 Check Layout Placement +USB3_VCCA PVT Change to 1000P 02/20

SC300002800
@RF@ PVT Change to SGA00009M00
USB3_CRX_DTX_N1 RS24 1 2 0_0402_5% USB3_CRX_L_DTX_N1 DVT DS21 ESD Bom change to SC300002800 1/23 H=2.1mm
<13> USB3_CRX_DTX_N1 W=100mils
@RF@ 1 1
USB3_CRX_DTX_P1 RS25 1 2 0_0402_5% USB3_CRX_L_DTX_P1
<13> USB3_CRX_DTX_P1 +
CS25 CS26
470P_0402_50V7K
150U_B2_6.3VM_R35M 2 @
SGA00009M00 2
DS22 ESD@
U2DN1_L
USB3.0 Conn.
6 3
I/O4 I/O2 JUSB1
+USB3_VCCA 1
U2DN1_L 2 VBUS
LS23 5 2 U2DP1_L 3 D-
U2DP1 2 1 U2DP1_L VDD GND 4 D+
USB3_CRX_L_DTX_N1 5 GND
USB3_CRX_L_DTX_P1 6 SSRX- 10
U2DN1 3 4 U2DN1_L 4 1 U2DP1_L 7 SSRX+ GND 11
I/O3 I/O1 USB3_CTX_L_DRX_N1 8 GND GND 12
MCM1012B900F06BP_4P AZC099-04S.R7G_SOT23-6 USB3_CTX_L_DRX_P1 9 SSTX- GND 13
EMI@ SSTX+ GND
2 ACON_TARB5-9V1391 2
CONN@
DC23300NH00
+3VLP
1
USB20_N1 RS96 1 NCHG@ 2 0_0402_5% U2DN1 CHG@
USB20_P1 RS97 1 NCHG@ 2 0_0402_5% U2DP1 RS94
10K_0402_5%
USB Host Charger US10
2
USB_CB 8 1 USB_CEN
<30> USB_CB USB20_N1 CB CEN USB_CEN <30>
CB SELCDP 7 2 U2DN1
<13> USB20_N1 USB20_P1 6 TDM DM 3 U2DP1
<13> USB20_P1 5 TDP DP 4
0 X DCP(Dedicated Charging Port) +5VALW VDD SELCDP USB_SELCDP <30>
autodetect with mouse/keyboard wakeup 1 9
CS89 Thermal Pad
1 0 S0 charging with SDP(Standard Downstream Port) only 0.1U_0201_10V6K SLG55594AVTR_TDFN8_2X2
CHG@ SA00006L600
2 CHG@
1 1 S0 charging with CDP(Charging Downstream Port) or
SDP only
3 3
USB/B (USBx2, AUDIO, LEDx2)

JUSB3
PWR_LED# 1
<30> PWR_LED# PWR_SUSP_LED# 1
2
<30> PWR_SUSP_LED# BATT_BLUE_LED# 2
3
<30> BATT_BLUE_LED# BATT_AMB_LED# 3
4
<30> BATT_AMB_LED# 4
5
GNDA HP_PLUG# 5
6
<25> HP_PLUG# HPOUT_L_1 6
7
<25> HPOUT_L_1 HPOUT_R_1 7
8
<25> HPOUT_R_1 8
SLEEVE 9
<25> SLEEVE 9
RING2 10
<25> RING2 10
11
USB20_N4 12 11
<13> USB20_N4 USB20_P4 13 12
<13> USB20_P4 14 13
USB20_N3 15 14
<13> USB20_N3 USB20_P3 16 15
<13> USB20_P3 17 16
USB_EN 18 17
<30> USB_EN 18
19
4 20 19 4
21 20
22 21
+5VALW 22
23
24 G1
G2
ACES_85201-22051 Security Classification Compal Secret Data Compal Electronics, Inc.

CONN@ 2016/11/04 2018/11/04 Title
SP01000ED00 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB Conn/USB_B
A B C D E
A B C D E
+3VLP_EC PN:SM01000K500 +3VLP_ECA

+3VLP @ RB22 LB1
0_0805_5% FBMA-L11-160808-800LMT_0603
1 2 1000P_0402_50V7K EC_RST# 1 2 1 2 +3VLP_ECA SOC_RTCRST# <11>
CB9
1
D
EC_CLR_CMOS 2 QB6
0.1U_0201_10V6K
0.1U_0201_10V6K
+3VALW_1.8VALW_PGPPA G L2N7002LT1G_SOT23-3
1 1 1
1
CB1
CB2
S
3
1
0_0402_5%
CB3 RB26
RB2
0.1U_0201_10V6K 10K_0402_5%
+3VLP_EC 2 2 RB3 @ 2
0_0402_5%
2
@ ECAGND
2
1 2 EC_PME# ECAGND <35>
@
2
1 RB5 47K_0402_5% +3VCC_LPC 1
EC_PME# PU +3V_LAN at LAN side
111
125
22
33
96
67
9
+3VLP_EC UB1
VCC0
VCC_LPC
VCC
VCC
VCC
VCC
AVCC
RB13 1 2 2.2K_0402_5% EC_SMB_CK1
RB14 1 2 2.2K_0402_5% EC_SMB_DA1
ESPI Bus Pin : 1~5.7.8.10.12.14
LPC Bus Pin : 3~5.7.8.10.12.13 SUSPWRDNACK 1 21 EC_VCCST_PG_R
<11> SUSPWRDNACK USB_CEN 2 GATEA20/GPIO00 EC_VCCST_PG/GPIO0F 23 BEEP# EC_VCCST_PG_R <11,33>
<29> USB_CEN TPM_SERIRQ 3 KBRST#/GPIO01 BEEP#/GPIO10 26 FAN_PWM1 BEEP# <25>
<9,31> TPM_SERIRQ LPC_FRAME# 4 SERIRQ EC_FAN_PWM/GPIO12 27 USB_CB FAN_PWM1 <32>
<9,31> LPC_FRAME# LPC_AD3_R LPC_FRAME# PWM Output AC_OFF/GPIO13 USB_CB <29>
For turn off internal LPC module of KB9032 5
<9,31> LPC_AD3_R LPC_AD2_R 7 LPC_AD3
<9,31> LPC_AD2_R LPC_AD1_R 8 LPC_AD2 63 BATT_TEMP
ESPI@
1 2 ESPI_RST# <9,31> LPC_AD1_R LPC_AD0_R 10 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 64 VCIN1_BATT_DROP BATT_TEMP <35> +3VLP_EC
<9,31> LPC_AD0_R LPC_AD0LPC & MISC VCIN1_BATT_DROP/AD1/GPIO39 ADP_I VCIN1_BATT_DROP <35>
RB8 47K_0402_5% 65
CLK_LPC_EC 12 ADP_I/AD2/GPIO3A 66 AD_BID ADP_I <35,36>
<9> CLK_LPC_EC PLT_RST# CLK_PCI_EC AD Input AD_BID/AD3/GPIO3B WLAN_PME# LID_SW#
ESPI@ 13 75 RB15 1 2 100K_0402_1%
1 2 PLT_RST# <11,27,31> PLT_RST# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 EC_PME# WLAN_PME# <24>
<32> EC_RST# EC_SCI# 20 EC_RST# AD5/GPIO43 EC_PME# <23>
RB9 47K_0402_5% Combine w/ SMI
<7> EC_SCI# WLAN_ON 38 EC_SCI#/GPIO0E
1 2 <24> WLAN_ON CLKRUN#/GPIO1D
CB5 @ESD@ 100P_0402_50V8J 68 LAN_PWR_EN
<31> KSI[0..7] DA0/GPIO3C 70 EC_TP_INT# LAN_PWR_EN <23>
DA Output EN_DFAN1/DA1/GPIO3D VR_PWRGD EC_TP_INT# <7,31>
KSI0 55 71
KSI1 56 KSI0/GPIO30 DA2/GPIO3E 72 KBL_EN VR_PWRGD <41>
1 2 AC_IN 57 KSI1/GPIO31 DA3/GPIO3F KBL_EN <31>
KSI2
CB6 100P_0402_50V8J KSI3 58 KSI2/GPIO32 83 EC_MUTE#
KSI4 59 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A 84 USB_EN EC_MUTE# <25>
KSI5 60 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B 85 EC_TYPEC_EN USB_EN <29>
@EMI@ @EMI@
2 2 1 2 1 CLK_LPC_EC KSI6 61 KSI5/GPIO35 PSCLK2/GPIO4C 86 USB_CHARGE_2A EC_TYPEC_EN <28> 2
KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D TP_CLK USB_CHARGE_2A <29> SYS_PWROK_R
CB7 RB10 33_0402_5% KSI7 62 87 1 @ 2 SYS_PWROK <11,33>
<31> KSO[0..17] KSO0 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK <31>
22P_0402_50V8J RB11 0_0402_5%
40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <31>PU at PTP side
KSO1
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 ENBKL
43 KSO3/GPIO23 ENKBL/GPXIOA00 98 TP_PWR_EN ENBKL <7>
KSO4
44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 ME_EN TP_PWR_EN <31>
KSO5
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH ME_EN <10>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH <35>
DB1
For Thermal Portect Shutdown
KSO8 47 KSO7/GPIO27 RB751V-40_SOD323-2
KSO8/GPIO28 SPI Device Interface 3V_EN
KSO9 48 119 MAINPWON 1 2
49 KSO9/GPIO29 MISO/GPIO5B 120 BT_ON 3V_EN <37>
KSO10
KSO11 50 KSO10/GPIO2A MOSI/GPIO5C 126 EC_CLR_CMOS BT_ON <24>
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 FP_PWR_EN 3V_EN_R
KSO12 51 128 1 2 RB17 1 2
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A FP_PWR_EN <31>
RB16 1M_0402_5%
KSO14 53 KSO13/GPIO2D 1K_0402_5%
KSO15 54 KSO14/GPIO2E 73
KSO16 81 KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 74 SYS_PWROK_R
KSO17 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89 BATT_4S
KSO17/GPIO49 GPIO50 90 BATT_BLUE_LED# BATT_4S <36>
BATT_CHG_LED#/GPIO52 91 BATT_BLUE_LED# <29>
EC_SMB_CK1 77 CAPS_LED#/GPIO53 92 PWR_LED#
<35,36> EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CLK1/GPIO44 GPIO PWR_LED#/GPIO54 BATT_AMB_LED# PWR_LED# <29>
78 93
<35,36> EC_SMB_DA1 SOC_SML1CLK 79 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 95 SYSON BATT_AMB_LED# <29>
<9> SOC_SML1CLK SOC_SML1DATA 80 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 121 VR_ON SYSON <14,33,38>
PU at CPU side <9> SOC_SML1DATA EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 127 USB_SELCDP VR_ON <33,41>
DPWROK_EC/GPIO59 USB_SELCDP <29>
SM Bus
PM_SLP_S3# EC_RSMRST#
Need Check EC PIN
6 100
<11,33> PM_SLP_S3# ESPI_RST# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_RSMRST# <11>
<9> ESPI_RST# SPOK_3V_5V 15 GPIO07 GPXIOA04 102 VCIN1_ADP_PROCHOT
3 <37,40> SPOK_3V_5V TP_EN 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103 VCOUT1_PROCHOT# VCIN1_ADP_PROCHOT <35> 3
<31> TP_EN TS_EN 17 GPIO0A VCOUT1_PROCHOT#/GPXIOA06 104 MAINPWON
<12,21> TS_EN WL_OFF# 18 GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 105 BKOFF# MAINPWON <32,35,37>
<24> WL_OFF# AC_PRESENT 19 GPIO0C BKOFF#/GPXIOA08 106 LAN_GPO BKOFF# <21>
<11> AC_PRESENT AC_PRESENT/GPIO0D GPIO GPO GPXIOA09 3V_EN_R LAN_GPO <23>
25 107
For abnormal shutdown FAN_SPEED1 28 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 108 PM_SLP_S0#
<32> FAN_SPEED1 TYPEC_3A_1P5A# 29 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 PM_SLP_S0# <11>
<28> TYPEC_3A_1P5A# E51TXD_P80DATA 30 FANFB1/GPIO15
DB2 T85 @
<24> E51TXD_P80DATA E51RXD_P80CLK 31 EC_TX/GPIO16 110 AC_IN
RB751V-40_SOD323-2
SPOK_3V_5V 1 2 EC_RSMRST# <24> E51RXD_P80CLK PCH_PWROK 32 EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 112 EC_ON AC_IN <36>
<11,33> PCH_PWROK PWR_SUSP_LED# 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 ON/OFFBTN# EC_ON <37>
<29> PWR_SUSP_LED# 36 SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 115 LID_SW# ON/OFFBTN# <31>
DB3 GPI
NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 SUSP# LID_SW# <31>
RB751V-40_SOD323-2
1 2 PCH_PWROK SUSP#/GPXIOD05 117 SUSP# <14,33,36,38,40>
GPXIOD06 118 H_PECI_R 1 2
PBTN_OUT# PECI/GPXIOD07 H_PECI <7>
122 RB19 43_0402_1%
<11> PBTN_OUT# PM_SLP_S4# 123 PBTN_OUT#/GPIO5D 124
DB4 +3VLP_EC
<11,33> PM_SLP_S4# PM_SLP_S4#/GPIO5E V18R/VCC_IO2
RB751V-40_SOD323-2
EC_VCCST_PG_R
AGND
1 2
GND
GND
GND
GND
GND
KB9022QD_LQFP128_14X14
11
24
35
94
113
ECAGND 69
Board ID RB4 DVT@

20mil
+3VLP_EC
CO-LAY with KB9032QA (SA000080J00) 1 2 BATT_TEMP
12K_0402_5% RB4 EA17PVT@ CB8
SD028120280 27K_0402_1% 100P_0402_50V8J
SD034270280 LB2 2 1
2
RB4 PVT@ FBMA-L11-160808-800LMT_0603

RB1 15K_0402_1% PN:SM01000K500
Ra 100K_0402_1% SD034150280
RB4 EA17MP@
RB4 MP@ 33K_0402_1%
1
4 AD_BID 20K_0402_1% SD034330280 RB20 1 @ 2 0_0402_5% VR_HOT# 4

VR_HOT# <41>
SD034200280
1
1 H_PROCHOT#
RB4 RB21 1 @ 2 0_0402_5% VCOUT1_PROCHOT#
<7> H_PROCHOT#
Rb 0_0402_5% CB4
EVT@ 0.1U_0201_10V6K
2 @
2

Analog Board ID definition, EC ENE KB9022
Please see page 3. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
A B C D E
A B C D E
KB Conn. TP/B Conn.

ON/OFF BTN 30
GND2
JKB1
+3V_PTP
RK1 29 +3VS RK3
100K_0402_5% 28 GND1 +3VALW 0_0402_5%
2 1 ON/OFFBTN# 27 28 2 @ 1
+3VLP 27
KSO0 26
KSO1 25 26
ON/OFFBTN# KSO2 24 25 UK1 +3V_PTP
<30> ON/OFFBTN# 24 +3V_PTP
KSO3 23 5 1
KSO4 22 23 IN OUT @ CK2
22 1
1 KSO5 21 2 0.1U_0201_10V6K 1
21 GND
2
KSO6 20 CK1 2 1 JTP1
KSO7 19 20 4 3 1
19 EN OC 4.7U_0402_6.3V6M 1
4 3 KSO8 18 2 RK4 TP_CLK 2
18 2 TP_DATA 2
Test Only KSO9 17 SY6288C20AAC_SOT23-5 10K_0402_5% 3
SWK1 EVT@ KSO10 16 17 CK3
EC PS2 4 3
1
SKRPABE010_4P KSO11 15 16 1U_0402_6.3V6K EC_TP_INT# I2C_1_SDA_R 5 4
TOP 2 1 KSO12 14 15 1 I2C_1_SCL_R 6 5
KSO13 13 14 TP_PWR_EN <30> PCH I2C EC_TP_INT# 7 6
12 13 <7,30> EC_TP_INT# TP_EN 8 7
KSO14 <30> TP_EN
KSO15 11 12 9 8
KSO16 10 11 TP_PWR_EN follow SYSON behavior 10 GND
KSO17 9 10 GND
KSI0 8 9 ACES_51524-00801-001
KSI1 7 8 CONN@
KSI[0..7] KSI2 6 7
KSI[0..7] <30> KSI3 5 6 SP01001A910
KSO[0..17] KSI4 4 5 +3V_PTP +3V_PTP
KSO[0..17] <30> 3 4 +3V_PTP
KSI5
KSI6 2 3
KSI7 1 2
1
1
RK7 RK10
1
2.2K_0402_5% 2.2K_0402_5%
G
KB BackLight
ACES_85201-2805 QK1B RK5 RK6
CONN@ 2N7002KDW_SOT363-6 4.7K_0402_5% 4.7K_0402_5%
SP01000GO00
2
3 4 I2C_1_SCL_R
2
+5VS <12> I2C_1_SCL
JBL1
D
U1 1
5 1 +5VS_BL 2 1 1 2 TP_CLK
IN OUT 3 2 <30> TP_CLK TP_DATA
RK8 @ 0_0402_5%
3 <30> TP_DATA
2
2 4
G
2 GND 4 2
4 3 5 QK1A
<30> KBL_EN EN OC GND
6 2N7002KDW_SOT363-6
SY6288C20AAC_SOT23-5 GND 6 1 I2C_1_SDA_R
S
<12> I2C_1_SDA
ACES_51524-0040N-001
D
1 CONN@
1 @ 2
C3 SP010022M00 RK9 0_0402_5%
0.1U_0201_10V6K
2
Lid Switch
TPM Finger Print
(Hall Effect Switch)
Power Souce Check
EGIS ETU801 +FP_VCC=5V +3VLP
+3VALW RW1 +3VALW_TPM +3VS RW2 +3VS_TPM

ELAN SA464K-2200 +FP_VCC=3.3V +FP_VCC JLID1
0_0603_5% 0_0603_5% 1
1 @ 2 1 @ 2 RK16 1 FP@ 2 0_0603_5% UK6 2 1
+3VALW <30> LID_SW# 2
+5VALW RK17 1 @ 2 0_0603_5% 5 1 3
IN OUT 3
10U_0603_6.3V6M
0.1U_0201_10V6K
CW2 TPM@
10U_0603_6.3V6M
0.1U_0201_10V6K
CW4 TPM@
0.1U_0201_10V6K
CW5 TPM@
0.1U_0201_10V6K
CW6 TPM@
1 1 1 1 1 1 1 4
4
CW1
CW3
2 FP@
GND CK12 5
4 3 6 GND
2 TPM@ 2 near pin5 2 TPM@ 2 2 2 EN OC 2
4.7U_0402_6.3V6M GND
3
2 3
FP@ SY6288C20AAC_SOT23-5 ACES_51524-0040N-001
CK11 FP@ CONN@
1U_0402_6.3V6K
1
FP_PWR_EN <30>
SP010022M00
near pin10, 19, 24
+FP_VCC
JFP1
10
BADD SELECTION 9 GND
GND PIN ETU801 SA464K-2200
* 1 AEh(write), AFh(read) LK2 @EMI@ 8
UW1 TPM@ USB20_N8 3 4 USB20_N8_L USB20_P8_L 7 8 1 +FP_VCC(5V) +FP_VCC(3V)
<13> USB20_N8 USB20_N8_L 7
1 6
29 VSB +3VALW_TPM
5 6 2 USBP D+
30 XOR_OUT/SDA/GPIO0 8 USB20_P8 2 1 USB20_P8_L 4 5
3 SCL/GPIO1 VDD1 14
+3VS_TPM <13> USB20_P8
3 4 3 USBN D-
10K_0402_5%1 @ 2 RW3 TPM_BADD 6 GPX/GPIO2 VDD2 22 MCM1012B900F06BP_4P 2 3
GPIO3/BADD VDD3 SM070003Z00 1 2 4 GND GND
LPC_AD0_R 24 2 1
<9,30> LPC_AD0_R LPC_AD1_R 21 LAD0/MISO NC1 7 DK2 @ESD@ JXT_FP201H-008G10M 5 NC NC
<9,30> LPC_AD1_R LPC_AD2_R 18 LAD1/MOSI NC2 10 6 3 USB20_N8_L CONN@
<9,30> LPC_AD2_R LPC_AD3_R 15 LAD2/SPI_IRQ# NC3 11 I/O4 I/O2 SP010020S00 6 NC NC
<9,30> LPC_AD3_R LAD3 NC4 25
CLK_LPC_TPM 19 NC5 26 7 NC
<9> CLK_LPC_TPM LPC_FRAME# 20 LCLK/SCLK NC6 31 5 2
<9,30> LPC_FRAME# PLT_RST# 17 LFRAME#/SCS# NC7 +FP_VCC VDD GND 8 NC
<11,27,30> PLT_RST# TPM_SERIRQ 27 LRESET#/SPI_RST#/SRESET# 9
<9,30> TPM_SERIRQ PM_CLKRUN# 13 SERIRQ GND1 16
<9> PM_CLKRUN# 28 CLKRUN#/GPIO4/SINT# GND2 23 4 1 USB20_P8_L
4 LPCPD# GND3 32 I/O3 I/O1 4
SERIRQ PH 10K to +3VS at PCH side 4 GND4 33 AZC099-04S.R7G_SOT23-6
5 PP PGND 12
CLKRUN PH 10K to +3VS at PCH side TEST Reserved
LPCPD# had internal PH NPCT650ABBYX_QFN32_5X5

SA00008ELC0
SA00008EL40, S IC NPCT650AB1YX QFN 32P TPM1.2
SA00008ELB0, S IC NPCT650AB2YX QFN 32P TPM1.2 FW 5.81.2.1 Security Classification Compal Secret Data Compal Electronics, Inc.
SA00008ELC0, S IC NPCT650ABBYX QFN 32P TPM2.0 FW 1.3.1.0 Issued Date 2016/11/04 Deciphered Date 2018/11/04 Title
CLK_LPC_TPM RW4 1 2 33_0402_5% CW7 1 2 22P_0402_50V8J
KB & TP & TPM & LID & FP
@EMI@ @EMI@ DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1A
A B C D E
A B C D E
FAN1 Conn Screw Hole

+5VS
40mil
RF1 1 @ 2 0_0603_5% +VCC_FAN1 H3 H4 H10 H34 H5 H6 H32
1 2 H_3P0 H_3P0 H_3P0 H_3P0 H_4P0 H_4P0 H_4P0
1 FD1 FD2 1
@EMI@ CF2 CF1
1000P_0402_50V7K 4.7U_0402_6.3V6M
1
2 1 @ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ @ @ @ @ @ @
FD3 FD4
H13 H14 H15 H28 H29 H30 H33
H_3P8 H_3P8 H_3P8 H_3P8 H_3P2 H_3P2 H_2P5
@ @
1
+3VS FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
1
@
RF2 @ @ @ @ @ @
DVT
10K_0402_5%
40mil
JFAN1
2
+VCC_FAN1 1
FAN_SPEED1 2 1
<30> FAN_SPEED1 FAN_PWM1 3 2
<30> FAN_PWM1 4 3
1 H23 H35 H25
5 4 H_2P7X2P0N H_2P7X2P0N H_2P0N
6 G1
CF3 G2
2 1000P_0402_50V7K ACES_50278-00401-001 @ @ @
1
@EMI@ CONN@
SP02000RR00
2 2
Reset Circuit
+3VLP
RG1 1 @ 2 0_0402_5%
MAINPWON <30,35,37>
2
RG3 RG2 1 @ 2 0_0402_5%
EC_RST# <30>
10K_0402_5%
6
D
BI_GATE# 2
G 2N7002KDW_SOT363-6
BI_GATE PH to +RTCVCC at PWR side QG1A
3
D S
1
1
BI_GATE 5
3 <35> BI_GATE G C70 3
QG1B 0.1U_0201_10V6K
2N7002KDW_SOT363-6 S 2
4
BI SW
Reset Button
3 SWG1 1
SWG2 BI_S <35>

BI_GATE 1 2 BI_GATE 4 2
ATE-2-V-TR_4P
3 4 H : 3.8mm
SKRPABE010_4P Release : Battery Off
Push : Battery ON
4 4

FAN & Screw Hole & Reset
A B C D E
A B C D E
DC Interface For Power ON/Off Sequence PM_SLP_S3

CQ5
.1U_0402_16V7K +3VALW
2
1 2
G
1
Q1A
UQ1 R24 2N7002KDW_SOT363-6
1 14 @ JPQ2 100K_0402_5%
+5VALW VIN1 VOUT1 +5VS_OUT1
2 13 2 1 6
S
VIN1 VOUT1 1 2 +5VS EC_VCCST_PG_R <11,30>
D
2
RQ2 2 @ 1 0_0402_5% 5VS_ON 3 12 1 2 JUMP_43X118 MOW14, For tCPU28 200us(max)
ON1 CT1 CQ1 1000P_0402_50V7K SLP_S3# to VCCST_PWRGD deassertion
5
1 2 @ CQ4 4 11
G
1 +5VALW VBIAS GND 1
.1U_0402_16V7K
SUSP# 1 @ 2 3VS_ON 5 10 1 2 1000P_0402_50V7K Q1B
RQ1 0_0402_5% ON2 CT2 CQ3 @ JPQ1 Q2A 2N7002KDW_SOT363-6
6 9 +3VS_OUT
1 2 2N7002KDW_SOT363-6 4 3
S
+3VALW VIN2 VOUT2 1 2 +3VS VR_ON <30,41>
D
1 2 @ CQ2 7 8 D
.1U_0402_16V7K VIN2 VOUT2 JUMP_43X118 2
<11,30> PM_SLP_S3# MOW14, For tPLT17 200us(max)
15 G SLP_S3# to IMVP VR_ON deassertion
GPAD
5
1 2
G
EM5209VF_DFN14_2X3 S
1
CQ6 Q2B
.1U_0402_16V7K 2N7002KDW_SOT363-6
4 3 SUSP#
D
MOW14, For tPLT18 200us(max)
SLP_S3# to VCCIO VR disable
2
G
Q3A @
+5VALW +0.6VS_VTT +1.2V_VDDQ +5VALW 2N7002KDW_SOT363-6
+2.5V 1 6
S
SYS_PWROK <11,30>
2
D
2
R25 R26 R27 R28
2
100K_0402_5% @ @ 470_0603_5% 470_0603_5% 100K_0402_5%
5
R31 @ @
G
470_0603_5% +3VALW Q3B @
+0.6VS_VTT_R
1
1
SUSP @ 2N7002KDW_SOT363-6
1
1
1
Q4A @ Q4B @ +1.2V_VDDQ_R SYSON# 4 3
S
PCH_PWROK <11,30>
D
2N7002KDW_SOT363-6 2N7002KDW_SOT363-6 R29
6
D D Q5A @ Q5B @ 100K_0402_5%
1
D
2 5 SUSP 2N7002KDW_SOT363-6 2N7002KDW_SOT363-6
<14,30,36,38,40> SUSP#
3
G G SYSON# 2 D D
2
2 G SYSON# 2 5 SYSON Q6A PM_SLP_S4 2
SYSON <14,30,38>
1
S S Q7 S G G 2N7002KDW_SOT363-6
1
5
R30 L2N7002LT1G_SOT23-3 D
G
10K_0402_5% @ S S 2 Q6B
4
<11,30> PM_SLP_S4# G
@ 2N7002KDW_SOT363-6
2
S 4 3 SYSON
S
1
D
MOW14, For tPLT15 200us(max)
SLP_S4# to VDDQ ramp down
3 3
4 4

DC Interface
A B C D E
A B C D E
1 1
EMI 90W@ PL102
HCB2012KF-121T50_0805
1 2
+19V_ADPIN HCB2012KF-121T50_0805
EMI@ PL101
+19V_VIN
1 2
@ PJP101
ACES_50305-00441-001_4P
1
1
1
EMI@ PC102 EMI@ PC104
2
1
100P_0603_50V8 1000P_0603_50V7K
2
3 EMI@ PC105
2
4 1000P_0603_50V7K
2
GND
GND
2 2
@ PR101
0_0402_5%
1 2
+3VLP +CHGRTC
3 3
4 4
2015/10/02
Compal Secret Data
2016/11/10 Title
PWR DCIN / Pre-charge
Custom 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1S M/B LA-D671P
A B C D E
A B C D E
2013/07/23
change PC5 and PC6 function field from 37.1 to 47.1
schematic from A4WAS
+3VLP
1 1
1
@ PC205
1
PR207 100_0402_1% 0.1U_0603_25V7K
MB:Battery Con Put TOP Side
2
1 2
EC_SMB_DA1 <30,36>
PR205 100_0402_1% @ PR215 @ PR214
1 2 10K_0402_1% 10K_0402_1%
EC_SMB_CK1 <30,36> <45,47>
2
1
@ PU201
Battery Bot Side PR202 @ PR213 1 8
200K_0402_1% 100K_0402_1% VCC TMSNS1
1 2 2 7 2 1
PIN1 GND @ PJP201 +3VLP GND RHYST1
2
PIN2 GND 1 2
1
<30,32,37> MAINPWON
MAINPWON 3
OT1 TMSNS2
6 @ PR216
1
1 2 47K_0402_1%
PIN3 SMD 2 3
3 4
EC_SMB_DA1-1
EC_SMB_CK1-1
BATT_TEMP <30> 4
OT2 RHYST2
5
PR203 1K_0402_1% @ PH202
PIN4 SMC 4 5 BATT_TS G718TM1U_SOT23-8 100K_0402_1%_NCP15WF104F03RC
5 6
PIN5 TEMP BATT_B/I
2
6 7
PIN6 BI 7 8
8 9 +RTCVCC
PIN7 Batt+ GND 10
PIN8 Batt+ GND
2016/11/16 update
CVILU_CI9908M2HR0-NH
1
PR212 For KB9022
100K_0402_5%
PQ201 Change to SB00000QO00, sense 20mΩ Active Recovery
SB501380010(BSS138LT1G Del)
2
2 2
1
D
<32> BI_GATE 2 PQ201 45W PR206 58.5W,0.61V Active=recovery
+17.4V_BATT+
G
S
LBSS139LT1G 1N SOT-23-3 10K ohm
3
EMI@ PL201 BI_S <32>
2
HCB2012KF-121T50_0805
change PL201, PL202 1 2 @ PR217 65W PR206 84.5W,0.61V Active=recovery
+17.4V_BATT
SM01000C000 to comm EMI@ PL202
0_0402_1% 19.1K ohm
HCB2012KF-121T50_0805
part SM01000P200
1
1 2
90W PR206 117W,0.61V Active=recovery
30.1K ohm
1
EMI@ PC201 EMI@ PC202

1000P_0402_50V7K 0.01U_0402_25V7K
PH1 2V 1V
2
2013/06/07 PH1 under CPU botten side :

Add for ENE9022 Battery Voltage drop detection. CPU thermal protection at 89 +-3 degree C
Connect to ENE9022 pin64 AD1. Recovery at 56 +-3 degree C
3 +3VLP_ECA 3
ADP_I <30,36>
+19VB_5V
VAL50/ZAL20 Battery is 3-cell NVDC design.
1
B+=9V PR204
Change PR12=50k if Battery is 2-cell NVDC design 16.9K_0402_1%
1
65W@ PR206
B+=6V PR209 19.1K_0402_1%
2
750K_0402_1% VCIN0_PH <30>
45W@
PR206
2
@ PR210 10K_0402_1%
0_0402_5%
1
1
1 2
VCIN1_BATT_DROP <30> PC203 must close to EC pin
2
PH201
VCIN1_ADP_PROCHOT <30>
@ PC203
100K_0402_1%_NCP15WF104F03RC 0.1U_0402_25V6
1
1
1
2
2
PC204 PR211 PR208

0.1U_0402_25V6 150K_0402_1%
T202 T201 must close to PH201
T202@ 10K_0402_1%
1
2
T201@
ECAGND <30>
4 4
2015/10/02
Compal Secret Data
2016/11/10 Title
PWR-BATTERY CONN/OTP
Custom 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1S M/B LA-D671P
A B C D E
A B C D
Protection for reverse input

Need check the SOA for inrush
schematic from module
Vgs = 20V
1
PQ301 D
2
Vds = 60V +19VB
G Id = 250mA
S 2N7002KW _SOT323-3
3
PR302
PR301
1 2 1 2
1M_0402_5% 3M_0402_5%
1 1
+19V_VIN PQ302 PQ303

AON6366E_DFN5X6-8-5 +19V_P1 AON7506_DFN33-8-5 +19V_P2 PQ304
1 1 PR303 @ PJ301 +19VB_CHG AON7506_DFN33-8-5
2 2 0.02_1206_1% JUMP_43X79 1
5 3 3 5 1 4 1 2 2
1 2 5 3
2200P_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
2 3
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
4
EMI@ PC306
1
1
PC303
PC304
EMI@ PC305
0_0402_5%
0.01U_0402_50V7K
PC301
@ PR304
4
1
1
+19V_VIN
PC302
PC307
2
2
2
VF = 0.5V
2
2
3
2
PD301
BQ24725A_ACDRV_1
BAS40CW _SOT323-3
0.1U_0402_25V6
BQ24725A_BATDRV 1 2BQ24725A_BATDRV_1
0.1U_0402_25V6
Rds(on) = 30mohm max
1
1
PC308
PR305
PC310
Vgs = 20V
1 1
1 2
10_1206_1%
PC311 4.12K_0603_1%
0.047U_0402_25V7K Vds = 30V
PR306
2
PC309 1 2 ID = 7A (Ta=70C)
0.1U_0402_25V6 VF = 0.37V PQ305
5
AON7506_DFN33-8-5
2.2_0603_5%
PR307
PD302
BQ24725A_VCC2
RB751V-40_SOD323-2 Support max charge 3.5A
@ PR308 5*5*3
BQ24725A_ACP
0_0603_5%
Power loss: 0.245W
BQ24725A_REGN
BQ24725A_BST2
2
DH_CHG 1 2 4 CSR rating: 1W
BQ24725A_LX
VSRP-VSRN spec < 81.28mV
4.12K_0603_1%
4.12K_0603_1%
2 2
1
PC312 PL302 +17.4V_BATT

PR309
PR310
DH_CHG
1 2 4.7UH_5.5A_20%_7X7X3_M
1 2 PR311
3
2
1
1U_0603_25V6K 0.01_1206_1%
BQ24725A_ACN
PC313 BQ24725A_LX 1 2 CHG1 4
2
1U_0603_25V6K
5
2 3
20
19
18
17
16
PQ306
PU301
AON7506_DFN33-8-5
CSON1
CSOP1
1
4.7_1206_5%
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
@EMI@
PR312
21
PAD
0.1U_0402_25V6
0.1U_0402_25V6
PC314
PC315
PC324
1
1
1 15 DL_CHG 4
ACN LODRV
PC316
PC317
2
2
2 14
680P_0402_50V7K
ACP GND PR313
3
2
1
2
1
@EMI@
BQ24735RGRR_QFN20_3P5X3P5 10_0603_1%
PC318
BQ24725A_CMSRC 3 13 SRP1 2 CSOP1
CMSRC SRP
1
PR314
2
6.8_0603_1%
BQ24725A_ACDRV 4 12 SRN1 2 CSON1
2
ACDRV SRN PC319
0.1U_0603_16V7K
1 2 5 11 BQ24725A_BATDRV
+3VLP ACOK BATDRV
PR315 100K_0402_1%
ACDET
IOUT
SDA
SCL
ILIM
+3VLP
<30> AC_IN
6
10
3 3
BQ24725A_ACDET
For 4S per cell 4.35V battery

BQ24725A_IOUT
BQ24725A_ILIM 1 2
PR324
BQ24725A_ACDET
100K_0402_1%
PR318 316K_0402_1%
0.01U_0402_25V7K
1
422K_0402_1%
PC320
PR317
1
1 2
+19V_VIN
1
2
PR321
2
2M_0402_1%
2
1
2200P_0402_50V7K
66.5K_0402_1%
PR322 @
EC_SMB_CK1 <30,35>
0_0402_5%
100P_0402_50V8J
1
1
PC321
1
PC322
PR319
1 2
EC_SMB_DA1 <30,35>
2
PQ307 U22@ PR320

2
PR323 LTC015EUBFS8TL_UMT3F 0_0402_5%

100K_0402_1% 1 2
1 2 2 ADP_I <30,35>
<30> BATT_4S
1
U42@ PR320
499_0402_1% PC323 @U22@
100P_0402_50V8J U42@ PC323
3
2
1
PQ308 D 2.2U_0402_6.3V6M
4
2 Close EC chip 4
<14,30,33,38,40> SUSP# G Vin Dectector

S 2N7002KW _SOT323-3 Min. Typ Max.
3
L-->H 17.16V 17.63V 18.12V

H-->L 16.76V 17.22V 17.70V
VILIM = 20*ILIM*Rsr Issued Date 2015/10/02 Deciphered Date 2014/05/24 Title
ILIM = 3.3*100/(100+316)/20/0.01
= 3.966 A THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Common Circuit 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D
A B C D E
H/S Rds(on):typ:12.4mOhm, max:15.8mOhm

Module model information Idsm(TA=25)=13A, Idsm(TA=70)=7.8A
Ploss=0.42W
RT6575D_DMOS_single_V1.mdd
RT6575D_DMOS_dual_V1.mdd L/S Rds(on):typ:9.1mOhm, max:11.6mOhm
Idsm(TA=25)=15A, Idsm(TA=70)=9A
Ploss=0.14W
CHOKE:4.7uH, DCR 35mOhm

1
Ploss=1.77W 1
+3VLP
PC401
1U_0603_10V6K
1 2
Output capacitor ESR need follow

@ PC402 @ PC403
100P_0402_50V8J 100P_0402_50V8J
below equation to make sure feed back
1 2 1 2 loop stability
ESR=20mV*L*fsw/2V
PR402 PR401
13.3K_0402_1% 31.6K_0402_1%
1 2 1 2
VFB=2V VFB=2V
PR403 PR404
20K_0402_1% 20K_0402_1% +19VB_5V
1 2 1 2 +19VB @ PJ401
JUMP_43X79
1 2
1 2
PR405 PR406
71.5K_0402_1% 105K_0402_1%
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
2 2
0.1U_0402_25V6
@ PJ402 1 2 1 2
+19VB JUMP_43X79
1
+19VB_3V
EMI@ PC404
EMI@ PC405
PC406
PC422
1 2
1 2
CS2_3V
CS1_5V
+3VLP
FB_3V
FB_5V
POK need pull high, it
2
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
will pull high on VS

1
transfer circuit
EMI@ PC407
EMI@ PC408
PC409
PC421
PU401
2
PR407
21
5
1
20K_0402_1% RT6575DGQW(2)_WQFN20_3X3
2
CS2
FB2
LDO3
FB1
CS1
GND
1
PQ402 6 20 5V_EN PQ401
<30> 3V_EN EN2 EN1
AON7934_DFN3X3A8-10 AON7934_DFN3X3A8-10
7 19
<30,40> SPOK_3V_5V PGOOD VCLK
4
4
LX_3V 8 18 LX_5V
D1
D1
D1
G1
G1
D1
D1
D1
PL402 PR408 PHASE2 PHASE1 PR409 PL401
3.3UH_6.3A_20%_7X7X3_M 2.2_0603_5% 2.2_0603_5% 3.3UH_PCMB103T-3R3MS_9A_20%
2 1 LX_3V 10 9 1 2 BST_3V_R 1 2 BST_3V 9 17 BST_5V 1 2 BST_5V_R 1 2 9 10 LX_5V 2 1 +5VALWP
+3VALWP D1 D2/S1 BOOT2 BOOT1 D2/S1 D1
PC410 0.1U_0603_25V7K PC411
0.1U_0603_25V7K
1
UG_3V UG_5V
4.7_1206_5%
680P_0603_50V8J 4.7_1206_5%
10 16
G2
G2
S2
S2
S2
S2
S2
S2
UGATE2 UGATE1
1
@EMI@ PR410
@EMI@ PR411
LGATE2
LGATE1
220U_6.3V_ESR18M_6.3X4.5
5
5
220U_6.3V_ESR18M_6.3X4.5
LDO5
BYP1
VIN
1 1
2
2
PC413
PC414
+ +
11
VIN_3/5V 12
13
14
15
680P_0603_50V8J
3 3
1
1
2 LG_3V LG_5V 2
@EMI@ PC416
@EMI@ PC417
PR412
2.2_1206_1% +5VALWP
2
2
+19VB 1 2
+5VLP
1U_0603_25V6K
1U_0603_10V6K
1
1
@ PC418
PC419
2
PR413 @ PJ403
2.2K_0402_5% +3VALWP 1 2 +3VALW
1 2 1 2
<30> EC_ON
@ PR414 JUMP_43X118
0_0402_5%
1 2
<30,32,35> MAINPWON
5V-OCP=13.5A
3V-OCP=8.9A
@ PJ404
4 5V_EN 1 2 4
+5VALWP 1 2 +5VALW
1M_0402_1%
4.7U_0402_6.3V6M
JUMP_43X118
1
1
PR415
PC420
2

2
PWR-3.3VALWP/5VALWP
Custom 1A
A B C D E
A B C D E

IC change RT8207K
Pin19 need pull separate from +1.35VP.

+19VB_1.2VP If you have +1.35V and +0.675V sequence question, 0.6Volt +/- 5%
@ PJ503 you can change from +1.35VP to +1.35VS. TDC 0.7A
1 JUMP_43X79 1
1 2 +19VB_1.2VP PR502 Peak Current 1A
+19VB 1 2 2.2_0603_5%
BST_1.2VP_R 1 2 BST_1.2VP
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
+1.2VP
1
EMI@ PC502
EMI@ PC503
PC504
PC505
UG_1.2VP +0.6VSP
2
PQ503
AON7408L_DFN8-5
LX_1.2VP
10U_0603_6.3V6M
10U_0603_6.3V6M
5
1
PC506
1
PC507
PC508
0.1U_0603_25V7K
16
17
18
19
20
2
2
VLDOIN
PHASE
UGATE
BOOT
VTT
4 21
PAD
LG_1.2VP 15 1
LGATE VTTGND
PL502
1
2
3
14 2
1UH_11A_20%_7X7X3_M PR503 PGND VTTSNS
16K_0402_1% PU501
1 2LX_1.2VP 1 2 CS_1.2VP 13 3
+1.2VP PC509 CS RT8207PGQW _W QFN20_3X3 GND
5
1U_0402_10V6K
1 2 12 4 VTTREF_1.2VP
@EMI@ PR504 PR505 VDDP VTTREF
2 4.7_1206_5% 5.1_0603_5% 2
1 2 VDD_1.2VP 11 5
1 2
+5VALW VDD VDDQ +1.2VP
1
PGOOD
4 PC516
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
TON
1
1
@EMI@ PC518 PC517 0.033U_0402_16V7K
PC510
PC511
PC512
PC513
PC514
PC515
FB
S5
S3
2
680P_0402_50V7K PQ502
2
2 AON7506_DFN3X3-8-5 1U_0402_10V6K PR511
1
2
3
10
6
2.2_0402_1%
FB_1.2VP
TON_1.2VP
EN_1.2VP
PR506
EN_0.6VSP
6.19K_0402_1%
+5VALW PR507 1 2 +1.2VP
470K_0402_1%
+19VB_1.2VP 1 2
1
@ PR501
0_0402_5%
Vout=0.75V* (1+Rup/Rdown)
<14,30,33> SYSON
1 2 PR508 =0.75*(1+(6.19/10))
10K_0402_1%
=1.21V
2
1
@ PC501
+5VALW 0.1U_0402_10V7K
2
+3VALW @ PR509
0_0402_5%
1 2
<14,30,33,36,40> SUSP#
@ PJ505
3 JUMP_43X39 @ PR510 @ PJ501 3
1
1 2 VIN_2.5V PC524 0_0402_5% JUMP_43X118

1 2
1
1 2 +1.2VP 1 2 +1.2V_VDDQ
1U_0402_6.3V6K <8> SM_PG_CTRL 1 2
2
2
1
PC521 @ PC519 @ PJ502
JUMP_43X39
4.7U_0402_6.3V6M 0.1U_0402_10V7K 1 2
+0.6VSP +0.6VS_VTT
2
1 2
PU502
G9661MF11U_SO8
@ PR515 4 5 MOSFET: 3x3 DFN
0_0402_5% 3 VPP NC 6
SYSON 1 2 EN_2.5V 2 VIN VO 7 +2.5VP H/S Rds(on): 27mohm(Typ), 32mohm(Max)
GND
1 VEN ADJ 8 Idsm: 7.5A@Ta=25C, 5.5A@Ta=70C

22U_0603_6.3V6M
0.01U_0402_25V7K
POK GND
1
0.1U_0402_16V7K
PR517
PC522
L/S Rds(on): 13mohm(Typ), 15.8mohm(Max)

9
1
PR516
PC520
PC523
21.5K_0402_1%
Rup Vout=0.8V* (1+(21.5/10)) = 2.52V 0.8%Idsm: 12A@Ta=25C, 10.5A@Ta=70C
2
1M_0402_5%
2
Choke: 7x7x3
2
@ FB_2.5V
Rdc=14mohm(Typ), 15mohm(Max)
Mode Level +0.6VSP VTTREF_1.2V
1
S5 L off off Switching Frequency: 538kHz

PR518 Ipeak=7.5A
S3 L off on
10K_0402_1%
Rdown S0 H on on Iocp=Ipeak*1.2A
OVP: 110%~120%
2
4 4
@ PJ504 VFB=0.75V, Vout=1.365V
JUMP_43X39 Note: S3 - sleep ; S5 - power off
1 2
MOSFET footprint: SIS412DN
+2.5VP 1 2 +2.5V
2015/10/02
Compal Secret Data
2016/11/10 Title
RT8207P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 LA-E891P
A B C D E
A B C D E
EN pin don't floating

If have pull down resistor at HW side, pls delete PR702
1 +19VB_1VALW @EMI@ PR605 @EMI@ PC602

1
4.7_1206_5% 680P_0603_50V7K @ PJ601

@ PJ602 1 2 SNUB_1VALW 1 2 JUMP_43X118
PU601 1 2
JUMP_43X79
+19VB_1VALW +1.0VALWP 1 2 +1.0VALW_PRIM
+19VB 2
2 1
1 2
IN PG
9 @ PR606
0_0603_5%
PC603
10U_0805_25V6K
0.1U_0402_25V6
3 1 BST_1VALW 1 2 BST_1VALW_R1 2 PL602
2200P_0402_50V7K
IN BS
1
1UH_6.6A_20%_5X5X3_M
EMI@ PC604
EMI@ PC605
PC606
LDO_3V LX_1VALW
4
IN LX
6
0.1U_0603_25V7K
1 2
+1.0VALWP
220U_B2_4VM_R35M
2
2
5 19 1
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
IN LX
13.7K_0402_1%
1
@ PR607 7 20 +
PR608
PC608
PC609
PC610
PC611
PC612
PC615
PC616
GND LX
0_0402_5% 8 14 FB_1VALW Rup
2
GND FB 2 @
2
2
ILMT_1VALW 18 17 LDO_3V
GND VCC
1
1
EN_1VALW 11 10
@ PR609 EN NC PC613 FB = 0.6V
1
ILMT_1VALW 13 12 2.2U_0402_6.3V6M
2
ILMT NC PR610
0_0402_5%
15 16
+3VALW Rdown
2
BYP NC 20K_0402_1%
21
Ipeak=9.5A
2
PAD Imax=6.65A
SY8288RAC_QFN20_3X3 Pin 7 BYP is for CS.
1
The current limit is set to 6A, 8A or 12A when this pin Common NB can delete +3VALW and PC15
PC614
is pull low, floating or pull high 1U_0402_6.3V6K
2
+3VALW =0.6*(1+(14/20))
Vout=1.02V
2 2
2
@ PR603
10K_0402_1%
1
@ PR602
0_0402_5%
EN_1VALW 1 2
+1.8VALW_PG <40>
1
@ PC601
PR601
0.22U_0402_10V6K
2
1M_0402_1%
2
3 3
4 4
2015/10/02
Compal Secret Data
2016/11/10 Title
VCCP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1A
A B C D E
A B C D E

IC change to G971
+5VALW
+3VALW
1U_0402_6.3V6K
2
PC701
@ PJ701
2
1 1
JUMP_43X39
2
PU701
1
VIN_1.8VALW G9661MF11U_SO8
1
4 5
VIN_1.8VALW 3 VPP NC 6
2 VIN VO 7 +1.8VALWP
GND
0.01U_0402_25V7K
VEN ADJ
1
PC702 1 8
1
POK GND PR702
PC704
4.7U_0402_6.3V6M 12.7K_0402_1%
Rup
2
2
1
FB_1.8VS PC705
22U_0603_6.3V6M
2
1
PR704
10K_0402_1%
1 2
<30,37> SPOK_3V_5V Rdown
2
@ PR701
1
0_0402_5%
PR703 @ PC703
1M_0402_1% 0.1U_0402_16V7K
2
2
+3VALW @ PJ702
JUMP_43X39
1 2
+1.8VALWP 1 2 +1.8VALW_PRIM
2
PR705
10K_0402_1%
Vout=0.8V* (1+(12.7/10)) = 1.816V
1
<39> +1.8VALW_PG
2 2
@ PJ703
JUMP_43X79
1 2
3 +5VS 1 2 3
@2s_battery_EMI@ @2s_battery_EMI@
PC711 PR710
680P_0603_50V7K 4.7_1206_5%
P-MOS 2 1 2 1
@2s_battery@ @2s_battery@
PQ701 PD701
AON7403L_DFN8-5 SS1P4-M3-84A_DO-220AA2
1 @2s_battery@ PL702
2 5 4.7UH_PCME051E-4R7MS_3A_20%
3 1 2 2 1 +12VSP 1 2
+5VALW SH00000OG00 +INVPWR_B+
10U_0805_25V6K
@2s_battery bead@ PL701

@2s_battery@ PC714
1
LX_12VSP 5A_Z120_25M_0805_2P
100P_0402_25V8K
1500P_0402_50V7K
4
1
1
@2s_battery@ PC713
PC716
1
1
@2s_battery@ PR711 @2s_battery@ @2s_battery@ PC715 @2s_battery@ PR712
2
100K_0402_1% PC712 10U_0805_25V6K 88.7K_0402_1%
PC717
PC719
PC718
PC720
PC721
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
2
0.022U_0402_25V7K
2
2
6
1
2 1
@2s_battery@
2
LX
LX
1
@2s_battery@
@2s_battery@
@2s_battery@
2
2
@2s_battery_EMI@
@2s_battery_EMI@
8 2FB_12VSP
@2s_battery@ PR713 Vin FB
10K_0402_1%
9 10 SS_12VSP 1 2
2
FREQ SS
@2s_battery@ PC722
1
1COMP_12VSP 0.01U_0402_16V7K
COMP
1
D EN_12VSP 3
@2s_battery@ PR714 @2s_battery@
1 2 2 PQ702 EN @2s_battery@
<14,30,33,36,38> SUSP#
1
G 2N7002KW_SOT323-3 PR715
Vout=1.24*(1+88.7/10)=12.2V
GND
GND
PAD
0_0402_5% @2s_battery@ 10K_0402_1%

S
3
2
1
@2s_battery@ PU703 PR716

@2s_battery@ RT9297GQW_WDFN10_3X3 10K_0402_1%
11
PC723 SA00004JV00
2
0.1U_0402_10V7K
4 4
1
@2s_battery@
PC724
4700P_0402_25V7K
2
2015/10/02
Compal Secret Data
2016/11/10 Title
SY8032
A B C D E
A B C D E
PC802
8200P_0402_25V7K PR802
COMP_1b 1 2 1
1.5K_0402_1%
2
1 2
PC804
15P_0402_50V8J
U42@ PC836
1
PR808 2200P_0402_50V7K
19.1K_0402_1%
2
1 1
PC803
1000P_0402_50V7K PR875
RDRPSP 1 2 10_0402_1%
1000P_0402_50V7K
PR803 100_0402_1% 1 2
U22@ PR808
24K_0402_1%
CSN_1b <42>
2
1 2 @ PR804 PR805
+VCC_SA
1
0_0402_5% 1.69K_0402_1%
PC806
1 2 VSPP_1b 1 2 VSP_1b PH802
<14> VCCSA_SENSE
0.01U_0402_25V7K
1
100K_0402_1%_NCP15WF104F03RC
1200P_0402_50V7K
1
PC805 PR807
2
1000P_0402_50V7K 1K_0402_1% place close to SA chock
1 2
2
1
1 2 VSNN_1b 1 2VSN_1b ILIM_1b
PC809
PC833
<14> VSSSA_SENSE
2
1 2 @ PR806 1 2 PR816
2
PR809 100_0402_1% 0_0402_5% PR811 PC807 12K_0402_1%
20K_0402_1% 2200P_0402_50V7K
1 2 @ PR812 1 2 PSYS U22@ PR819
+VCC_CORE
2
PR810 100_0402_1% 0_0402_5% 66.5K_0402_1% 2 1
VSP_2ph SW_1b <42> +3VS
Iout_1b
<16> VCCSENSE 1 2 U42@ 2 1 PR818
1
PR814 PC811 U42@ 7.5K_0603_1% PR821
@ PR813 PC808 U22@ PR814 1K_0402_1% 470P_0402_50V7K PR819 10K_0402_1%
0_0402_5% 1000P_0402_50V7K 806_0402_1% 1 2 53.6K_0402_1%
2
1 2 VSNN_2ph 1 2 VSN_2ph
<16> VSSSENSE VR_PWRGD <30>
1
1 2 KB_U42@ 1 2 1 2
PR815 PR817 PR822 PC810
VR_ON <30,33> +1.0V_VCCST
U22@ PR820
604_0402_1%
1
100_0402_1% 49.9_0402_1% 23.2K_0402_1% 3300P_0402_50V7-K @ PR863 close to the longer distance phase(81208 or 81210)
0_0402_5% PWM_1b_SA <42> Alert,Data,Clk.
PH803place close to IA chock PC812 SK_U22@
12
THERM_ 220K 5% 0402 470P_0402_50V7K PR822
110_0402_1%
100_0402_1%
45.3_0402_1%
0.1U_0402_16V7K
1 2 28.7K_0402_1% DRVON <42>
1
U42@
110_0402_1%
470P_0402_50V7K
2
1
PR820 PU801
KB_U22@ PR822
PC815
PR828
4.75K_0402_1%
26.1K_0402_1%
2
845_0402_1% PR829
PC813
2
2
PR874 PR830 NCP81218MNTXG_QFN48_6X6 7.5K_0603_1%
PR823
49
48
47
46
45
44
43
42
41
40
39
38
37
2
97.6K_0603_1% 165K_0402_1% PC814 PR834 @ 1 2 SWN_GT1 <42>
2
SW_1a 1 2 1 2 1 2 15P_0402_50V8J 49.9_0402_1% PR835
PR824
PR826
PR866
VSN_2ph
VSP_2ph
VSP_1b
VSN_1b
COMP_1b
ILIM_1b
CSN_1b
CSP_1b
IOUT_1b
EN
TAB
PSYS
VR_RDY
VR_HOT# <30>
1
1 2 12K_0402_1%
1
1 1
2 PR831 @ PR860 1 2 2
1000P_0402_50V7K
U42@ PR825 75K_0402_1% U42@ PR833 IOUT_2ph 1 36 0_0402_5% @ PC819
SOC_SVID_CLK <16>
8200P_0402_25V7K
2
0.022U_0402_25V7K
IOUT_2ph PWM_1b 35
1
1
97.6K_0603_1% 16.9K_0402_1% PC816 2 1 2 470P_0402_50V7K
PC818
2
SW_2a 1 2 2200P_0402_50V7K 3 DIFFOUT_2ph DRVON 34 SCLK 1 2
PC834
SOC_SVID_ALERT#_R <16>
1
PC817 U22@ PR833 4 FB_2ph SCLK 33 ALERT# PR862
2
2 COMP_2ph ALERT# 32
1
1000P_0402_50V7K @ 9.76K_0402_1%1 2 5 SDIO 110_0402_1%2 PR836 PH804
PC820
ILIM_2ph SDIO 31 SOC_SVID_DAT <16>
PR873 6 1 2 63.4K_0402_1% 100K_0402_1%_NCP15WF104F03RC
10_0402_1% 7 CSCOMP_2ph VR_HOT# 30 IOUT_1a PR869 100_0402_1% 2 1
2
1 2 8 CSSUM_2ph IOUT_1a 29 CSP_1a
<42> CSN_1a
2
9 CSREF_2ph CSP_1a 28 1 2
CSP2_2ph CSN_1a 27 ILIM_1a CSN_GT1 <42>
10 PR876
PC835
ROSC_COREGT
0.1U_0402_16V7K
0.22U_0402_16V7K
1 2 11 CSP1_2ph ILIM_1a 26 COMP_1a
ADDR_VBOOT
0.1U_0402_16V7K
1500P_0402_50V7K
TSENSE_2ph COMP_1a 25 10_0402_1%
1
TSENSE_1ph
RSOC_SAUS
ICCMAX_2ph
1 2 1 2 12
PC825
+19VB
100K_0402_1%_NCP15WF104F03RC
ICCMAX_1a
ICCMAX_1b
<42> CSN_2a
PWM1_2ph
PWM2_2ph
1
@ PR864 PR801 VRMP VSN_1a PC837
PC821
PC822
36.5K_0402_1%
1
PWM_1a
1
0_0402_5%
VSP_1a
U42@ PR872 1K_0402_1% PC824 2200P_0402_50V7K
U42@
2
1
10_0402_1% PC827 3300P_0402_50V7-K
PH801
PR842
61.9K_0402_1%
VCC
1 2
2
1000P_0402_50V7K 1 2 @ PR865 PR840 PC829
2
2
PC801 0_0402_5% 100_0402_1% 15P_0402_50V8J PC826
2
1 2 0.01U_0402_50V7K VSN_1a 1 2 1 2 2 1 1000P_0402_50V7K
<42> SW_1a
2
13
14
15
16
17
18
19
20
21
22
23
24
1
@ PR850 place close to GTchock
PR844
1
PR845 1 2 PR843 PR848
2.15K_0402_1% +5VS 2_0402_1% 499_0402_1% PC828 1000P_0402_50V7K
VSSGT_SENSE <16>
2.49K_0402_1%
2
PR846
24K_0402_1%
33.2K_0402_1%
2
1
1
100度
1 2 PR870 3.09K_0402_1% OCP for GT

<42> SW_2a
1 2 1 2 1 2
PR853
PR854
+5VALW VCCGT_SENSE <16>
度 place close to GT high side
U42@ PR871 2_0402_1%

2.15K_0402_1% VSP_1a 1 2 1 2 @ PR847 2 1
PC830 PR867 0_0402_5% PR851 +VCC_GT
2
1
1000P_0402_50V7K 3.09K_0402_1% 100_0402_1%
PC831
PR852
1 2 1U_0603_10V6K
+5VS
2
1 2
FSW FOR GT AND IA
FSW FOR SA
U22@ PR868
1
0_0402_5%
1000P_0402_50V7K
0_0402_5%
PC832
61.9K_0402_1%
1
1
PWM_1a_GT <42>
2
PH805
100K_0402_1%_NCP15WF104F03RC
3 3
PR855
place
2
close
to GT high side
51.1K_0402_1%
97.6K_0402_1%
15.8K_0402_1%
35.7K_0402_1%
1
1
KB_U22@ PR856
PR857
U22@ PR858
PR859
2
2
SK_U22@ PR856 VBOOT
45.3K_0402_1% KB_U42@ PR856 U42@ PR858
100K_0402_1% 19.1K_0402_1%
PWM2_2ph_IA <42>
PWM1_2ph_IA <42>
4 4
2015/10/02
Compal Secret Data
2016/11/10 Title
IMVP8, NCP81206
A B C D E
A B C D E
change PL9002, PL9003

SM01000C000 to comm
part SM01000P200
@ PJ901 +19VB
JUMP_43X79
1 2
1 2
1 1
+19VB_CPU
+19VB_CPU InputCapacitor:
10uF_0805_X5R_25V
InputCapacitor:
10uF_0805_X5R_25V
PC904
2200P_0402_50V7K
PC911
PC909
PC907
PC917
PC902
0.1U_0402_25V6
5
EMI@ PC914
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
1
U42@ PR902 U42@ PC906
PQ902
EMI@ PC913
1
0.1U_0402_25V6
AON6380_DFN5X6-8-5
5
2.2_0603_5% 0.22U_0603_16V7K
PC912
PC910
PC908
PC915
U42_EMI@
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
1
1
PR903 PC905 + PC901 1 2 1 2 @U42@ PR904
U42@
U42@
U42@
U42@
PQ901
U42_EMI@
2
2
AON6380_DFN5X6-8-5
2.2_0603_5% 0.22U_0603_16V7K 33U_25V_NC_6.3X4.5 0_0603_5%
1 2 1 2 @ PR901 1 2 4
U42@
2
2
0_0603_5% 2 U42@
1 2 4
PU902
1 9 (Common Part) +VCC_CORE
3
2
1
BST FLAG
2 8 HG_VCORE_IA SH000011H00 7*7*4
PU901 (Common Part) +VCC_CORE <41> PWM2_2ph_IA
3
2
1
PWM DRVH PL903 0.22UH 20% FDUE0640J -H 25A
1 9 SH000011H00 7*7*4 DRVON 3 7 SW_VCORE_IA U42@ 1 4
BST FLAG PL904 0.22UH 20% FDUE0640J -H 25A EN SW
2 8 HG_VCORE 1 4 4 6 2 3
<41> PWM1_2ph_IA PWM DRVH +5VS VCC GND
PR906
3 7 SW_VCORE 2 3 5
<41> DRVON
1
EN SW DRVL
AON6314_N_DFN56-8-5
PQ905
4.7_1206_5%
1
4 6
PR905
U42@ PC919
+5VS
4.7U_0402_6.3V6M
VCC GND NCP81151MNTBG_DFN8_2X2 CSN_2a <41>
PC921 @U42_EMI@
4.7_1206_5%
2
5
1
5 LG_VCORE_IA 4
DCR=0.98m ohm +-5%
1
DRVL CSN_1a <41>
U42@
Common part SH000011H00
AON6314_N_DFN56-8-5
@EMI@
DCR=0.98m ohm +-5%
PQ903
PC918
4.7U_0402_6.3V6M
2
NCP81151MNTBG_DFN8_2X2
2
3
2
1
LG_VCORE 4
680P_0603_50V7K
1
@U42@ PR913
0_0603_5%
PC920
680P_0603_50V7K
1
2 @ PR912 1 2 2
2
0_0603_5% SW_2a <41>
@U42_EMI@
3
2
1
1 2
2
SW_1a <41>
@EMI@
U22
PR907 PC922 +19VB_CPU
VCC:
Imax=21A Ipeak=32A Iocp=40A 2.2_0603_5% 0.22U_0603_16V7K
1 2 1 2
@ PC923
EMI@ PC924
EMI@ PC925
1
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25VAK
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
33U_25V_NC_6.3X4.5
PC926
PC927
PC928
PC929
U42
1
+
VCC:
Imax=42A Ipeak=64A Iocp=70A
2
2
VCCGT: PQ906
AON6992_DFN5X6D-8-7
Imax=18A Ipeak=31A Iocp=39A PU903
(Common Part) +VCC_GT InputCapacitor:
1
NCP81253MNTBG_DFN8_2X2
VCCSA: SH000011H00 7*7*4 10uF_0805_X5R_25V
D1
G1
Imax=4A Ipeak=5A Iocp=9.5A 1 8 HG1_GT
BST DRVH PL906 0.22UH 20% FDUE0640J -H 25A
2 7 SW1_GT 7 1 4 +VCC_GT
<41> PWM_1a_GT PWM SW D2/S1
DRVON 3 6 2 3 DCR=0.98m ohm +-5%
1
3 EN GND @ PR908
3
G2
S2
S2
S2
@ PC930 4 5 0_0402_5%
PR909
+5VS
PAD
VCC DRVL
1
100P_0402_25V8K @ 1 2
4.7_1206_5%
2
1
PC931 CSN_GT1 <41>
1
100P_0402_25V8K
2
@EMI@
PC932
4.7U_0402_6.3V6M
1 2
2
SWN_GT1 <41>
2
LG1_GT @ PR914
0_0603_5%
PC933
680P_0603_50V7K
1
InputCapacitor:
10uF_0805_X5R_25V
2
+19VB_CPU
@EMI@
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
EMI@ PC937
EMI@ PC936
0.1U_0402_25V6
1
1
PC934
PC935
PR910 PC938
2
2.2_0603_5% 0.22U_0603_16V7K
1 2 1 2
HG_SA
AON7934
Rds(on)=12.4~15.8m ohm
PU904 PQ907
4
NCP81253MNTBG_DFN8_2X2 AON7934_DFN3X3A8-10
+VCC_SA
D1
D1
D1
G1
1 8
BST DRVH PL907
2 7 10 9 SW_SA 1 4
<41> PWM_1b_SA PWM SW D1 D2/S1
DRVON 3 6 2 3
PR911
EN GND
G2
4 4
S2
S2
S2
4.7_1206_5%
1
4 5
+5VS
PAD
VCC DRVL 0.47UH_NA__12.2A_20%

5
@EMI@
1
9
PC939
4.7U_0402_6.3V6M
CSN_1b <41>
2
PC940
680P_0603_50V7K
1
SW_SA SW_1b <41>

2
LG_SA Issued Date 2015/10/02 Deciphered Date 2016/11/10 Title

@EMI@
Power Train
A B C D E
1
1A
Rev
46
of
43
Sheet
E
E
C5V01 LA-E891P
Monday, June 12, 2017
Power Train
Document Number
+VCC_SA
PC9079
1U_0201_4V6M
+VCC_SA
1 2
PC9078
Date:
Title
Size
PC9052 1U_0201_4V6M
22U_0603_6.3V6M
C
1 2
1 2 PC9077
PC9051 1U_0201_4V6M
22U_0603_6.3V6M
22uF_0603*3
22uF_0603*9
1 2
1 2 PC9076
1uF_0201*7
PC9050 1U_0201_4V6M
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
22U_0603_6.3V6M
1 2
1 2 PC9075
2016/11/10
PC9049 1U_0201_4V6M
unpop:
22U_0603_6.3V6M
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
1 2 PC9074
PC9022 PC9048 1U_0201_4V6M
pop:
@
22U_0603_6.3V6M 22U_0603_6.3V6M
1 2
SA
1 2 1 2 PC9073
@
PC9021 PC9047 1U_0201_4V6M

22U_0603_6.3V6M 22U_0603_6.3V6M
1 2
Deciphered Date
1 2 1 2
Compal Secret Data

D
D
0.47uF*4
22uF*36
22uF *8
220uF*1
unpop:
1uF*9
1uF*1
2015/10/02
+VCC_GT
+VCC_GT
PC9020 PC9046 PC9072 PC9095 @ PC9109 PC9129 PC9153

22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 0.47U_0201_4V6M 1U_0201_4V6M
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9019 PC9045 PC9071 PC9094 @ PC9108 PC9128 PC9152
Issued Date
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9018 PC9044 PC9070 PC9093 @ PC9107 PC9127 PC9151
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9017 PC9043 PC9069 PC9092 @ PC9106 PC9126 PC9150
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9016 PC9042 PC9063 @ PC9091 PC9125
C
C
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M
+VCC_GTX_VCORE
1 2 1 2 1 2 1 2 1 2
+VCC_GT_VCORE
PC9015 PC9041 PC9062 PC9090 PC9124
1 2 1 2 1 2 1 2 1 2
@ PC9014 PC9040 PC9061 @ PC9089 PC9123
1 2 1 2 1 2 1 2 1 2
PC9013 PC9039 PC9060 @ PC9088 PC9122
@

1 2 1 2 1 2 1 2 1 2
PC9012 PC9038 PC9059 @ PC9087 PC9121
1 2 1 2 1 2 1 2 1 2
0.0002_0805_5%
PC9011 PC9037 PC9058 @ PC9086 PC9120

0.0002_0805_5%
0.0002_0805_5%
2
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 0.47U_0201_4V6M

2
2
U42@ PR9002
+
1
U42@ PR9001
U22@ PR9003
1 2 1 2 1 2 1 2 1 2
220U_D2 SX_2VY_R9M
PC9105
1
SGA20221D40
1
VCORE Output Capacitor:

+VCC_CORE
+VCC_GT
+VCC_CORE
B
B
22uF_0603*33
1uF_0201*35
PC9001 PC9036 PC9068 PC9099 PC9104 PC9119 PC9139 PC9149 PC9158

@
+VCC_CORE
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M

2016/10/26
22_0603*9
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
220uF *3
PC9010 PC9035 PC9067 PC9098 PC9103 PC9118 PC9138 PC9148 PC9157

@
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9009 PC9034 PC9066 PC9080 PC9117 PC9137 PC9147
UNPOP
@
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M

+
1
U22
1 2 1 2 1 2 1 2 1 2 1 2 1 2
220U_D2 SX_2VY_R9M
PC9008 PC9033 PC9065 PC9097 PC9116 PC9136 PC9146
U42@ PC9102
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
+
1
1 2 1 2 1 2 1 2 1 2 1 2 1 2
220U_D2 SX_2VY_R9M
PC9007 PC9032 PC9064 PC9115 PC9135 PC9145
U42@ PC9101
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
+
1
2
+VCC_GT_VCORE
1 2 1 2 1 2 1 2 1 2 1 2
VCORE Output Capacitor:
220U_D2 SX_2VY_R9M
PC9006 PC9031 PC9057 PC9114 PC9134 PC9144
@U42@ PC9100
1 2 1 2 1 2 U42@ PC9084 1 2 1 2 1 2
PC9005 PC9030 PC9056 22U_0603_6.3V6M PC9113 PC9133 PC9143
1 2
1 2 1 2 1 2 U42@ PC9083 1 2 1 2 1 2
1 2
+VCC_GTX_VCORE
1 2 1 2 1 2 U42@ PC9082 1 2 1 2 1 2
@
A

1 2
1 2 1 2 1 2 U42@ PC9081 1 2 1 2 1 2
22uF_0603*39

@
1uF_0201*35

1 2
2016/10/26
1 2 1 2 1 2 PC9156 1 2 1 2 1 2
22_0603*3
1U_0201_4V6M
220uF *3
U42@ PC9096
1 2 22U_0603_6.3V6M
PC9155
1U_0201_4V6M 1 2
U42@ PC9085
UNPOP
1 2 22U_0603_6.3V6M
PC9154
U42
1U_0201_4V6M 1 2
1 2
1
4
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
01 prevent part damage

PC410 and PC411 change to 0603 size 1/3 DVT
D D
02 reduce part count PR515,PR804,PR806,PR812,PR813,PR865,PR847,PR860,PR876,

PR863,PR875,PR901,PR912,PR904,PR913,PR914 change to R-short 1/3 DVT
03 voltage level too high 3.37V change to 3.33V PR402 change to 13.3K from 13.7K 1/3 DVT
04 voltage level too high 1.02V change to 1.011V PR608 change to 13.7K from 14K 1/3 DVT
05 SMT close SMT stencil problem PJ9001, PJ9002, PJ9003 change to 0.2m ohm 1/3 DVT
06 CPU transient PR805 change to 1.69K from 1.78K

meet CPU spec PR814 change to 806ohm from 1K
PR874 change to 97.6K from 93.1K 1/14 DVT
PC821 change to 0.22u from 0.1uF
PC820 change to 8200P from 0.01uF
PR836 change to 63.4K from 69.8K
PR846 and PR867 change to 3.09K from 3.32K
PC9002.PC9003,PC9099,PC9098.PC9014,PC9091.PC9048 change to dummy
C C
07 DC S5 power consumption PR209 change to 750K from 10K

meet DC S5 2.5mA spec PR211 change to 150K from 2K 1/14 DVT
08 prevent shortage PL907 change to common part SH00001ED00

PQ502 change to AON7506 1/14 DVT
09 meet panel spec voltage remove boost circuit PQ701,PQ702,PR711,PR712,PR713,PR715,PR716,PC712,PC713,PC714,PC715,PC722, 1/14 DVT
PC724,PL702,PD701,PU703,PC717,PC718,PC719,PC721,PL701 change to un-pop
10 reduce part count PR852 and PR864 change to R-short 1/14 DVT
11 spok voltage level PR407 change to 20K ohm from 100K 1/24 DVT
12 Change to 5V OCP setting PR406 change to 105K ohm from 107K 3/1 PVT
13 for CPU transient PU901 and PU902 change to NCP81151MNTBG_DFN8_2X2 3/1 PVT
B B
PU903 change to NCP81253MNTBG_DFN8_2X2
PR908 change to R-short from 10 ohm
PR876 ,PR875 change to 10ohm from R-short
PC837 ,PC836 change to pop to 2200P
14 from soucer suggest PC901 change part number SF000007700 from SF000007200 3/4
for USB 5V Level PR401 change to 31.6K from 30.9K
15 for U42 modify PR808 change to 19.1K
PR814 change to 1K
PR820 change to 845 ohm
PR857 fix to 97.6k
PR858 Change to 19.1K
PR836 fix to 63.4K
PR819 Change to 53.6K
PR320 Change to 499ohm
PC323 Change to 2.2uF
A PC9100 change to unpop A
2015/10/02
Compal Secret Data
2016/11/10 Title
PIR
Custom 1A
5 4 3 2 1
5 4 3 2 1
HW Schematic chang list (P.I.R)

Item Page Date Rev. Reason for change Modify Item
1 25 12/22 1.0 Reserved CA32 for DMIC_CLK (EMI request) reserve CA32 10P_0402_50VBJ
D
2 23 12/22 1.0 Net error change RC150,RC151, RC153, RC224 PU to +3VALW_1.8VALW_PGPPD D
3 12 12/22 1.0 +1.8vs power sequence f i ne t une CC104 Change to 0.1uF ,RC168 Change to 49.9K ohm
4 11 12/30 1.0 Crystel 25MHz Cap. value follow vendor suggest CC12,CC13 Change to 27pF (SE071270J80)
5 11 12/30 1.0 Crystel 32.768kHz Cap. value follow vendor suggest CC16 Change to 6.8pF (SE07168AC80)
6 14 12/30 1.0 Change load swith part number UC6 change to SA000070V00(AOZ1334DI-02_DFN8-7_3X3)
7 29 1/12 1.0 Type-C change connector JUSB4 Symbol change to LOTES_AUSB0249-P001A_24P-T
8 8 1/12 1.0 X1 Code BOM Change UC7 Change to SA00007WE00
9 31 1/12 1.0 Modify BOM structure LK2 Change to @EMI@ , DK2 change to @ESD@
10 32 1/12 1.0 ME Drawing modify (DFB issue) H30,H29 Change to H_3P2
11 23 1/12 1.0 For SD Card write protect issue add QL1 & RL21 for SD_WP inverter circuit , reserve RL20 , RL22 (unpop)
12 1/13 RM9,RO3,RS10,RM23,RS37,RS38,R1,R2,R3,R35,R36,R37,
1.0 Part count reduce
R38,R39,R40,R41,R34 change to R-short
13 31 1/13 1.0 Modify BOM structure LK2 Change to @EMI@ , DK2 change to @ESD@
C
14 28 1/13 1.0 X1 Code BOM Change DS21, DS1 ,DS2 ,DS3 ,DS4 Change to SC300002800 (USB3.0) C
15 19 1/16 1.0 Customer request for ESD protect RD202 Change to 0 ohm (DDR_DRAMRST#)
16 11 1/16 1.0 Customer request for ESD protect reserve CC131 on EC_VCCST_PG
17 11 1/16 1.0 Customer request for ESD protect add RC20 10_0402_5% ohm (PCH_PWROK)
18 15 1/16 1.0 Customer request for ESD protect POP CC123 AND Change to 10U_0603
19 11 1/16 1.0 Cap. package Change CS24 Change to 0402 package
20 26 1/17 1.0 remove HDD FFC co-lay remove JHDD1 symbol
21 26 1/19 1.0 EMI part count reduce RS1,RS2,RS3,RS4,RS5,RS6,RS7,RS8 Change to R-short
22 1/19 1.0 DFx review co-lay unused pin need to cover solder msk JC1,LS1,LS3,LS4,LS6 cover solder mask (footprint update)
23 28 1/19 1.0 Bom Change , pull up resistor change to 100K ohm RS20 Change to 100K ohm , RS40,RS41 Change to 100k ohm(unpop)
24 29,22 1/23 1.0 Change BOM part number POP DY2,DY3 , Bom change to SC300002800
25 14 1/23 1.0 ESD request change BOM POP CM15 & Change to 1000p Cap.
B
26 14 1/23 1.0 Follow Intel design guide Add CC58 10U_0603 B
27 26 2/3 1.0 Parade SATA Re-driver EQ setting TX RX 7.4dB POP RO17,RO18,RO19,RO21

28 22 2/6 1.0 BOM Change (ESD) DY1 Change to SC300001G00
29 26 2/7 1.0 Fine tune TI SATA Re-driver EQ set t i n
g POP RO17,RO18 (4.7K ohm) POP RO19,RO21 0ohm (TI re-driver GND Pin)
30 2/8 1.0 Acer ESD protect request POP CC65,CC130,CC53,CC131,CS24(0.1uF) , CC50 (1000pF)
31 25 2/8 1.0 EMI request DMIC_CLK 0ohm change to Bead RA34 change to SM01000NY00
32 29 2/16 1A Change Cap. material for Z-High issue CS25 Change to SGA00009M00 (H=2.1mm)
33 25 2/20 1A Update BOM Structure Change RA34 ,RA35 BOM Structure to EMI@
34 2/20 1A For acer ESD protect request Add CC132 & CC50 , CC53, CC131,CC65,CS24,CC132 Change to 1000P
35 11 2/20 1A BOM Change CC130 change to unpop
36 18 2/20 1A Co-lay for Intel U42 Add RC237 R-short , RC182,RC183 R-short change to 0ohm(Reserved)
37 13 2/20 1A Cancel USB20_Port9 remove LS24 , USB20_P9/USB20_N9 Add test point
38 26 3/1 1A Update Type-c footprint JUSB4 change symbol to LOTES_AUSB0181-P001A
A
39 12 3/2 1A For BIOS Identify U22 , U42 CPU RC215 Change BOM Structure to U22 / RC214 Change BOM Structure to U42 A
40 8 3/2 1A Update DAZ / PCB Part number DAZ Change to DAZ20X00101 , PCB Change to DA8001AT01A
41 9 3/2 1A BIOS ROM Change Main source UC2 Change to SA000039A40
Issued Date Deciphered Date 2016/06/16 Title
HW-P.I.R page1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E891P
Date: Sheet 45 of 46
5 4 3 2 1
5 4 3 2 1
HW Schematic chang list (P.I.R)

Item Page Date Rev. Reason for change Modify Item
42 11 3/28 1A Crystal dampling resistor adjust RC235 , RC236 change to 33ohm 1%
D
43 18 3/28 1A Crystal dampling resistor adjust (U42) RC233 , RC234 change to 33ohm 1% , CC128 ,CC129 Change to 27pF D
44 8 3/28 1A RCOMP 0 121 ohm for Mixed MD and SO-DIMM RC38 Change to 121 ohm
45 8 3/28 1A Update DAZ PN & Add U42 PN DAZ change to DAZ20X00102 ,Add U42 QN5D@ / Q15C@
46 8 3/28 1A Change ESD Main source DYI Change to SC300002900
47 8 4/17 1A Add D7W01 Project ID setting RC207 / RC213 BOM structure D7W01@
48 30 4/17 1A Add D7W01 Board ID setting RB4 27K ohm for EA17PVT@ , RB4 33K ohm for EA17MP@
C C
B B
A A

Issued Date Deciphered Date 2016/06/16 Title
HW-P.I.R page2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E891P
Date: Sheet 46 of 46
5 4 3 2 1

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A B C D E

C5V01 MB Schematic Document

HDMI Conn. eDP Interleaved Memory

DDR4-ON BOARD 4G 8Gbx16

Port 9-12 Base-U PCIE2.0 Quad Core + GT2 USB port8

NGFF SATA3.0 SATA3.0 USBx8

LPC/eSPI BUS SMBUS

Board ID Table for AD channel

BOM Structure Table Voltage Rails

3S@ +5VS System +5V power rail ON OFF OFF

43 level BOM table

431A72BOL06 SMT MB AE891 C5V01 UMA I3-7100 1.4 HDMI I37100@/CMC@/LPC@/UMA@/U22@/3S@/LDO@/NBYOC@/255@/CHG@/MP@/X4E@/X76M@/DAZ@/X76PAR@/C5V01@

Security Classification Compal Secret Data Compal Electronics, Inc.

+1.2VP (PJ501) +1.2V_VDDQ (JPC1,JPC2) +1.2V_VDDQ_CPU +1.2V_VCCSFR_OC R-Short

EN_1VALW SY8288RAC JUMP R-Short R-Short

(UC8) +1.0VS_VCCSTG_IO (RC188) +1.0VS_VCCSTG

Security Classification Compal Secret Data Compal Electronics, Inc.

BG12 SOC_SMBDATA 2N7002DW

77 EC_SMB_CK1 100 ohm 7

KBC SCL2 79 SOC_SML1CLK

I2C Address Table

BQ24780 (Charger IC) 0x12

Display Port B/C Detected B50 DDI2_TXN[2]

RC2 1 2 1K_0402_5% H_THERMTRIP#

1 2 H_PROCHOT#_R C65 PECI

A65 THERMTRIP# B61 CPU_XDP_TCK0

RC15 2 CMC@ 1 51_0402_5% SOC_XDP_TDO

RC35 2 CMC@ 1 51_0402_5% CPU_XDP_TCK0

UC1 UC1 UC1 UC1 A 4

74AUP1G07SE-7_SOT353_5P DDR_VTT_CNTL to DDR

SA0000A3820 SA0000A3860 SA0000A38K0 SA0000A38M0

UC1 UC1 UC1 UC1

SOC_SMBCLK_1 RC222 1 2 2.2K_0402_5%

SOC_SML0CLK RC49 1 2 499_0402_1%

HDA for AUDIO HDA_SYNC

SPKR / GPP_B14 (Internal Pull Down):

Pre-MP change to 33 ohm 03/28

SOC_XTAL24_IN RC235 1 U22@ 2 33_0402_1% SOC_XTAL24_IN_R

1 2 EC_VCCST_PG Rev_0.53 Cannonlake U use 38.4M 30 ohm ESR

PCH PLTRST Buffer SOC_VRALERT# RC115

#543016 PDG2.0 P.599

PROJECT_ID0 RC207 2 @ 1 10K_0402_5%

Functional Strap Definitions Memory Down Strap

(Rising edge of PCH_PWROK)

* 0 = SPI Mode --> AAX05 Use

RAM_ID3 RAM_ID2 *RAM_ID1 *RAM_ID0 PartNumber - Description

DEVSLP2 NA SATA General Purpose (SATAGP[2:0]) Signals

+1.0VALW_PRIM TO +1.0V_VCCSTU / +1.0VCCST

Imax : 3.44 AJUMP_43X79 1 RC208 1 @ 2 0_0402_5% CC47 1 2 10U_0603_6.3V6M

AOZ1334DI-02_DFN8-7_3X3 RC143 1 @ 2 0_0402_5% CC55 1 2 1U_0402_6.3V6K

+1.0VS_VCCSTG CC56 1 2 1U_0402_6.3V6K #543016 PDG2.0 P.750

4 #543016 PDG2.0 P.750 #543016 PDG2.0 P.750 4

+VCCIO : 4x 1uF 0402 +1.35V_VDDQ_CPU :

+1.0VALW_PRIM UC1O SKL-U +3VALW_1.8VALW_PGPPA +1.8VALW_PRIM

#543016 PDG2.0 P.470

#544924 SKL EDS1.2 P.136

@ T167 CFG0 E68 BB68 T156 @

Pre-MP change to 27pF 03/28

0_0402_5% 0_0402_5% 0.022U_0402_16V7K RD41 2 1 49.9_0402_1%

330U_D2_2V_Y RD207 RD209 RD13 RD200 3 6

1 1 1 1 1 1 1 1 1 1 RAM_ID3 RAM_ID2 *RAM_ID1 *RAM_ID0 PartNumber - Description

Security Classification Compal Secret Data Compal Electronics, Inc.

RAM_ID3 RAM_ID2 RAM_ID1 RAM_ID0 PartNumber - Description

1 1 1 1 1 1 1 1 1 1 RAM_ID3 RAM_ID2 RAM_ID1 RAM_ID0 PartNumber - Description