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Effect of AIN Spacer Thickness on Device

Characteristics of A1 InNIAIN/GaN MOSHEMT


Kanjalochan Jena T. R. Lenka
School of Electronics Engineering Microelectronics and VLSI Design Group,
KIlT University, Bhubaneswar, Dept. of Electronics & Communication Engineering,
Odisha, India-75 1024 National Institute of Technology Silchar,
Email: kanjalochan.jena@gmail.com Silchar, Assam, India-788010
Email: t.r.lenka@ieee.org

Abstract-In this paper the effect of binary AIN spacer thickness 2DEG concentration, mobility and drain current at low
on device performance of 30 nm gate length lattice matched temperatures. AlInN/GaN and AIGaN/GaN HEMTs along
Alo.83Ino.J7N/AlN/GaN MOSHEMT (Metal Oxide Semiconductor with binary AIN spacer has already been implemented to
High Electron Mobility Transistor) is investigated using Atlas
improve the DC and microwave performances [9-10]. In this
simulations. The numerical simulations are done using non local
work, we proposed AlInNlAIN/GaN MOSHEMT to explore
energy balance (EB) transport models. We have optimized the
binary spacer thickness for obtaining the enhanced device
and analyze the advantage of AIN spacer layer along with the
performance. The main findings of this report indicates the effects of variation of spacer layer thickness in major
increase in 2DEG (2 Dimensional Electron Gas) density when a performance evaluation like 2DEG density, mobility, quantum
binary AIN spacer layer is inserted at the interface of AlInN/GaN well depth, drain current, gate leakage current etc.
owing to enhanced conduction band offset and high polarization The device physics and simulation model is discussed in
field. The maximum drain current of 1.1 A/mm is achieved at 1.4 Section-I1. Results and discussion are presented in Section -
nm AIN spacer thickness due to high 2DEG sheet charge density III and finally conclusion is drawn in Section-IV.
and mobility. Insertion of AIN spacer layer also reduces the
reverse Schottky gate leakage current of the order of 10.6A/mm. n. DEVICE PHYSICS AND SIMULATION MODEL
Optimization of AIN spacer thickness makes the proposed device
suitable for high power and high frequency electronic
The schematic cross sectional view of the proposed
applications. AlInNIAIN/GaN MOSHEMT and material parameters are
shown in Fig. 1 and Table I respectively. The device is having
Keywords- lDEG, AlInN, AlN spacer, GaN, HEMT, MOSHEMT gate length of 30 nm, 5 nm Alo83Inol7N barrier layer
thickness, unintentionally doped AIN spacer layer of varying
I. INTRODUCTION thickness from 0.5 nm to 2 nm, 200 nm UID GaN and Fe
Gallium Nitride based material systems have recently been doped 1600 nm GaN buffer layer above Si substrate. GaN on
a subject of intense investigation due to their superior material Si substrate is used to improve the performance of GaN
properties such as large band gap, high breakdown voltage, electronic devices. Wide bandgap UID GaN layer just beneath
high saturation velocity and having strong piezoelectric and the AIN spacer layer confines the channel with full of
spontaneous polarization field [ 1-4]. In recent years GaN­ electrons at the heterointerface. The gate is made up with
based high electron mobility transistors (HEMTs) and metal Ti/Au (30 nm) metal and having (2x l00) Ilm gate width and
oxide semiconductor high electron mobility transistors high-K Al203 dielectric thickness of 3 nm to minimize gate
(MOSHEMTs) have attracted great interest due to their leakage current.
advantages in high frequency, high voltage, and high-power
operation. The potential of these GaN devices are further
improved by various barrier and channel materials [5].
Recently, AlInN has been used as a substitute with respect to
the conventionally used AIGaN barrier layer for improving the
device characteristics of HEMTs and MOSHEMTs [6].
Lattice-matched Alo.83Ino.17N/GaN heterostructure results
superior device performance and reliability with respect to its
counterparts due to stress free heterointerface between AlInN
and GaN, better quantum confinement and polarization
induced Two Dimensional Electron Gas (2DEG) in the GaN
channel. However, these electrons forming the 2DEG in the
GaN channel may suffer from poor in-plane transport
properties due to alloy disorder scattering [7-8]. Hence, in
order to improve the device performance, an extra binary AIN
Fig. 1 The Schematic Structure of AllnN/AIN/GaN MOSHEMT
spacer can be inserted between AlInN and GaN improving the

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The electrical characteristics study of the proposed device temperatures when the carrier's concentration IS high.
as shown in Fig. 1 is carried out by simulating through Atlas Insertion of AlN spacer layer decreases alloy disorder
device simulations [ 1 1]. The model developed to simulate the scattering in the 2DEG by suppressing the penetration of the
operation of the device consists of equations derived from wave function into the AlInN barrier. It is well known that
Poisson's equation, Maxwell's equation, continuity equations scattering from polar optical phonons dominates over all other
and non local energy balance (EB) transport model equations. scattering mechanisms for the 2DEG in a wide temperature
Significant physical effects such as band gap narrowing, field range [ 14]. This is owing to the fact that for temperatures
above 300K, the impurity scattering is minimized due to
dependent mobility, spontaneous and piezoelectric
spatial separation of electrons and ionized impurities [ 15].
polarizations are also considered in the device simulations.
Therefore, the low field mobility due to polar optical phonon
The EB transport model incorporates continuity equations for
scattering is analyzed as functions of 2DEG density (ns) and
the mobility, carrier temperatures, and impact ionization
spacer layer thickness for our model. For the case of
coefficients as functions of the carrier temperatures rather than
MOSFETs, simple empirical relationships for the polar­
functions of the local electric field [ 1 1]. The EB model is one
optical mobility at elevated temperature have been proposed
of the most important carrier transport model in
in previous work [ 16] as given by
semiconductor physics. The current densities for electrons

(7,) and holes (.J; ) are given by ( 1) and (2) (3)

( 1) Where k, 5 and f3 are empirical constants for relating the


dependence on the 2DEG density (ns) and temperature (T). k
(2) can also be expressed in terms of the reference 2DEG
concentration (nrej), temperature (Tref) and its reference
Where Dn and Dp, are the thermal diffusivities for electrons mobility (f.1o ) as
and holes, Iln and IIp are the electron and hole mobilities. Tn
(4)
and Tp are carrier temperature for electrons and holes. 1.[1 is the
electrostatic potential. The Poisson equation, electron
continuity equation and hole continuity equation based on the
Ill. RESULTS AND DISCUSSION
Energy Balance model are numerically solved with the
The proposed device as shown in Fig. 1 is simulated by
appropriate carrier mobility models in place. Acceptor traps
solving a set of quantum mechanical transport equations. The
are also included in the simulations. various performance results are discussed in this section.
TABLE I
2 .8-r-_--. __ --.-
__ .....-
__ .--_-,

N- -- TC AD
PHYSICAL PARAMETERS OF AI0.83InOl7N and GaN
.� 2.7 • Expr
M

Material GaN AI0.s3Ino.I7N Reference �o

::'2.6
l;o
Eg (eV) 3.42 5.52 [ 1 2] 'iij
c:
� 2.5
CBO (eV) 0.57 [ 1 2] "

VBO (eV) 0.73 [ 1 2]


� 2'4
"
"
Bo 9.5 1 1 .7 [ 1 2]
� 2.3 t---.--..---....----r--
.. --.r-l
Lattice constant (A) 3.1 86 3.1 90 [ 1 3]
o 4
AIN Spacer Layer Thickness (nm)
2
11, (cm Ns) 1 320 1 600 [ 1 3] Fig. 2. Variation of 2DEG density with AIN spacer thickness for the proposed
MOSHEMT. Experimetal data is taken from Ref[9] .
2
Ilh (cm Ns) 22 82 [ 1 3]
Fig. 2 shows that the 2DEG sheet charge density (ns) is
strongly affected by the thickness of the AlN spacer layer. It is
Performance of AlInNlAIN/GaN device predominantly 13 2
here observed that, ns initially increases up to 2.7x l0 cm- as
depends on the carriers' mobility in GaN channel which is a function of the spacer layer thickness dAIN, up to almost 2
affected by various types of scattering mechanisms. However, nm. The increase in 2DEG density level at the heterointerface
the alloy disorder scattering is the limiting factor at low of AlInNIAlN/GaN is due to high barrier, large conduction

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band offset and high polarization field. The binary AIN spacer mechanism increase the mobility. However, at thicker AIN
virtually shifts the 2DEG distribution away from the spacer high carrier concentration leads to moving 2DEG
heterointerface by reducing alloy disorder scattering. The distribution toward the interface. As a result, interface
presence of AIN layer enhances the carrier confinement in the roughness scattering and coulomb scattering Increases
quantum well which reduces the alloy and interface roughness reducing the mobility of carrier in the 2DEG [IS].
scattering. After a certain spacer thickness (2nm), n, remains
constant which indicates lowering of efficient confinement of
electrons due to formation of cracks [ 17].

Fig. 5. Id-Vd curves for the device with respect to the different thickness of
the AIN spacer layer

Fig.3. The variation of Quantum well depth with AIN spacer thickness Fig. 5 shows the Id-Vd characteristics of proposed 30 nm
gate length AlInN/AIN/GaN MOSHEMT device for varying
It is here observed that, insertion of AIN spacer layer AIN spacer layer thickness from 0.5 nm to 1.7 nm at zero gate
results in to increase in the quantum well depth as shown in bias. It is here found that drain current increases with
Fig. 3, lowering the carrier scattering [IS]. Due to increase in increasing in spacer layer thickness and reach maximum value
quantum well depth, alloy disorder scattering is lowered of 1. 1Almrn at 1.4 nm thick spacer layer. The enhancement in
because binary AIN has less alloy scattering in comparison to the drain current is due to the increase of electron
ternary compounds [ 19]. As a result, the mobility is also concentration in the form of 2DEG and mobility with spacer
increased and the current is thus increased. layer thickness. Beyond 1.4 nm thickness, the binary AIN
spacer deteriorates the ohmic resistance of source/drain
contact and hence degrades the performance of the device.
The gate leakage current is the major disadvantage of the
Alo83Ino 17N based heterostructures due to the use of high Al
composition as well as thin barrier. The reverse gate leakage
current leads to high off-state power consumption and the
forward one limits the range of gate voltage swing, therefore
weakening the power handling capability [20]. AI203 is used
as gate dielectric for the improvement of serious leakage
current in our device. Gate leakage current with respect to
applied bias is shown in Fig. 6.

Fig. 4. Plot of the variation of mobility versus the thickness of the AIN spacer
layer.
Transport properties of AlInN MOSHEMT also depend on
thickness of spacer layer. The simulation results show that the
mobility of 2DEG attains its maximum value at a critical
thickness of 0.5 nm AIN layer and decreases beyond this
thickness as shown in Fig. 4. This is owing to the Coulomb's
scattering between 2DEG carriers when very thick spacer
layer is used. It is seen that the mobility is increased by lS%
when AIN spacer thickness of 0.5 nm has been inserted in
AlInN/AIN MOSHEMT. It is also observed that at a thin AIN
spacer layer low interface roughness and low alloy scattering
Fig 6. Plot showing Gate leakage current characteristics with applied bias

2016 IEEE Region 10 Conference (TENCON) - Proceedings of the International Conference 3255
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[20] Jie-Jie Zhu, Xiao-Hua Ma, Bin Hou, Wei-Wei Chen, and Yue Hao,
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procurement of Silvaco TCAD tool in Microelectronics metal-oxide semiconductor high-electron-mobility transistors," Applied
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of Technology Silchar, India to carry out the research work.
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