It is very irnportant to mte that il yourPC is already having an

MIO card with two serial RS-232 pons configured as COMI

and COM2, you must select a different address lor the PCL-
237 card. Otherwise the two ports will dash. Another attema-
tive is to disable the RS-232 ports on the MIO card, il you
would not be using these ports.

2.7 D7ltreil Recelver Enable mode settlng

Jumper blocks JP1, JP2, JP3, JP4 are provided lor settirp the
Enable mode of the ddvers and receivers ol lhe PCL-237 canl.
JPl and JP3 are used for settirp the enable mode ol the
ddvers of channels 1 and 2 respectively.
6 3 t
.Fl oRf3
(lQ-Almys En$5
(34) L Contoled by Regtsler BASE+7
(56) - EtdSdby RTS

lrserting the shoiling fink in position 1-2 enables the ddvers.

This ls required by the RS-422 applications. This link disables
the sottwarepontrol over the ddver modes. lf your application
requires sottware controlover the ddver modes, then the short-
ing link must be inserted either in position 3-4 or $6.
When the shorting link is in position 3-4, the driver enable
lunction works under control ol the register (BASE+7) bit 0.
The bit set to one enables the ddver and reset to 0 dsables the
ddver.
When the shorting link is in position 5-6, the ddver enable furrc-
tion works under controlol RTS signal. Bits 0 and 1 of the ad-
dress (BASE+4) are used lor this pr.rrpose. Both bits set to 1
will enable the ddver and both the bits reset to 0 will disable the
ddver. These Uts assert the RTS signal.
3t JP2ORf4
l-o ol (1C)-AlkylESb. t

l""j
12
(3{ - Comofed by Beflder BASE+7
 ftr-ffi
abred in rhis case. ro.Ltitise
!i::i:trx,#_::.f;,9J,,,H,1
4, the receiver is always..en"Of.O.
if,.'rittr.r, controlis dis-
itr;;ffi;; conrror, the shortino
It.lrr.rr be in position i-e. irri-J
enaHed or disabred under controiLt
;ril ii; A;i;;'i;T;
tn-" register (BASE+7) bit
t' This ur set to 1 enabres trrr re.rir.i
the receiver. Bits 0 and r ."n-u.-iri*.n"orrry o-,I#6rrl
"rol.idtio controred
thoqgh software to exercise conr.i orer
receiver - the driver and
enable furption .irn ttaneoriii.
2.8 Termlnafion Esilsilots.

lnere-ig a provision f.ojjr*tqrrng termination

d pqiflb^s Rl, R3, Rll-and ntc. rne*'"r. resistors onboard
to be instared for
irpedarEre matchino oI trrnrrr.-rioi
lhe rines. The varues
shouH eqrat rhe crraiectersric i,rpid;ffi; of the tines.