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Internship Report

Integrated Circuit Design Center (ICDC)

Submitted to:
Sir Bahlol

Submitted by:
Hamza Iqbal (Bahria University Islamabad)

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Overview

In today’s era when computer is deeply integrated in our life, there is


greater need of computer and electronics engineer than ever. To fulfill
this need we should have good laboratories and state of art
engineering equipment. That’s why I choose national institute of
electronics (NIE) for my internship because many labs and state of the
art equipment for electronics engineer.

ICDC is one of many labs in national institute of electronics which may


software for interns and students to become professional IC designers
in the field of integrated circuit designing. In very good learning
environment you can hands on experience on many software which are
currently many integrated circuit industries are using for manufacturing
in IC.

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Software
All software are running on Linux operating system (OS).

 Pyxis Schematic
 Model Sim
 Pyxis Layout
 Leonardo Spectrum

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Contents:

Internship report
Lab: Integrated circuit design center (ICDC)
Overview
Software:
 Pyxis Schematic
 Modelsim
 Pyxis Layout
 Leonardo Spectrum

Pyxis Schematic:
Lab 1 (Fig. 1)
Lab 2 (Fig. 2, 3)
Lab 3 (Fig. 4, 4a)
Lab 4(Fig. 5, 6)
ModelSim:
Lab 0 (Fig. 0)
Lab 1 (Fig. 8, 8a, 9)

Simulation:
Lab 1 (Fig. 10, 11, 12, 13, 14, 15)
Lab 2 (Fig. 16, 17, 18)
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Lab 3 (Fig. 19, 20, 21, 23, 24)
Pyxis Layout:
Lab 1 (Fig. 25, 26)
Lab 2 (Fig. 27, 28, 29)
Lab 3 (Fig. 31, 31)
Lab 4 (Fig. 32, 33)
Conclusion

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Pyxis Schematic
Pyxis schematic is a multi-layer design environment that includes
schematic editor to create and modify schematics and symbol editor to
create and modify symbol for schematics.
Pyxis schematic software have different tools you can use in your
design to modify your design, model and data. Symbols in the
schematic is similar to electronics components each symbol in your
design represent the component.

LAB-1
Core Concepts of Pyxis Schematic

This lab is introduction to software that how the environment is work.


First we see basic tools like cut, copy, paste zoom in and zoom out.
After we see the libraries like library, ADK IC library, prep for layout. In
library there is many primitives for symbols. You can add these
primitives to create your own simulation.
We learn how to open new and existing session I learn how to flip and
rotate the symbol on the page. Fig. 1
Using ADK library to add these components in our
design environment like these I add npn and pnp
transistor. You can change grid size have stroke options.

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LAB-2
Create a schematic of a CMOS inverter
using Pyxis Schematic

In this lab we learn about schematic entry how electrical objects

are connect to each other. We connect different electrical

components to obtain behavioral design of schematic.

Open schematic_edit palette, select ADK Library and choose

required components.

Fig. 2
In this diagram we connect different electrical components like nmos,
pmos, port in, port out, GND, VDD. I connect all these components
through wire. We can change the each component property name
through shift+F7 you can desire. Click on upper left corner to save your

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schematic.
To save the space on blank schematic and for your ease you can
generate the symbol of your design.

Fig. 3

When you design a bigger circuit you can use this command to make
your circuit smaller and easy to understand.

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LAB-3
DESIGNING A NOR GATE
Go to ADK IC Library button in the Schematic Edit Palette. Add nmos,
pmos and other basic components and connect it through wire and it
should look like this.

Fig. 4
(Some Photos is taken
through mobile phone
so quality is not good)

I change the
property name two input are A, B and one output is out

Fig. 4a
I change the width of nmos transistor from 5 to 6. Now generate the
symbol of your design using command add to symbol and save your

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schematic.

LAB-4
Importing your previous design into new Schematic
In this lab we are designing SR latch using nor-gate.
Open Pyxis schematic and click on new schematic. Go to add, instance,
add symbol and choose your symbol which you save in your previous
design.

Fig. 5
To build the SR-Latch we need to have two nor gate so instead of
building starting we can copy first one.

Fig. 6

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Modelsim
ModelSim is a multi-language HDL simulation environment by Mentor
Graphics for simulation of hardware description languages such as
VHDL, Verilog and SystemC, and includes a built-in C debugger.
ModelSim can be used independently, or in conjunction with
Intel Quartus Prime, Xilinx ISE or Xilinx Vivado. Simulation is performed
using the graphical user interface (GUI), or automatically using scripts.

Open the modelSim by writing the vsim in terminal window on linux


operating system. You have to follow basic design flow.
Creating directory -> Compile -> Load and run -> Debug result.

Fig. 7

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LAB-1
DESIGN & SIMULATION OF MUX
In this lab we are going to design 2x1 mux and we are simulating on
modelsim.

Fig. 8

After writing compile the code using compile command. Now you have
to run simulation. Window is added another tab called sim for your
simulation.

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Fig.8a(Sim tab)

Fig. 9 (After compiling the code you can see the required result)

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Simulation
In Pyxis schematic software we learn how to add components and
interconnects to each other now we see how to simulate all the
components and check their behavior on the ezwave window and
analyze different circuits like small signal amplifier, dc analysis of small
signal amplifier, transient analysis and ac analysis etc.

LAB-1
Analog Simulation of Small Signal Amplifier
Type adk_daic to open Pyxis schematic software. Open new schematic
and should open in front of you. Add following components from adk
library in your blank screen nmos, VDD, GND, in, out, resistor connect
all of these through wiring. Click to save your design.

Fig. 10

(After all wiring connections


your figure should like this)

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DC Analysis of Small Signal Amplifier:
Now we simulate our design using setup simulator command by
clicking top left corner. Add setup library path
(/home/user1/adk3_1/technology/ic/models/tsmc035.mod). click ok
after library path.
Now we go to setup analysis window and select dc analysis with some
other settings. Run the simulation using green button and click for
prepare for layout.
Open terminal window and write ezwave to view the graph. Add the
path of your file in which you save the your schematic design, add the
probes and connections input and output. After all settings click on run
button and check your graph.
Fig. 11
(third graph
in the
window is
the probably
our answer)

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Transient Analysis of Small Signal Amplifier:
Repeat same step as you done for dc analysis just click on sin input signal

instead of dc input signal.

Fig. 12 (We apply sin signal it output required signal we want)

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DCOP (DC Operating Point) Analysis of Small Signal Amplifier:

To find the dc operating point of several nodes in the circuit the input of
the amplifier should be configured as above for transient analysis.
Select DCOP from simulate window. Click on run ELDO.
Select all of the objects in the selection box and click on the add monitor
icon. Current and Voltage values at various nodes will be displayed as
shown in the figure.

Fig. 13 (apply above settings and schematic look like this )

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AC Analysis of Small Signal Amplifier:
In AC Analysis, the input signal is swept over a range of frequencies.
Apply following settings for ac analysis:
DC=1.5V (as we apply above in the dc analysis)
AC=1V (ac amplitude)

Fig. 14 (apply above settings your window)


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Creating Symbol:
Now we create the instance (creating symbol) to make our design more
intuitive. By clicking on add to symbol you can create your design.

Fig. 15 (clicking on add to symbol your figure look like this)

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LAB - 2
SIMULATIONS OF DIFFERENTIAL AMPLIFIER
Repeat your step as you done for above circuits and following
components nmos, pmos, resistor, input, put, VDD, GND.

Fig. 16 (clicking on add to symbol your figure look like this)

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Transient Analysis of a Differential Amplifier:

Apply transient characteristic to the signal and setup the settings.

Fig. 17 (clicking on add to symbol your figure look like this)

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AC Analysis of Differential Amplifier:

In ac analysis the frequencies of input signal are wider. To change the


input signal we have to change the input parameters by going to
forces>manager on sim palette. An edit saved forces window appears.
By selecting ac option and change the magnitude 0.1V and phase to 0.

Fig. 18

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LAB - 3
AC Analysis of Filters
In this lab we are going to perform ac analysis of different filters to
their practical behavior using different components. Filters are basic
building electronics circuits because they are used to remove noise and
interference in the circuit. Sometimes they make the waveform smooth
and readable.
AC Analysis of a Low Pass Filter:
We are going to design a low pass filter on Pyxis schematic. Go to adk
library to add different components.

Fig.19 (Circuit diagram of LPF)

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Fig. 20
Figure 20 show that filter is passing low frequencies as frequency goes
higher filter start to block the higher frequencies and does not allow
the higher frequencies to pass. This is clear example of low pass filter.

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AC Analysis of a High Pass Filter:

Now we draw new circuit and see the behavior of HPF same as we saw
the LPF.

Fig. 21 ( circuit of HPF )

By adding components from adk library and connect through wiring and

Click on run ELDO button, add library path. Run ezwave window to see

the graph of the HPF.

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Fig. 22 ( show the graph of HPF )

HPF filter block the lower frequencies and pass the higher frequencies.

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AC Analysis of Bandpass Filter :

Fig. 23 ( By connecting LPF and HPF we habe band pass filter )

Fig. 24 ( As we seen from graph only specific frequencies are allow to


pass through the filter by cutting lower path and higher path )

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Pyxis Layout
Pyxis layout used for physical layout that how an individual component
is place on the integrated circuit.

LAB - 1
POLYGON EDITING
Open the Pyxis layout create a new project.

Fig. 25 ( After creating new project window blank


window will look like this where you can create your own
design and physical layout )

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We can add different shape by clicking on layer palette.
You can add different metal layer from easy edit menu.

Fig. 26
Now I learn basic commands like delete, undo, copy,
move, flip, align etc.

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LAB – 2
FULL CUSTOM LAYOUT GENERATION
Create new project, add library path and select angle. In preferences
turn on port names.
Now we create nmos transistor:

Fig. 27
By selecting two different layer you can create your first
rectangle shape.

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In next step we create contacts for drain and source
which control the flow of current gives ones or zeros.

Fig. 28
Two green boxes are the two contacts for nmos
transistor which are drain and source.
Here we cannot defining the transistor type that it is
n-type or p-type but we are just defining size of
transistor.

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Next we create pmos transistor by copying nmos and
make electrical connections.

Fig. 29
We connect the drains of the circuits, add VDD, GND and
power rails. Changing port name value.

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LAB – 3
SCHEMATIC DRIVEN LAYOUT
Now I learn about new tools called design view point
editor (dve). Where we can modify our design and can
see the impact without changing our base design.
We draw nand gate on schematic layout

Fig. 30( Taken from manual )


Click on prepare for layout which links our design to Pyxis
Layout for dve.

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Using auto instantiation to generate specified instances.

Fig. 31

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LAB – 4
DESIGNING LAYOUT USING LDL COCKPIT
If we want visualize circuit hierarchy we LDL cockpit view
which is Pyxis layout tool.

Fig. 32

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LAB - 5
AUTOMATED FLOW FOR LARGER CELLS
We use auto floor plan for big circuit. The command is very helpful and
can be used for any circuit. It rearrange circuit make the circuit more
readable.

Fig. 33
(Import design you can see how each module connect to
other module)

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Conclusion
After hands on experience on many labs and software
now I am to design my own integrated circuits. I can
design some bigger circuits and debug them if there is
any error.

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