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1
1. lightly
2. heavily
3. moderately
4. none of the above
Answer : 2
Q10. In a transistor, the base current is about ………….. of emitter current
1. 25%
2. 20%
3. 35 %
4. 5%
Answer : 4
Q11. At the base-emitter junctions of a transistor, one finds ……………
1. a reverse bias
2. a wide depletion layer
3. low resistance
4. none of the above
Answer : 3
Q12. The input impedance of a transistor is ………….
1. high
2. low
3. very high
4. almost zero
Answer : 2
Q13. Most of the majority carriers from the emitter ………………..
1. recombine in the base
2. recombine in the emitter
3. pass through the base region to the collector
4. none of the above
Answer :3
Q14. The current IB is …………
1. electron current
2. hole current
3. donor ion current
4. acceptor ion current
Answer : 1
Q15. In a transistor ………………..
IC = IE + IB
IB = IC + IE
IE = IC – IB
IE = IC + IB
Answer : 4
Q16. The value of α of a transistor is ……….
more than 1
less than 1
1
none of the above
Answer : 2
Q17. IC = αIE + ………….
1. IB
2. ICEO
3. ICBO
2
4. βIB
Answer : 3
Q18. The output impedance of a transistor is ……………..
1. high
2. zero
3. low
4. very low
Answer : 1
Q19. In a tansistor, IC = 100 mA and IE = 100.2 mA. The value of β is …………
1. 100
2. 50
3. about 1
4. 200
Answer : 4
Q20. In a transistor if β = 100 and collector current is 10 mA, then IE is …………
1. 100 mA
2. 100.1 mA
3. 110 mA
4. none of the above
Answer : 2
Q21. The relation between β and α is …………..
1. β = 1 / (1 – α )
2. β = (1 – α ) / α
3. β = α / (1 – α )
4. β = α / (1 + α )
Answer : 3
Q22. The value of β for a transistor is generally ………………..
1. 1
2. less than 1
3. between 20 and 500
4. above 500
Answer : 3
Q23. The most commonly used transistor arrangement is …………… arrangement
1. common emitter
2. common base
3. common collector
4. none of the above
Answer : 1
Q24. The input impedance of a transistor connected in …………….. arrangement is the
highest
1. common emitter
2. common collector
3. common base
4. none of the above
Answer : 2
Q25. The output impedance of a transistor connected in ……………. arrangement is the
highest
1. common emitter
2. common collector
3. common base
4. none of the above
3
Answer : 3
Q26. The phase difference between the input and output voltages in a common base
arrangement is …………….
1. 180o
2. 90o
3. 270o
4. 0o
Answer : 4
Q27. The power gain in a transistor connected in ……………. arrangement is the highest
1. common emitter
2. common base
3. common collector
4. none of the above
Answer : 1
Q28. The phase difference between the input and output voltages of a transistor
connected in common emitter arrangement is ………………
1. 0o
2. 180o
3. 90o
4. 270o
Answer : 2
Q29. The voltage gain in a transistor connected in ………………. arrangement is the
highest
1. common base
2. common collector
3. common emitter
4. none of the above
Answer : 3
Q30. As the temperature of a transistor goes up, the base-emitter resistance ……………
1. decreases
2. increases
3. remains the same
4. none of the above
Answer : 1
Q31. The voltage gain of a transistor connected in common collector arrangement is
………..
1. equal to 1
2. more than 10
3. more than 100
4. less than 1
Answer : 4
Q32. The phase difference between the input and output voltages of a transistor
connected in common collector arrangement is ………………
1. 180o
2. 0o
3. 90o
4. 270o
Answer : 2
Q33. IC = β IB + ………..
1. ICBO
2. IC
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3. ICEO
4. αIE
Answer : 3
Q34. IC = [α / (1 – α )] IB + ………….
1. ICEO
2. ICBO
3. IC
4. (1 – α ) IB
Answer : 1
Q35. IC = [α / (1 – α )] IB + […….. / (1 – α )]
1. ICBO
2. ICEO
3. IC
4. IE
Answer : 1
Q36. BC 147 transistor indicates that it is made of …………..
1. germanium
2. silicon
3. carbon
4. none of the above
Answer : 2
Q37. ICEO = (………) ICBO
1. β
2. 1 + α
3. 1 + β
4. none of the above
Answer : 3
Q38. A transistor is connected in CB mode. If it is not connected in CE mode with same
bias voltages, the values of IE, IB and IC will …………..
1. remain the same
2. increase
3. decrease
4. none of the above
Answer : 1
Q39. If the value of α is 0.9, then value of β is ………..
1. 9
2. 0.9
3. 900
4. 90
Answer : 4
Q40. In a transistor, signal is transferred from a …………… circuit
1. high resistance to low resistance
2. low resistance to high resistance
3. high resistance to high resistance
4. low resistance to low resistance
Answer : 2
Q41. The arrow in the symbol of a transistor indicates the direction of ………….
1. electron current in the emitter
2. electron current in the collector
3. hole current in the emitter
4. donor ion current
5
Answer : 3
Q42. The leakage current in CE arrangement is ……………. that in CB arrangement
1. more than
2. less than
3. the same as
4. none of the above
Answer : 1
Q43. A heat sink is generally used with a transistor to …………
1. increase the forward current
2. decrease the forward current
3. compensate for excessive doping
4. prevent excessive temperature rise
Answer : 4
Q44. The most commonly used semiconductor in the manufacture of a transistor is
………….
1. germanium
2. silicon
3. carbon
4. none of the above
Answer : 2
Q45. The collector-base junction in a transistor has ……………..
1. forward bias at all times
2. reverse bias at all times
3. low resistance
4. none of the above
Answer : 2
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Q4. The gain of an amplifier without feedback is 100 db. If a negative feedback of 3 db is applied,
the gain of the amplifier will become …………..
1. 5 db
2. 300 db
3. 103 db
4. 97 db
Answer : 4
Q5. If the feedback fraction of an amplifier is 0.01, then voltage gain with negative feedback is
approximately………..
1. 500
2. 100
3. 1000
4. 5000
Answer : 2
Q6. A feedback circuit usually employs ……………… network
1. Resistive
2. Capacitive
3. Inductive
4. None of the above
Answer : 1
Q7. The gain of an amplifier with feedback is known as ………….. gain
1. Resonant
2. Open loop
3. Closed loop
4. None of the above
Answer : 3
Q8. When voltage feedback (negative) is applied to an amplifier, its input impedance ………….
1. Is decreased
2. Is increased
3. Remains the same
4. None of the above
Answer : 2
Q9. When current feedback (negative) is applied to an amplifier, its input impedance …………..
1. Is decreased
2. Is increased
3. Remains the same
4. None of the above
Answer : 1
Q10. Negative feedback is employed in ……………..
1. Oscillators
2. Rectifiers
3. Amplifiers
4. None of the above
Answer : 3
Q11. Emitter follower is used for …………
1. Current gain
2. Impedance matching
3. Voltage gain
4. None of the above
Answer : 2
Q12. The voltage gain of an emitter follower is ………..
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1. Much less than 1
2. Approximately equal to 1
3. Greater than 1
4. None of the above
Answer : 2
Q13. When current feedback (negative) is applied to an amplifier, its output impedance ……..
1. Is increased
2. Is decreased
3. Remains the same
4. None of the above
Answer : 1
Q14. Emitter follower is a ……………….. circuit
1. Voltage feedback
2. Current feedback
3. Both voltage and current feedback
4. None of the above
Answer : 2
Q15. If voltage feedback (negative) is applied to an amplifier, its output impedance …………..
1. Remains the same
2. Is increased
3. Is decreased
4. None of the above
Answer : 3
Q16. When a negative voltage feedback is applied to an amplifier, its bandwidth……….
1. Is increased
2. Is decreased
3. Remains the same
4. Insufficient data
Answer : 1
Q17. An emitter follower has ………… input impedance
1. Zero
2. Low
3. High
4. None of the above
Answer : 3
Q18. This question will be available soon
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A. infinite output impedance
C. infinite bandwidth
B. comparator
C. single ended
D. voltage follower
Answer: Option D
D. same as Acl
Answer: Option B
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A. sine wave
B. square wave
C. sawtooth wave
D. triangle wave
Answer: Option D
B. switching regulator
C. shunt regulator
D. dc-to-dc converter
Answer: Option A
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A. a low-pass filter
B. a high-pass filter
C. a bandpass filter
D. a band-stop filter
Answer: Option D
C. of zero
D. equal to one
Answer: Option B
8. In order for an output to swing above and below a zero reference, the op-amp circuit
requires:
A. a resistive feedback network
B. zero offset
C. a wide bandwidth
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9. Op-amps used as high- and low-pass filter circuits employ which configuration?
A. noninverting
B. comparator
C. open-loop
D. inverting
Answer: Option D
10.
1. Which circuit is used for obtaining desired output waveform in operational amplifier?
a) Clipper
b) Clamper
c) Peak amplifier
d) Sample and hold
View Answer
Answer: a
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2. The clipping level in op-amp is determined by
a) AC supply voltage
b) Control voltage
c) Reference voltage
d) Input voltage
View Answer
Answer: c
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5. Find the output waveform for when Vin < Vref
View Answer
Answer: c
6. What happens if the input voltage is higher than reference voltage in a positive clipper?
a) Output voltage = Reference voltage
b) Output voltage = DC Positive voltage
c) Output voltage = Input voltage
d) All of the mentioned
View Answer
14
Answer: a
8. Determine the output waveform of negative small signal half wave rectifier.
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View Answer
Answer: d
10. How to minimize the response time and increase the operating frequency range of the op-
amp?
a) Positive halfwave rectifier with two diodes
b) Positive halfwave rectifier with one diode
c) Negative halfwave rectifier with two diodes
d) Negative halfwave rectifier with one diode
View Answer
Answer: c
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11. Why a voltage follower stage is connected at the output of the negative small signal half
wave rectifier?
a) Due to Non-uniform input resistance
b) Due to Non-uniform output resistance
c) Due to Uniform output voltage
d) None of the mentioned
View Answer
Answer: b
12. A circuit with a predetermined dc level is added to the output voltage of the op-amp is called
a) Clamper
b) Positive clipper
c) Halfwave rectifier
d) None of the mentioned
View Answer
Answer: a
13. Determine the output waveform for a peak amplifier with input =4Vpsinewave and Vref=1V.
17
View Answer
Answer: a
15. At what values of Ci and Rd a precision clamping can obtained in peak clamper when the
time period of the input waveform is 0.4s?
a) Ci=0.1µF and Rd=10kΩ
b) Ci=0.47µF and Rd=10kΩ
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c) Ci=33µF and Rd=10kΩ
d) Ci=2.5µF and Rd=10kΩ
View Answer
Answer: a
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2. Three
3. Four
4. Five
Answer : 3
Q8. A diac has …………… pn junctions
1. Four
2. Two
3. Three
4. None of the above
Answer : 2
Q9. The device that does not have the gate terminal is ……………….
1. Triac
2. FET
3. SCR
4. Diac
Answer : 4
Q10. A diac has ……………… semiconductor layers
1. Three
2. Two
3. Four
4. None of the above
Answer : 1
Q11. A UJT has ……………….
1. Two pn junctions
2. One pn junction
3. Three pn junctions
4. None of the above
Answer : 2
Q12. The normal way to turn on a diac is by ………………..
1. Gate current
2. Gate voltage
3. Breakover voltage
4. None of the above
Answer : 3
Q13. A diac is …………………. switch
1. An c.
2. A d.c.
3. A mechanical
4. None of the above
Answer : 1
Q14. In a UJT, the p-type emitter is ……………. doped
1. Lightly
2. Heavily
3. Moderately
4. None of the above
Answer : 2
Q15. Power electronics essentially deals with control of a.c. power at …………
1. Frequencies above 20 kHz
2. Frequencies above 1000 kHz
3. Frequencies less than 10 Hz
4. 50 Hz frequency
20
Answer : 4
Q16. When the emitter terminal of a UJT is open, the resistance between the base terminal is
generally ………………..
1. High
2. Low
3. Extremely low
4. None of the above
Answer : 1
Q17. When a UJT is turned ON, the resistance between emitter terminal and lower base terminal
…………….
1. Remains the same
2. Is decreased
3. Is increased
4. None of the above
Answer : 2
Q18. To turn on UJT, the forward bias on the emitter diode should be …………… the peak point
voltage
1. Less than
2. Equal to
3. More than
4. None of the above
Answer : 3
Q19. A UJT is sometimes called …………. diode
1. Low resistance
2. High resistance
3. Single-base
4. Double-base
Answer : 4
Q20. When the temperature increases, the inter-base resistance (RBB) of a UJT ………….
1. Increases
2. Decreases
3. Remains the same
4. None of the above
Answer : 1
Q21. This question will be available soon
Q22. When the temperature increases, the intrinsic stand off ratio ……….
1. Increases
2. Decreases
3. Essentially remains the same
4. None of the above
Answer : 3
Q23. Between the peak point and the valley point of UJT emitter characteristics we have …………..
region
1. Saturation
2. Negative resistance
3. Cut-off
4. None of the above
Answer : 2
Q24. A diac is turned on by …………………
1. A breakover voltage
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2. Gate voltage
3. Gate current
4. None of the above
Answer : 1
Q25. The device that exhibits negative resistance region is ………………..
1. Diac
2. Triac
3. Transistor
4. UJT
Answer : 4
Q26. The UJT may be used as ……………….
1. Am amplifier
2. A sawtooth generator
3. A rectifier
4. None of the above
Answer : 2
Q27. A diac is simply ………………
1. A single junction device
2. A three junction device
3. A triac without gate terminal
4. None of the above
Answer : 3
Q28. After peak point, the UJT operates in the ……………. region
1. Cut-off
2. Saturation
3. Negative resistance
4. None of the above
Answer : 3
Q29. Which of the following is not a characteristic of UJT?
1. Intrinsic stand off ratio
2. Negative resistance
3. Peak-point voltage
4. Bilateral conduction
Answer : 4
Q30. The triac is …………….
1. Like a bidirectional SCR
2. A four-terminal device
3. Not a thyristor
4. Answers (1) and (2)
Answer : 1
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d) P-N device
View Answer
Answer: c
3. An SCR is a
a) four layer, four junction device
b) four layer, three junction device
c) four layer, two junction device
d) three layer, single junction device
View Answer
Answer: b
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d) none of the mentioned
Answer: b.
7. If the cathode of an SCR is made positive with respect to the anode & no gate current is
applied then
a) all the junctions are reversed biased
b) all the junctions are forward biased
c) only the middle junction is forward biased
d) only the middle junction is reversed biased
View Answer
Answer: c.
9. With the anode positive with respect to the cathode & the gate circuit open, the SCR is said to
be in the
a) reverse blocking mode
b) reverse conduction mode
c) forward blocking mode
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d) forward conduction mode
View Answer
Answer: c
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d) MOSFET is a temperature controlled device
View Answer
Answer: b
26
b) Ig
c) Vgs
d) Is
View Answer
Answer: b
9. In the transfer characteristics of a MOSFET, the threshold voltage is the measure of the
a) minimum voltage to induce a n-channel/p-channel for conduction
b) minimum voltage till which temperature is constant
c) minimum voltage to turn off the device
d) none of the above mentioned is true
View Answer
Answer: a
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Power Electronics Question and Answers – MOSFETs-2
1. In the output characteristics of a MOSFET with low values of Vds, the value of the on-state
resistance is
a) Vds/Ig
b) Vds/Id
c) 0
d) ∞
View Answer
Answer: b
2. At turn-on the initial delay or turn on delay is the time required for the
a) input inductance to charge to the threshold value
b) input capacitance to charge to the threshold value
c) input inductance to discharge to the threshold value
d) input capacitance to discharge to the threshold value
View Answer
Answer: b
4. Which among the following devices is the most suited for high frequency applications?
a) BJT
b) IGBT
c) MOSFET
d) SCR
View Answer
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Answer: c
7. For a MOSFET Vgs=3V, Idss=5A, and Id=2A. Find the pinch of voltage Vp
a) 4.08
b) 8.16
c) 16.32
d) 0V
View Answer
Answer: b
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9. The basic advantage of the CMOS technology is that
a) It is easily available
b) It has small size
c) It has lower power consumption
d) It has better switching capabilities
View Answer
Answer: c
10. The N-channel MOSFET is considered better than the P-channel MOSFET due to its
a) low noise levels
b) TTL compatibility
c) lower input impedance
d) faster operation
View Answer
Answer: d
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c) losses are maximum
d) anode to cathode voltage is zero
Answer: a
3. The minimum value of anode current below which it must fall to completely turn-off the device
is called as the
a) holding current value
b) latching current value
c) switching current value
d) peak anode current value
Answer: a
4. For an SCR the total turn-on time consists of
i) Delay time
ii) Rise time and
iii) Spread time
During the rise time the
a) anode current flows only near the gate
b) anode current rises from zero to very high value
c) losses are maximum
d) anode to cathode voltage is zero
Answer: c
5. The latching current is _________ than the holding current
a) lower
b) higher
c) same as
d) negative of
Answer: b.
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d) area of the anode
View Answer
Answer: c
7. For effective turning off of the SCR after the anode current has reached zero value,
______________
a) chargers are injected by applying reverse anode-cathode voltage
b) chargers are removed by applying reverse anode-cathode voltage
c) chargers are injected by applying gate signal
d) chargers are removed by applying gate signal
View Answer
Answer: b
10. The area under the curve of the gate characteristics of thyristor gives the
a) total average gate current
b) total average gate voltage
c) total average gate impedance
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d) total average gate power dissipation
View Answer
Answer: d
Answer: a
3. The three terminals of the IGBT are
a) base, emitter & collector
b) gate, source & drain
c) gate, emitter & collector
d) base, source & drain
View AnswerAnswer: c
4. In IGBT, the p+ layer connected to the collector terminal is called as the
a) drift layer
b) injection layer
c) body layer
d) collector Layer
View AnswerAnswer: b
5. The controlling parameter in IGBT is the
a) IG
b) VGE
c) IC
d) VCE
View Answer
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Answer: b
6. In IGBT, the n– layer above the p+ layer is called as the
a) drift layer
b) injection layer
c) body layer
d) collector Layer
View Answer
Answer: a
7. The voltage blocking capability of the IGBT is determined by the
a) injection layer
b) body layer
c) metal used for the contacts
d) drift layer
View Answer
Answer: d
10. The major drawback of the first generation IGBTs was that, they had
a) latch-up problems
b) noise & secondary breakdown problems
c) sluggish operation
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d) latch-up & secondary breakdown problems
View Answer
Answer: d
Answer: a
35
d) the device temperature reaches a certain value
View Answer
Answer: b
36
Answer: d
10. At present, the state-of-the-art semiconductor devices are begin manufactured using
a) Semiconducting Diamond
b) Gallium-Arsenide
c) Germanium
d) Silicon-Carbide
View Answer
Answer: d
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d) Detectors
View Answer
Answer: c
3. The optical path length in nonlinear medium is integer number of ______ wavelength.
a) Half
b) Double
c) Three-fourth
d) Single
View Answer
Answer: a
4. As compared to laser, the value of _________ in the cavity controls the optical transmission.
a) Amplification
b) Refractive index
c) Rectification
d) Reflection
View Answer
Answer: b
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d) Bistable optical devices
View Answer
Answer: d
39
d) Electrical
View Answer
Answer: a
40
d) Semiconductor laser
View Answer
Answer: a
4. The carrier recombination lifetime becomes majority or injected carrier lifetime. State whether
the given statement is true or false.
a) True
41
b) False
View Answer
Answer: b
6. Determine the total carrier recombination lifetime of a double heterojunction LED where the
radioactive and nonradioactive recombination lifetime of minority carriers in active region are 70
ns and 100 ns respectively.
a) 41.17 ns
b) 35 ns
c) 40 ns
d) 37.5 ns
View Answer
Answer: a
7. Determine the internal quantum efficiency generated within a device when it has a radiative
recombination lifetime of 80 ns and total carrier recombination lifetime of 40 ns.
a) 20 %
b) 80 %
c) 30 %
d) 40 %
View Answer
Answer: b
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a) 0.09
b) 0.039
c) 0.04
d) 0.06
View Answer
Answer: b
9. The Lambertian intensity distribution __________ the external power efficiency by some
percent.
a) Reduces
b) Does not affects
c) Increases
d) Have a negligible effect
View Answer
Answer: a
10. A planar LED fabricated from GaAs has a refractive index of 2.5. Compute the optical power
emitted when transmission factor is 0.68.
a) 3.4 %
b) 1.23 %
c) 2.72 %
d) 3.62 %
View Answer
Answer: c
11. A planar LED is fabricated from GaAs is having a optical power emitted is 0.018% of optical
power generated internally which is 0.018% of optical power generated internally which is 0.6 P.
Determine external power efficiency.
a) 0.18%
b) 0.32%
c) 0.65%
d) 0.9%
View Answer
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Answer: d
12. For a GaAs LED, the coupling efficiency is 0.05. Compute the optical loss in decibels.
a) 12.3 dB
b) 14 dB
c) 13.01 dB
d) 14.6 dB
View Answer
Answer: c
13. In a GaAs LED, compute the loss relative to internally generated optical power in the fiber
when there is small air gap between LED and fiber core. (Fiber coupled = 5.5 * 10-4Pint)
a) 34 dB
b) 32.59 dB
c) 42 dB
d) 33.1 dB
View Answer
Answer: b
14. Determine coupling efficiency into the fiber when GaAs LED is in close proximity to fiber
core having numerical aperture of 0.3
a) 0.9
b) 0.3
c) 0.6
d)0.12
View Answer
Answer: a
15. If a particular optical power is coupled from an incoherent LED into a low-NA fiber, the
device must exhibit very high radiance . State whether the given statement is true or false.
a) True
b) False
View Answer
44
Answer: a
2. The volt is the units of emf that was named after its inventor _________
a) Alessandro volta
b) Alxender volta
c) Alexa volta
d) Alexandro volta
View Answer
Answer: a
4. When the source of light is not sun light then the photo voltaic cell is used as ____________
a) Photo diode
b) Photo voltaic cell
c) Photo detector
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d) Photo transmitter
View Answer
Answer: c
5. The region where the electrons and holes diffused across the junction is called ________
a) Depletion Junction
b) Depletion region
c) Depletion space
d) Depletion boundary
View Answer
Answer: b
7. The amount of photo generated current increases slightly with increase in _________
a) Temperature
b) Photons
c) Diode current
d) Shunt current
View Answer
Answer: a
8. Solar cells are made from bulk materials that are cut into wafer of _________ thickness.
a) 120-180μm
b) 120-220μm
c) 180-220μm
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d) 180-240μm
View Answer
Answer: d
9. __________ is one of the most important materials is also known as solar grade silicon.
a) Crushed silicon
b) Crystalline silicon
c) Powdered silicon
d) Silicon
View Answer
Answer: b
12. Dye-sensitized solar cells are made from ________ organic dye.
a) Ruthium melallo
b) Aniline
c) Safranine
47
d) Induline
View Answer
Answer: a
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48
Multiple Choice Questions (MCQ) on Soldering and Brazing
a. Borax
b. Rosin
c. Lead sulphide
d. Zinc chloride
(Ans:a)
a. below 420°C
b. above 420°C
c. below 520°C
d. above 520°C
(Ans:b)
a. lead-37%, tin-63%
b. lead-50%, tin-50%
c. lead-63%, tin-37%
d. lead-70%, tin-30%
49
(Ans:d)
Q1. Which component in an inverter circuit plays a crucial role in the removal of minority
charge carriers at base specifically due to sudden variation of signal between logic
states?
a. Load Resistor
b. Base Inductor
c. Capacitor
d. None of the above
ANSWER: c. Capacitor
Q2. Which of the below stated application/s employ Ex-OR gate from the arithmetic
functioning point of view?
a. Matching Circuit
b. Equality Detector
c. Inequality Comparator
d. All of the above
ANSWER: d. All of the above
Q3. Which gates are sequentially cascaded or involved in an entire logic-array of AND-
OR-INVERT (AOI) configuration?
a. AND-OR-AND
b. AND-OR-NOT
c. AND-OR-NOR
d. AND-OR-EX-OR
ANSWER: b. AND-OR-NOT
Q1. Which boolean expression satisfies the logic statement condition “If A= 1 & B= 0 or if
B=1 & A=0 ,then output Y =1” ?
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a. Y = AB +BA
b. Y = AB + BA
c. Y = A B + B A
d. Y = AB+BA
ANSWER: c. Y = A B + B A
Q2. Which gate generates no output when two of its inputs are at the opposite logic
level?
a. X-NOR
b. X-OR
c. XOR
d. NOR
ANSWER: a. X-NOR
Q3. Which gate behaves as an inversion or complementation reminder before the AND
operation of inputs ?
a. OR gate
b. NOR gate
c. Bubbled AND gate
d. None of the above
B. A = 0, B = 0, C = 0
C. A = 1, B = 1, C = 1
D. A = 1, B = 0, C = 1
Answer: Option C
Explanation:
No answer description available for this question. Let us discuss.
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2. If a 3-input NOR gate has eight input possibilities, how many of those possibilities will result
in a HIGH output?
A. 1
B. 2
C. 7
D. 8
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
3. If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and
the output is HIGH, the gate is a(n):
A. AND
B. NAND
C. NOR
D. OR
Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.
4. A device used to display one or more digital signals so that they can be compared to
expected timing diagrams for the signals is a:
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A. DMM
B. spectrum analyzer
C. logic analyzer
D. frequency counter
Answer: Option C
Explanation:
No answer description available for this question. Let us discuss.
5. When used with an IC, what does the term "QUAD" indicate?
A. 2 circuits
B. 4 circuits
C. 6 circuits
D. 8 circuits
Answer: Option B
1. The output of a logic gate is 1 when all the input are at logic 0 as shown below:
INPUT OUTPUT
A B C
0 0 1
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0 1 0
1 0 0
1 1 0
INPUT OUTPUT
A B C
0 0 1
0 1 0
1 0 0
1 1 1
2. The code where all successive numbers differ from their preceding number by single bit is
a) Binary code
b) BCD
c) Excess 3
d) Gray
View Answer
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Answer: d
5. The NOR gate output will be high if the two inputs are
a) 00
b) 01
c) 10
d) 11
View Answer
Answer: a
6. How many two-input AND and OR gates are required to realize Y = CD+EF+G?
a) 2, 2
b) 2, 3
c) 3, 3
d) None of the Mentioned
View Answer
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Answer: a
7. A universal logic gate is one which can be used to generate any logic function. Which of the
following is a universal logic gate?
a) OR
b) AND
c) XOR
d) NAND
View Answer
Answer: d
9. How many two input AND gates and two input OR gates are required to realize Y = BD + CE
+ AB?
a) 1, 1
b) 4, 2
c) 3, 2
d) 2, 3
View Answer
Answer: a
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Answer: a
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a) a
b) b
c) c
d) d
View Answer
Answer: d
2. Which of the following logic expressions represents the logic diagram shown?
a) X=AB’+A’B
b) X=(AB)’+AB
c) X=(AB)’+A’B’
d) X=A’B’+AB
View Answer
Answer: d
a) Comparator
b) Multiplexer
c) Inverter
d) Demultiplexer
View Answer
Answer: d
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4. What type of logic circuit is represented by the figure shown below?
a) XOR
b) XNOR
c) AND
d) XAND
View Answer
Answer: b
5. For a two-input XNOR gate, with the input waveforms as shown below, which output
waveform is correct?
a) d
b) a
c) c
d) b
View Answer
Answer: a
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6. Which of the following combinations of logic gates can decode binary 1101?
a) One 4-input AND gate
b) One 4-input AND gate, one inverter
c) One 4-input AND gate, one OR gate
d) One 4-input NAND gate, one inverter
View Answer
Answer: b
8. For the device shown here, assume the D input is LOW, both S inputs are LOW and the input
is LOW. What is the status of the Y’ outputs?
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c) Cp = A XOR B
d) Cp = A + B’
View Answer
Answer: b
1. Latches constructed with NOR and NAND gates tend to remain in the latched condition due
to which configuration feature?
a) Low input voltages
b) Synchronous operation
c) Gate impedance
d) Cross coupling
View Answer
Answer: d
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3. The truth table for an S-R flip-flop has how many VALID entries?
a) 1
b) 2
c) 3
d) 4
View Answer
Answer: c
6. A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?
a) AND or OR gates
b) XOR or XNOR gates
c) NOR or NAND gates
d) AND or NOR gates
View Answer
Answer: c
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7. The logic circuits whose outputs at any instant of time depends only on the present input but
also on the past outputs are called
a) Combinational circuits
b) Sequential circuits
c) Latches
d) Flip-flops
View Answer
Answer: b
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11. The basic latch consist of
a) Two inverters
b) Two comparators
c) Two amplifiers
d) None of the Mentioned
View Answer
Answer: a
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15. The circuits of NOR based S-R latch classified as asynchronous sequential circuits, why?
a) Because of inverted outputs
b) Because of triggering functionality
c) Because of cross-coupled connection
d) Both a & b
View Answer
Answer: c
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Answer: a
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8. Run times are _______ to number of devices and nodes
a) linearly related
b) inversely related
c) expoenentially equal
d) does not relate
View Answer
Answer: a
11. The charge carriers reach _____ scattering limited velocity before pinch off
a) maximum
b) minimum
c) less
d) equal
View Answer
Answer: a
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12. Less current is available from
a) short channel transistor
b) large channel transistor
c) very large channel transistor
d) does not depend on channel transistor
View Answer
Answer: a
14. Logic simulators can be replaced by simulators which operate at transistor level.
a) true
b) false
View Answer
Answer: b
This set of Digital Electronics/Circuits Multiple Choice Questions & Answers (MCQs) focuses on
“Shift Register Counters”.
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Answer: a
3. A bidirectional 4-bit shift register is storing the nibble 1110. Its input is LOW. The nibble 0111
is waiting to be entered on the serial data-input line. After two clock pulses, the shift register is
storing ________
a) 1110
b) 0111
c) 1000
d) 1001
View Answer
Answer: d
5. The group of bits 10110111 is serially shifted (right-most bit first) into an 8-bit parallel output
shift register with an initial state 11110000. After two clock pulses, the register contains
a) 10111000
b) 10110111
c) 11110000
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d) 11111100
View Answer
Answer: d
7. What type of register would have a complete binary number shifted in one bit at a time and
have all the stored bits shifted out one at a time?
a) Parallel-in Parallel-out
b) Parallel-in Serial-out
c) Serial-in Parallel-out
d) Serial-in Serial-out
View Answer
Answer: c
8. In a 4-bit Johnson counter sequence there are a total of how many states, or bit patterns?
a) 1
b) 3
c) 4
d) 8
View Answer
Answer: d
9. If a 10-bit ring counter has an initial state 1101000000, what is the state after the second
clock pulse?
a) 1101000000
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b) 0011010000
c) 1100000000
d) 0000000000
View Answer
Answer: b
10. How much storage capacity does each stage in a shift register represent?
a) One bit
b) Two bits
c) Four bits
d) Eight bits
View Answer
Answer: a
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2. Find the charging and discharging time of 0.5µF capacitor.
3. Astable multivibrator operating at 150Hz has a discharge time of 2.5m. Find the duty cycle of
the circuit.
a) 50%
b) 75%
c) 95.99%
d) 37.5%
View Answer
Answer: d
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4. Determine the frequency and duty cycle of a rectangular wave generator.
5. How to achieve 50% duty cycle in adjustable rectangular wave generator? (Assume R1 –>
Resistor connected between supply and discharge and R2 –> Resistor connected between
discharge and trigger input.)
a) R1 < R2
b) R1 > R2
c) R1 = R2
d) R1 ≥ R2
View Answer
Answer: c
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6. How to obtain symmetrical waveform in Astable multivibrator?
a) Use clocked RS flip-flop
b) Use clocked JK flip-flop
c) Use clocked D-flip-flop
d) Use clocked T-flip-flop
View Answer
Answer: b
a) 1450Hz
b) 1333Hz
c) 1871Hz
d) 1700Hz
View Answer
Answer: c
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d) Using sine wave generator
View Answer
Answer: a
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