UNIVERSITY OF NAIROBI

FACULTY OF ENGINEERING

DEPARTMENT OF ELECTRICAL AND INFORMATION ENGINEERING

PROJECT NUMBER: PR37

TITLE: 400W CLASS H AMPLIFIER

AUTHOR: NABWILE HILDA SIMIYU

REG NO: F17/3003/2009

SUPERVISOR: MR. COLLINS OMBURA

EXAMINER: DR.HEYWOOD OUMA

Project report submitted in partial fulfillment of the requirement of the award of the Bachelor of Science Degree in
Electrical and Electronic Engineering

Date of submission: 28th April 2014

DECLARATION OF ORIGINALITY

FACULTY/ SCHOOL/ INSTITUTE: School of Engineering

DEPARTMENT: Electrical and Information Engineering
COURSE NAME: Bachelor of Science (Electrical & Electronic Engineering)
NAME OF STUDENT: NABWILE HILDA SIMIYU
REGISTRATION NUMBER: F17/3003/2009
COLLEGE: College of Architecture and Engineering
WORK: CLASS H POWER AMPLIFIER

1) I understand what plagiarism is and I am aware of the university policy in this regard.
2) I declare that this final year project report is my original work and has not been submitted elsewhere for
examination, award of a degree or publication. Where other people’s work or my own work has been used,
this has properly been acknowledged and referenced in accordance with the University of Nairobi’s
requirements.
3) I have not sought or used the services of any professional agencies to produce this work.
4) I have not allowed, and shall not allow anyone to copy my work with the intention of passing it as their own work.
5) I understand that any false claim in respect of this work shall result in disciplinary action, in accordance with
University anti-plagiarism policy.

Signature: ………………………………………………………………………………………

Date: ……………………………………………………………………………………………
 DEDICATION

This project work is dedicated to my family.

ACKNOWLEDGEMENT
I am totally thankful to God for His unconditional love and provision in the duration that I worked on this
project. I am also grateful to my supervisor Mr. Collins Ombura for all the guidance he accorded me in
regards to this project. Lastly, I would like to thank my family members, friends and colleagues for the
necessary support they accorded me in the course of my study.
ABSTRACT
This project requires the design and implementation of a high power amplifier that has a
class H configuration at its output. The Class H amplifier modifies the class AB output
stage with more techniques to enhance efficiency with lower distortion. This project
involves circuit design , simulation on Proteus or Simulink, analysis of designed circuit
as well as circuit fabrication. Results of the performance characteristics from the
simulation on MULTISIM are looked into.
TABLE OF CONTENTS
Declaration of originality....................................................................................... i
Dedication………………………………………………………………………….ii
Abstract.................................................................................................................... 1
Contents .................................................................................................................... 2
List of figures .......................................................................................................... 3

List of Abbreviations............................................................................................... 4

1. Introduction………………………………………………………………....5
1.1 Project objective…………………………………………...……5
1.2 Problem Definition…………………………………………..….5
1.3 Scope of Work ……………………………………………….…6
1.4 Thesis outline………………………………………………….…7
2. Literature Review …………………………………………………………..8
2.1 Introduction to the amplifier…………………………………..8
2.2 Amplifier stages………………………………………………....8
2.2.1 the input stage……………………………….…...8
2.2.2 the voltage amplifier stages……………………..10
2.2.3 The output stage………………………………..12
2.3 Amplifier Classes …………………………………………..….16
2.4 Stability, Distortion and performance of the amplifier……..24
2.4.1 Distortion in Amplifier………………………….24
2.4.2 Stability of the amplifier…………………….…27
3. Methodology
3.1 The input stage……………………………………………….28
3.2 Voltage Amplifier Stage……………………………………...30
3.3 The Output Stage………………………………………….….32
3.4 Heat sink design………………………………………………36
4. Results
4.1 Class H Amplifier Circuit……………………………….…….38
4.2 Testing IPS and VAS………………………………………….38
4.3 Output and input waveforms………………………………….39
4.4 Slew rate……………………………………………………......41
4.5 Frequency Analysis…………………………………………….42
4.6 Distortion and noise analysis…………………………………..43
4.7 Input power…………………………………………………….48

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 4.8 Output power……………………………………………….….48
4.9 Amplifier efficiency…………………………………………….49
4.10Input sensitivity………………………………………….…49
4.11Implementation…………………………………….………49
5. References………………………………………………………………..50

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LIST OF ABBREVIATIONS

VAS: Voltage amplifier stage

DC: Direct Current

AC ; alternating current
OPS; output stage
dB: Decibels
F: frequency
HZ: Hertz
K: kilo
M: mega
m : milli
N: nano
P: pico
V: volts
Ω: ohms
Rms: root mean square
IPS: input stage
NFB: Negative feedback
R: resistor
Q: transistor
PA: Public Address
Vbe: base emitter voltage

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1. INTRODUCTION
1.1 PROJECT OBJECTIVE
The project requires the design and the implementation of a highly efficient 400W Class H
Amplifier for Public Address systems.

1.2 PROBLEM DEFINITION

Most audio amplifiers are limited in terms of power supply. The main principle behind the class
H amplifier is to have power amplifiers that can be operated from both low power supply rails
and high power supply rails depending on the input. This is achieved by having two power
supply rails that supply voltage and voltage is switched between upper voltage rails and lower
voltage rails by use of switching transistors.

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1.3 SCOPE OF WORK
The class H amplifier entails three stages: input stage, output stage and the voltage amplification
stage. The project covers the design and the analysis of all three stages and of their performance.
The scope of work covers design and implementation of the designed circuit.

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1.4 THESIS OUTLINE

Chapter 1 looks at the introduction to this project work. It entails the problem statement ,
problem definition, scope of work and the thesis outline.

Chapter 2 covers literature review which involves understanding all theoretical aspects of the
amplifier. This covers a detailed understanding of the amplifier stages and how they work, the
different amplifier classes, the performance specifications, the stability and the distortions
present in amplifiers and how they are eradicated. It also looks at the different gains present in
the amplifier.

Chapter 3 looks at the class H Amplifier designed in the duration of the project. It analyses the
different stages and gain. It also covers distortions present in the amplifier and explains how
stability is attained.

Chapter 4 covers the practical results. These are results obtained from the fabricated circuit and
oscilloscope results.

Chapter 5 is the conclusion of the work and recommendations that have arised during the
duration of this

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2. LITERATURE REVIEW
2.1 INTRODUCTION TO THE AMPLIFIER

An amplifier is an electronic device that increases the power of an input signal by taking
energy from a power supply and producing an output to match the input signal but with a larger
amplitude. In this sense, an amplifier modulates the output of the power supply.

2.2 AMPLIFIER STAGES.

The amplifiers have two architectures: the two stage architecture and the three stage architecture.
The three stage architecture consists of the transconductance stage (a voltage input gives a
current output), the transimpedance stage(a current input gives a voltage output) and the unity
gain output stage. Its main advantage is that it is easier to arrange and understand. A figure is
shown below.

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Figure 2.2.1: Three stage architecture

The two stage architecture consists of transconductance stage and the second stage consists of
both the Voltage Amplifier Stage and output in one block. The figure shown below explains the
above ineptly.

In comparison of the two architectures, the two stage amplifiers can be more complex in terms of
gain. Choosing compensation is also as complex in the two stage amplifier. It has poor distortion
performance and hence not as common. It offers no reduction and harder in design. On the other
hand the three stage amplifier has less distortion, is easier to design and understand, and suffers
less distortion

Figure 2.2.2: Two stage architecture

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The class H amplifier covered in this project is a three stage architecture amplifier hence the
three stages will be discussed here. Before looking into the functions and crucial factors about
the stages, it is significant to understand the operating frequencies of the amplifier. It has

 Low frequency: This is the frequency at which open loop gain remains fairly constant.
 High frequency
 Dominant pole frequency(P1 point)

2.2.1: THE INPUT STAGE (IPS)

This is the first stage and its main function is to convert a line level signal from a preceding
device and converting it into an amplified current signal which is fed to the Voltage Amplifier
Stage. It is also called the transconductance stage. The main factors or advantages of this stage
are high immunity to power supply variations (PSRR), high linearity to reduce distortion, low
noise generation, high immunity to output load variations and it should act as a good buffer to
input signal.

It has two major blocks that is the constant current sources and the mirror current source. The
constant current source supplies tail current in differential stage and improve stability, gain,
speed and common mode rejection characteristics. Every constant current source has decoupling
capacitors to smooth out load and power supply variations hence enhancing stability.

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Figure 2.2.2: The Input Stage and Voltage Amplifier stage

The mirror source improves linearity and doubles amplifiers output current capability and slew
rate. The two transistors in the input stage enhance linearity as they each introduce nonlinearities
which are opposite to each other, if the two transistors are matched they will end up cancelling
the non-linearity. If they are unbalanced, the non-linearity of the dominant transistor will
introduce a distortion. Therefore, it is relevant that the current balance of the differential
amplifier should be within 1% for optimum linearity. Whenever this balance is not achieved
emitter degeneration resistors are added to negate differences in Vbe of the two transistors. It can
also provide isolation from the positive supply rails or negative supply rails depending on design
of the amplifier hence improving power supply rejection ratio.

Distortions that are present in the input stage are due to non linearity produced due to imbalances
in the transistors present in the differential pair. This is eliminated by connecting the collector of
transistor Q1 to the base of Q2. This causes the Q2 to imitate the forward conduction of Q1.

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Hence total current from the current source is split evenly through the two legs of the current
mirror.

2.2.2 THE VOLTAGE AMPLIFICATION STAGE (VAS)

The main function is to provide voltage gain in the amplifier. It receives a buffered current
amplified input which it amplifies to a large signal voltage that is applied to the output stage.
Several VAS configurations are available for example cascade VAS, Buffered VAS,
bootstrapped VAS, Darlington VAS e.t.c. Choice of configuration depends on the performance
specifications defined.

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Figure 2.2.3 : Various topologies of voltage amplification stage.

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This stage also involves a Vbe multiplier. The Vbe multiplier acts as a bias generator.

Figure 2.2.4 The Vbe multiplier

The Vbe involves two resistors R12, R11, the potentiometer and the transistor. It also involves a
capacitor connected in parallel to improve rail rejection characteristics and filter high frequency
distortions. The Vbe multiplier generates a Vbias which prevents any possibility of thermal
runaway. However, it suffers from thermal losses and delays between output devices and
temperature sensor that make maintenance of optimal bias rather questionable.

2.2.3 THE OUTPUT STAGE

This is a unity voltage gain current amplifier. It receives high level voltage from VAS and this is
fed to a low impedance reactive load. Some output stages may involve voltage amplification

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which is rare but they are designed with motivation of reducing negative feedback and increasing
open loop bandwidth. The output stage has several topologies:

 Emitter follower (EF) topology.

 Complementary Feedback (CF) topology
 Quasi-complementary (QC) topology.

They are shown in Figure 2.2.6 below:

Figure 2.2.6 : The OPS topologies.

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The EF topology of 2.2.6b is the same as that of 2.2.6a only that a switchoff circuit is
incorporated in it. The switch off circuit ( Cs and R1 ) helps in turning off of output transistors
when their conduction period ceases. If this does not happen, both transistors will conduct at the
same time (cross conduction) which leads to increase in distortion and rapid overheating and
destruction of output devices. Increased cross conduction is called switching distortion and is
one of the major distortion in the OPS. Switching distortion is not noticeable at frequencies that
are less than 10Khz. Switching distortion can also be reduced by lowering impedances, this
provides a low impedance discharge path for any charges stored at the base of transistors.
Lowering the impedance also increases power dissipation and accentuates the effects of beta
droop.

Of the three topologies, EF and CF are used in 90% of modern amplifier design. The advantages
of EF include

i. Excellent stability.
ii. Good distortion performance.
iii. Reduction of switching distortion due to the switchoff circuit.
iv. Lower crossover distortion at lower power levels.

The disadvantages of Emitter Follower are:

i. Poor Vbias stability.

ii. Higher idling power dissipation.
iii. Greater susceptibility to beta droop non linearity.

The Complementary feedback topology has these advantages:

i. Best open loop linearity.

ii. Improved Vbias.
iii. Low idling power dissipation.
iv. Best large signal linearity.

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The disadvantages of Complementary Feedback are:

i. No practical provision of reducing crossover distortion. Unlike in Emitter Follower where

a switchoff circuit is added to reduce crossover distortion, this topology will require
addition of another voltage rail and addition of other devices. This makes the topology
complex and expensive despite its numerous advantages.
ii. It also experiences a lot of instability at high frequencies.

The Quasi complementary is as shown in figure 2.2.6(d) is a combination of EF and CF. it is

very uncommon. It is less expensive than the other two topologies but has increased non linearity
and higher instability. Choice of which topology to use will depend on amplifier designer and the
required specifications.

The three main distortions present in the OPS are

i. Crossover distortion: caused by nonconjugate Vbes of complementary amplifiers.

ii. Switching distortion which is caused by increased cross conduction of output
devices.
iii. Beta droop.

Other factors that are also considered in design of the OPS are reliability and thermal stability.
Heatsinks are designed to regulate quiescent current which if not regulated will cause the
amplifier to go into destructive thermal runway. The output stage of some amplifier classes are
seen in the next section where amplifier classes are discussed. The most common( over 90%
usage) output configuration use is that of a Class B amplifier and it is shown below:

17
Figure 2.2.5: Output stage of a class B amplifier.

The amplifier stages of Class H amplifier will be looked at in detail in the next chapter.

2.3 AMPLIFIER CLASSES

Amplifiers can be classified on several basis i.e type of signal, type of configuration, type of
class and type of frequency. This are shown in Table 2.3.1

Table 2.3.1 Classification of Amplifiers

Type of Frequency of
Type of Signal Classification
Configuration Operation
Small Signal Common Emitter Class A Amplifier Direct Current (DC)
Large Signal Common Base Class B Amplifier Audio Frequencies (AF)
Common Collector Class AB Amplifier Radio Frequencies (RF)
VHF, UHF and SHF
Class C Amplifier
Frequencies

For a long time, class A and B were the most common when it came to high quality audio
amplifiers because at that time they used valve amplifiers. The introduction of the solid state
devices brought freedom of design and hence greater capable amplifier and hence more classes.

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The different classes are discussed below and this will enable understanding them in comparison
to class H.

2.3.1 Class A Amplifier

These amplifiers conduct all the time hence eliminating defects of non-linearity. The input signal
is faithfully reproduced at the output as the transistor is perfectly biased within its active region
therefore never reaching saturation or cutoff regions. It uses the same transistor for both halves
of the output waveform and due to its biasing arrangement the output transistor always has
current flowing across it even when there’s no input signal. This leads to inefficient operation as
conversion of DC supply to AC power delivered to load is very low. Heat sinking is also
required as it gets very hot even when no input signal is present. A Class A amp is very
inefficient as most of its DC supply is converted to heat. The figure 2.3.1 below gives the input
and output signal of this amplifier. In class A 100% of the input signal is used (conduction angle
Θ 360° or 2π).

Figure 2.3.1: Class A output Waveform

2.3.2 Class B Amplifier

In this amp, 50% of the input signal is used and it therefore has a conduction angle of 180° or π.
unlike the class A amp, it uses two transistors that only operate for each half of the output
waveform. One transistor conducts for one half of the signal while the other conducts for the
opposite cycle. Thus each transistor spends half of its time in the active region and the other half
in the cut off region thus amplifying only 50% of the input signal. It has a higher efficiency as it
conducts only when there is an input.

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Figure 2.3.2: Class B waveform

There is a trade-off that comes with a Class B amp: the increased efficiency degrades audio
quality. This happens because there is a crossover point at which the two transistors transition
from the on state to the off state. Class B audio amps are also known to have crossover distortion
when handling low-level signals. They are not a good choice for low-power applications.

Figure 2.3.3: Class B output waveform

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2.3.3 Class AB amplifier
This amplifier conducts more than 50% but less than 100% and therefore has conduction angle
181° to 359°.A compromise between Class A and Class B amplifier topologies is the Class AB
audio amp. A Class AB amp provides the sound quality of the Class A topology with the
efficiency of Class B. This performance is achieved by biasing both transistors to conduct a near
zero signal output, i.e., the point where Class B amps introduce nonlinearities. For small signals,
both transistors are active, thus functioning like a Class A amp. For large-signal excursions, only
one transistor is active for each half of the waveform, thereby operating like a Class B amp.

In class-AB operation, each device operates the same way as in class B over half the waveform,
but also conducts a small amount on the other half. As a result, the region where both devices
simultaneously are nearly off (the "dead zone") is reduced. The result is that when the
waveforms from the two devices are combined, the crossover is greatly minimized or eliminated
altogether. Class AB sacrifices some efficiency over class B in favor of linearity.

Figure 2.3.4: Class AB waveform

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2.3.4 Class C Amplifier
Class-C amplifiers conduct less than 50% of the input signal and the distortion at the output is
high, but high efficiencies (up to 90%) are possible conduction angle is hence 0 to 179.The usual
application for class-C amplifiers is in RF transmitters operating at a single fixed carrier
frequency, where the distortion is controlled by a tuned load on the amplifier. The input signal is
used to switch the active device causing pulses of current to flow through a tuned circuit forming
part of the load.

2.3.5 Class D Amplifier

The popularity of handheld mobile audio device brings power consumption into greater focus.
Now it is necessary to reduce power consumption to increase battery life. Class D amplifiers use
pulse-width modulation (PWM) to produce a rail-to-rail digital output signal with a variable duty
cycle to approximate the analog input signal. These amps are highly efficient (often up to 90% or
higher) because the output transistors are either fully turned on or fully turned off during
operation. This approach completely eliminates the use of the linear region of the transistor that
is responsible for the inefficiency of other amplifier types. Modern Class D amps also achieve
fidelity comparable to Class AB amps. With its high efficiency, Class D switching amplifiers are
used in portable devices.

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Figure 2.3.5: Class D amplifier

The main advantage of a class-D amplifier is power efficiency. Because the output pulses have
fixed amplitude, the switching elements (usually MOSFETs, but valves (vacuum tubes) and
bipolar transistors were once used) are switched either completely on or completely off, rather
than operated in linear mode.

2.3.6 Class E Amplifier

The class-E/F amplifier is a highly efficient switching power amplifier, typically used at such
high frequencies that the switching time becomes comparable to the duty time. As said in the
class-D amplifier, the transistor is connected via a serial LC circuit to the load, and connected via
a large L (inductor) to the supply voltage. The supply voltage is connected to ground via a large
capacitor to prevent any RF signals leaking into the supply. The class-E amplifier adds a C
(capacitor) between the transistor and ground and uses a defined L1 to connect to the supply
voltage.

2.3.7 Class G Amplifiers

There are a variety of amplifier designs that enhance class-AB output stages with more efficient
techniques to achieve greater efficiencies with low distortion. These designs are common in large
audio amplifiers since the heatsinks and power transformers would be prohibitively large. The
terms "class G" and "class H" are used interchangeably to refer to different designs, varying in
definition from one manufacturer or paper to another.

Class-G amplifiers (which use "rail switching" to decrease power consumption and increase
efficiency) are more efficient than class-AB amplifiers. These amplifiers provide several power
rails at different voltages and switch between them as the signal output approaches each level.
Class G amplifiers are similar to Class AB amps, except that they use two or more supply
voltages. When operating at low signal levels, Class G amps select a low supply voltage. As the
signal level increases, these amps automatically select the appropriate supply voltage. Class G
amps are more efficient than Class AB amps because they use the maximum supply voltage only

23
when required; in contrast, Class AB amps always use the maximum supply voltage. There is a
common problem in portable audio applications: the limited supply voltage available to the
speaker amp. Class G power amps solve this supply voltage problem by using a charge pump to
boost the supply voltage.

Figure 2.3.6: Class G Amplifier waveform

2.3.8 Class H amplifier

Class-H amplifiers take the idea of class G one step further creating an infinitely variable supply
rail. This is done by having supply rails that are only a few volts larger than the output signal at
any given time. This allows the output stage operates at its maximum efficiency all the time.
They Incooporate switching transistors that switch between supply rails. Significant efficiency
gains can be achieved but with the drawback of more complicated supply design and reduced
Total Harmonic Distortion performance.

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Figure 2.3.7: Class H Output waveform

2.4 STABILITY, DISTORTION AND PERFOMANCE OF THE

AMPLIFIER
2.4.1 Distortion In The Amplifier
Distortion is a measure of performance in amplifiers. Each power amplifier has distortions in all
three stages and each distortion is handled to some extent. Some of the distortions may have
been mentioned initially but at this point each distortion is looked at in more detail.

25
Figure 2.4.1: The distortions in the amplifier

Distortion in power amplifiers arises from:

1. Non-linearity in the input stage. If there is a carefully-balanced differential pair then this
distortion is typically only measurable at HF, rises at 18dB/octave, and is almost pure third
harmonic. If the input pair is unbalanced then the HF distortion emerges .As frequency increases,
it rises at 12dB/octave as it is mostly second harmonic.

2. Non-linearity in the voltage amplifier stage surprisingly does not always figure in the total
distortion. If it does, it remains constant until the dominant-pole frequency P1 is reached, and
then rises at 6dB/octave. With the configurations discussed here, it is always second harmonic.

Usually the level is very low due to linearising negative feedback through the dominant-pole
capacitor.

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3. Non-linearity in the output stage. This, in a Class-B amplifier, will be a complex mix of large
signal distortion and crossover effects, the latter generating a spray of high-order harmonics, and
in general rising at 6dB/octave as the amount of negative feedback decreases. Large-signal THD
worsens with 4 Ω loads and worsens again at 2 Ω. For this reason 2 Ω loads should be avoided.
Large signal distortion arises from the fact that all bipolar transistors exhibit the characteristic of
decreasing beta at higher collector currents. This suggests that current gain factors in a output
transistors will drop off at peak current outputs. On the other hand, cross over distortion is
created from the non conjugate characteristics of the Vbe/Ic curves of the output devices when
entering their cut off or pinch off regions. Vbias goes a long way in reducing the effects of
crossover distortion. Initial methods used diodes or resistors in series to handle but this is
impossible because temperature characteristics of these two are not similar to those of a
transistor. This led to the birth of an “amplified diode”. This involves use of a bias generator to
provide an emulation of the Vbe/Ic characteristics of the output and driver transistors.

4. Loading of the VAS by the non-linear input impedance of the output stage. When all other
distortion sources have been attended to, this is the limiting distortion factor at LF (say below 2
kHz). It is simply cured by buffering the VAS from the output stage. Magnitude is essentially
constant with frequency, though overall effect in a complete amplifier becomes less as frequency
rises and feedback through dominant pole capacitance starts to linearise the VAS.

5. Non-linearity caused by large rail-decoupling capacitors feeding the distorted signals on the
supply lines into the signal ground. This seems to be the reason many amplifiers have rising
THD at low frequencies. Rerouting the decoupling capacitor ground-return reduced THD at 20
Hz by a factor of three.

6. Non-linearity caused by induction of Class-B supply currents into the output, ground, or
negative-feedback lines.

7. Non-linearity resulting from taking the NFB feed from slightly the wrong place near where the
power-transistor Class-B currents sum to form the output. This may well be another common
defect.

27
The distortions highlighted are some of the distortions present in the ordinary amplifier. The
distortions present in the power amplifier under study are looked at in the methodology.

2.4.2 Stability of the Amplifier

Stability is achieved after distortions that are present in the amplifier are eradicated. The main
factors affecting stability and distortion are negative gain feedback and open loop linearity.
Various forms of stability are considered below..

Bias Generator Stability: the bias generator previously mentioned as Vbe Multiplier is used in
attaining thermal stability. In earlier designs, either two or more forward biased diodes were used
to compensate for voltage drop Vbe in output transistors. They would be mounted on heats sinks
so that so their temperature would equal to temperatures of output devices hence providing
adequate temperature compensation. The downside of this is that the temperature characteristics
of diodes do not match those of transistors and hence improvements were made. This involves a
Vbe multiplier circuit which uses a transistor that emulates characteristics of the output
transistors. It is mounted on a heat sink and is connected in series with a constant current source.
It results in an adjustable bias generator.

The bias generator sometimes includes a resistor at the collector of the bias transistor; this
resistor is five times the value of re. re of the transistor manifests a small bias voltage which
requires the resistor to be eliminated. The resistor causes a small increase in voltage which
eliminates the effect of re. it is usually five times the value of the re.

Output stage stability: A cause of instability in OPS is due to capacitances present in output
transistors i.e. base to collector capacitances and base to emitter capacitances. These produce
spikes in the output waveform. They are inhibited by installing a few external capacitors around
the predriver stages. The Zobel network is used to improve stability as well. It is placed between
the output rail and the load to shield the amplifier from variations in the reactive load. A zobel

28
network is shown below. The value of zobel resistor (Rz) is chosen to be close to the resistance
of the output load.

Figure 2.4.1: Zobel network and damped inductance.

For capacitor, Cz, typical values range from 0.047 µF to 0.15 µF. Most commonly used value is
0.15uf. The main function of the zobel network is to counteract the effects of inductive reactance
within the speaker load especially at high frequencies. Therefore, it enhances output stage
stability as well as Negative Feedback Stability.

At high frequencies, capacitive loads in the speaker cabling may cause phase shifting or overload
the output stage. This is overcome by adding a choke to counteract capacitive loads. This isolates
the amplifier from the shunt capacitance, without causing significant losses at audio frequencies.
It is good practice to put a low-value damping resistor across the inductor; this reduces the Q of
the output LC combination on capacitive loading, and thus reduces overshoot and ringing. In
some cases the resistor in the choke network will have a value equal to that in Rz while typical
values of inductance, L1 are between 1 µH to 7 µH. In most cases 1 µH to 2 µH is used. An
output inductor should be air-cored to eliminate the possibility of extra distortion due to the
saturation of magnetic materials. The damped inductance and zobel network play a great role in
ensuring stability of the OPS.

29
Compensation: The compensation of an amplifier is the tailoring of its open-loop gain and
phase characteristics so that is dependably stable when the global feedback loop is closed. An
amplifier requires compensation because its basic open-loop gain is still high at frequencies
where the internal phase-shifts are reaching 180 degrees. This turns negative feedback into
positive at high frequencies, and causes oscillation, which in audio amplifiers can be very
destructive. The way to prevent this is to ensure that the loop gain falls to below unity before the
phase-shift reaches 180 degrees; oscillation therefore cannot develop. Compensation is therefore
vital simply because it makes the amplifier stable. Compensation can be achieved in three ways:
lag compensation, dominant pole compensation and inclusive compensation.

 Lag compensation is the addition of capacitance to ground from the VAS collector. This
is usually called shunt or lag compensation. Loading the VAS collector resistively to
ground is a very poor option for reducing low frequency open-loop gain, and hence
capacitive loading to ground for compensation purposes is also a bad method. This
method promotes VAS distortion by loading the transistor hence requiring external
circuitry to supply necessary charge discharge currents for adequate slew rates.
 Inclusive compensation: This involves inclusion of the Output stage in the
compensation loop. This requires connection of the output of output stage to the input of
VAS. This will increase Nyquist instability and make the amplifier unoperational.
 Dominant pole compensation: This involves the use of compensating capacitors to
swamp any high frequency poles and force amplifier frequency bandwidth characteristics
to be dominated by a compensating capacitance. The Dominant pole capacitor ensures
that the voltage gain factor drops below unity before a phase shift of 180 Degrees is
reached. This is called Nyquist stability. The value of compensating capacitors is
calculated and this will be discussed in the methodology.

Other core factors about amplifiers include

1. Slew rate
2. Total harmonic distortion

30
CHAPTER 3: METHODOLOGY.
This chapter looks at the designed circuit and analyses it stage to stage. It also involves
explanation of functions of components involved.

3.1 The Input Stage

One of the arts of the IPS is the constant current source which is shown in Figure 3.1.1 below.
The main function is to provide tail current to the differential stage. The resistor R4 and diode D1
are simple zener voltage regulator and the other resistor R8 (not shown in figure below) is for
simulating current source internal resistance. The capacitor C 8 smoothens out variations in load
or power supply.

R5
D1 1.8kΩ
1N4463

Q5
R4
33kΩ
2N5401

R1 R3
120Ω 120Ω

Figure 3.1.1 constant current source

This current source is a common transistor diode constant current source relying on
forward biased diode as regulating element. The voltage drop across the diode is applied
to the base of the transistor. The Vbe drop of transistor negates the forward voltage drop
of the diode hence causing a voltage of about 0.67v to pass through the emitter resistance.
These two cause emitter current to remain constant. The collector/tail current remains at
4.4m A to the regulation limits imposed by beta value of the transistor.
The designed amplifier uses a collector current mirror for the input differential pair. The
motivation for using a differential pair as the input stage of an amplifier is usually its low
DC offset. Apart from its inherently lower offset due to the cancellation of the Vbe

31
voltages, it has the advantage that its standing current does not have to flow through the
feedback network and its linearity is far superior to single-transistor input stages.
The advantages of current mirror stages is improved linearity and doubles output current
capability and the slew rate by acting as an active load. It also improves Power Supply
Rejection Ratio as it can provide isolation between power supply rail and the transistor
collectors.
Connecting the collector of Q6 to that of Q2 enables Q6 to imitate conduction of Q2. It is
significant for the two transistors to be matched so as to avoid nonlinearities in IPS which
produce second harmonic distortion. The signal from the differential pair is then applied
to the VAS. Perfectly matched transistors are not available and hence regeneration
resistors are added.

Negative feedback (NFB) network arises from Q4 and also includes R9, R2, C1 and D3.
The signal from the feedback loop is fed to the OPS. The main function of NFB is
ensuring amplifier stability. The input stage and output stage rely entirely on NFB for
stability. It also linearises voltage gain in low frequency and high frequency frequencies
(through the dominant pole capacitor). The current output from the differential pair is
calculated:

Iout = Ie.tanh (–Vin/2Vt )

Vt is the thermal voltage of 26millivolts at 28 degrees and Ie is the tail current. In most
cases when gm is maximum Vin =0 which implies that output current is equal to tail
current.

3.2 Voltage amplifier stage

The VAS configuration used is the darlington configuration as opposed to other

configurations. This configuration has two values of beta and is sometimes called beta
enhanced configuration. The additional gain factor improves local feedback through the
CC, it hence remains a high voltage, low beta type without any degradation of

32
performance. The resistors used are for DC stability and typical values ranges from 1 to
100kiloohms. Advantages of this connection are high gain, high current sinking sourcing
action due to addition of current source as an active load. Instability problems here are
virtually impossible as NFB through CC loops the entire circuit. The Darlington VA
configuration is illustrated in the figure below.

Figure 3.1.2 : Darlington configuration of VAS

Main facts in this stage are the voltage gain of the voltage amplifier and the value of the
dominant pole capacitor, CC. The voltage gain should be as high as possible without
destabilizing the circuit and dominant pole capacitor should be such that it maximizes the
global negative feedback and provides good stability. The transition from global to local
negative feedback is very important, it occurs in VA stage as a function of dominant pole
capacitor and high voltage gain. As signal frequency exceeds P1, compensating capacitor
begins to supply linearising local NFB to the input.
A current limiting circuit is also added and incorporates Q24, R31 and R16 in the
designed circuit. Its main function is to incorporate short circuit protection in output
stage.

33
 Figure 3.1.2: Current limiting circuit and the VAS.

The current limiting circuit will have no effect during normal operation i.e during positive half
cycles but during negative half cycles, a short circuited condition from the Q24 collector to output
rail will blow Q24. Hence, a method to limit maximum current flow through Q24 during times of
OPS short circuit activation is needed. R16 is therefore used to sense current flow through emitter
of Q11. When the voltage across it is excessive, which means excess current flow through its
collector, base current will begin to flow through Q24. This will saturate Q24 diverting base
current from Q11 and Q10 and hence limits current through Q11 to about 20milliamps. This
explains how a current limiting circuit works.

3.3 OUTPUT STAGE

The output stages vary according to the class of the amplifier and it is the one that determines
the class of the amplifier. This amplifier uses the Emitter follower topology type as this is
known to be less prone to parasitic or local oscillations than the CFP configuration,. Main
distortions in the output of the class H amplifier are the crossover distortion, switching and beta
droop. Thermal considerations and reliability are also of great significance to design of this
amplifier. The OPS stage incorporates the output of a class B amplifier for the inner power
supply rails and an additional voltage supply rail. It consists of the predriver transistors Q12 and
Q16 and the output transistors Q17, 16, 13, 14, 21, 22, 27 and 28.

34
Figure 3.3.1: Output stage of class H amplifier

This output stage has a switchoff circuit whose function is to reduce crossover distortion which if too
much would cause switching distortion. 0The predriver transistors are a complementary buffer stage that

35
function to reduce loading of VA stage on output transistors. An interesting bit is that these transistors
dissipate heat about 1 to 10 watts and are connected to individual heatsinks that are secluded from
heatsinks of the output transistors. Transistors Q 17, 18, 13, 14 ,21 ,22 , 27 and 28 are the output transistors.

This amplifier also has a parallel output stage i.e. two bases of a transistors are connected to each
other. This parallel connection will often constitute of incorporation of regeneration resistors, RE,
which aid in equal current sharing. This is known as ballasting. Typical values of RE are 0.1ohm
to1 ohm. These resistors also provide thermal compensation for output transistors. How is this
achieved? If one output transistor exhibits excessive leakage currents when heated, the excessive
leakage current will manifest itself as increased voltage drop across the associated RE resistor
and force output transistors to assume a large portion of current load.

The output stage also has a zobel network to enhance stability and a damped inductance. These
two have been discussed in the previous chapter.

36
The complete class H amplifier is as shown:

70V
VCC
R11 Q23 C6
R5 Q15 Q19
D2 1.8kΩ Q7 50Ω 220µF
1N4463
2N5551 MJE3055T
Q5 Q8 MJE3055T
R10 2N5401
C7
R27 R28 35V
220µF VCC1
R4 33kΩ 2N5401 0.33Ω 0.33Ω
33kΩ 2N5401 D5

Q16
R1 R3 MBR1645
120Ω 120Ω Q17
XSC1
Q18
R13
3.8kΩ 2N5551
Tektronix
Q1 Q4 Q9 MJE3055T
R2 Q3
MJE3055T
C3 P 1 2 3 4 T

R9 19kΩ 47µF R12 G

V1
2N5401 1kΩ 2N5551 1µF R21 0.33Ω
1kΩ 2N5551 0.33Ω
2 Vrms 2N5401 C5
Key=A R17 R22 1µH L1
2kHz 150Ω
0° 50%
C1 D3 R19R20 0.33Ω R30
200µF 1N4148 R14 0.33Ω C10
680Ω Q25 0.1µF 10Ω

Q6 Q2 Q13 Q14 R23

2N5401 8.2Ω
-35V
R8 MJE2955T
19kΩ VEE1
2N5551 2N5551 Q12 MJE2955T
C4 D6
R6
120Ω R7 R24
120Ω Q10 60pF 0.33Ω R25 MBR1645
2N5401 0.33Ω C8
C2 2N5551
0.1µF Q11 R18 220µF
2N5551 150ΩQ21 Q22
Q24
R31 MJE2955T
Q20
2.2kΩ C9
R15 220µF VEE
2N5551 2.2kΩ 26Ω MJE2955T
R16
-70V
2N5401

Figure 3.3.2: the complete class H amplifier

The designed circuit is drawn and tested on MULTISIM. The circuit is analyzed.

37
3.4 HEAT SINK DESIGN
A heatsink is very important in cooling high power integrated circuits. It exchanges heatbwith a
surrounding medium. It is deigned to maximize the surface area that’s in contact with the cooling
medium. Factors affecting the heat sink performance are air velocity, choice of material ,
protrusion design and the surface treatment. A thermal adhesive also improves heat sink
performance.

The output stage has 8 transistors. These transistors have a 1500C maximum junction
temperature and a thermal junction resistance of 1.670C /W. For 400W with 70V peak and a peak
current of 14.14V, average current per rail will be 4.501A.

POWER input to amplifier= 140*4.501=630V.

Power Dissipated in output stage= input power-power dissipated in load.
= 751.9 – 400= 351.9 Watts
For 8 transistors 351.9
8

= 43.99Watts

Therefore the heat sink of thermal resistance = 43.99 = 0.1250C/W.

351.9

Thus a heatsink of thermal resistance of 0.125oC/W is used at the transistor output stage to avoid
thermal destruction.

38
CHAPTER 4: RESULTS

4.1 CLASS H AMPLIFIER CIRCUIT

70V
VCC
R11 Q23 C6
R5 D1 Q15 Q19
D2 1.8kΩ Q7 50Ω 220µF
1N4463
1N4148 2N5551 MJE3055T
Q5 Q8 MJE3055T
R10 2N5401
C7
R27 R28 35V
220µF VCC1
R4 33kΩ 2N5401 0.33Ω 0.33Ω
33kΩ 2N5401 D5

Q16
R1 R3 MBR1645
120Ω 120Ω Q17
XSC1
Q18
R13
3.8kΩ 2N5551
Tektronix
Q1 Q4 Q9 MJE3055T
R2 Q3
MJE3055T
C3 P 1 2 3 4 T

R9 19kΩ 47µF R12 G

V1
2N5401 1kΩ 2N5551 1µF R21 0.33Ω
1kΩ 2N5551 0.33Ω
4 Vrms 2N5401 C5
Key=A R17 R22 1µH L1
2kHz 150Ω
0° 50%
C1 D3 R19R20 0.33Ω R30
200µF 1N4148 R14 0.33Ω C10
680Ω Q25 0.1µF 10Ω

Q6 Q2 Q13 Q14 R23

2N5401 8.2Ω
-35V
R8 MJE2955T
19kΩ VEE1
2N5551 2N5551 Q12 MJE2955T
C4 D6
R6
120Ω R7 R24
120Ω Q10 60pF 0.33Ω R25 MBR1645
2N5401 0.33Ω C8
C2 2N5551
0.1µF Q11 R18 220µF
2N5551 150ΩQ21 Q22
Q24
R31 D7 MJE2955T
Q20
2.2kΩ C9
R15 1N4148 220µF VEE
2N5551 2.2kΩ 26Ω MJE2955T
R16
-70V
2N5401

Figure 4.1 the class H amplifier

This circuit is simulated on multisim using a sinusoidal input and an oscilloscope to compare its
output and input.

39
4.2 TESTING OF INPUT STAGE AND VOLTAGE AMPLIFIER STAGE

VCC
R11 80V
R5
D2 1.8kΩ Q7 50Ω
1N4463

Q5 Q8
R10 2N5401
XSC1

R4 33kΩ 2N5401 Ext T rig

33kΩ 2N5401 +
_
A B
R1 R3 + _ + _

120Ω 120Ω
R13
3.8kΩ
Q1 Q4 Q9
R2
C3
V1 R9 19kΩ 47µF R12
2N5401 1kΩ 2N5551
2 Vrms 2N5401 1kΩ
2kHz Key=A
0° 50%
C1 D3
200µF 1N4148 R14
680Ω

Q6 Q2

R8
19kΩ 2N5551 2N5551
C4
R6
120Ω R7
120Ω Q10 60pF
2N5551
C2 Q11
0.1µF
2N5551

Q24
R31 R15 VEE
2.2kΩ -70V
2.2kΩ R16 26Ω
2N5551

Figure 4.2.1 : IPS AND VAS circuit.

The output waveform is as shown in the figure 4.2.2. For an rms input voltage (as shown by the
pink line) of 2.822V , there is a rms output voltage of 56.454 v (as shown by the orange wave).
The voltage gain is hence;

Voltage gain= Input voltage

Output voltage

40
This gives a voltage gain of 20.04.

Voltage gain (db)= 20 log 20.04

=26.04db.

Figure 4.2.2: the waveform of VAS and IPS testing.

4.3 OUTPUT AND INPUT WAVEFORMS

The designed circuit figure 4.1 above is drawn and tested on MULTISIM. Several waveforms are
obtained. Below are the output sketches for specific inputs.

waveform for Vin =2.0V

41
Figure 4.2 : Input And Output Voltage For 2V( Rms) Input

Input voltage (rms) : 2V

Output voltage (peak to peak): 113V
Output voltage( rms): 40.0v
Frequency: 2Khz
For a 4ohm load,
Output power: 400Watts.

42
waveform for Vin = 0.5V

Figure 4.3: waveform for an input of 0.5V

For
Input voltage (rms) : 0.5V
Output voltage (peak to peak): 28.3V
Output voltage( rms): 10.0v
Frequency: 2Khz
For a 4ohm load,
Output power: 25 Watts.

waveform for Vin = 4.0V

Input voltage (rms) : 4.0V

Output voltage (peak to peak): 135V
Output voltage ( rms): 62.0V
Frequency: 2 KHz
For a 8ohm load,

43
Output power: 480.5 Watts.
For a 4 ohm load, output power: 960W.

Figure 4.4: Waveform for an input of 4V.

As seen in figure 4.4 above, there is clippimg of output waveform. This happens when the output
voltage is greator than the input voltage.

4.4 SLEW RATE

Slew rate is a measure of the rate of change of the output signal. Slew rateis a measure of how
fast the output voltage of the amplifier can change under large-signal conditions. It is specified
in volts per microsecond. Slew rate is an indicator of how well an amplifier can respond to high-
level transient program content. A less capable amplifier might have a slew rate of 5 V/µs,
whereas a really high-performance amplifier might have a slew rate on the order of 50 to 300
V/µs. In this circuit, slew rate is the ratio of the output current of IPS / compensating
capacitance.

Slew Rate= IPS collector current

Compensating capacitance

44
 = 2.02Ma
60pf
=33.66V/uS

This gives a slew rate of 33.66V/ us.

4.5 FREQUENCY ANALYSIS

The bode plot in MULTISIM is used to plot the frequency response of the amplifier. It also gives
the closed loop response of the amplifier at maximum output power. Figure 4.4 and 4.5 below
show the magnitude plot and phase plot respectively.

Figure 4.4 closed loop response of the amplifier

Figure 4.5 phase response of the amplifier

45
Figure 4.6 ; bode plot of the amplifier

4.6 DISTORTION AND NOISE ANALYSIS

Distortion is seen when the output signal is not similar to the input signal. It can also be caused
by components in the circuit in the various stages of amplification. The use of the distortion
analysis and noise analysis on multisim the following graphs are obtained. The distortion levels
are low due to use of current mirrors topology in the input stage and use of compensating
capacitor in the VAS.
From output waveforms on the previous page, minimal distortion can be seen.

46
Figure 4.7 : 2 nd harmonic distortion

47
Figure 4.8 : 3rd harmonic distortion

Figure 4.9: Total harmonic distortion.

48
Figure 4.10: the noise spectral density curve

The noise curve of power amplifiers remains almost constant for a wide range of frequencies and
this is exhibited above in figure 4.10. the signal plus noise and Distortion are measured by the
distortion analyzer as well.

SINAD= Signal +Noise

Noise and distortion

Figure 4.11: SINAD at 2khz

49
4.7 INPUT POWER
To achieve a 400w output power,a maximum input voltage of +-70V is used. The DC input
power input to the amplifier is hence:
Pin (dc)=Ic(dc) *Vcc = Ic (average) * Vcc
=(2Vload*Vcc)/Rload*3.142
=(2*135/2/4*70)/3.142
=751.9Watts

4.8 OUTPUT POWER

Rated maximum power is 400 Watts. The load is a 4 Ohm Resistor. outpu RMS current is hence
Irms= (400/4)^0.5
=10A
Therefore required peak current at the output:
Ip= 10*2^0.5
=14.14A
Root mean squared voltage required to attain this power is
Vrms= ( power * load)^0.5
=( 400*4)^0.5
=40V.
This corresponds to a peak voltage of
Vpeak = 40 * 2^0.5
= 56.57v

This voltage is produced at the output when an input of 2V(rms) is the input. This as an output
of 8.03A rms
Output power is hence =40*8.03
=321.2Watts

50
4.9 AMPLIFIER EFFICIENCY
This is the ratio of output power to that of input power.

Efficiency= Output Power * 100

Input power

=321.2 *100
751
=43%

4.10 INPUT VOLTAGE SENSITIVITY

The maximum allowable input voltage for the power amplifier is 2V(rms). This gives the
required rms output voltage of 40V to produce 400Watts. Higher input voltages will produce
clipped output waveforms.

4.11 IMPLEMENTATION
The circuit designed is mounted on breadboard and tested. It is then implemented on PCB and
tested.

51
5. CONCLUSION
The audio amplifier was designed and simulated using MULTISM. The specifications of the
amplifier are as listed:

SPECIFICATION PERFORMANCE
Total Harmonic Distortion (THD) 0.005%
Signal plus Noise Distortion (SINAD) 80.294db
Load Impedance 4Ω
Frequency Response 25.57dB from 20Hz to 20KHz at maximum power
Voltage Gain outputdB
25.57
Slew Rate 33.66V per microsecond
Input Sensitivity 2.0 V(rms)
Maximum Power Output 715W watts
Efficiency at maximum Output power 45%

52
REFERENCES
[1] Douglas Self, (2006), Audio Power amplifier design handbook, Oxford 4th Edition, Newnes.
[2] G Randy Slone(1999), High Power Audio Amplifier Construction Manual, McGraw-
Hill.
[3] Articles on sound.westhost.com

53
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