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Board layout on track

Printed-circuit board layout is one of the last steps in the design process, but for high-
speed circuits, it often proves to be one of the most critical. Many of today's high-
speed amplifiers can operate well into the RF spectrum. At these frequencies, circuit
performance is heavily dependent on the board layout. A poor or sloppy layout can
take your high-flying circuit and cause it to crash and burn. Thinking ahead and
paying attention to detail throughout the layout process will help ensure that the
circuit performs as expected.

Printed-circuit board layout is one of the last steps in the design


process, but for high-speed circuits, it often proves to be one of the
most critical. Many of today's high-speed amplifiers can operate well
into the RF spectrum. At these frequencies, circuit performance is
heavily dependent on the board layout. A poor or sloppy layout can
take your high-flying circuit and cause it to crash and burn. Thinking
ahead and paying attention to detail throughout the layout process
will help ensure that the circuit performs as expected.

Numerous books have been written on board layout. While we


cannot cover every aspect in detail, these tips touch on areas that
can make a difference in circuit performance, helping you avoid
some of the most common pitfalls of high-speed board design. While
the thrust of this article is high-speed amplifier design, the topics
and techniques discussed can be applied to any high-speed circuit
board layout.

Do

• Start with a good schematic. Although it doesn't guarantee a good layout, a


well-drawn schematic can help during the layout process. Put as much
information on the schematic as possible, such as critical component locations,
connector types, pin assignments, component sizes, tolerances, power
dissipation, keep-out areas, line widths, requirements for component isolation
or proximity, and board stackup.
• Think about location. Where you put your circuit on a board, where the
individual circuit components are located and what other circuits are located
nearby are all critical considerations. Make sure your high-speed, low-noise
amp is not next to a switching power supply and that your temperature sensor
is not next to a high-heat source.
• Use the ground plane judiciously. A ground plane provides a common low-
impedance path to ground. It also reduces trace inductance, provides shielding
and enables thermal transfer from power-dissipating devices. But know where
and when to use it.
• Use multiple capacitors when bypassing power supplies. Capacitors should be
located as close to the power supply pins as physically possible. The lowest-
value capacitor should be closest to the power pin. The ground return should
be close to the load to reduce drops in the ground plane and improve distortion
performance. Noise on power supply lines can span many decades of
frequency. A capacitor only looks capacitive over a limited frequency range.
Once the capacitor reaches self-resonance, it starts looking inductive and not
capacitive. Paralleling multiple capacitors provides a low-impedance path for
noise over a wide frequency range.

The effect of 1 picofarad of parasitic capacitance at the inverting input


of a high-speed amplifier is to cause 1.8 dB of peaking in the frequency
response.

Don't

• Connect analog and digital grounds to the same ground plane. Keep them
separate, tying them together at a single-point ground only. Circulating ground
currents can corrupt references and cause noise in the ground plane, which can
be coupled into other sensitive sections of the board, producing erroneous
results.
• Use a ground plane under the input and output pins of high-speed op amps.
The parasitic capacitance formed by the amplifier mounting pad and the
ground plane can lead to ringing, overshoot and instability. The effect of 1
picofarad of parasitic capacitance at the inverting input of a high-speed
amplifier is shown in the figure. Note that the 1 pF causes 1.8 dB of peaking in
the frequency response. This is why we caution designers to use ground planes
judiciously.
• Forget about parasitics. Excessive trace length can lead to stray inductance;
large pads, test points or meandering lines can lead to parasitic capacitance,
which can cause ringing and peaking in the frequency response. Vias
introduce stray capacitance and inductance: Avoid using vias in high-
frequency signal paths because the stray parasitic capacitance and inductance
can lead to degraded frequency response and ringing on pulses. Keep the
layout compact and streamlined to minimize parasitics.
• Run long parallel traces; this can cause unwanted coupling and lead to loss of
isolation. If you need to run long traces, use different layers. Add a power or
ground plane in between the layers and run the traces orthogonally to each
other. Use inner layers for running sensitive signal paths or controlled-
impedance lines.

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