SAT 250

S A T 250

Description of the

SCA_RS Board

B70-010--
B70-010-A

© by SAT
Systeme für Automatisierungstechnik GmbH & Co
All rights reserved

Any disclosure or reproduction whatsoever of this

document or of parts thereof is permitted only with
the written consent by SAT.

Technical specifications serve the purpose of

describing the products only and do not represent
any warranted characteristics in legal terms. Subject
to change - also as regards technological aspects.
SAT 250 Description of the board SCA_RS

This document is applicable to the following product(s):

SCA_RS ab Rev/PZ nn

Version Revision Datum Änderung

00 26.03.96 Erstausgabe

Information zum Dokument:

Autor / Bearbeiter: R. Mrkvicka / J. Noe
Server\Service: \\SATLM2\PRH_KST
Verzeichnis: \250\DOKU\SCA_RS
Dateiname(n): SCA_RSHD.DOC
Dateiformat: WINWORD 2.0b

erstellt letzte Änderung freigegeben

am von am von am von
26.03.96 PR-HW/MRK __.__.__ PR-HW/ __.__.__ PR-HW/MRK

B70-010--/B70-010-A ii
SAT 250 Description of the board SCA_RS

Table of Contents

1. Block Diagram......................................................................................................... 1

2. Short Description.................................................................................................... 2

3. Interfaces ................................................................................................................. 3
3.1. Error Output................................................................................................................................. 3
3.2. Computer Monitoring (Watchdog Timer)..................................................................................... 3
3.3. Process Information .................................................................................................................... 3
3.4. Horn Output + HQ ....................................................................................................................... 3
3.5. Time Synchronization .................................................................................................................. 4
3.6. Selection of Operating Modes ..................................................................................................... 4
3.6.1. Operation Entry ...................................................................................................................... 4
3.6.2. Test Input ............................................................................................................................... 4
3.7. Auxiliary Signals .......................................................................................................................... 5
3.7.1. External Auxiliary Inputs ......................................................................................................... 5
3.7.2. Internal Auxiliary Inputs .......................................................................................................... 5
3.7.3. Auxiliary Outputs .................................................................................................................... 5
3.8. Coordination Interface ................................................................................................................. 5
3.9. Serial Interfaces .......................................................................................................................... 6

4. Status Displays ....................................................................................................... 7

5. Hardware Configuration ......................................................................................... 8

5.1. I/O Adresses................................................................................................................................ 8
5.2. Wait States .................................................................................................................................. 8

6. Power Features ....................................................................................................... 9

6.1. Electrical Specifications............................................................................................................... 9
6.2. Digital Outputs ............................................................................................................................. 9
6.2.1. Error Outputs.......................................................................................................................... 9
6.2.2. Auxiliary Outputs .................................................................................................................... 9
6.2.3. Horn Output............................................................................................................................ 9
6.2.4. Minute Pulse Output............................................................................................................. 10
6.2.5. Coordination Outputs ........................................................................................................... 10
6.3. Digital Inputs.............................................................................................................................. 11
6.3.1. Auxiliary Inputs ..................................................................................................................... 11
6.3.2. Minute Pulse Input................................................................................................................ 11
6.3.3. Horn Acknowledgement Inputs ............................................................................................ 11
6.3.4. Selection of Operating Modes .............................................................................................. 11
6.3.5. Coordination Inputs .............................................................................................................. 11
6.4. Serial Interfaces ........................................................................................................................ 12
6.5. Ambient Conditions ................................................................................................................... 12

7. Mechanical Design................................................................................................ 13
7.1. Dielectric Strength - Voltage Distances..................................................................................... 13
7.2. Position of the CPU (for ICE connection) .................................................................................. 13

8. Pin Assignment ..................................................................................................... 14

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SAT 250 Description of the board SCA_RS

List of Illustrations

Ill. 1-1 Block Diagram ........................................................................................................ 1

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SAT 250 Description of the board SCA_RS

1. Block Diagram

COM0

CO M1

COM2

COM3

CO M4

W DT

M IN -O UT

SRAM
6 4kB
M IN -IN

errors

EPRO M
25 6 kB horns
A U X -O U T

HQ
A U X -IN

CPU
80 C18 6
C O -O R D

se le ction of
ope rating m odes

LE D statu s disp la y

Ill. 0-1 Block Diagram

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SAT 250 Description of the board SCA_RS

2. Short Description
This unit is used for treating system-overlapping signals of the process computer component(s). Voting
functions have already been implemented in the software for redundant process computers. The
SCA_RS can also be designed redundantly from Version A onwards. The active board is determined
automatically via the coordination interface. Only the active board is allowed to issue signals to the
outside. Every other board must behave passively and may only communicate with the outside via the
coordination interface.

Groups of functions:

• Output of errors
• Computer monitoring (watchdog timer)
• Process information output
• Horn output
• Time synchronization
• Selection of operating modes
• Auxiliary signals
• Coordination interface
• Serial interfaces
• Status display

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SAT 250 Description of the board SCA_RS

3. Interfaces
The connection of the external signals occurs via a 64-pin socket connector (G type series).

3.1. Error Output

The errors are output with make contacts in closed-circuit current operation, i.e. the error corresponds to
open contact. Only an active board can set outputs.

Sum error - rest of system

Sum error PRK _ A

Sum error PRK _ B

Error SCA_RS

3.2. Computer Monitoring (Watchdog Timer)

The process computer(s) is (are) monitored by so-called "keep alive" messages. The respective sum
error information is activated on the failure of a computer.

The SCA_RS is monitored by a hardware watchdog timer. In case of a malfunction of the SCA_RS the
ready LED goes out and respective error LEDs, if possible, are set.

3.3. Process Information

No process information is output via relay contacts. Only operating statuses are displayed through LEDs
on the front panel.

3.4. Horn Output + HQ

The output is made through relay contacts in working current operation. A maximum of four different
horn activations can be output.

The four horn outputs (HORN_1 ÷ 4) have one common (HORN_C).

The common can be separated via a switch socket from the front panel by pulling the pin. An
acknowledgement input (HQ1 ÷ HQ4) with a common (HQ_C) is available for each horn for external
horn acknowledgement.

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SAT 250 Description of the board SCA_RS

3.5. Time Synchronization

Up to two clocks can be connected for the time synchronization. A serial V28 input (COM2, COM3) and
a minute pulse input (MIN-IN_A, MIN-IN_B) are available for each clock. The minute pulse input occurs
by way of an optocoupler input. The input voltage is 24 VDC.

For subordinate systems there is a voted clock output (COM4, MIN-OUT) which is derived directly from
the inputs. The output of the minute pulse is made via the optocoupler output. The output voltage has a
maximum of 60VDC.

3.6. Selection of Operating Modes

3.6.1. Operation Entry

The operation entry is made via two separate digital inputs SA_x (Set Activ _ A[B]). These inputs SA_A
und SB_B are controlled by a key-operated switch with mid-positions which is to be housed in the
immediate vicinity of the unit. In the "A" position the operation entry is to be assigned to computer A. In
the mid-position "auto" the operation entry is to be given by a voter to the respective "better" system. In
the "B" position the operation entry is assigned to computer B.

These two inputs are to be regarded as internal signals and therefore do not possess any
electromagnetic compatibility precautions.

3.6.2. Test Input

There is a digital input ST- (Set Test ) which can be used to demand a test operating mode from the
computer not in control by means of the key-operated switch. This switch should be housed in the
immediate vicinity of this unit (or at least in the same board rack), because the two inputs are regarded
as internal signals and therefore are not provided with any electromagnetic compatibility precautions.

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SAT 250 Description of the board SCA_RS

3.7. Auxiliary Signals

3.7.1. External Auxiliary Inputs

The AUX IN1 ÷ 3_A and AUX IN1 ÷ 3_B inputs are realized as voltageless optocoupler inputs and each
have a common (AUX IN_A_C, AUX IN_B_C).

The input voltage for all inputs is 24VDC.

3.7.2. Internal Auxiliary Inputs

One bit of the input register can each be switched via a switch socket on the front panel and a jumper on
the circuit board.

3.7.3. Auxiliary Outputs

The AUX-OUT0 ÷ 2_A and AUX-OUT0 ÷ 2_B auxiliary outputs are designed via relay make contacts in
working current operation.

All three auxiliary outputs are each provided with a common (AUX-OUT_A_C, AUX-OUT_B_C).

3.8. Coordination Interface

During the redundant operation of this unit it is necessary to have a separate coordination interface for
the independent determination of the active board. It consists of the logic input SCA_PIN-, the logic
output SCA_POUT- and the logic bus line SCA_MBL. This bus line can be set and read back per
program and in the case of a fault it is set to "Tri - State" by a linkage with the internal WDT.

This bus line allows determining whether a Master SCA_RS is existent or whether a second SCA_RS
wishes to reach master status at the same time.

The interface drivers of the coordination interface are supplied with a separate voltage +VBUS which is
tapped redundantly on each SCA_RS board.

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SAT 250 Description of the board SCA_RS

3.9. Serial Interfaces

On the board there are five serial RS 232C interfaces (corresponding to V28 electrically), with only four
interfaces being in connection with the CPU via a USART. COM 4 re-sends the data received from COM
2 or COM 3 via a program-controlled multiplexer. The serial outputs are designed "Tri - State". Only one
active board has active outputs.

The parallel connection of the serial outputs in redundant configuration is only permitted from Version A.

The electrical separation of the interfaces on the board has been omitted, because two interfaces
remain locally in the same board rack and the two others are in connection with unprotected PC
interfaces. If required, the electrical separation must be made externally (e.g. by way of an optical fibre
modem).

The following lines have been realized:

RxD..... Receive Data (COM 0 - 3)

TxD ..... Transmit Data (COM 0 - 4)
GND.... Ground

The interfaces have been provided for the following use:

COM-# Use typ. baud rate max. baud rate

COM-0 PRK-A 9600 19200

COM-1 PRK-B 9600 19200
COM-2 UHR-A 2400 19200
COM-3 UHR-B 2400 19200
COM-4 UHR-OUT 2400 19200

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SAT 250 Description of the board SCA_RS

4. Status Displays
21 double-storey LEDs are housed on the front panel. There are 15 red LEDs and 6 yellow LEDs.

The control of the LEDs is made via output registers. The "ready" LED is controlled directly by the
watchdog timer.

A B
RY
I I
E E
K K
E0 E0
E1 E1
E2 E2
SM SM
SA SA
ST ST
SF MA
WD
HD

Description of the abbreviations:

I Internal error SA System active

E External error ST System test
K Communications error SF SCA error
Ex Error level x MA Master
RY Ready WD Watchdog disable
SM System malfunction HD Horn disable

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SAT 250 Description of the board SCA_RS

5. Hardware Configuration
Processor: 80C186XL16
Clock rate: 32MHz
EPROM: 256kB
SRAM: 64kB

USART: 2 x SCC 85C30

BIN I/Os: Normal 8 and 16 bit register

5.1. I/O Adresses

Register / Dev. Basis Offset R/W 8/16

INREG 0 PCS 0 0 R 16
OUTREG 0 PCS 0 2 W 16
OUTREG 1 PCS 0 4 W 8
OUTREG 2 PCS 0 6 W 16

SCR PCS 0 08H W 8 (Bit 0)

SWDTEN PCS 0 0AH W -
TWDT PCS 0 0CH W -

Data 0 / SCC 0 PCS 5 06 R/W 8

Control 0 / SCC 0 PCS 5 02 R/W 8
Data 1 / SCC 0 PCS 5 04 R/W 8
Control 1 / SCC 0 PCS 5 00 R/W 8

Data 2 / SCC 1 PCS 6 06 R/W 8

Control 2 / SCC 1 PCS 6 02 R/W 8
Data 3 / SCC 2 PCS 6 04 R/W 8
Control 3 / SCC 2 PCS 6 00 R/W 8

5.2. Wait States

UCS 2 wait states

LCS 1 wait states
PCS 6 1 wait states
PCS 5 1 wait states
PCS 0 0 wait states

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SAT 250 Description of the board SCA_RS

6. Power Features

6.1. Electrical Specifications

External supply voltage 5V ±5%

Power consumption max. ca. 5W

6.2. Digital Outputs

6.2.1. Error Outputs

• Make contacts with a common in groups

• Nominal current switched and making and braking capacity under ohmic load:

• max. continuous total current: 1A

• max. switching voltage: 110 VDC

• Making and
breaking capacity: min. 1 nW
max. 30 W

• Operating cycles: 10E7 at 1W and ohmic load

• Fault behaviour: terminated (contact open)

corresponds to "error" when process information is inactive
and fault information

6.2.2. Auxiliary Outputs

see 6.2.1

6.2.3. Horn Output

see 6.2.1

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SAT 250 Description of the board SCA_RS

6.2.4. Minute Pulse Output

• Transistor output
• Electrical separation through optocouplers
• Voltage range: 5 ÷ 72VDC
• Output current: 100mA (beware: no current limitation)

6.2.5. Coordination Outputs

• TTL Tri-state output active low (-)

• No electrical separation, as internal signal
• Overvoltage protection up to 32VDC

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SAT 250 Description of the board SCA_RS

6.3. Digital Inputs

6.3.1. Auxiliary Inputs

• 2 groups with three inputs and one common each

• Transient filter
• Electrical separation with optocoupler
• Voltage range: 24VDC (18 - 32 VDC)
• Nominal input power: approx. 100 mW (24V/4.2mA)

6.3.2. Minute Pulse Input

as in 6.3.1

6.3.3. Horn Acknowledgement Inputs

as in 6.3.1

6.3.4. Selection of Operating Modes

• TTL input active low (-)

• No electrical separation, as internal signal
• Overvoltage protection up to 32VDC

6.3.5. Coordination Inputs

as in 6.3.4

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SAT 250 Description of the board SCA_RS

6.4. Serial Interfaces

• Corresponding to V28 electrically

• No electrical separation as corresponding to internal signal
• No measures concerning electromagnetic compatibility as corresponding to internal signal
• Overvoltage protection up to 32VDC
• Tri-state output (capable of parallel connection from Version A)
• Realized lines RxD, TxD, GND depending on interface

6.5. Ambient Conditions

Permitted ambient temperature: 0 ÷ 55 °C

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SAT 250 Description of the board SCA_RS

7. Mechanical Design
Single-Euroformat board, circuit board format 160 x 100mm
6 x multilayer circuit board with two supply layers
Mainly SMD equipment
Front panel 4TE with handles
Terminal strip: Plug connector 4 x 16 pin according to DIN 41612 G type series

7.1. Dielectric Strength - Voltage Distances

• Between peripheral circuits and logic circuit

with relays 1.2mm (round eye)
with optocouplers 1.5mm (round eye)

• Between peripheral circuits 1.0mm

• Within peripheral circuits 0.3mm

The distances can be reduced by 50 % in the inner locations.

7.2. Position of the CPU (for ICE connection)

P in 1

D 29

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SAT 250 Description of the board SCA_RS

8. Pin Assignment

Pin Signal name Pin Signal name Pin Signal name Pin Signal name
f2 SCA_PIN- d2 SA_B- b2 SA_A- z2 +5VDC
f4 SCA_POUT- d4 NC b4 ST- z4 RxD_0
f6 SCA_MBL- d6 +VBUS b6 GND z6 TxD_0
f8 GND d8 MIN-IN_B b8 MIN-IN_A z8 GND_0
f10 MIN-OUT+ d10 MIN-IN_B_C b10 MIN-IN_A_C z10 RxD_1
f12 MIN-OUT- d12 AUX-IN1_B b12 AUX-IN1_A z12 TxD_1
f14 HQ1 d14 AUX-IN2_B b14 AUX-IN2_A z14 GND_1
f16 HQ2 d16 AUX-IN3_B b16 AUX-IN3_A z16 RxD_2
f18 HQ3 d18 AUX-IN_B_C b18 AUX-IN_A_C z18 TxD_2
f20 HQ4 d20 AUX-OUT0_B b20 AUX-OUT0_A z20 GND_2
f22 HQ_C d22 AUX-OUT1_B b22 AUX-OUT1_A z22 RxD_3
f24 HORN_1 d24 AUX-OUT2_B b24 AUX-OUT2_A z24 TxD_3
f26 HORN_2 d26 AUX-OUT_B_C b26 AUX-OUT_A_C z26 GND_3
f28 HORN_3 d28 SM_B b28 SM_A z28 TxD_4
f30 HORN_4 d30 SM_R b30 SM_SCA z30 GND_4
f32 HORN_C d32 SM_C b32 SM_C z32 GND

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