NATIONAL INSTITUTE OF ELECTRONICS

(NIE)

Internship Report
Integrated Circuit Design

Submitted To:

Mr Behlol Nawaz

Submitted By:

Sabaina Irfan

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Table of Contents

Introduction to VLSI: .................................................................................................................................... 3

VLSI DESIGN FLOW: ...................................................................................................................................... 3
SYSTEM SPECIFICATION AND ARCHITECTURAL DESIGN: ............................................................................ 4
Introduction to Pyix Schematic:................................................................................................................... 6
Introduction to VHDL ................................................................................................................................... 8
SYNTHESIS................................................................................................................................................... 12
SIMULATION ............................................................................................................................................... 18
PHYSICAL LAYOUT ...................................................................................................................................... 24
DESIGN AND PHYSICAL LAYOUT OF ALU ................................................................................................... 27
CONCLUSION: ............................................................................................................................................. 31

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Introduction to VLSI:

Very-large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by

combining thousands of transistors into a single chip. The first integrated circuit (IC) was
invented by Jack Kilby in 1958. As suggested by Moore, the capacity doubled every 18 th month.
Today, a large single VLSI can contain a billion of transistors. These days VLSI chiefly consist of
front-end design and back end design. Front end design includes digital design using HDL and
design verification using simulation and other techniques. The back-end design comprises of
CMOS library design and its characterization. It also covers physical design and fault simulation.
Before the introduction of VLSI technology, most ICs had a limited set of functions they could
perform. An electronic circuit might consist of a CPU, ROM, RAM and other glue logic. VLSI lets
IC designers add all of these into one chip.

The electronics industry has achieved a phenomenal growth over the last few decades, mainly
due to the rapid advances in large scale integration technologies and system design applications.

With the advent of very large-scale integration (VLSI) designs, the number of applications of
integrated circuits (ICs) in high-performance computing, controls, telecommunications, image
and video processing, and consumer electronics has been rising at a very fast pace

VLSI DESIGN FLOW:

The VLSI IC circuits design flow is shown in the figure below. The various levels of design are
numbered, and the blocks show processes in the design flow.

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 Figure 1: VLSI DESIGN METHODOLOGY

SYSTEM SPECIFICATION AND ARCHITECTURAL DESIGN:

VLSI design start with a formal specification of VLSI chip. At his stage, system specifications are
laid out. This involves a high-level representation of system.

FUNCTION DESIGN:

In this stage, main functional units of the system and the interconnect requirements between
units are identified. The main purpose of this stage is to specify system behavior, I term of inputs,
outputs and timing of each unit. The outcome of functional design is usually a diagram showing
relationship of time and other aspects between units.

LOGIC DESIGN:

In this stage, the logic of VLSI system is designed. This includes Boolean expressions, control flow,
word width, register allocation, etc. The outcome of this stage is Register transfer level
description. RTL is expressed in a Hardware description language like VHDL and Verilog.

CIRCUIT DESIGN:

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The purpose of circuit design is to develop a circuit representation based on logic design. The
outcome of this stage is a netlist. Netlist is an electronic circuit system consisting of all of circuit
elements name/reference designator, listed in a format with their input and output signal names.

FABRICATION:

Fabrication process includes lithography, polishing, deposition, diffusion, etc. This process
consists of several steps and requires various masks. Before the chip is mass produced, a
prototype is made and tested.

PACKAGING:

Packaging involves putting together the chip on a Printed Circuit Board (PCB) or multi chip module
(MCM).

Top down design methodology:

In this methodology, a complete system is defined at an abstract level using hardware description
language (HDL) and use of EDA tools like synthesizers.

SYSTEM LEVEL:

All inputs and Outputs ae described at this level. This level does not touch hardware structure at
all. It simply treats design like a black box.

ALGORITHM(BEHAVIOURAL) LEVEL:

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This is highest level of abstraction provided by most HDLs.

RTL (Register Transfer Level):

At this level module is designed by specifying data flow between registers.

GATE LEVEL:

This module is established in term of logic gates and interconnections between these gates.
Design at this level is similar to describing a design in term of gate level logic diagram.

TRANSISTOR (SWITCH) LEVEL:

This is the lowest level of abstraction. A module can be implemented in term of switches, storage
nodes and interconnections between them.

Introduction to Pyix Schematic:

Pyxis Schematic is a multi-level design environment that includes a Schematic editor to create
and modify schematics; and a Symbol Editor to create and modify symbols for schematics.

TASK #1:

Schematic of CMOS inverter on pyix:

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Symbol of Inverter:

TASK#2:

Designing a NOR gate:

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Task#3:

Designing of SR latch using previously designed NOR gate:

Introduction to VHDL
The Very High-Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) is an
industry standard language used to describe hardware from the abstract to the concrete level.
VHDL is a powerful language with numerous language constructs that are capable of describing
very complex behavior. Modelsim will be used for writing codes in VHDL.

TASK#1:

Design and Simulation of Mux:

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Code of Mux:

Simulation Results:

TASK #2:

Simulation of Mux using do file:

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Code:

Simulation:

TASK#3:

Design and Simulation of ALU:

Code:

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 SYNTHESIS
Logic synthesis is the process of automatically generating optimized logic-level representation
from a high-level description or more specifically a technology-independent circuit is being
transformed into a technology-dependent circuit by optimization into a network of gates in a
given technology. The software tool which you are going to use for synthesis is Mentor Graphics
Leonardo Spectrum.

TASK#1:

Design capture using Verilog:

Code for synthesis:

SYNTHESIZING HDL USING LEONARDO:

➢ Load the technology library

➢ Read Verilog Files

➢ Select Constraints

➢ Optimize the design

➢ Save the design

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Importing Design in Pyix:

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TASK#2:

Synthesis using multiple .vhd files:

In this task we performed synthesis of a larger design which consists of multiple vhdl files. The
top cell is named as proj4 which consists of low-level cells named ALU, ClockDiv, controller,
counter, mux, mux2.
➢ Read files, set constraints and then view RTL schematic as shown below

➢ Optimize the design to view technology specific diagram.

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➢ Save the design and import into pyix:

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TASK#3:
POST SYNTHESIS SIMULATION:
➢ Simulate the design named “Count.4” on modelsim.

➢ Synthesis of code on Leonardo spectrum will give the RTL schematic as below

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➢ Import the design to pyix and enter simulation mode.

➢ Simulate the design to observe the output.

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 SIMULATION

TASK#1:
Analog Simulation of Small Signal Amplifier:

DC ANALYSIS:

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z

Transient (Noise) analysis of Small Signal Amplifier:

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AC analysis of Small Signal Amplifier:

Symbol:

TASK#2:
SIMULATION OF DIFFERENTIAL AMPLIFIER:

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Transient Analysis of Differential Amplifier:

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AC analysis of differential Amplifier:

TASK#3:

AC analysis of filters:

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HIGH PASS GRAPH:

LOW PASS GRAPH:

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BAND PASS GRAPH:

PHYSICAL LAYOUT
TASK#1:

NMOS TRANSISTOR:

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CMOS INVERTER:

TASK #2

NAND GATE:

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Physical layout:

TASK#3

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Floor planning and Placement:

DESIGN AND PHYSICAL LAYOUT OF ALU

Simulation on modelsim:

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Synthesis on Leonardo:

Import into pyix:

Entering Simulation Mode:

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EZ plot:

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Physical Layout:

Layout Verification:

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CONCLUSION:

➢ Design of an IC involves various steps:

• Design Capture using VHDL

• Synthesis

• Simulation

• Floorplanning and Placement

• Physical layout and verification

➢ In this internship, I have applied all these steps in various tasks. This has helped to design a
complete IC of ALU as my final project.

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