BITS Pilani

presentation
BITS Pilani Dr. Pankaj Arora
Department of Electrical and Electronics Engineering
Pilani Campus
 BITS Pilani
Pilani Campus

MEL ZG611, IC Fabrication Technology

Lecture No. 1
Special thanks to: Prof. Nandita Das Gupta
Scope of the course

• Difference between a circuit and IC (Integrated Circuit)

Circuit: A PCB with different components soldered on it

e.g. Resistor, capacitor, transistors, wires, diodes etc.

Integrated Circuit: The entire circuitry {all active and

passive components) are housed on the same substrate.

Circuit Integrated Circuit

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Types of Integrated Circuits

Depending on the Complexity of the Integrated circuits:

SSI: Small Scale Integrated Circuits (10 to 100 transistors)

MSI: Medium Scale Integrated circuits (100 to 1000

transistors)

LSI: Large Scale Integrated Circuits (More Than 10000)

VLSI: Very Large Scale Integrated Circuits (Millions of

Transistors

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What we are going to study in
the course ??
What are the processes to fabricate these Integrated
Circuits (IC)?

• 95% of Today’s chips are made of Silicon (Si)

• The most important element in IC is the active element

which can be BJT or MOSFET.
BJT: In IC with high speed
MOSFET: In IC with High package density

• BIMOS or BICMOS : Both BJT and MOSFETS are active

elements.
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How do we propose the
course
• Process steps for BJT based Technology

• Process steps for MOSFET base Technology

• After getting familiar with process steps, we will study the

each process individually in details

• Reference book :
1. Sze S. M., “VLSI TECHNOLOGY”
2. James Plummer, M. Deal and P. Griffin, “Silicon VLSI
technology”
• Contact me @: pankaj.arora@pilani.bits-pilani.ac.in
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Process steps for BJT

Silicon (npn Bipolar Junction Transistor):

Start with a p type, single crystal oriented <111> and with
a resistivity of 10 Ω cm • P type , Single crystal Si Wafer
with resistivity 10 Ω cm
• Crystal Orientation <111>
1. Crystal Growth, structure and orientation

3D View

Si Wafer

Cross
section

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Process steps for BJT

1. Crystal Growth, structure and orientation

2. Oxidation
Si has a good tendency to get oxidized as (SiO2)
• SiO2 can be used as an insulator, dielectric and a mask

SiO2

Si

Si after Oxidation

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Process steps for BJT

1. Crystal Growth, structure and orientation

2. Oxidation
3. Photolithography
Photoresist + Mask + UV radiation

Photoresist
SiO2

Si

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 Process steps for BJT

1. Crystal Growth, structure and orientation

2. Oxidation
3. Photolithography
4. Etching
Putting in HF solution and then remove the photoresist
Photoresist
SiO2

Si

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Process steps for BJT

1. Crystal Growth, structure and orientation

2. Oxidation
3. Photolithography
4. Etching
5. Diffusion
Antimony and Bismuth are used as n+ dopant

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 Process steps for BJT

1. Crystal Growth, structure and orientation

2. Oxidation
3. Photolithography
4. Etching
5. Diffusion
6. Epitaxy

• n epitaxial layer is going to be the collector

of the npn transistor
• Buried layer diffusion is done in order to
reduce the collector resistance

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pn junction isolation

Providing the isolation between adjacent devices using reverse

Biased pn junction

Process involved: Oxidation, Photolithography and Diffusion

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P type doping for Base region

Since Base region is lightly doped compared to Emitter, so we

go for fabrication of Base region first.

Process involved: Oxidation, Photolithography and Diffusion

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n+ type doping for Emitter region

After the Base region, the n+ type doping is done for the Emitter region.

Process involved: Oxidation, Photolithography and Diffusion

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n+ type doping in collector region

While n+ type doping is done for the Emitter region, a small pocket is
opened in the collector region with same n+ type doping

No Extra process is done

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Process steps for BJT

1. Crystal Growth, structure and orientation

2. Oxidation
3. Photolithography
4. Etching
5. Diffusion
6. Epitaxy
7. Metallization

• Al is usually used as a
metal for making contacts
to the outer world with
help of photolithography
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Quick recap for process steps
for BJT

1. Crystal Growth, structure and orientation

2. Oxidation

3. Photolithography

4. Etching

5. Diffusion

6. Epitaxy

7. Metallization
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 Process steps for MOSFET

• In brief, there are

mainly four major
steps to realize a
MOSFET.

Field Oxide

Source and Drain Doping

Gate Oxide

Metal contacts

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Process steps for MOSFET

1. Field Oxide
n type Single crystal Si wafer <100 > Crystal orientation

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Process steps for MOSFET

1. Field Oxide
2. Source & Drain Doping
After opening the windows using Photolithography, p+ type
Source and Drain doping was done

Lateral
Encroachment

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Building an oxide on the
Source and Drain
After Source and Drain formation, another layer of oxide is
built up over source and drain

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Process steps for MOSFET

1. Field Oxide
2. Source & Drain Doping
3. Gate Oxide

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Process steps for MOSFET

1. Field Oxide
2. Source & Drain Doping
3. Gate Oxide
4. Metal Contacts

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Why did we use P channel
MOSFET
MOSFET

Enhancement Type Depletion Type

(Normally off ) (Normally on )

• For n type enhancement MOSFET positive gate voltage is

required to make it on.
• For p type enhancement MOSFET negative gate voltage is
required to make it on.
1. There are always induced positive unwanted charges are there in gate
oxide during oxidation and doping
2. To nullify these charges negative voltage is required on the gate
terminal.
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 Process steps for Poly Si gate
based MOSFET

• In brief, there are

mainly four major
steps to realize
Poly Si MOSFET.

Field Oxide

Gate Oxide + Poly Si

Gate Pattern + Source and

Drain Doping

CVD + Metal

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Process steps for Poly Si gate
based MOSFET

1. Field Oxide
p type Single crystal Si wafer <100 > Crystal orientation

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Process steps for Poly Si gate
based MOSFET

1. Field Oxide
2. Gate Oxide + Poly Si (Oxidation and CVD)
After opening the windows using Photolithography, Gate
oxidation followed by deposition of Poly Si was carried out

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Patterning and etching of the
Poly Si
• To define gate, photolithography was used to pattern Poly Si

• Etching was used to remove unwanted Poly Si

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Process steps for Poly Si gate
based MOSFET

1. Field Oxide
2. Gate Oxide + Poly Si (Oxidation and CVD)
3. Source and Drain Doping (Ion Implantation)
No need of mask for source and Drain Doping
(Just quick dip in HF will etch unwanted oxide)

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Process steps for Poly Si gate
based MOSFET

1. Field Oxide
2. Gate Oxide + Poly Si (Oxidation and CVD)
3. Source and Drain Doping (Ion Implantation)
4. CVD + Metalization

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 Difference between metal based
and Poly Si gate technology
1. Metal based Gate Technology

Alignment issues
2. Poly Si Based Gate Technology

• Self Aligning Process

• (No need of Mask

for S & D doping)
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Summary so far

1. Crystal Growth, structure and orientation

2. Oxidation

3. Photolithography

4. Etching

5. Diffusion / Ion Implantation

6. Epitaxy

7. Metallization

8. Chemical Vapor Deposition

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 Crystal Structure

BJT:
a)
<111> orientation
MOSFET:
<100> orientation b)

(a) Cubic Lattice

(b) FCC Cubic lattice

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Crystal structure of Si

Zincblende structure: two interpenetrating FCC sub-lattice

(1/4, 1/4, 1/4)

(3/4, 3/4, 1/4)
(3/4, 1/4, 3/4)
(1/4, 3/4, 3/4)

Diamond Lattice
Structure

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Crystal Structure of Si

Suppose each side of cube has a length “a”. So lattice

constant of the crystal = a

What is the distance between two neighboring atoms in

ZincBlende structure ?

(1/4, 1/4, 1/4)

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Crystal Structure of Si
• Each atom of second sub lattice forms a tetrahedron with the
atoms of first sub lattice

• How close can they be spaced when they are touching each other?

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Package density in Zincblende
structure
How many total atoms are there in unit cell?

Total number of
atoms : 8

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Package density in
ZincBlende structure
Total volume occupied by these atoms inside the sub lattice

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Package density in FCC
structure
Total volume occupied by these atoms inside the sub lattice
Total number of
atoms : 4

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Misfit factor in crystal lattice

Radius of atoms for different element

Misfit factor

Misfit factor

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 Crystal Orientation (planes)

A plane is actually, you know, defined

by the intercepts on the three axis x, y
and z axis

h, k, l are the miller indices which

actually defines the plane.

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Miller indices (Crystal planes)

(a) (b)

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 Miller indices (Crystal planes)

(a) { 0 1 1} (b) { 1 1 1}

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