BX1S CHASSIS

OPERATION MANUAL
TABLE OF CONTENTS

Chapter 1 BX1S Concepts Chapter 5 Video Processing

1.1 Overview and Block Diagrams 1 5.1 Analogue Video Processing 28
1.2 Features and Specifications 6 5.2 Functional Description of Video Processor 30
5.3 RGB output circuit and black-current stabilization 33
Chapter 2 Power Supply Circuit 5.4 RGB Output Stage 34

2.1 Overview and Block Diagrams 14 Chapter 6 Audio Circuit

2.2 Start-up Circuit 18
2.3 Over Voltage Protection 19 6.1 2-Speaker Stereo Model 36
2.4 Latch Circuit 19 6.2 2-speaker AV stereo model 36
2.5 Over Current Protection 20 6.3 1-Speaker Mono Model 39
2.6 Stand-by Operation 20 6.4 2-Speaker Mono Model 39
6.5 3D Stereo Model 42
Chapter 3 Deflection Circuit 6.6 3D AV Stereo Model 42
6.7 3D mixer circuit 45
3.1 Horizontal Deflection Circuit 22 6.8 Pin Assignment IC001 for Audio DSP 46
3.2 Pincushion Correction Circuit 22 6.9 Muting and Standby Circuit 46
3.3 S-Correction Circuit 23
3.4 H-Centering Circuit 23
3.5 Vertical Deflection Circuit 23

Chapter 4 Tuner and IF

4.1 Overview and Block Diagram 26
4.2 AGC Mute (Defeat) 27
4.3 AGC (Automatic Gain Control) 27
CHAPTER 1 BX1S CONCEPT
1.1 Overview and Block Diagrams PWB variations for four model destinations (America, Europe, General
Area and Japan) have been reduced as shown in Figure 1.1. Besides, its
BX1S is a worldwide design chassis that divided into three types, which one board concept reduces board handling. In the mean time, parts
are E, W and B type. E type is a two-speaker stereo model consists of quantity also reduced.
Enriched Picture and Enriched Sound with picture and sound
improvement. Meanwhile, W type is a two-speaker AV model that has Power supply and deflection circuit for BX1S is based on BG2T chassis.
Wing Design and Visible Sound with excellent sound quality. B type is a Audio circuit is based on BG2T and BG3R chassis. Video and VIF
one-speaker mono model that has Basic and Simple design with price processing will be in IC001.
consciousness. Here, enriched picture refers to Intelligent Picture Plus.
Enriched sound refers to the new Surround and speaker box features Figure 1.2 shows the block diagram for BX1S E type while Figure 1.3
whereas Visible Sound refers to the 5 Band Equalizer. shows the block diagram for BX1S W type. The block diagram for BX1S B
type is shown in Figure 1.4.

1
 Figure 1.1 Common Signal Block

2
 Figure 1.2 BX1S E Type Block Diagram

3
 Figure 1.3 BX1S W Type Block Diagram

4
 Figure 1.4 BX1S B Type Block Diagram

5
1.2 Features and Specifications
1.2.1 America Models
There are three types of series for SONY BX1S America, which consist of FV series (E type), FS series (W type) and FM series (W type). Their features
and specifications are shown in Table 1.1 below.

SONY
CRT 21” FD Trinitron 14” FD Trinitron
FV Series FS Series FM Series FV Series
SERIES (E Type) (W Type) (W Type) (E Type)
PICTURE
Intelligent Picture Plus Intelligent Picture Plus
Color Temperature Color Temperature
Picture Mode Picture Mode
Analogue Comb Filter Analogue Comb
V-Compression Filter
VM V-Compression

AUDIO
Steady Sound (Intelligent Volume) Steady Sound
(Intelligent Volume)
1 way speaker (2Sp)
1 way speaker (2Sp) 1 way speaker (2Sp) 1 way speaker 3w x 3 w
10w x 10 w 5w X 5w (Mono 2Sp) 5 Band Graphic
5w X 5w Equalizer (For Latin
models only)
5 Band Graphic Equalizer (For Latin models only)
Audio Mode
Audio Mode
Simple Surround
TruSurround SRS Simple Surround
BBE / WOW
Speaker Box

Table 1.1 Features and specifications for BX1S America models (continue next page).

6
 SONY
CRT 21” FD Trinitron 14” FD Trinitron
FV Series FS Series FM Series FV Series
SERIES (E Type) (W Type) (W Type) (E Type)
TERMINALS Total Rear Front Total Rear Front Total Rear Front Total Rear Front
AV in 2 1 1 2 1 1 2 1 1 2 1 1
S Video in 1 1 0 0 0 0 0 0 0 0 0 0
YUV in 1 1 0 1 1 0 0 0 0 1 1 0
YUV/RGB in 0 0 0 0 0 0 0 0 0 0 0 0
Monitor out 1 1 0 0 0 0 0 0 0 0 0 0
Headphone 1 0 1 1 0 1 1 0 1 1 0 1
POWER SUPPLY 120V, 60Hz
(220V for Chile models)
OTHERS New Top Control Operation Dynamic Picture
Initial Set-up Menu Auto SAP
Speed Surf (Speed Search) Auto Mute (on no signal)
Channel Block (Child Lock) Auto Program
New Favorite CH Channel Fix
Video & CH Label Channel Skip/ Add
Caption Vision Jump
Sleep Timer XDS
Clock with On/Off Timer (2 event) AC Stay Off
PIC Rotation
Auto-Pedestal Clamp
Auto-White Balance

Table 1.1 Features and specifications for BX1S America models (continue from previous page).

7
1.2.2 Europe Models
There are three types of series for SONY BX1S Europe, which consist of FQ series (E type), CL series (W type) and CT series (B type). There is one
AIWA BX1S Europe series, which is F21TS1 series. Their features and specifications are shown in Table 1.2 below.

SONY AIWA
CRT 21” FD Trinitron 14” FD Trinitron 21” FD Trinitron
FQ Series CL Series CT Series CT Series F21TS1
SERIES (E Type) (W Type) (B Type) (B Type)
PICTURE
Intelligent Picture Intelligent Picture
V-Compression V-Compression
Color Temperature Color Temperature
Picture Mode Picture Mode
Al Comb Filter
AUDIO
Auto Volume (Intelligent Volume) Auto Volume
Audio Mode (Intelligent Volume)
Audio Mode
1 way speaker (2Sp) 1 way speaker (2Sp)
5w X 5w 1 speaker mono 5w X 5w
3w
Except 21CL1K
1 way speaker (Mono 2Sp)
3W X 3W
Simple Surround
Speaker Box
POWER 220-240V, 50Hz 220-240V, 50Hz
SUPPLY
Table 1.2 Features and specifications for BX1S Europe models (continue next page).

8
 SONY AIWA
CRT 21” FD Trinitron 14” FD 21” FD Trinitron
Trinitron
FQ Series CL Series CT Series CT Series F21TS1
SERIES (E Type) (W Type) (B Type) (B Type)
TERMINALS Total Rear Front Total Rear Front Total Rear Front Total Rear Front Total Rear Front
AV in 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1
AV 21 PIN 1 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0
(AV in, RGB in, TV out)
AV 21 PIN 2 1 1 0 1 1 0 0 0 0 0 0 0 1 1 0
(AV in/YC in, monitor
out)
Headphone 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1
OTHERS New Top Control Operation New Top Control
Initial Set-up Menu Operation with Beep
Speed Search Sound
Video & CH Label Initial Set-up Menu
Sleep & Wake Up Timer Speed Search
Fine Tuning Video & CH Label
PIC Rotation Sleep & Wake Up
Timer with Beep
Sound
Fine Tuning
PIC Rotation
Table 1.2 Features and specifications for BX1S Europe models (continue from previous page).

9
1.2.3 General Area Models
There are four types of series for SONY BX1S GA, which consist of AR series (E type), HW series (W type) BT series (B type) and BM series (B type).
Their features and specifications are shown in Table 1.3 below.

CRT 21” FD TRINITRON 14” FD TRINITRON

AR SERIES HW SERIES BT SERIES BM SERIES AR SERIES BM SERIES
SERIES (E TYPE) (W TYPE) (B TYPE) (B TYPE) (E TYPE) (B TYPE)
PICTURE
New Intelligent Picture New Intelligent Picture
Color Temperature Color Temperature
Picture Mode Picture Mode
Al Comb Filter Al Comb Filter
V-Compression V-Compression
VM
AUDIO 1 way speaker 1 way speaker 2 Speakers 1 speaker mono 1 way speaker 1 Speaker Mono
(2Sp) 10W X 10W (2Sp) 5W X 5W 3w X 3W 3w (2Sp) 3W X 3W 3W
Intelligent Volume (3W X 3W + 9W : (Except for Mono Intelligent Volume Intelligent Volume Intelligent Volume
for 3D-Woofer Models: (except P42) (Except P42,
model) Mono 2 Speakers P42/L and P42/N)
Intelligent 3w X 3W)
Volume Intelligent Volume
A2 Bilingual (for A2 Bilingual (Thai) A2 Bilingual (Thai) A2 Bilingual (for A2 Bilingual (Thai)
HW21P52) AR14P52)
SRS 3D Surround Simple Surround Simple Surround & Simple Surround
Audio Mode Audio Mode Audio Mode Audio Mode
(Only for AV
Stereo Models)
5 Band Graphic 5 Band Graphic 5 Band Graphic
Equalizer Equalizer Equalizer
Speaker Box Speaker Box
BBE BBE
Table 1.3 Features and specifications for BX1S GA models (continue next page).

10
CRT 21” FD TRINITRON 14” FD TRINITRON

AR SERIES HW SERIES BT SERIES BM SERIES AR SERIES BM SERIES

SERIES (E TYPE) (W TYPE) (B TYPE) (B TYPE) (E TYPE) (B TYPE)
TERMINALS Total Rear Front Total Rear Front Total Rear Front Total Rear Front Total Rear Front Total Rear Front
AV in 2 1 1 2 1 1 2 1 1 2 1 1 2 1 1 2 1 1
S Video in 1 1 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0
YUV in 1 1 0 1 1 0 0 0 0 0 0 0 1 1 0 0 0 0
YUV/RGB in 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Monitor out 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0
Headphone 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1
POWER SUPPLY Auto (110-240V) : Sogul/ MEE/ Sin(GA)/ Indo/ India/ Phil/ SIN
Auto (110-220V) : Korea
Narrow (220-240V) : HK/ Thai/ Aus/ NZ/ MAL
Narrow (110V) : TWN
Narrow (220V) : China

OTHERS New Top Control Operation

Multi Language Graphic OSD Menu
Initial Set-up Menu
Speed Search
Child Lock
Video & CH Label
Sleep & Wake up Timer
Fine Tuning (for PAL model)
Rod Antenna (Except Stereo Decoder & Text model)
PAL Conv. +2pin: Sin(GA)/ Indo/ Sogul/ MEE
NTSC Conv. +2pin: Phil
PIC Rotation (for all Text model) (HK/ China/ MAL/ Sin/ Aus/ NZ)

Table 1.3 Features and specifications for BX1S GA models (continue from previous page).

11
1.2.4 Japan Models
There are two types of series for SONY BX1S Japan, which consist of DA series (E type) and MF series (B type). There are two AIWA BX1S Japan
series as well, which are F21TS1 and F14TS1. Their features and specifications are shown in Table 1.4 below.

SONY AIWA
CRT 21” FD Trinitron 14” FD Trinitron 21” FD Trinitron 14” FD Trinitron
DA Series MF Series DA Series MF Series F21TS1 F14TS1
SERIES (E Type) (B Type) (E Type) (B Type)
PICTURE
Wide Band & Dynamic & Coring VM Wide Band & Dynamic & Coring VM Intelligent Picture
AI Comb Filter AI Comb Filter VM
Picture Mode Picture Mode AI Comb Filter
Intelligent Picture Intelligent Picture V-Compression
Picture Mode
V-Compression V-Compression
AUDIO
Intelligent Volume Intelligent Volume Intelligent Volume
Audio Mode
1 way speaker (2Sp) 1 speaker mono 1 way speaker (2Sp) 1 speaker mono 1 way speaker (2Sp) 1 way speaker (2Sp)
5w X 5w 3w 3w X 3w 3w 5w X 5w 3w X 3w
5 Band Graphic 5 Band Graphic
Equalizer Equalizer
TruSurround SRS/ TruSurround SRS/
WOW WOW
BBE BBE
Speaker Box Speaker Box
Audio Mode Audio Mode

Table 1.4 Features and specifications for BX1S Japan models (continue next page).

12
 SONY AIWA
CRT 21” FD Trinitron 14” FD Trinitron 21” FD Trinitron 14” FD Trinitron
DA Series MF Series DA Series MF Series F21TS1 F14TS1
SERIES (E Type) (B Type) (E Type) (B Type)
TERMINALS Total Rear Front Total Rear Front Total Rear Front Total Rear Front Total Rear Front Total Rear Front
AV in 3 2 1 2 1 1 3 2 1 2 1 1 3 2 1 3 2 1
S Video in 2 1 1 0 0 0 2 1 1 0 0 0 2 1 1 2 1 1
YUV in 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
YUV/RGB in 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
D1 in 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 1 1 0
AV Multi in 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0
Monitor out 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 1 1 0
Headphone 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1
POWER SUPPLY 100V, 50/60Hz 100V, 50/60Hz

OTHERS New Top Control Operation New Top Control Operation with Beep
Initial Set-up Menu Sound
New Favorite CH Initial Set-up Menu
CH Label CH Label
(Off Timer) Sleep Timer Sleep Timer
PIC Rotation PIC Rotation

Table 1.4 Features and specifications for BX1S Japan models (continue from previous page).

13
CHAPTER 2 POWER SUPPLY CIRCUIT
2.1 Overview and Block Diagrams
T602
(Transformer)
11V
AC In
D604 IC601 Rectifier
Main Main Switching D624 IC602 IC604 5V
Rectifier Regulator 9V regulator 5V regulator
9V
D622 IC606 3.3V
3.3V regulator

D620 IC603 1.8V

1.8V regulator

IC607 1.8V
1.8V regulator
D2625 17V/21V/28V

D621 +B

STBY_SW
IC605 & PH600 Q609,Q608,D629 Standby Switch IC001
Error Amp and Standby Control from IC001
14 DECDIG
Photo Coupler Circuit
115
DGC-Relay
DGC Control from IC001

Degauss Coil

RY600 Figure 2.1 Power Circuit Block Diagram

(For General Area, America and Europe models)

14
 STBY_SW
T602 Standby Switch from IC001
(Transformer)
AC In D604 IC601 Rectifier
Main Main Switching IC602 IC604 5V
D624
RY601 Rectifier Regulator 9V regulator 5V regulator
9V
D620 IC603 1.8V
1.8V regulator
Feedback
D2625 17V~21V

D621 +B
Backup
IC001
PH600
Photo IC605
Coupler Error Amp
115 14
DGC-Relay
DGC Control from IC001
Degauss Coil

T606 (STBY RY600

Transformer)

IC608 IC609
STBY 3.3V STBY 1.8V
Figure 2.2 Power Circuit Block Diagram
(For Japan models)

15
Figure 2.1 shows the BX1 chassis power supply circuit block
diagram for General Area, America and Europe models while
Figure 2.2 shows the power supply circuit block diagram for Japan
models. Japan models power supply system is basically similar to
other destination models except the standby circuit.
The differences between Japan models and other destination
models:
1. Japan models do not use standby operation of main power
supply (IC601), but has a separate standby power supply in
order to achieve ECO STBY.
2. Japan models have 2 relays, which are degauss relay and main
relay. Main relay switches AC On/ OFF. STBY mode is made
through this relay and it is controlled by IC001.
16
3. Vcc of main relay, 3.3V and STBY 1.8V are supplied by STBY
power supply.
4. After power ON, 3.3V and STBY 1.8V are backed up by main
power supply.
5. Japan models have power SW (S1001) with the function that is
different from other power SW (S600). S600 switches AC ON/
OFF. However, S1001 switches only Vcc of main relay (in STBY
power supply). This is due to ‘Forced Power On’ function in
Japan models. Thus, the AC ON/ OFF function is not in power
SW but in main relay.
Meanwhile, Table 2.1 at the next page shows some other
differences in power supply circuit for all area.
 Difference America Euro GA Japan
North US Chile Europe Auto Volt Narrow 240V Taiwan China Narrow
1 AC Input 120V 220V 220V 110~240V 240V 110V 220~240V 100V
2 Start-up Circuit Uses R651 Uses FN155 Uses FN155 Uses FN155 Uses FN155 Uses R651 Uses FN155 Uses R651
3 Block Capacitor 250WV 450WV 450WV 450WV 450WV 250WV 450WV 160WV
4 Switch S600 No switch No switch Switch Switch Switch Switch Switch Switch (S1001)
5 Varistor 270V 620V 620V 620V 620V 270V 620V 270V
6 PTC (positive Thermistor) 3Ω 4.5Ω 4.5Ω 4.5Ω 4.5Ω 3Ω 4.5Ω 3Ω

Table 2.1 Differences in power supply circuit for all area.

17
2.2 Start-up Circuit
The Start-up circuit detects the apply voltage to the VIN terminal (pin 4 of
IC601) for starting or stopping operation of the control IC. A power supply
to the control IC (input for VIN terminal) consists a circuit shown in Figure
2.3. The capacitor C624 is charged by start-up resistor R9 for starting-up
the operation of IC601.
Figure 2.3 Start-up Circuit
18
After starting-up, the drive winding D (terminal 7 and 8 T602) supplies
power to the control IC by rectifying and smoothing the winding voltage.
Figure 2.4 indicates start-up voltage waveform behavior at VIN terminal.
The VIN terminal voltage dips soon after control circuit starts operation
because voltage supply from the drive winding takes time to reach for the
set voltage. The Operation-Stop-Voltage, however, is set as low as 11.7V
(maximum) to prevent start up failure before the drive winding supply
enough voltage for continuous operation of the control circuit.
Figure 2.4 VIN waveform when start up.
2.3 Over Voltage Protection
The Over Voltage Protection Circuit (OVP) operates when voltage across
VIN – GND terminals IC601 reaches 28V (Typ.) or above and control IC
stops oscillation by entering the Latch mode. This OVP circuit operates
when over voltage output in the secondary circuit, such case as feedback
loop open, because the Drive Winding supplies voltage to the VIN
terminal and this voltage is proportional to the output voltage.
Consequently, voltage at VIN terminal is kept between 10.5V (TYP) and
16V (TYP) for preventing abnormal voltage increase at VIN terminal.
Figure 2.5 shows voltage waveform at VIN terminal when the Latch
Circuit operates. The Latch circuit is released by reducing apply voltage
to the VIN terminal below 6.6V (minimum) or simply shut down AC input
and restart the power supply.

2.4 Latch Circuit

The Latch Circuit sustains oscillator output at Low for suspending power
supply operation when any of following protection is functioning, Over
Voltage Protection (OVP), Thermal Shut Down (TSD) or Over Loading
Protection (OLP). The sustain current of the Latch Circuit is maximum
600 µA (Ta = 25°C).
This circuit only latch-ups after OVP, TSD or OLP circuit operates and a
delay-time incorporated in the built-in timer-circuit in the control IC
prevents malfunction of this Latch Circuit with a noise. By the way, VIN
terminal voltage drops when the Latch Circuit operates because constant
voltage (Reg) circuit in the control IC keeps functioning and circuit current
is kept high. Figure 2.5 VIN terminal voltage in latch mode.

The voltage at the VIN terminal starts rising up when it falls below
Operation-Stop-Voltage (10.5V Typ.) because circuit current is decreased
to 100 µA (Ta = 25°C). On the other hand, the voltage at VIN terminal
starts falling when it rises up to Operation-Start-Voltage (16V Typ.)
because circuit current is increased.

19
2.5 Over Current Protection
The Over Current Protection (OCP) circuit in IC601 detects switching
current flowing in the MOSFET and protects from flow of over current in
the MOSFET.
The OCP circuit detects every peak drain current pulse of the MOSFET
and reserves oscillator output pulse-by-pulse. The configuration of
external components, over current detection resistor ROCP (R653 / R619 /
R620), resistor R621 and capacitor C616, are required as indicated in
Figure 2.6. To prevent malfunction of the OCP, R621 and C616 are
filtering surge current of the power MOSFET when turn to ON-state. This
OCP circuit turns power MOSFET to OFF-state when voltage at the OCP
terminal reaches threshold voltage (-0.61V Typ.) of VOCP with voltage
appeared across over current detection resistor R653/R619/R620 when
the power MOSFET turns to ON-state.
Figure 2.6 Circuit configuration for OCP.
20
2.6 Stand-by Operation
2.6.1 GA, Europe and America models
IC601 features burst mode switch for reducing power consumption in the
standby mode.
A switch circuit in the secondary side reduces output voltage and
automatically switches over to burst mode while standby for remote
controller signal.
The secondary switch circuit reduces output voltage as well as winding
voltage of the transformer. The drive winding voltage is dropped
accordingly and power supply to the VIN (pin 4 of IC601) terminal is
discontinued, as well as voltage at VIN terminal is dropped by current
consumption of the IC itself. The IC stops operation when VIN terminal
voltage reaches to the operation voltage (10.5V Typ.) and consumption
current of the IC becomes non-operation circuit current (100µV
maximum). Then start up resistor charges the backup capacitor and it
rises voltage at VIN terminal until reaching to operation start voltage of
the IC.
By repeating above operation, the power supply continues the burst
mode.
2.6.2 Japan models
In order to achieve ECO STBY (power consumption in STBY mode is less
than 0.1W), Japan model has a separate STBY power supply.
Power Transformer (T606 : low core loss type) is used. T606 has center
tap as well as 3.3V and 1.8V are made from this line voltage in normal
condition. The terminal voltage between both sides is used for VCC of
main relay (Relay 12V). 3.3V regulator and 1.8V regulator are low internal
bias current type.
21
Q615 and Q614 compose error AMP and detect center tap line voltage.
When this line voltage is down and become insufficient to operate 3.3V
regulator due to AC lower voltage or heavy current load, current for 3.3V
regulator is supplied from Relay 12V via Q617.
Q616 is current booster for IC608. (IC608 needs external transistor for
current output).
While set is ON, 3.3V regulator and 1.8V regulator are backed up by main
power supply.
CHAPTER 3 DEFLECTION CIRCUIT
3.1 Horizontal Deflection Circuit 3.2 Pincushion Correction Circuit
The horizontal deflection circuit provides the sawtooth current to the The Pincushion Correction circuit is used to correct the barrel distortion in
deflection coils so that the electron beam will scan from left to right on the the screen. The E.W parabolic wave from pin 21 of IC001 is fed to pin 2
screen. It also generates the high-voltage required for picture tube of Pin Amplifier IC802 (TJM4558CDT) for amplification before input to pin
operation. 5 of Comparator IC801 (LM2903DT). The generated vertical pulses from
pin 1 of IC801 (LM2903DT) is then fed to pin 6 of IC801 to produce PWM
By referring to Figure 3.1, the pre-drive pulse is generated from pin 67 of Pulse. D816 and D817 are damper diodes.
IC001, which then input to the base of Horizontal Drive transistor Q803.
The Horizontal Drive Transformer (HDT), T800 is used to ensure sufficient Pincushion correction can be adjusted by the Service List Items as shown
current driven to horizontal output transistor (H OUT Tr) Q805. R840 in Table 3.1.
serves to improve the stability of the current input to H OUT Tr, Q805.
Device Item Adjustment Function
When the driven horizontal pulse is supplied to the base of Q805, the Name No Item
transistor turns ON and OFF to produce the sawtooth wave current to the GEO 01 HPAR Horizontal Parallelogram
Deflection Yoke (DY) and the Flyback Transformer (FBT). The return 02 HBOW Horizontal BOW
circuit of this horizontal deflection is connected to the H-centering circuit 06 HSIZ Horizontal Size
and Pincushion correction circuit. 07 EWPW EW Parabola
08 UCOP Upper Corner Pin
09 LCOP Lower Corner Pin
10 EWTZ EW Trapezium
Table 3.1 Service List Items for Pincushion correction.

22
3.3 S-Correction Circuit 3.5 Vertical Deflection Circuit
A S-correction circuit is used to correct S-distortion due to the deflection By referring to Figure 3.2, the vertical deflection circuit starts from pin 22
current fails to change linearly across the screen. By simply putting a (VD-) of IC001 and input to pin 1 (DRV-IN) of V Out IC804 (STV9302A)
capacitor, C852 in series with the horizontal deflection coils, the sawtooth and the output comes out from pin 5 (OUTPUT). IC804 contains a boost-
waveform is modified into a slightly sine-wave shape (the top and bottom up circuit, which can increase the power supply voltage of the output
are somewhat squashed). This reduces the scanning speed near the circuit during the vertical deflection blanking period. A capacitor of C855
screen edges. Also S-correction can be adjusted by the Service List Items is connected from pin 3 and 6 of IC804 can shorten the blanking time and
in Table 3.2. reduce the power dissipation. The power supply to IC804 is obtained from
pin 9 and pin 7 of FBT via D824 and D823 respectively. C860 and C862
Device Name Item No Adjustment Item Function
connected to these rectifier are used to prevent the voltage from
Geo 13 SCOR S-Correction
oscillation.
Table 3.2 Service List Items for S- Correction.

3.4 H-Centering Circuit

This circuit is used center the raster screen by comparing the voltage
difference between the S-correction capacitor, C852 and the +B line (135
V) to let the DC current flow to the deflection yoke for centering.
• To move the picture to the right, the current is sent through L802,
JW1839 to D819.
• To move the picture to the left, the current is sent through D821,
JW1839 to L802.

23
Figure 3.1 Horizontal Deflection Circuit

24
 Figure 3.2 Vertical Deflection Circuit

25
CHAPTER 4 TUNER AND IF
4.1 Overview and Block Diagram
BX-1S chassis uses 4 types of newly developed Tuner. These Tuners are used for four different regions, which are America, General Area, Europe and
Japan. Listed below is Tuner model name for each region.

Region Model name

America BTP-AA402
Europe BTP-AC421 – Continental area
BTP-AU621 – UK only
GA TEDE9X315A
Japan BTP-AJ301
Table 4.1 Tuner model name for different region.

For America and Japan region, F-Type terminal Tuner is used for RF input where else, for GA and Europe region, IEC terminal is used for RF input.
Figure 4.1 shows the block diagram of TUVIF.

Tuner
block IC001
Amplifier

IF
Osc iAGC SAW filter
IF AGC

Figure 4.1 Block diagram of TUVIF

26
4.2 AGC Mute (Defeat)
Except GA tuner, all America, Europe and Japan tuner have built in AGC
mute circuit control by software.
For GA tuner, AGC mute is control by Micro (pin 126 of IC001) via
external hardware circuit. Figure 4.2 shows the block diagram of the
mute function for GA models.
4.3 AGC (Automatic Gain Control)
In order to get the correct AGC voltage, steps below should be taken for
manual AGC adjustment.
• Connect a signal of 65dBµ/75Ω open (America, GA and Japan) or
68dBµ/75Ω open (Europe) via Tuner antenna input.
• Measure the AGC voltage through pin 1 of TU101 or from the AGC
pin of CN904.
• Adjust AGCT register to have AGC voltage of 3.2 ± 0.3 volts.
For Europe model, AGC adjustment can also be done automatically
using the TT mode TT61 (auto AGC adjustment).

IC001
Tuner

IF input
VIF
processor

AGC mute Micro

circuit

Figure 4.2 Block diagram of AGC mute function for GA

27
5.0 VIDEO PROCESSING
5.1 Analogue Video Processing
• Video switch with 3 external CVBS inputs and a CVBS output. All CVBS
inputs can be used as Y-input for Y/C signals. However, only 2 Y/C
sources can be selected because the circuit has 2 chroma inputs. It is
possible to add an additional CVBS(Y)/ C input (CVBS/ YX and CX )
when the YUV interface and the RGB/ YPR PB input are not needed.
• Automatic Y/C signal detector.
• Adaptive digital (4H/2H) PAL/ NTSC comb filter for optimum separation
of the luminance and the chrominance signal.
• Integrated luminance delay line with adjustable delay time.
• Picture improvement features with peaking (with switchable centre
frequency, depeaking, variable positive/ negative peak ratio, variable
28
pre-/ overshoot ratio and video dependent coring), dynamic skin tone
control, gamma control and blue- and black stretching. All features are
available for CVBS, Y/C and RGB/ YPB PR signals.
• Switchable DC transfer ratio for the luminance signal.
• Only one reference (24.576 MHz) crystal required for the TCG micro
controller, digital sound processor, Teletext-and the colour decoder.
• Multi-standard colour decoder with automatic search system and
various “forced mode” possibilities.
• Internal base-band delay line.
• Indication of the Signal-to-Noise ratio of the incoming CVBS signal.
• Linear RGB/YPB PR input with fast insertion.
• YUV interface. When this feature is not required some pins can be used
as additional RGB/ YPB PR input. It is also possible to use these pins for
additional CVBS (or Y/C) input (CVBS/ YX and CX).
• Tint control for external RGB/ YPB PR signals.
• Scan Velocity Modulation output. The SVM circuit is active for all the
incoming CVBS, Y/C and RGB/ YPB PR signals. The SVM function can
also be used during the display of teletext pages.
• RGB control circuit with ‘Continuous Cathode Calibration’, white point
and black level off-set adjustment so that the colour temperature of the
dark and the light parts of the screen can be chosen independently.
• Contrast reduction possibility during mixed-mode of OSD and Text
signals.
29
• Adjustable ‘wide blanking’ of the RGB outputs.
• Horizontal synchronization with two control loops and alignment-free
horizontal oscillator.
• Vertical countdown circuit.
• Vertical driver optimized for DC-coupled vertical output stages.
• Horizontal and vertical geometry processing with horizontal
parallelogram and bow correction and horizontal and vertical zoom.
• Low-power start-up of the horizontal drive circuit.
• The low-pass filtered ‘mixed down’ I signal is available via a single
ended or balanced output stage (for stereo versions).
• The low-pass filtered ‘mixed down’ I signal is available via a single
ended output stage (for mono versions).
5.2 Functional Description of Video Processor

Figure 5.1 Block diagram for IC001

in E type models

30
5.2.1 CVBS and Y/C input signal selection
Video processor is in IC001. Figure 5.1 shows the block diagram for
IC001 in E type models. The ICs have 3 inputs for external CVBS signals.
All CVBS inputs can be used as Y input for the insertion of Y/C signals.
However, the CVBS(Y)2 input has to be combined with the C3 input. It is
possible to add and extra CVBS(Y/C) input via the pins which are
intended to be used for YUV interface (or RGB/ YPR PB input).
The function of the IFVO/ SVO/ CVBSI pin is determined by the
SVO1/SVO0 bits. When used as output a selection can be made between
the IF video output signal or the selected CVBS signal (monitor out). This
pin can also be used as additional CVBS input. This signal is inserted in
front of the group delay / sound trap circuit. It is also possible to use the
group delay and sound trap circuit for the CVBS2 signal.
For the CVBS(Y/C) inputs the circuit can detect whether a CVBS or Y/C
signal is present on the input. The result can be read from the status
register and this information can be used to put the input switch in the
right position. The Y/C detector is only active for the CVBS(Y)3/C3,
CVBS(Y)4/C4 and CVBS(Y)x/Cx inputs. It is not active for the
CVBS(Y)2/C3 input.
31
5.2.2 Chroma, luminance and feature processing
The IC contains a 4H/2H (2D) adaptive PAL/NTSC comb filter. The comb
filter is automatically activated when standard CVBS signals are received.
For non-standard signals and for SECAM signals the comb filter is
bypassed and the signal is filtered by means of bandpass and trap filters.
The chroma band-pass and trap circuits (including the SECAM cloche
filter) are realised by means of internal filters and are tuned to the right
frequency by comparing the tuning frequency with the reference
frequency of the colour decoder.
The circuit contains the following picture improvement features:
• Peaking control circuit. The peaking function can be activated for all
incoming CVBS, Y/C and RGB/YPRPB signals. Various parameters of
the peaking circuit can be adapted by means of the I 2 C-bus. The main
parameters are:
– Peaking centre frequency.
– Ratio of positive and negative peaks. The peaks in the direction
“white” are the positive peaks.
– Ratio of pre- and aftershoots.
• Video dependent coring in the peaking circuit. The coring can be
activated only in the low-light parts of the screen. This effectively
reduces noise while having maximum peaking in the bright parts of the
picture.
• Black stretch. This function corrects the black level for incoming signals
which have a difference between the black level and the blanking level.
The amount of stretching and the minimum required back ground to
activate the stretching can be set by means of the I 2 C-bus.
• Gamma control. When this function is active the transfer characteristic
of the luminance amplifier is made non-linear. The control curve can be
adapted by means of I 2 C-bus settings.
• Blue-stretch. This circuit is intended to shift colour near ‘white’ with
sufficient contrast values towards more blue to obtain a brighter
impression of the picture.
• Dynamic skin tone (flesh) control. This function is realised in the YUV
domain by detecting the colours near to the skin tone.
• Scan-Velocity modulation output. Also the SVM function can be
activated for all incoming CVBS, Y/C and RGB/YPRPB signals. The
delay between the RGB output signals and the SVM output signal can
be adjusted so that an optimum picture performance can be obtained.
Furthermore a coring function can be activated. Another feature is that
the SVM output signal can be made dependent on the horizontal
position on the screen (parabola on the SVM output).
32
5.2.3 Colour decoder
The ICs decode PAL, NTSC and SECAM signals. The PAL/NTSC
decoder does not need external reference crystals but has an internal
clock generator, which is stabilised to the required frequency by using the
clock signal from the reference oscillator of the TCG micro controller.
Under bad-signal conditions (e.g. VCR-playback in feature mode), it may
occur that the colour killer is activated although the colour PLL is still in
lock. When this killing action is not wanted it is possible to overrule the
colour killer by forcing the colour decoder to the required standard.
The Automatic Colour Limiting (ACL) circuit prevents that oversaturation
occurs when signals with a high chroma-to-burst ratio are received. The
ACL circuit is designed such that it only reduces the chroma signal and
not the burst signal. This has the advantage that the colour sensitivity is
not affected by this function.
The SECAM decoder contains an auto-calibrating PLL demodulator which
has two references, viz: the divided reference frequency (obtained from
the micro controller) which is used to tune the PLL to the desired free-
running frequency and the bandgap reference to obtain the correct
absolute value of the output signal. The VCO of the PLL is calibrated
during each vertical blanking period, when the IC is in search or SECAM
mode.
The base-band delay line is integrated. In devices without CVBS comb
filter this delay line is also active during NTSC to obtain a good
suppression of cross colour effects. The demodulated colour difference
signals are internally supplied to the delay line. The baseband comb filter
can be switched off by means of the BPS bit.
5.3 RGB output circuit and black-current stabilization
In the RGB control circuit the signal is controlled on contrast, brightness
and saturation. The ICs have a linear input for external RGB/YUV signals.
The signals for OSD and text are internally supplied to the control circuit.
The output signal has amplitude of about 2 Volts black-to-white at nominal
input signals and nominal settings of the various controls.
To obtain an accurate biasing of the picture tube the 'Continuous Cathode
Calibration' system has been included in these ICs. A black level off set
can be made with respect to the level, which is generated by the black
current stabilization system. In this way different colour temperatures can
be obtained for the bright and the dark part of the picture.
33
In the Vg2 adjustment mode (AVG = 1) the black current stabilization
system checks the output level of the 3 channels and indicates whether
the black level of the highest output is in a certain window (WBC-bit) or
below or above this window (HBC-bit). This indication can be read from
the status byte 01 and can be used for automatic adjustment of the Vg2
voltage during the production of the TV receiver.
The control circuit contains beam current limiting circuit and a peak white
limiting circuit. The peak white level is adjustable via the I2C bus. To
prevent that the peak white limiting circuit reacts on the high frequency
content of the video signal a low-pass filter is inserted in front of the peak
detector. The circuit also contains a oft-clipper which prevents that the
high frequency peaks in the output signal become too high. The
difference between the peak white limiting level and the soft clipping level
is adjustable via the I2C bus in a few steps.
5.4 RGB Output Stage 5.4.1 General Description
The TDA6108A includes three video output
For the amplification of the RGB signals coming from the video processor
amplifiers in one plastic DIL-bent-SIL 9- pin
IC001 pins 85, 86 and 87, a triple video output amplifier TDA6108A from
medium power (DBS9MPF) package
Philips is used.
(SOT111-1), using high-voltage DMOS
Features:
technology, and is intended to drive the
Typical bandwidth of 8.0 MHz for an output signal of 60V (p-p)
three cathodes of a colour CRT directly. To
High slew rate of 1850 V/µs
obtain maximum performance, the amplifier
No external components required
should be used with black-current control.
Very simple application
Single supply voltage of 2.5 V Figure 5.2 shows the pin diagram of
Fixed gain of 51 TDA6108A while Figure 5.3 show its block
Black – Current stabilization ( BCS) circuit diagram.
Thermal protection

Figure 5.2 Pin configuration

34
Figure 5.3 TDA6108A Block Diagram

35
CHAPTER 6 AUDIO CIRCUIT
6.1 2-Speaker Stereo Model
The models include:
America: 20/21FV, 20/21FS, 13FS, 14FV
Euro: 21FQ, 21CL10, F21TS
GA: AR21 (except AR21M81), HW21N60, HW21M60
Japan: 14/21DA75, 14/21AIWA
By referring to Figure 6.1, the IC001 of the 2-speaker stereo models
contains a DSP block and within it is a stereo decoder.
For America, GA and Japan models, audio Video1 inputs are into pins 56
(InL1) and 57 (InR1) of IC001, Video2 inputs are into pins 49 (InL2) and
50 (InR2), and Video3 inputs are into pins 53 (InL3) and 54 (InR3). For
Europe models, audio Video1 inputs are into pins 53 (InL3) and 54
(InR3), Video2 inputs are into pins 56 (InL1) and 57 (InR1), and Video3
inputs are into pins 49 (InL2) and 50 (InR2).
The stereo decoder decodes the demodulated RF signal. Both video and
RF audio signals are processed in the DSP for main speaker and TV out
outputs. Monitor out is the audio output from video input signal that
bypasses the DSP through an analog crossbar.
Main speaker outputs are from pins 60 (LSL) and 61 (LSR) of IC001 and
into pins 5 (InL) and 12 (InR) of Audio Amp (IC200). Monitor out L and R
come from pins 36 (outL) and 37 (outR) of IC001. This function is
available to non-European models as shown in the diagram. TV out L and
R come from pins 62 (ScartHPL) and 63 (ScartHPR) of IC001. This
function is available only to Europe models.
36
6.2 2-speaker AV stereo model
The models include:
GA: AR21M81, AR14,
HW21 (except HW21N60, HW21M60),
BT21M81, BT21P52, BT21M/NX0 (Only X = 2, 5, 8)
Euro: 21CL5K
By referring to Figure 6.2, the IC001 of the 2-speaker AV stereo model
contains a DSP block but without a stereo decoder.
For GA models, audio Video1 inputs are into pins 56 (InL1) and 57 (InR1)
of IC001, Video2 inputs are into pins 49 (InL2) and 50 (InR2), and Video3
inputs are into pins 53 (InL3) and 54 (InR3). For Europe models, audio
Video1 inputs are into pins 53 (InL3) and 54 (InR3), Video2 inputs are into
pins 56 (InL1) and 57 (InR1), and Video3 inputs are into pins 49 (InL2)
and 50 (InR2).
Both video and RF audio signals are processed in the DSP for main
speaker output. However, without a stereo decoder, the processed RF
audio signal is only in mono. Monitor out is the audio output from video
input signal that bypasses the DSP through an analog crossbar.
Main speaker outputs are from pins 60 (LSL) and 61 (LSR) of IC001 and
into pins 5 (InL) and 12 (InR) of Audio Amp (IC200). Monitor out L and R
come from pins 36 (outL) and 37 (outR) of IC001. This function is
available to non-European models as shown in the diagram. TV out L and
R come from pins 62 (ScartHPL) and 63 (ScartHPR) of IC001. This
function is available only to Europe models.
 Tuner
AUDIO AMP
outL 7
29 SIF1 LSL 60 5 InL
30
DSP
SIF2 LSR 61 2 InR
Stereo IC200
Decoder ScartHPL 62
Video 2 (America, Audio in L
• 49 InL2 outR 12
GA & Japan)/ Video ScartHPR 63
3 (Euro only)
Audio in R
•
50 InR2 IC001
Audio in L
56 InL1 outL 36 • Monitor Out L America: 20/21FV only

InR3
InL3
•
Video 1 Audio in R GA: All
• 57 InR1 outR 37 • Monitor Out R
(America, Japan: 14/21DA75,14/21AIWA
GA & Japan) 53 54

Audio in R
Audio in L
Audio in L B6
Scart2 Input
Video 2 (Euro B3 Monitor Out L
only) Audio in R • • Scart2 Output
B2
Euro only.
B1 Monitor Out R
DVD
Audio in L A6 Video3
Scart1 Input (America,
Video 1 (Euro GA & Japan) A1 TV Out R Scart1 Output
only) Euro only.
Audio in R A2
A3 TV Out L

Figure 6.1 2-Speaker stereo audio circuit block diagram

37
 Tuner
AUDIO AMP
outL 7
29 SIF1 LSL 60 5 InL
30
DSP
SIF2 LSR 61 2 InR IC200
Audio in L ScartHPL 62
•
49 InL2 outR 12
Video 2 (GA) / Audio in R ScartHPR 63
•
Video 3 (Euro) 50 InR2
Audio in L IC001
•
56 InL1 outL 36

InR3
• Monitor Out L

InL3
Video 1 (GA Audio in R
• GA only
only) 57 InR1 outR 37 • Monitor Out R
53 54

Audio in R
Audio in L
Audio in L B6
Scart2 Input
Video 2 (Euro Monitor Out L
only) B3
Audio in R B2 • • Scart2 Output
Euro only.
Monitor Out R
DVD B1
Audio in L A6 Video3
Scart1 Input (All GA except
Video 1 (Euro BT21)
only)
A1 TV Out R Scart1 Output
Audio in R Euro only.
A2
TV Out L
A3

Figure 6.2 2-Speaker AV stereo audio circuit block diagram

38
6.3 1-Speaker Mono Model 6.4 2-Speaker Mono Model
The models include: The models include:
Euro: 14/ 21CT America: 21FM120
GA: BM14/ 21 Euro: 21CL1K
Japan: 14/ 21BM GA: BT21M/ NX0 (Only X = 1,4,7)
By referring to Figure 6.3, the IC001 of the 1-speaker mono model does By referring to Figure 6.4, the 2-speaker mono model functions in the
not contain a DSP block and therefore, without a stereo decoder. Input same way as the 1-speaker mono model.
and output are in mono.
The difference is the main speaker output from pin 62 (ScartHPL) is split
For GA and Japan models, audio Video1 input is into pin 56 (InL1) of into two identical signals that flow to the Audio Amp (IC200). Therefore,
IC001, and Video2 input is into pin 49 (InL2). For Europe models, audio IC200 has two input pins: 5 (InL) and 2 (InR), and two output pins: 7
Video1 input is into pin 53 (InL3), and Video2 input is into pin 49 (InL2). (outL) and 12 (outR).
Main speaker output is from pin 60 (ScartHPL) of IC001 and into pin 5
(InL) of Audio Amp (IC200). Monitor out L comes from pin 39 (Mono outL)
of IC001. This function is available to GA models only. TV out L also
comes from pins 39 (Mono outL). This function is available only to
Europe models.
Main speaker and Monitor out/TV out outputs go to the output pins of
IC001 through an analog crossbar.

39
 Tuner

AUDIO AMP

29 SIF1 ScartHPL 62 5 InL outL 7

30 SIF2
IC200

Video 2
Audio in L IC001
• 49 InL2

InL3
Audio in L Monitor out L GA only
Video 1 • 56 InL1 Mono outL 39 •

(GA & Japan)

53

Scart1 Output
A3 TV out L (Euro only)

Scart1 Input
Video 1 (Euro Audio in L A6
only)

Figure 6.3 1-Speaker mono audio circuit block diagram

40
 Tuner

AUDIO AMP

29 SIF1 ScartHPL 62 5 InL outL 7

30 SIF2 2 lnR
IC200
outR 12
Video 2 Audio in L IC001
• 49 InL2

Video 1 Audio in L GA only

InL3
56 InL1 Mono outL 39 • Monitor out L
(GA & Japan) •

53

Scart1 Output
A3 TV out L (Euro only)

Scart1 Input Audio in L

Video 1 (Euro A6
only)

Figure6.4 2-Speaker mono audio circuit block diagram

41
6.5 3D Stereo Model 6.6 3D AV Stereo Model
The models include: The models include:
GA: HW21M/N63 GA: HW21M/NX3 (for X=2,5,8), HW21M85
By referring to Figure 6.5, the IC001 of the 3D stereo model contains a By referring to Figure 6.6, The 3D AV stereo model functions in the same
DSP block and within it is a stereo decoder. way as the 3D stereo model. The difference is the IC001 of the 3D AV
stereo model contains a DSP block but without a stereo decoder.
Audio Video1 inputs are into pins 56 (InL1) and 57 (InR1) of IC001,
Video2 inputs are into pins 49 (InL2) and 50 (InR2), and Video3 inputs Both video and RF audio signals are processed in the DSP for main
are into pins 53 (InL3) and 54 (InR3). speaker output. However, without a stereo decoder, the processed RF
audio signal is only in mono.
The stereo decoder decodes the demodulated RF signal. Both video and
RF audio signals are processed in the DSP for main speaker outputs.
Monitor out is the audio output from video input signal that bypasses the
DSP through an analog crossbar.
Main speaker outputs are from pins 60 (LSL) and 61 (LSR) of IC001 and
into pins 5 (InL) and 12 (InR) of Audio Amp (IC200). The woofer signal is
obtained by mixing both L and R main speaker outputs in a mixer circuit.
This signal then flows into input pin 6 of IC200 and the amplified woofer
output goes out of pin 1 (outC). Monitor out L and R come from pins 36
(outL) and 37 (outR) of IC001.

42
 Tuner

AUDIO AMP
outL 7
29 SIF1 LSL 60 5 InL
DSP
30 SIF2 Stereo LSR 61 2 InR IC200
Audio in L Decoder
Video 2 • 49 InL2 outR 12
Audio in R Mixer
• 50 lnR2 6 InC
IC001
IC001 Circuit
Audio in L outC 1
• 56 36

InR3
InL1 outL

InL3
Video 1
Audio in R • 57 InR1 outR 37
53 54
3D
Woofer

Audio in R • Monitor out L

Audio in L

• Monitor out R

• •

DVD
Video3

Figure 6.5 3D stereo audio circuit block diagram

43
 Tuner

AUDIO AMP
outL 7
29 SIF1 LSL 60 5 InL
DSP
30 SIF2 LSR 61 2 InR IC200
Audio in L outR 12
Video 2 • 49 InL2
Audio in R Mixer 6 InC
• 50 InR2 IC001 Circuit
Audio in L outC 1

InR3
InL3
• 56 36
Video 1 InL1 outL
Audio in R • 57 37
InR1 outR
3D
53 54
Woofer
• Monitor out L

Audio in R
Audio in L

• Monitor out R

• •

DVD
Video3
Figure 6.6 3D AV stereo audio circuit block diagram

44
6.7 3D mixer circuit
Figure 6.7 shows the 3D mixer circuit. This additional circuit is applied to 3D stereo and 3D AV stereo models only. It mixes both L and R main speaker
outputs from IC001 to obtain a woofer signal. This signal then flows into input pin 6 of the audio amp (IC200) and the amplified woofer output goes out of
pin 1 (outC) and into a woofer speaker. The woofer signal gain can be adjusted by changing the resistance values of R226, R227 and R228. C228 and
R229 are the first-order low-pass filter while C229 and R230 are the second-order low-pass filter.

Figure 6.7 3D mixer circuit

45
6.8 Pin Assignment IC001 for Audio DSP
Table 6.1 below shows the pin assignment of IC001for audio DSP. For all stereo and AV stereo models, the above voltage level must be present for the
audio DSP to be functioning.

SYMBOL Pin No. DESCRIPTION Voltage Level (V)

VDDC4 3 Digital supply to SDACs (1.8V) 1.8
VDDA3(3.3V) 4 Supply (3.3V) 3.3
VREF_POS_LSL 5 Positive reference voltage SDAC (3.3V) 3.3
VREF_NEG_LSL+HPL 6 Negative reference voltage SDAC (0V) 0
VREF_POS_LSR+HPR 7 Positive reference voltage SDAC (3.3V) 3.3
VREF_NEG_HPL+HPR 8 Negative reference voltage SDAC (0V) 0.0
VREF_POS_HPR 9 Positive reference voltage SDAC (3.3V) 3.3
VCC8V 45 8 Volt supply for audio switches 8
VREFAD_NEG 89 Negative reference voltage (0V) 0
VREFAD_POS 90 Positive reference voltage (3.3V) 3.3
VREFAD 91 Reference voltage for audio ADCs (3.3/2V) 2
GNDA 92 Ground 0
VDDA(1.8V) 93 Analogue supply for audio ADCs (1.8V) 1.8
VDDA2(3.3) 94 supply voltage SDAC (3.3V) 3.3
Table 6.1 Pin assignment of IC001 for audio DSP

6.9 Muting and Standby Circuit

IC001 produces muting signal at pins 104 (Momute-Audio) and 106 (Audio Mute). The signal from pin 104 is specifically used to mute any Monitor Out or
TV Out output at the jack terminals. The signal from pin 106 is used specifically for muting the speakers. It is injected into pin 8 (Mute) of the Audio Amp
(IC200), where a high logic will cause the amplifier to be muted.
The output from an AC Off Detector circuit is connected to pin 8 of IC200 and to a group of transistor switches before the Monitor Out and TV Out jack
terminals. During an abrupt power supply cutoff to the TV, the circuit will produce a brief voltage pulse that will mute the speakers and the Monitor Out and
TV Out terminals. At the same time, a transistor switch (Q206) will detect a voltage drop at the 1.8V supply line for the audio ADCs, thus producing a high
logic that will cause the speakers, Monitor Out and TV Out to be muted.

46
IC001 also produces an audio standby signal at pin 105 (Audio Stdby). This signal puts the amplifier in standby mode when a low logic is applied at pin 11
(Stby) of IC200. When the TV is not in standby mode, the voltage level at pin 11 is half of that of Audio Vcc, which can be measured at pin 10 of IC200.
Figure 6.8 shows he block diagram of muting and standby circuit.
IC001 AUDIO AMP

AUDIO MUTE 106 8 MUTE

Transistor IC200
AUDIO STDBY 105 11 STBY
Switches

104 Inverter
MOMUTE-AUDIO
Logic

AC Off
Detector Transistor switches
Q901, Q902
Q908, Q909 (Euro only)

1.8V analogue Transistor

supply for Switch
Audio ADCs (Q206)
Monitor out/
TV out

Figure 6.8 Muting and standby circuit block diagram.

47
Table 6.2 below shows the expected voltage levels at various IC pins in different operating conditions.

IC Pin Voltage Level (V)

No Name TV on Standby Mute Channel change
mode
IC001 104 MOMUTE AUDIO 2.45 0 2.45 2.45 → 0 → 2.45
105 AUDIO STDBY 2.75 0 2.75 2.75
106 AUDIO MUTE 0 2.9 3.55 0 → 3.55 → 0
Audio Amp 8 MUTE 0.86 2.43 3.67 0 → 3.67 → 0
(IC200) 11 STBY ½ Vcc 0 ½ Vcc ½ Vcc
Table 6.2 Expected voltage levels at various IC pins in different operating conditions.

48
 Sony Corporation English
Sony Technology Malaysia Sdn. Bhd. 2003GT70000-01
9-872-358-01 Visual Products (M) © 2003.7
BX1S CHASSIS OPERATION MANUAL (9-872-358-01) CORRECTIONS Page 1/7

Page Description Original After Correction

No.
22 Table 3.1,
Delete rows in bold. Device Item Adjustment Function Device Item Adjustment Function
Name No Item Name No Item
GEO 01 HPAR Horizontal Parallelogram GEO 02 HBOW Horizontal BOW
02 HBOW Horizontal BOW 07 EWPW EW Parabola
06 HSIZ Horizontal Size 08 UCOP Upper Corner Pin
07 EWPW EW Parabola 09 LCOP Lower Corner Pin
08 UCOP Upper Corner Pin
09 LCOP Lower Corner Pin
10 EWTZ EW Trapezium

23 First column, Section 3.3, waveform is modified into a slightly sine-wave shape waveform is modified into a slightly S-wave shape
Line 4. Modify word in bold. (the top and bottom (the top and bottom
23 First column, Section 3.3, Also S-correction can be adjusted by the Service List
Line 6 and Line 7. Items in Table 3.2. -
Delete the sentence shown.
23 Table 3.2
Deletion of whole table. Device Item Adjustment Item Function -
Name No
Geo 13 SCOR S-Correction

23 First column, Section 3.4,
Line 1. Add in word in bold.
23 First column, Section 3.4,
Line 5. Delete JW1839.
23 First column, Section 3.4,
Line 7. Delete JW1839.
23 Second column, Section 3.5,
Line 2. Add in words in bold.
23 Second column, Section 3.5,
Line 3. Add in words in bold.
This circuit is used center the raster screen by This circuit is used to center the raster screen by
comparing the voltage comparing the voltage
JW1839 to D819. to D819.
JW1839 to L802. to L802.
(VD-) of IC001 and input to pin 1 (DRV-IN) of V Out (VD-) and pin 23 (VD+) of IC001 and input to pin 1
IC804 (STV9302A) (DRV-IN) of V Out IC804 (STV9302A)
and the output comes out from pin 5 (OUTPUT). IC804 and the output comes out from pin 5 (OUTPUT) and
contains a boost- pin 7 (REF_VOLT). IC804 contains a boost-

CORRECTED on 18 JULY 2003

BX1S CHASSIS OPERATION MANUAL (9-872-358-01) CORRECTIONS Page 2/7

Page Description Original After Correction

No.
3 Figure 1.2.
Delete the portion
highlighted as they are
not been used now.

Different area will have

some differences in this
block diagram. For the
regional terminal
connection, please refer
to the newly added
Figure 7 at the last
page.

CORRECTED on 28 JULY 2003

BX1S CHASSIS OPERATION MANUAL (9-872-358-01) CORRECTIONS Page 3/7

Page Description Original After Correction

No.
3 Figure 1.2.
Delete the part
highlighted as it
is not been
used now.

3 Figure 1.2
Delete the part
highlighted as it
is not been
used now.

CORRECTED on 28 JULY 2003

BX1S CHASSIS OPERATION MANUAL (9-872-358-01) CORRECTIONS Page 4/7

Page Description Original After Correction

No.
14 Figure 2.1.
Change the circled
portion as shown.

18 Figure 2.3.
Delete ‘Z1’.
Change ‘D2’ to
‘D618’.

CORRECTED on 28 JULY 2003

BX1S CHASSIS OPERATION MANUAL (9-872-358-01) CORRECTIONS Page 5/7

Page Description Original After Correction

No.
20 Figure 2.6.
Add in the parts
indication table as
shown.

D4 D617

R2 R646

R7 R645

C3 C623

C16 C621

C17 C619

20 Section 2.6.1.
Paragraph 3, line 14. current of the IC becomes non-operation circuit current current of the IC becomes non-operation circuit current
Change the ‘V’ to ‘A’. (100µV (100µA

CORRECTED on 28 JULY 2003

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Page Description Original After Correction

No.
27 Section 4.2. Except GA tuner, all America, Europe and Japan tuner Except GA tuner, all America, Europe and Japan tuner have
Add in the have built in AGC mute circuit control by software. built in AGC mute circuit control by software. Figure 4.2 shows
sentence the block diagram for America, Europe and Japan models.
Figure 4.2 shows the block diagram for America,
highlighted in
Europe and Japan models.
the first
paragraph.
For GA tuner, AGC mute is control by Micro (pin 126
Delete the
of IC001) via external hardware circuit. Figure 4.2
second
shows the block diagram of the mute function for
paragraph as
GA models.
shown in bold.
27 Figure 4.2.
Change the
portion circled
as shown.
IC001
Tuner

This block
diagram is for IF
VIF
America, processor

Europe and
Japan models
and is not for
GA models. AGC mute
circuit
Micro

Figure 4.2 Block Diagram of AGC mute function for GA Figure 4.2 Block Diagram of AGC mute function

CORRECTED on 28 JULY 2003

BX1S CHASSIS OPERATION MANUAL (9-872-358-01) CORRECTIONS Page 7/7

Page Description Original After Correction

No.
47 Figure 6.8.
Delete the part circled as
the Transistor Switch
(Q206) will receive the
input from pin 105 of
IC001

CORRECTED on 28 JULY 2003

Figure 7 Regional Terminal Connection