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S E M I C O N D U C T O R CD4047BMS

CMOS Low-Power
December 1992
Monostable/Astable Multivibrator

Features Description
• High Voltage Type (20V Rating) CD4047BMS consists of a gatable astable multivibrator with logic tech-
niques incorporated to permit positive or negative edge triggered
• Low Power Consumption: Special CMOS Oscillator
monostable multivibrator action with retriggering and external counting
Configuration
options.
• Monostable (One-Shot) or Astable (Free-Running)
Inputs include +TRIGGER, -TRIGGER, ASTABLE, ASTABLE,
Operation
RETRIGGER, and EXTERNAL RESET. Buffered outputs are Q,Q, and
• True and Complemented Buffered Outputs OSCILLATOR. In all modes of operation, an external capacitor must be
• Only One External R and C Required connected between C-Timing and RC-Common terminals, and an
external resistor must be connected between the R-Timing and RC-
• Buffered Inputs Common terminals.
• 100% Tested for Quiescent Current at 20V Astable operation is enabled by a high level on the ASTABLE input or a
• Standardized, Symmetrical Output Characteristics low level on the ASTABLE input, or both. The period of the square wave
at the Q and Q Outputs in this mode of operation is a function of the
• 5V, 10V and 15V Parametric Ratings external components employed. “True” input pulses on the ASTABLE
• Meets All Requirements of JEDEC Tentative Standard input or “Complement” pulses on the ASTABLE input allow the circuit to
No. 13B, “Standard Specifications for Description of be used as a gatable multivibrator. The OSCILLATOR output period will
‘B’ Series CMOS Devices” be half of the Q terminal output in the astable mode. However, a 50%
duty cycle is not guaranteed at this output.
Monostable Multivibrator Features The CD4047BMS triggers in the monostable mode when a positive
• Positive or Negative Edge Trigger going edge occurs on the +TRIGGER input while the -TRIGGER is held
low. Input pulses may be of any duration relative to the output pulse.
• Output Pulse Width Independent of Trigger Pulse
Duration If retrigger capability is desired, the RETRIGGER input is pulsed. The
retriggerable mode of operation is limited to positive going edge. The
• Retriggerable Option for Pulse Width Expansion
CD4047BMS will retrigger as long as the RETRIGGER input is high,
• Internal Power-On Reset Circuit with or without transitions (See Figure 31)
• Long Pulse Widths Possible Using Small RC Compo- An external countdown option can be implemented by coupling “Q” to
nents by Means of External Counter Provision an external “N” counter and resetting the counter with trigger pulse. The
• Fast Recovery Time Essentially Independent of Pulse counter output pulse is fed back to the ASTABLE input and has a dura-
Width tion equal to N times the period of the multivibrator.

• Pulse-Width Accuracy Maintained at Duty Cycles A high level on the EXTERNAL RESET input assures no output pulse
Approaching 100% during an “ON” power condition. This input can also be activated to ter-
minate the output pulse at any time. For monostable operation, when-
Astable Multivibrator Features ever VDD is applied, an internal power on reset circuit will clock the Q
output low within one output period (tM).
• Free-Running or Gatable Operating Modes
The CD4047BMS is supplied in these 14-lead outline packages:
• 50% Duty Cycle
Braze Seal DIP H4Q
• Oscillator Output Available Frit Seal DIP H1B
• Good Astable Frequency Stability: Frequency Deviation: Ceramic Flatpack H3W
- = ±2% + 0.03%/oC at 100kHz
- = ±0.5% + 0.015%/oC at 10kHz (Circuits “Trimmed” Pinout
to Frequency VDD = 10V ± 10% CD4047BMS
TOP VIEW
Applications
C 1 14 VDD
Digital equipment where low power dissipation and/or high noise
R 2 13 OSC OUT
immunity are primary design requirements
R-C COMMON 3 12 RETRIGGER
• Envelope Detection • Frequency Discriminators
ASTABLE 4 11 Q
• Frequency Multiplication • Timing Circuits
ASTABLE 5 10 Q
• Frequency Division • Time Delay Applications
-TRIGGER 6 9 EXT. RESET

VSS 7 8 +TRIGGER

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. File Number 3313
Copyright © Harris Corporation 1992
7-897
Specifications CD4047BMS
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V Thermal Resistance . . . . . . . . . . . . . . . . θja θjc
(Voltage Referenced to VSS Terminals) Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Maximum Package Power Dissipation (PD) at +125 C o

Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
Package Types D, F, K, H For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Linearity at 12mW/oC to 200mW
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for For TA = Full Package Temperature Range (All Package Types)
10s Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

LIMITS
GROUP A
PARAMETER SYMBOL CONDITIONS (NOTE 1) SUBGROUPS TEMPERATURE MIN MAX UNITS
Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25 Co
- 2 µA
2 +125oC - 200 µA
VDD = 18V, VIN = VDD or GND 3 -55oC - 2 µA
o
Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25 C -100 - nA
2 +125oC -1000 - nA
VDD = 18V 3 -55oC -100 - nA
Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA
2 +125oC - 1000 nA
VDD = 18V 3 -55oC - 100 nA
Input Leakage Curent IIL VDD = 24V, VIN = 11V or GND 1 +25oC -300 - nA
(Pin 3)
2 +125oC -10 - µA
Input Leakage Current IIH VDD = 26V, VIN = 13V or GND 1 +25oC - 300 nA
(Pin 3)
2 +125oC - 10 µA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA
Q, Q, OSC Out
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Q, Q, OSC Out
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Q, Q, OSC Out
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Q, Q, OSC Out
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Q, Q, OSC Out
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Q, Q, OSC Out
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
Q, Q, OSC Out
Output Current (Sink) IOL5RC VDD = 5V, VOUT = 0.4V 1 +25oC 0.78 - mA
Output Current (Sink) IOL10RC VDD = 10V, VOUT = 0.5V 1 +25oC 2.0 - mA
Output Current (Sink) IOL15RC VDD = 15V, VOUT = 1.5V 1 +25oC 5.2 - mA
Output Current (Source) IOH5RC VDD = 5V, VOUT = 4.6V 1 +25oC - -0.78 mA
Output Current (Source) IOH10RC VDD = 10V, VOUT = 9.5V 1 +25oC - -2 mA
Output Current (Source) IOH15RC VDD = 15V, VOUT = 13.5V 1 +25oC - -5.2 mA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V

7-898
Specifications CD4047BMS

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)


LIMITS
GROUP A
PARAMETER SYMBOL CONDITIONS (NOTE 1) SUBGROUPS TEMPERATURE MIN MAX UNITS
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH > VOL < V
VDD/2 VDD/2
VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC
Input Voltage Low VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V
(Note 2)
Input Voltage High VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V
(Note 2)
Input Voltage Low VIL VDD = 15V, VOH > 13.5V, 1, 2, 3 +25oC, +125oC, -55oC - 4 V
(Note 2) VOL < 1.5V
Input Voltage High VIH VDD = 15V, VOH > 13.5V, 1, 2, 3 +25oC, +125oC, -55oC 11 - V
(Note 2) VOL < 1.5V
NOTES:
1. All voltages referenced to device GND, 100% testing being implemented
2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max..

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

LIMITS
(NOTES 1, 2) GROUP A
PARAMETER SYMBOL CONDITIONS SUBGROUPS TEMPERATURE MIN MAX UNITS
Propagation Delay TPLH1 VDD = 5V, VIN = VDD or GND 9 +25oC - 400 ns
Astable, Astable to OSC
10, 11 +125oC, -55oC - 540 ns
Propagation Delay TPHL3 VDD = 5V, VIN = VDD or GND 9 +25oC - 1000 ns
Trigger to Q, Q TPLH3
10, 11 +125oC, -55oC - 1350 ns
Propagation Delay TPLH2 VDD = 5V, VIN = VDD or GND 9 +25oC - 700 ns
(Note 2) TPLH2
10, 11 +125oC, -55oC - 945 ns
Astable or Astable to Q, Q
Propagation Delay TPHL4 VDD = 5V, VIN = VDD or GND 9 +25oC - 600 ns
(Note 2) TPLH4
10, 11 +125oC, -55oC - 810 ns
Retrigger to Q, Q
Propagation Delay TPLH5 VDD = 5V, VIN = VDD or GND 9 +25oC - 500 ns
(Note 2) TPLH5
10, 11 +125oC, -55oC - 675 ns
Reset to Q, Q
Transition Time TTHL VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns
TTLH
10, 11 +125oC, -55oC - 270 ns
NOTES:
1. VDD = 5V, CL = 50pF, RL = 200K; input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.

7-899
Specifications CD4047BMS

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS


LIMITS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS
Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC - 1 µA
+125 C o
- 30 µA
VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC - 2 µA
+125 C o
- 60 µA
VDD = 15V, VIN = VDD or GND 1, 2 -55 oC, +25oC - 2 µA
+125oC - 120 µA
Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC, - 50 mV
-55oC
Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC, - 50 mV
-55oC
Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC, 4.95 - V
-55oC
Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC, 9.95 - V
-55oC
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA
-55oC 0.64 - mA
o
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125 C 0.9 - mA
-55oC 1.6 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA
oC
-55 4.2 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA
-55oC - -0.64 mA
oC
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125 - -1.15 mA
-55oC - -2.0 mA
oC
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125 - -0.9 mA
-55oC - -1.6 mA
Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA
-55oC - -4.2 mA
Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC, - 3 V
-55oC
Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC, +7 - V
-55oC
Propagation Delay TPLH1 VDD = 10V 1, 2, 3 +25oC - 200 ns
Astable, Astable to OSC
VDD = 15V 1, 2, 3 +25oC - 160 ns
Propagation Delay TPLH2 VDD = 10V 1, 2, 3 +25oC - 350 ns
Astable or Astable to Q, Q TPHL2
VDD = 15V 1, 2, 3 +25oC - 250 ns
Propagation Delay TPHL3 VDD = 10V 1, 2, 3 +25oC - 450 ns
Trigger to Q, Q TPLH3
VDD = 15V 1, 2, 3 +25oC - 300 ns
Propagation Delay TPHL4 VDD = 10V 1, 2, 3 +25oC - 300 ns
Retrigger to Q, Q TPLH4
VDD = 15V 1, 2, 3 +25oC - 200 ns
Propagation Delay TPLH5 VDD = 10V 1, 2, 3 +25oC - 200 ns
Reset to Q, Q TPLH5
VDD = 15V 1, 2, 3 +25oC - 140 ns
Transition Time TTHL VDD = 10V 1, 2, 3 +25oC - 100 ns
TTLH
VDD = 15V 1, 2, 3 +25oC - 80 ns

7-900
Specifications CD4047BMS

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)


LIMITS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS
Q or Q Deviation from QD VDD = 5V 1, 2, 3 +25oC - ±1 %
50% Duty Factor
VDD = 10V 1, 2, 3 +25 C o
- ±1 %
VDD = 15V 1, 2, 3 +25oC - ±0.5 %
Minimum Pulse Width TW VDD = 5V 1, 2, 3 +25oC - 400 ns
+ Trigger oC
VDD = 10V 1, 2, 3 +25 - 160 ns
- Trigger
VDD = 15V 1, 2, 3 +25oC - 100 ns
o
Minimum Pulse Width TW VDD = 5V 1, 2, 3 +25 C - 200 ns
Reset o
VDD = 10V 1, 2, 3 +25 C - 100 ns
VDD = 15V 1, 2, 3 +25oC - 60 ns
oC
Minimum Retrigger Pulse TW VDD = 5V 1, 2, 3 +25 - 600 ns
Width
VDD = 10V 1, 2, 3 +25oC - 230 ns
o
VDD = 15V 1, 2, 3 +25 C - 150 ns
Input Capacitance CIN Any Input 1, 2 +25o C - 7.7 pF
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS

LIMITS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS
Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4 +25oC - 7.5 µA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V
N Threshold Voltage ∆VTN VDD = 10V, ISS = -10µA 1, 4 +25oC - ±1 V
Delta
P Threshold Voltage VTP VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V
P Threshold Voltage ∆VTP VSS = 0V, IDD = 10µA 1, 4 +25oC - ±1 V
Delta
Functional F VDD = 18V, VIN = VDD or GND 1 +25oC VOH > VOL < V
VDD/2 VDD/2
VDD = 3V, VIN = VDD or GND
Propagation Delay Time TPHL VDD = 5V 1, 2, 3, 4 +25oC - 1.35 x ns
TPLH +25oC
Limit
NOTES: 1. All voltages referenced to device GND. 3. See Table 2 for +25oC limit.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. Read and Record

TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC

PARAMETER SYMBOL DELTA LIMIT


Supply Current - MSI-1 IDD ± 0.2µA
Output Current (Sink) IOL5 ± 20% x Pre-Test Reading
Output Current (Source) IOH5A ± 20% x Pre-Test Reading

7-901
Specifications CD4047BMS

TABLE 6. APPLICABLE SUBGROUPS

MIL-STD-883
CONFORMANCE GROUP METHOD GROUP A SUBGROUPS READ AND RECORD
Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Final Test 100% 5004 2, 3, 8A, 8B, 10, 11
Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11
Subgroup B-6 Sample 5005 1, 7, 9
Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.

TABLE 7. TOTAL DOSE IRRADIATION

TEST READ AND RECORD


MIL-STD-883
CONFORMANCE GROUPS METHOD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD
Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4

TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS


OSCILLATOR
FUNCTION OPEN GROUND VDD 9V ± -0.5V 50kHz 25kHz
Static Burn-In 1 1, 2, 10, 11, 13 3-9, 12 14
Note 1
Static Burn-In 2 1, 2, 10, 11, 13 7 3-6, 8, 9, 12, 14
Note 1
Dynamic Burn- - 7, 9, 12 4, 5, 14 1, 2, 10, 11, 13 6, 8 3
In Note 1
Irradiation 1, 2, 10, 11, 13 7 3-6, 8, 9, 12, 14
Note 2
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V

7-902
CD4047BMS

TABLE 9. FUNCTIONAL TERMINAL CONNECTIONS


In all cases External resistor between terminals 2 and 3 (Note 1)
External capacitor between terminals 1 and 3 (Note 1)
TERMINAL CONNECTIONS OUTPUT PULSE OUTPUT PERIOD OR PULSE
FUNCTION TO VDD TO VSS INPUT TO FROM WIDTH
ASTABLE MULTIVIBRATOR
Free Running 4, 5, 6, 14 7, 8, 9, 12 - 10, 11, 13 TA (10, 11) = 4.40 RC
True Gating 4, 6, 14 7, 8, 9, 12 5 10, 11, 13 TA (13) = 2.20 RC (Note 2)
Complement Gating 6, 14 5, 7, 8, 9, 12 4 10, 11, 13
MONOSTABLE MULTIVIBRATOR
Positive Edge Trigger 4, 14 5, 6, 7, 9, 12 8 10, 11 tM (10, 11) = 2.48 RC
Negative Edge Trigger 4, 8, 14 5, 7, 9, 12 6 10, 11
Retriggerable 4, 14 5, 6, 7, 9 8, 12 10, 11
External Countdown (Note 3) 14 5, 6, 7, 8, 9, 12 - 10, 11
NOTES:
1. See text.
2. First positive 1/2 cycle pulse width = 2.48 RC. See note follow Monostable Mode Design Information.
3. Input Pulse to Reset of External Counting Chip External Counting Chip Output to Terminal 4.

Logic Diagrams

C R
C-TIMING 3 1 2 R-TIMING

RC OSCILLATOR OUT
13
COMMON
ASTABLE Q
5 10
ASTABLE LOW POWER FREQUENCY
GATE ASTABLE
ASTABLE DIVIDER (÷2) Q
4 CONTROL MULTIVIBRATOR 11

-TRIGGER
6
MONOSTABLE
+TRIGGER CONTROL
8
RETRIGGER RETRIGGER
12
CONTROL
EXTERNAL
RESET
9

FIGURE 1. CD4047BMS LOGIC BLOCK DIAGRAM

7-903
CD4047BMS

Logic Diagrams (Continued)


* **
* RETRIGGER 12 VDD 3 RC
CTC 1 2 RTC
ASTABLE 5 COMMON
*
ASTABLE 4
*
+TRIGGER 8
*
-TRIGGER 6 VDD OSC
FF1 OUT
D Q
13
CL
CL
R1 R2

VDD 14 S S
D Q D Q D Q 10 Q
VSS 7 FF2 FF3 FF4
VSS CL CL CL
CL Q CL CL 11 Q
R R1 R2 R

EXTERNAL *
9 VDD
RESET

VDD
** SPECIAL
RC COMMON
* INPUTS PROTECTED CAUTION: Terminal 3 is more sensitive
PROTECTION
BY CMOS to static electrical discharge. Extra
NETWORK
PROTECTION handling precautions are recommended.
NETWORK
VSS VSS
FIGURE 2. CD4047BMS LOGIC DIAGRAM

CL CL R2 R1

p p Q
D
n n
D Q
R1 R2 CL
CL
CL CL
CL CL p
n
R1 R2 p
FF1, FF3 n
CL

CL

(a)

Q
CL
S
CL S
p
Q
n
p
S D
D Q n
CL CL CL
CL
Q CL
CL R p p
n n
FF2, FF4 R R

CL CL
(b)

FIGURE 3. DETAIL LOGIC DIAGRAM FOR FLIP-FLOPS FF1 AND FF3 (a) AND FOR FLIP-FLOPS FF2 AND FF4 (b)

7-904
CD4047BMS

Typical Performance Characteristics

AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC

OUTPUT LOW (SINK) CURRENT (IOL) (mA)


OUTPUT LOW (SINK) CURRENT (IOL) (mA)

30 15.0
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
25 12.5

20 10.0

10V
15 7.5
10V

10 5.0

5 2.5
5V 5V

0 5 10 15 0 5 10 15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

FIGURE 4. TYPICAL OUTPUT LOW (SINK) CURRENT FIGURE 5. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15 -10 -5 0 -15 -10 -5 0
0 0
AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC

OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)


OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)

GATE-TO-SOURCE VOLTAGE (VGS) = -5V -2.5 GATE-TO-SOURCE VOLTAGE (VGS) = -5V

-5 -2.5

-7.5

-10V -10V
-10 -5

-12.5

-15V -15V
-15 -7.5

FIGURE 6. TYP. OUTPUT HIGH (SOURCE) CURRENT FIGURE 7. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS CHARACTERISTICS

400
PROPAGATION DELAY TIME (tPHL, tPLH) (ns)

PROPAGATION DELAY TIME (tPHL, tPLH) (ns)

AMBIENT TEMPERATURE (TA) = +25oC

SUPPLY VOLTAGE (VDD) = 5V


300 600
SUPPLY VOLTAGE (VDD) = 5V

200 400
10V

10V
15V
100 200
15V
AMBIENT TEMPERATURE (TA ) = +25oC

0 20 40 60 80 100 0 20 40 60 80 100
LOAD CAPACITANCE (CL) (pF) LOAD CAPACITANCE (CL) (pF)

FIGURE 8. TYP. PROPAGATION DELAY TIME AS A FUNCTION OF FIGURE 9. TYP. PROPAGATION DELAY TIME AS A FUNCTION
LOAD CAPACITANCE (ASTABLE, ASTABLE TO Q, Q) OF LOAD CAPACITANCE (+ OR - TRIGGER TO Q, Q)

7-905
CD4047BMS

Typical Performance Characteristics (Continued)

4
AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC CX = 1µF
3
TRANSITION TIME (fTHL, fTLH) (ns)

2 1MΩ AND 100kΩ

PERIOD ACCURACY (%)


200 10kΩ
1
10MΩ
SUPPLY VOLTAGE (VDD) = 5V
150 0
10MΩ
-1
100
10V -2 RX = 1MΩ AND
15V 100kΩ
50 -3

10kΩ
-4
0
0 20 40 60 80 100 0 2 4 6 8 10 12 14 16 18 20
LOAD CAPACITANCE (CL) (pF) SUPPLY VOLTAGE (VDD) (V)

FIGURE 10. TYP. TRANSITION TIME AS A FUNCTION OF LOAD FIGURE 11. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD
CAPACITANCE ACCURACY vs SUPPLY VOLTAGE
4
4 AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC
CX = 1000pF
CX = 0.01µF 3
3
2
PERIOD ACCURACY (%)

10MΩ
PERIOD ACCURACY (%)

2
1 10kΩ
1 10kΩ
1MΩ RX = 1MΩ AND 1MΩ AND
0 10MΩ
0 100kΩ 100kΩ 10kΩ
10kΩ
RX = 1MΩ -1
-1 100kΩ
10MΩ
-2
-2
10kΩ -3
-3 10kΩ

-4 -4
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
SUPPLY VOLTAGE (VDD) (V) SUPPLY VOLTAGE (VDD) (V)
FIGURE 12. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD FIGURE 13. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD
ACCURACY vs SUPPLY VOLTAGE ACCURACY vs SUPPLY VOLTAGE

1 2 CX = 0.1µF
CX = 1µF
RX = 1MΩ RX = 1MΩ
10V, 15V
SUPPLY VOLTAGE (VDD) = 5V SUPPLY VOLTAGE (VDD) = 5V
1
PERIOD ACCURACY (%)

0 5V
PERIOD ACCURACY (%)

10V

0
-1 15V
5V

10V, 15V 15V


-1
-2

10V

-3 -2
-55 -15 25 65 105 145 -55 -15 25 65 105 145
AMBIENT TEMPERATURE (TA) (oC) AMBIENT TEMPERATURE (TA) (oC)

FIGURE 14. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD FIGURE 15. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD
ACCURACY vs AMBIENT TEMPERATURE (ULTRA ACCURACY vs AMBIENT TEMPERATURE (LOW
LOW FREQ.) FREQ.)

7-906
CD4047BMS

Typical Performance Characteristics (Continued)

2 12
CX = 0.01µF CX = 1000pF SUPPLY VOLTAGE (VDD) = 5V
RX = 100kΩ 10 RX = 10kΩ
SUPPLY VOLTAGE (VDD) = 5V, 10V

1 15V 8

PERIOD ACCURACY (%)


PERIOD ACCURACY (%)

0 5V AND 10V 4

15V 2
10V, 15V
10V AND 15V
-1 0

-2 5V

-2 -4
-55 -15 25 65 105 145 -55 -35 -15 -5 25 45 65 85 105 125 145
AMBIENT TEMPERATURE (TA) (oC) AMBIENT TEMPERATURE (TA) (oC)

FIGURE 16. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD FIGURE 17. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD
ACCURACY vs AMBIENT TEMPERATURE (MEDIUM ACCURACY vs AMBIENT TEMPERATURE (HIGH
FREQ.) FREQ.)
8
RX = 10kΩ AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE (VDD) = 5V OUTPUT PULSE-WIDTH VARIATION (%) 6 CX = 1µF

4
PERIOD ACCURACY (%)

20
1kΩ
100pF 2
100kΩ
10kΩ
10 0 10kΩ, 1MΩ AND 10MΩ

0.001µF RX = 100kΩ, 1MΩ, 10MΩ 1kΩ


-2

0.01µF, 0.1µF, 1µF 0.01µF, 0.1µF, 1µF


0 -4
0.001µF
-6

-10 CX = 100pF
-8
-55 -15 25 65 105 145 0 5 10 15 20 25
AMBIENT TEMPERATURE (TA) (oC) SUPPLY VOLTAGE (VDD) (V)
FIGURE 18. TYPICAL ASTABLE OSCILLATOR OR Q, Q PERIOD FIGURE 19. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs
ACCURACY vs AMBIENT TEMPERATURE SUPPLY VOLTAGE

8
8
AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC
OUTPUT PULSE-WIDTH VARIATION (%)

CX = 1000pF
OUTPUT PULSE-WIDTH VARIATION (%)

6 CX = 0.1µF 6

4 4

2 2
RX = 1MΩ AND 10Ω
10kΩ, 100kΩ, 1MΩ AND 10MΩ 0 100kΩ
0 10kΩ
10MΩ
-2 -2
RX = 10kΩ, 100kΩ, 1MΩ

-4 -4

-6 -6

-8 -8
0 5 10 15 20 25 0 5 10 15 20 25
SUPPLY VOLTAGE (VDD) (V) SUPPLY VOLTAGE (VDD) (V)

FIGURE 20. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs FIGURE 21. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs
SUPPLY VOLTAGE SUPPLY VOLTAGE

7-907
CD4047BMS

Typical Performance Characteristics (Continued)

8 RX = 100kΩ
RX = 100kΩ SUPPLY VOLTAGE (VDD) = 10V OR 15V

OUTPUT PULSE-WIDTH VARIATION (%)


SUPPLY VOLTAGE (VDD) = 5V
OUTPUT PULSE-WIDTH VARIATION (%)

10
6
8 CX = 100pF
4 6
4
2 0.001µF
2 0.01µF
0 0.1µF 0.1µF
0 0.1µF, 0.01µF
0.01µF -2
-2
0.01µF -4
-4 -6 0.1µF AND 0.001µF 0.001µF

-8
-6
-10 100pF
0.001µF
-8 -12
-55 -35 -15 5 25 45 65 85 105 125 145
-50 -35 -15 5 25 45 65 85 105 125 145
AMBIENT TEMPERATURE (TA) (oC)
AMBIENT TEMPERATURE (TA) (oC)
FIGURE 22. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs FIGURE 23. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs
AMBIENT TEMPERATURE AMBIENT TEMPERATURE
4 4
CX = 1000pF CX = 1000pF
10MΩ
SUPPLY VOLTAGE (VDD) = 5V OR 10V SUPPLY VOLTAGE (VDD) = 15V
OUTPUT PULSE-WIDTH VARIATION (%)

2 10kΩ OUTPUT PULSE-WIDTH VARIATION (%) 2

10kΩ
0 0
100kΩ 10kΩ 10MΩ
100kΩ
-2 -2 RX = 1MΩ
RX = 1MΩ
10kΩ 100kΩ
-4 -4

-6 100kΩ -6

-8 -8
1MΩ
-10 1MΩ
-10
10MΩ

-12 10MΩ
-12
-55 -35 -15 5 25 45 65 85 105 125 145 -50 -35 -15 5 25 45 65 85 105 125 145
AMBIENT TEMPERATURE (TA) (oC) AMBIENT TEMPERATURE (TA) (oC)
FIGURE 24. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs FIGURE 25. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs
AMBIENT TEMPERATURE AMBIENT TEMPERATURE

105 106
ASTABLE MODE ASTABLE MODE
SUPPLY VOLTAGE (VDD) = 5V SUPPLY VOLTAGE (VDD) = 10V
105
POWER DISSIPATION (PD) (µW)

POWER DISSIPATION (PD) (µW)

104
C =100pF C =100pF
3 C =1000pF 104
10 C = 0.01µF C =1000pF
C = 0.1µF
C = 0.01µF
C =10pF C = 0.1µF C =10pF
102 103

101 102

100 101
10 -1 0
10 101
102
10 3
10 4
10 5
10 6 10-1 100 101 102 103 104 105 106

Q OR Q FREQUENCY (F) (Hz) Q OR Q FREQUENCY (F) (Hz)

FIGURE 26. TYPICAL POWER DISSIPATION vs OUTPUT FIGURE 27. TYPICAL POWER DISSIPATION vs OUTPUT
FREQUENCY (VDD = 5V) FREQUENCY (VDD = 10V)

7-908
CD4047BMS

Typical Performance Characteristics (Continued)

ASTABLE MODE
SUPPLY VOLTAGE (VDD) = 15V
105

POWER DISSIPATION (PD) (µW)


C =100pF
C =1000pF
C = 0.01µF
104 C = 0.1µF C =10pF

103

102

10-1 100 101 102 103 104 105 106


Q OR Q FREQUENCY (F) (Hz)

FIGURE 28. TYPICAL POWER DISSIPATION vs OUTPUT FREQUENCY (VDD = 15V)

Astable Mode Design Information Monostable Mode Design Information


Unit-to-Unit Transfer Voltage Variations The following analysis presents variations from unit to unit as a
function of transfer voltage (VTR) shift (33% - 67% VDD) for
The following analysis presents variations from unit to unit as
one shot (monostable) operation.
a function of transfer voltage (VTR) shift (33%-67% VDD) for
free running (astable) operation.
TERMINAL 8

t1 t2 t1 t2
TERMINAL 13 t1´ t2 t1´ t2
TERMINAL 13
tA/2 tA/2
TERMINAL 10 tM tM
TERMINAL 10
tA

FIGURE 30. MONOSTABLE WAVEFORMS


FIGURE 29. ASTABLE MODE WAVEFORMS

VTR
VTR t1´ = -RC In ;
t1 = -RC In ; 2VDD
VDD + VTR
typically, t1´ = 1.38RC
typically, t1 = 1.1RC

tM = (t1´ + t2)
VDD - VTR
t2 = -RC In ; (VTR)(VDD - VTR)
2VDD - VTR tM = -RC In
(2VDD - VTR)(2VDD)
typically, t2 = 1.1RC
where tM = Monostable mode pulse width.
tA = 2(t1 + t2) Values for tM are as follows:
(VTR)(VDD - VTR) Typ: VTR = 0.5VDD tM = 2.48RC
= -2RC In
(VDD + VTR)(2VDD - VTR) Min: VTR = 0.33VDD tM = 2.71RC
Max: VTR = 0.67VDD tM = 2.48RC
Typ: VTR = 0.5VDD tA = 4.40RC
Min: VTR = 0.33VDD tA = 4.62RC
thus if tM = 2.48RC is used, the variation will be +9.3%,
Max: VTR = 0.67VDD tA = 4.62RC
-0% due to variations in transfer voltage.

thus if tA = 4.40RC is used, the variation will be +5%, -0% NOTES:


due to variations in transfer voltage. 1. In the astable mode, the first positive half cycle has a duration of
tM; succeeding durations are tA/s.
Variations Due to VDD and Temperature Changes
2. In addition to variations from unit to unit, the monostable pulse
In addition to variations from unit to unit, the astable period width varies with VDD and temperature. These variations are
varies with VDD and temperature, Typical variations are pre- presented in graphical form in Figures 19 to 26 with 10V as ref-
sented in graphical form in Figures 11 to 18 with 10V as ref- erence for voltage variation curves and +25oC as reference for
erence for voltage variations curves and +25oC as reference temperature variation curves.
for temperature variations curves.

7-909
CD4047BMS

Retrigger Mode Operation


The CD4047BMS can be used in the retrigger mode to extend However, in consideration of accuracy, C must be much larger
the output pulse duration, or to compare the frequency of an than the inherent stray capacitance in the system (unless this
input signal with that of the internal oscillator. In the retrigger capacitance can be measured and taken into account). R must
mode the input pulse is applied to terminal 12, and the output is be much larger than the CMOS “ON” resistance in series with
taken from terminal 10 or 11. As shown in Figure 31 normal it, which typically is hundreds of Ω. In addition, with very large
monostable action is obtained when one retrigger pulse is values of R, some short term instability with respect to time may
applied. Extended pulse duration is obtained when more than be noted.
one pulse is applied.
The recommended values for these components to maintain
For two input pulses, tRE = t1´ + t1 + 2t2. For more than two agreement with previously calculated formulas without trimming
pulses, the output pulse width is an integral number of time peri- should be:
ods, with the first time period being t1´ + t2, typically, 2.48RC, and
C ≥ 100pF, up to any practical value, for astable modes;
all subsequent time periods being t1 + t2, typically, 2.2RC.
C ≥ 1000pF, up to any practical value for monostable modes.
External Counter Option
10kΩ ≤ R ≤ 1MΩ
Time tM can be extended by any amount with the use of external
counting circuitry. Advantages include digitally controlled pulse Power Consumption
duration, small timing capacitors for long time periods, and
In the standby mode (Monostable or Astable), power dissipa-
extremely fast recovery time. A typical implementation is shown
tion will be a function of leakage current in the circuit, as shown
in Figure 32. The pulse duration at the output is
in the static electrical characteristics. For dynamic operation,
text = (N - 1) (tA) + (tM + tA/2) the power needed to charge the external timing capacitor C is
given by the following formula:
where text = pulse duration of the circuitry, and N is the number
of counts used. Astable Mode:
P = 2CV2f. (Output at terminal No. 13)

AST OPTIONAL P = 4CV2f. (Output at terminal Nos. 10 and 11)


BUFFER
CD4047BMS
CL CD4017BMS Monostable Mode:
Q OUT
R 12 (2.9CV2) (Duty Cycle)
P=
11 T
INPUT
PULSE TEXT
(Output at terminal Nos. 10 to 11)
The circuit is designed so that most of the total power is con-
sumed in the external components. In practice, the lower the
FIGURE 32. IMPLEMENTATION OF EXTERNAL COUNTER OPTION
values of frequency and voltage used, the closer the actual
Timing Component Limitations power dissipation will be to the calculated value.
The capacitor used in the circuit should be non polarized and Because the power dissipation does not depend on R, a
have low leakage (i.e. the parallel resistance of the capacitor design for minimum power dissipation would be a small value
should be at least an order of magnitude greater than the exter- of C. The value of R would depend on the desired period
nal resistor used). There is no upper or lower limit for either R or (within the limitations discussed above). See Figures 26, 27,
C value to maintain oscillation. and 28 for typical power consumption in astable mode.

+TRIGGER &
RETRIGGER
TERMINALS

8 & 12
OSC OUTPUT t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2
TERMINAL 13

Q OUTPUT tRE tRE tRE tRE


TERMINAL 10

FIGURE 31. RETRIGGER MODE WAVEFORMS

7-910
CD4047BMS

Chip Dimensions and Pad Layout

Dimensions in parenthesis are in millimeters and are


derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10-3 inch).

METALLIZATION: Thickness: 11kÅ − 14kÅ, AL.


PASSIVATION: 10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches

7-911

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