UNIT –I

DIODE CIRCUITS
1. The static resistance of a diode is_______
2. When the reverse bias is applied to a junction diode, it_______
3. Doping of semiconductor is _______
4. Referring to the energy level diagram of semiconductor materials, the width of forbidden energy
gap is about _______
5. A PN junction diode _______
6. If a PN junction is not biased, the junction current at equilibrium is_______
7. In a PN junction, the potential barrier is due to the charges on either side of the junction,
which consists of _______
8. In a PN junction, the region containing the uncompressed acceptor and donor ions is called_______
9. In a forward biased PN junction diode, the_______
10. When PN junction is forward biased _______
11. When we apply reverse bias to a junction diode, it _______
12. Under normal operating voltage, the reverse current in a silicon diode is about _______
13. The increased depletion region in a PN diode is due to_______
14. When a diode is forward biased, _______
15. For a Germanium PN junction, the maximum value of barrier potential is_______
16. For a Silicon PN junction, the maximum value of barrier potential is _______
17. When holes leave the p material to fill electrons in the n material, the process is called_______
18. The decreased depletion region in a PN junction is due to _______
19. Current flow in a semiconductor depends on the phenomenon _______
20. In a semiconductor diode, V – I relationship is such that _______
21. The ripple factor of a Half Wave Rectifier is _______
22. The peak inverse voltage of a Half Wave Rectifier is _______
23. The efficiency of a Half Wave Rectifier is _______
24. The ripple factor of Full wave rectifier is _______
25. The peak inverse voltage of a full Wave Rectifier is _______
26. The efficiency of a full Wave Rectifier is _______
27. The ripple factor of a inductor filter is _______
28. The DC power output for HWR is_______
29. The TUF for Bridge Rectifier is _______
30. The amount of ac content in the output can be mathematically expressed by a factor called _______
31. The TUF for HWR is_______
32. Zener breakdown occurs _______
33. A breakdown which is caused by cumulative multiplication of carriers through field induced
Impact ionization occurs in_______

34. For a highly doped diode _______

35. The breakdown that occurs in the reverse biased condition in a narrow junction diode is_______
36. The circuit with which the waveform is shaped by removing a portion of the input signal
Without distorting the remaining part of AC signal is called _______
37. Clipping circuits are also called as _______
38. If a small portion of positive or negative half cycle of the signal voltage is to be removed, then
the type of clipper used is _______
39. A circuit which introduces a DC level to an AC signal is called _______
40. A dc restorer is a_______

UNIT II
BJT CIRCUITS
1. A collector collects _______
2. In a PNP transistor with normal bias, _______
3. A PNP transistor is made of_______
4. In most transistors, the collector region is made physically larger than the emitter
Region _______
5. The three terminals of a BJT are called _______
6. For a NPN transistor, the N regions are_______
7. For operation of PNP amplifier, the base of the amplifier must be _______
8. In a transistor, the region that is very lightly doped and very thin is the_______
9. In a NPN transistor, the emitter _______
10. In a PNP transistor with normal bias, the emitter junction _______
11. In a NPN transistor, when the emitter junction is forward biased and the collector junction
Is reverse biased, the transistor will operate in the_______
12. In a PNP transistor, electrons flow_______
13. The arrow head on a transistor symbol indicates _______
14. Power transistors are invariably provided with _______
15. The largest current flow of a bipolar transistor occurs _______
16. Conventional biasing of a bipolar transistor has _______
17. The common emitter transistor circuit has_______
18. In an NPN transistor, if both the emitter junction and collector junction are reverse biased,
then the transistor will operate in _______
19. In a normally biased NPN transistor, the main current crossing the collector
junction is _______
20. In a PNP transistor, the electrons flow into the transistor at the_______
21. The forward current gain, hfe, is defined as_______
22. The α and β of a transistor are related to each other as _______
23. The transistor configuration which provides highest output impedance is_______
24. For α = 0.99, the value of β is _______
25. The operating point variation is due to _______
26. h parameters are also called as _______
27. The stability factor of a fixed bias is_______
28. The leakage current in CE configuration may be around _______
29. The quiescent point of a transistor biasing circuit implies_______
30. For normal amplification, the Q-point should be established in the_______
31. The biasing technique which gives good stability is_______
32. Stability factor S is approximately unity for_______
33. Which of the following transistor parameters are functions of temperature: _______
34. The self bias arrangement gives an improved Q-point stability when _______
35. The biasing method which is considered independent of transistor β is _______
36. The biasing configuration that offers least stability is _______
37. Which one of the following statements is correct? _______
38. The collector current for the CE circuit is given Ic = βIB + (1 + β) ICO. The three variables
β, IB and Ico_______
39. The resistance of thermistor decreases exponentially with_______
40. The stability factor S is _______
UNIT III
FET CIRCUITS
1. The JFET is _______
2. The channel of a JFET exists between _______
3. For low values of VDS, the JFET behaves like a_______
4. In an N channel JFET _______
5. In a P channel JFET_______
6. For an N channel JFET_______
7. An FET cannot operate at VGS = 0V. The FET is _______
8. The transconductance gm of JFET is defined as_______
9. The amplification factor µ of JFET is given by_______
10. The drain resistance rd is given by_______
11. Ideally, the equivalent circuit of an FET consists of_______
12. The magnitude of the current source in the ac equivalent circuit of an FET depends on_______
13. Which one of the following has the highest input resistance? _______
14. The current conduction of JFET involved_______
15. The JFET is also called as_______
16. Which of the following statements is true? _______
17. An FET has a_______
18. For small values of drain to source voltage, JFET behaves like a_______
19. In a JFET, the primary control on drain current is exerted by _______
20. After VDS reaches pinch off voltage VP in a JFET, the drain current becomes _______
21. The Drain Characteristics curve of a JFET is a graph of: _______
22. In a JFET, drain current is maximum when VGS is_______
23. A JFET has _______ input impedance when compared to BJT. _______
24. The drain to source voltage at which the drain current becomes nearly constant is called _______
25. The Transfer Characteristics curve of a JFET is a graph of: _______
26. The depletion MOSFET differs from a JFET in the sense that it has no _______
27. For the operation of enhancement n-channel MOSFET, the gate voltage will be_______
28. The gate terminal of JFET corresponds to ______ terminal of BJT.
29. The main factor which differentiates depletion MOSFET from an enhancement only
MOSFET is the absence of _______
30. The phase shift between input and output of common source amplifier is _______
31. In a FET amplifier, the source follower is_______
32. The voltage controls the drain current flow in FET is_______
33. The gate source voltage of a JFET should be_______
34. The input impedance of an ideal JFET is _______
35. The charge carriers in an N channel JFET are_______
36. The saturation region of JFET is also known as _______
37. A JFET can operate in _______
38. When a JFET is pinched off, the depletion layers are _______
39. The Insulated Gate Field Effect Transistor is _______
40. When a JFET is cut off, its like a _____ switch and when its saturated its like _____ switch.

UNIT-4
OPERATIONAL AMPLIFIER

1. Differential amplifier is __________coupled amplifier

2. The other name of voltage follower is_________
3. For large CMRR, ACM should be_________
4. Common mode rejection ratio can be expressed as_________
5. The ideal input impedance range of op-amp is_________
6. The ideal OP-AMP has the following characteristics_________
7. DC character of op-amp are_________
8. The gain of the Inverting amplifier is_______
9. For an ideal Op-Amp, the value of input offset voltage is _________
10. For an ideal Op-Amp, the value of input offset current is _________
 11. For an Practical Op-amp the typical value of input resistance is _________
12. For an ideal Op-amp the typical value of input resistance is_________
13. For an Op-amp the typical value of CMRR is _________
14. For an Op-amp the typical value of Slew rate is _________
15. The value of Band width for an ideal op-amp is _________
16. In a differential amplifier, CMRR can be improved by using an increased _________
17. The op-amp voltage follower circuit is also known as _________
18. The temperature range in which 741 IC op-amps is used is _________
19. Offset adjustment in an op-amp is done with the pin numbers _________
20. For an op-amp Inverting & non- inverting pins are _________
21. The open loop voltage gain of op-amp is _________
22. Which of the following characteristics do not necessarily applied to the op-amp_________
23. A change in the value of the emitter resistance, RE, in a differential amplifier _________
24. The ideal input impedance range of op-amp is _________
25. A good op-amp has _________
26. The gain of the Inverting amplifier is_______
27. The gain of the Non inverting amplifier_______
28.If the differential voltage gain and the common mode voltage gain of a differential amplifier are 48 dB
and 2 dB respectively, then common mode rejection ratio is _________
, 29. The frequency compensation is used in operational amplifiers is to increase its ___________
30. From a measurement of the rise time of the output pulse of an amplifier, whose input is a small
Amplitude square wave, one can estimate the following parameter of the amplifier _________
31. When the non-inverting. Amplifier is configured for unity gain it is called as _________
32. The application of differential amplifier is _________
33. The special case of the non-inv. Amplifier is _________
34. The differential amplifier with one op-amp as the same characteristics as the _________
35. If the input is a sine wave, the inverting amplifier (output) will produce ____ phase shift
36. If the input is a sine wave, the non inverting amplifier (output) will produce ____ phase shift
37. The input offset voltage of the practical Op-amp in the order of the ______
38. The slew rate of the practical Op-amp in the order of the ______
39.If Rf=0 non inv amp act as _________
40.AC characteristic of op-amp_________
UNIT –V

APPLICATIONS OF OP-AMP
1. For the OP-AMP circuit shown in the figure, Vo is_________

2. If a square wave is integrated by integrator using operational amplifier, the output is _________
3. When a sine signal is given as input to differentiator, the output is_________
4. The gain of an instrumentation amplifier is varied by a single______
5. What is the output voltage of adder circuits if 3 inputs are applied____
6.The slew rate of the instrumentation amplifier must be as _________
7. The voltage gain of a non inverting op-amp amplifier _________
8. A triangular wave can be generated by integrating _________
9. All pass filters are also called_________
10. The gain of filter is expressed in _________
11. What is the output voltage of inv adder circuits if 3 inputs are applied_________
12. What is the output voltage of subtractor circuits if 3 inputs are applied_________
13. Which filter performs exactly the opposite to the band-pass filter_________
14. In which filter the output and input voltages are equal in amplitude for all frequencies_________
15. The gain of the first order low pass filter_________
16. Name the filter that has two stop bands_________
17. Which type of ADC is chosen for noisy environment_________
18. Which among the following has long conversion time_________
19 . A 12 bit dual ramp generation has a maximum output voltage of +12v. Compute the equivalent digital
number for the analog signal of +6v. _________
20. In integrating type ADCs, the_________
21.An analog voltage of 3.41 V is converted into 8-bit digital form by an A/D converter with a reference
voltage of 5 V. The digital output is _________
22. A 10-bit DAC provides an analog output which has a maximum value of 10.23 volts.Resolution of the
DAC is _________
23. The fastest ADC techniques is _________
24. In which of the following type DAC, current flowing in the resistors changes as the input data
changes _________
25. The R-2R ladder type DAC has drawback of _________
26. The no.of levels are possible 2-bit DAC is _________
27. For an 8-bit DAC, the resolution is _________ of the full- scale range.
28. Quantization error is the characteristics of _________
29. A low speed ADC converter is_________
30. The basic step of a 9-bit DAC is 10.3 mV. If 000000000 represents 0 V, what output is
produced if the input is 101101111? _________
31. Which of the following belongs to integrating type ADC converters?
A) successive approximation ADC B) Dual Slope ADC
C) Both A and B D) Inverting amplifier
32. % resolution of a 10 bit ADC is _________
33. DAC essentially requires _________
34. The resolution of DAC for 8-bit length is _________
35. The fastest ADC techniques is _________
36. A Low speed ADC is _________
37. The main drawbacks of dual-slope ADC converters is _________
38. % resolution of a 10 bit ADC is _________
39. High Speed & excellent resolution is obtained in_________
40. The R-2R ladder type DAC has drawback of_________