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Equipos profesionales de medida

PDHMap:
a pocket guide to PDH

INNOVACIÓN EN TEST Y MEDIDA PARA TELECOMUNICACIONES

MUX
2 M b it/s
2
8 M b it/s

INNOVATION IN TEST AND MEASUREMENT FOR TETELECOMMUNICATIONS


8 MUX

8
3 4 M b it/s

34
2

MUX 1 4 0 M b it/s
8
34

140
2
LTE

8
8

34
2

Technical Note
PDHMap

table
c o n t eof
nts

1 Multiplexing Architecture

3 Switching and Framing

4 Technical Features

i
© ICT electronics
www.ict.es
PDHMap

Plesiochronous Digital
M u l t i p l eHierarchy
xing Architecture

MULTIPLEXING ARCHITECTURE
PDH (Plesichoronous Digital Hierarchy) is the most
basic technology for broadband digital transmission.
Based on the 2048 kbps bit rate (G.732, European
Hierarchy) or on the 1544 kbps (G.733, North
American Hierarchy), several tributaries are bit-inter-
leaved for multiplexing into a higher speed level. There
are actually four levels in the hierarchy, with their
speeds defined in the G.702 ITU-T standard, which are,
for the european system, 2048 kbps, 8448 kbps(G.742),
34 Mbps and 140 Mbps (G.751).

Figure 1 European PDH hierarchy: from 2 Mbit/s to 140 Mbit/s.

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© ICT electronics
www.ict.es
PDHMap

Plesiochronous Digital
M u l t i p l eHierarchy
xing Architecture

Remote Alarms Indicator (FAS and MFAS) CRC-4 Error signaling bits
A E
Spare bits (national use) CAS multiframe alignment
S 1
i - Tributary bits Frame alignment bits
T1
Justification control bits CRC-4 Multiframe alignment
J11
Justification bits Frame alignment supervision bits
R1 0
i - Channel CAS bits Cyclic Redundancy Checksum bits
ai bi ci di C1 C2 C3 C4

The 2048 kbps circuit (2 Mbps hereafter) has capacity


to simultaneously transmit 30 64 kbps voice (data)
channels. The remaining 128 kbps are used in two
simultaneous ways: 64 kbps are used for frame specific
purposes, such as frame alignment and far-end alarms,
while the remaining 64 kbps are mainly used for CAS
(Channel Associated) Signaling.

The main motivation of this document is to provide a


graphical and intuitive tool for a fast identification of
any basic issue one would eventually need to remember
or to find out about PDH. Starting with the overall
multiplexing structure, this document explains how the
different levels are builded, beginning with the basic
2 Mbit/s signal and following with the 8, 34 and
140 Mbit/s.

PDH is a plesiochronous technology, so it is not


possible to insert or to extract (add&drop) any channel
or tributary without fully demultiplexing the incoming
signal to the required level. Obviously, and jointly with
the lack of bundled management capabilities, this is a
major disadvantage for this technology, specially for
carriers when planning their networks. So, new
synchronous transmission technologies such as SDH
have been developed allowing for more flexible and
less cost demanding network configurations.

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© ICT electronics
www.ict.es
PDHMap

Plesiochronous Digital
F r a m Hierarchy
ing and Switching

FRAMING AND SWITCHING


From the 2 Mbps primary rate tributary upwards, every
level in the hierarchy is composed by 4 immediate
lower level tributaries, and the frame built by bit-inter-
leaving those signals. Thus, each level provides trans-
port capacity and justification for each one. In the
graphic below you can check the way signals are multi-
plexed in the PDH and click on the sensitive bits to get
more information.

As it has been pointed out before, switching in PDH is


only possible by previosly demultiplexing the carrier
down to the required switching level, so it can be infe-
rred that the basic transport level is the 2 Mbit/s
(30+2 x 64 kbit/s), and it is the signal with a different
structure from the others (8, 34 and 140 Mbit/s).

The 2 Mbit/s frame transports 30 voice channels and 2


additional channels for frame related functions and for
channel associated signaling. It is structured around the
basic 125 us frame, which has 32 x 64 kbit/s channels,
or time slots. Slot 0 is always used for specific frame
control: CRC, frame alignment, submultiframe
alignment, alarm signaling and bit error detection, while
Slot 16 is used for channel associated signaling (CAS).
Every eight 125 us frames are considered a
submultiframe, because CRC control (Ci bits) is
generated for every submultiframe (a submultiframe
carries the CRC-4 information for its preceeding one),
and 2 submultiframes compose the whole multiframe,
which consists of 16 basic frames. It's easy to see the
main reason underliying behind this organisation: the
fact is that you need four bits (a 2 kbit/s signaling
channel) to signalize every 64 kbit/s channel, so 15
bytes are needed to signal the whole 30 voice channels,
and a supplementary byte to provide CAS multiframe
alignment and stuffing.

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© ICT electronics
www.ict.es
PDHMap

Plesiochronous DigitalTHierarchy
echnical Features

TECHNICAL FEATURES
140 Mbit/s 34 Mbit/s
Binary Rate 139264.0 kbit/s ± 15 ppm 34368.0 kbit/s ± 20 ppm

Line Code CMI HDB3

Nominal Vpp 1V 1V

Impedance 75 Ohm (Ω) 75 Ohm (Ω)

Tolerated input level 0-12 dB at 70 MHz as √ƒ 0-12 dB at 17.184 MHz as √ƒ


attenuation

Number of tributaries 4 4

Justification Positive Positive

Bits Jij = 1 ⇒ Ri = fill-in (jusitification)


Bits Jij = 0 ⇒ Ri = information (no justification)
(Majority vote over Jij bits)

Frame length 2928 bits 1536 bits

Available bits / tributary 723 bits 378 bits


/ frame

Multiplexing method bit interleaving bit interleving

Frame Rate 47562.842 frames / s 22375.0 bit/s

Frame alignment bit rate 570754.098 bit / s 223750.0 bit/s

Maximum justification 47563 bit / s aprox. 22375 bit/s


rate per tributary

Nominal justification 0.419 0.436


ratio

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© ICT electronics
www.ict.es
PDHMap

Plesiochronous DigitalTHierarchy
echnical Features

8 Mbit/s 2 Mbit/s

Binary Rate 8448.0 kbit/s ± 30 ppm 34368.0 kbit/s ± 20 ppm

Line Code HDB3 HDB3

Nominal Vpp 2.37 V 2.37 V (coaxial cable)


3.00 V (balanced cable)

Impedance 75 Ohm (Ω) 75 Ohm (Ω) (coaxial)


120 Ohm (Ω) (balanced)

Tolerated input level 0-6 dB at 4224 kHz as √ƒ 0-6 dB at 1024 kHz as √ƒ


attenuation

Number of tributaries 4

Justification Positive

Bits Jij = 1 ⇒ Ri = fill-in (jusitification)


Bits Jij = 0 ⇒ Ri = information (no justification)
(Majority vote over Jij bits)

Frame length 848 bits 256 bits

Available bits / tributary 206 bits


/ frame

Multiplexing method bit interleaving octet

Frame Rate 9962.264 frames / s 8000 bit/s

Frame alignment bit rate 99622.64 bit / s 28000 bit/s (32000 bit/s
including supervision bits)

Maximum justification 10000 bit / s aprox.


rate per tributary

Nominal justification 0.424


ratio

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© ICT electronics
www.ict.es

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