Advanced Design System

Unified Environment for SI Design

Page 1 May 2006

 Agilent Signal Integrity Focus

We are committed to solving the challenges of the Signal

Integrity market
We bring unique strengths into this area
• Full breadth of EM modeling technologies
• Industry leading high frequency circuit simulation
• Unique co-simulation architecture for concurrent analysis in multiple
domains (system, circuit, and physical)
We have lots of experience in this market
• For many years customers have successfully designed circuits using
Agilent tools to analyze signal integrity

Page 2 May 2006

 Gb Ethernet
Infiniband
SI Market Trends

PCI
PCs have been the primary driver for the

Fibre Channel
electronics industry for over 20 years
DDR2 PCI Express
DRAM LAN
2.5 Gb/s
4.8 Gb/s Ethernet 5-6.25 Gb/s
PCI
8-9 Gb/s FB-DIMM 100 Mb/s
Express Flash BIOS
Front Side Bus
2-3 Gb/s
Memory
Pentium I/O Controller Hub
Controller Hub
CPU/Cache (South Bridge)
(North Bridge)
4+ Gb/s
DMI
PCI
2.5 Gb/s Hyper- Super I/O
Express
5-6.25 Gb/s Transport
USB 2.0 SATA
Ports Ports
Graphics

Floppy Drive
Keyboard
Parallel
RS 232
Key Digital Trends
Increasing Integration & Speed – Signal Integrity is a Major Issue

Architectural Shifts – High Speed Serial Interconnects

Tools and techniques need to keep pace…

Page 3 May 2006

 High Speed Serial Link

Advantages:
• Simplify communication link to a single/differential trace or lane
• Can deliver over longer distance and less susceptible to noise
• Fewer connector pins and improved board area utilization
• Increased flexibility and scalability
• Supports plug and play devices
Design Challenges:
• High data rate required to get same throughput (broad bandwidth)
• Special data processing requirements, such as serializer/de-serializer, 8B10B

• Difficult channel design Æ Dedicated Engineering Time and Effort

Page 4 May 2006

Typical SI Problem ( Ensuring Signal Quality and Timing)
Channel Adaptation

Pattern Encoder
Generator
Pre-emphasis/Driver
Die Driver

Package High speed Connectors

IBIS or Spice model

Physical Channel
Card

Card
Board Traces 2” (51mm) – 10” (254mm)

Physical Channel
Backplane Traces
10” (254mm) –
IBIS or Spice model 40” (1016mm)

Die Receiver

Package
Card

Receiver
Decoder Equalizer
Signal Recovery

Page 5 May 2006

High Speed Design Problem Solved by ADS
Driver
Package
Encoder, Serializer
Board
Backplane

Board
Decoder, De-serializer

Package
Receiver

Î ADS can support through all the domains

Î Common data representation
Î Integrated simulation technologies across domains

Page 6 May 2006

 Same Problem- Different Domains
How can I use frequency
How can I use impulse/TDR
domain simulation to predict
response to characterize
eye diagram performance?
interconnects?

Frequency Domain
Time Domain S-parameters
TDR Insertion loss
Impulse Response Return Loss
Oscilloscope Network Analyzer

Digital Designer Microwave Designer

Page 7 May 2006

 Agilent’s Advanced Design System
The best tools for High Speed Serial Link Design
– Accurate models for high speed interconnects
– Leading simulators to design serial link

Digital Designer Microwave Designer

A tool designed for both the analog and digital designer

Page 8 May 2006

 High Speed Backplane Design
Challenging problem when data rate exceeds 1Gb/s

The higher the data rate, the more difficult it is to design

the digital board!

Page 9 May 2006

 High Frequency Board Design
For 1Gbps and above – No longer a simple layout design
issue but a microwave engineering problem

High frequency effects dominates:

– Distributed transmission line effects
– Reflection due to impedance mismatches
– Coupling between adjacent transmission lines
– Frequency dependent resonance and radiation

Best characterized in frequency domain

Page 10 May 2006

 Interconnect Characterization
Time Domain Frequency Domain
Characterization Characterization

Measured S-Parameters

Approximate High Frequency Analytical Via and

Discontinuity
Lumped
Quasi- EM Full Wave EM Models
Equivalent

Approximate High Frequency Analytical

Transmission
Lumped Line Models
Equivalent Quasi- EM Full Wave EM

1 3 6 10 25 40 … GHz
Frequency

Page 11 May 2006

 Passive Models in ADS
Identify components in this backplane
ADS Models

Multilayer
Transmission Lines
Discontinuity Models
Via Holes
Transitions
• Accurate analytical models up to 10s of GHz
High Speed • Measurement Based Models
Connector • 3D EM/ Planar EM Based Models
Package • SPICE/HSPICE Netlist Import
• Design Flow Integration with Allegro/Gerber
Chip Devices

Page 12 May 2006

Frequency Domain Simulation in ADS
Communication Link = Passive Interconnects + Active Driver and
Receiver
• S-parameter characterizes passive interconnects
• Measurement instrument - Network Analyzer

Benefits
• Fast simulation up to 10s of GHz
• Accurate characterization
• Helps to identify root cause of the interconnect problem
• Allows to create/include measurement based behavioral models
• Simulate limited length PRBS sequence

Limitations
• Cannot include IBIS driver models
• Cannot simulate long PRBS bit sequence
• Require post processing to create eye diagram

Page 13 May 2006

 Frequency Domain Simulator in ADS
( S-Parameter Simulator) • S-Parameter Measurements
Multiple model types • Z-Parameters Measurements
Unlimited number of ports • Y-Parameter Measurements
Insertion loss & return loss • Group Delay
Differential and common mode S-parameter

Monte Carlo Simulation

Dielectric Constant variation (10%)
High Frequency Response Degradation
Sensitivity Analysis Vs, Rise/Fall Performance is Affected
Dielectric Constant

Page 14 May 2006

 Time Domain Simulation
Benefits
– Simulator output can be easily compared with the design specification
ƒ Eye opening
ƒ Rise time performance
ƒ BER performance
ƒ Identify impedance discontinuity locations
– Compatibility with IBIS driver and receiver models
– Simulate long PRBS bit sequence
Limitations with Time Domain Simulators
– Inability to include frequency domain models (i.e. S-parameters..)
– It is difficult to:
– Characterize interconnect components in time domain
– Identify root cause of interconnect problem
– Define optimization goals

Page 15 May 2006

 ADS High-Frequency SPICE with Convolution
Time domain analysis of frequency domain models

O Overcomes SPICE limitations

O Analyzes low and high

frequency circuits in time
domain

O Has all typical SPICE Convolution

functionality

O Directly uses high-frequency

models such as microstrips,
Accurately accounts for
striplines, bends, gaps , S-
parameter models... high frequency effects
• Skin loss
O Appropriate for high speed • Dispersion
digital applications • Dielectric loss
•…

Page 16 May 2006

 TDR/TDT Simulation
• A TDR sends a voltage step down a line and monitors the line for reflections
• Incident vs. reflected voltage waves are analyzed
• The shape and polarity of the reflections provides insight about the channel
• Yields the position and nature of each discontinuity

Connector Spice Model

Interconnect Models

Via Holes
Connector S-Parameter Model

EM based Model

Page 17 May 2006

 Driver / Receiver Models in ADS

High Speed Driver &

Receiver Models
Transistor Level
Netlist
IBIS Models
Measured Waveforms
Time, Frequency &
Numeric Domain • Circuit Level Models
Digital Sources • Behavioral Models ( IBIS, Verilog-A )
• SPICE/HSPICE Netlist Import
Verilog-A Based IBIS
Macros • Source Library (Clock, LFSR, Bit Seq, Jitter )
• Measurement Based Models
Other Behavioral • Time, Frequency & Numeric Domain Models
Models
• HDL, Matlab, C, C++, and Ptolemy Based

Page 18 May 2006

 Transient/Convolution Simulation
I/O Driver, IBIS Models, Verilog-A IBIS Macros
Frequency Domain Interconnect Models
Time Domain Simulation with Convolution Engine
EM Co-simulation

For illustration purposes, we used Virtex-II Pro I/O simulation in this example

Page 19 May 2006

 Why Package Modeling
With today’s clock rates,
where chips become faster than the package performance ...

C12x C23x

K12x K23x
L1x C3x
L2x L3x
C1x C2x

Pin1 C12x Pin2 C23x Pin3

C1x C2x C3x

… the package cannot be neglected any more

and needs to be modeled very accurately!

Page 20 May 2006

 Package/Connector Models

Often available as -
• Passive Interconnect Models
– RLC based models (ADS, HSPICE, ICM)
– S-parameters models (measured or simulated)
• 3-D drawings from manufacturer
– User is expected to create their own models using EM solvers
– Simulate using Agilent’s EEsof EM solver
– Momentum (3-D planar EM full wave solver, arbitrary multilayer planar
geometry)
– EMDS (finite element solver, arbitrary 3-D geometry)

Page 21 May 2006

 Momentum- 3-D Planar EM Simulation
Frequency domain analysis of arbitrary shaped
geometry
• Via hole
• Package and board
• Transitions and launch
• Connectors
• Arbitrary shaped transmission
lines and discontinuity
• SI and PI analysis

Page 22 May 2006

EMDS – Agilent’s 3D Full Wave EM simulator

Fast and accurate electromagnetic

simulation of arbitrary 3D passive
components:
• Traces, vias, and transitions
• Embedded capacitors,
inductors, and resistors
• Connectors and packages
• Modeling wire bonds
Simulated data:
• S-parameters
• Electric and magnetic fields
• Multi-mode impedance and propagation
constants

Page 23 May 2006

 System Level Modeling in ADS

High Speed System

Simulation
Equalization
(Passive/Active/
Adaptive)
Encoder/Decoders • Circuit Level Models
Serializer/De- • SDD & FDD Based Models
Serializer • Ptolemy Based Behavioral Models
Clock and Data • SPICE/HSPICE Netlist Import
Recovery • Verilog-A Based Models
• HDL, Matlab, TI-ISS, C, C++ Based Models
Other Signal Proc.. • Time, Frequency & Numeric Domain Models
• Co-simulation Analog, Digital, and EM

Page 24 May 2006

 System Level Simulation In ADS

• Numeric simulator
• Integrate IP
• Co-simulation with Analog/RF
- Transient
- Envelope
- Channel models
- EM Based models

• Communicate with Instruments

• Powerful Post-processing

Page 25 May 2006

High Speed Design Problem Solved by ADS
Driver
Package
Encoder, Serializer
Board
Backplane

Board
Decoder, De-serializer

Package
Receiver

Î ADS can support through all the domains

Î Common data representation
Î Integrated simulation technologies across domains

Page 26 May 2006

 Agilent Signal Integrity Focus

We are committed to solving the challenges of the Signal

Integrity market
We bring unique strengths into this area
• Full breadth of EM modeling technologies
• Industry leading high frequency circuit simulation
• Unique co-simulation architecture for concurrent analysis in multiple
domains (system, circuit, and physical)
We have lots of experience in this market
• For many years customers have successfully designed circuits using
Agilent tools to analyze signal integrity

Page 27 May 2006

 Advanced Design System
The best tool for High Speed Serial Link Design
• Accurate high speed interconnect models
• Industry leading simulators to design serial links
• Most preferred tools among high frequency design community

Integrated solution for

• System simulation
• Board simulation
• Chip level designs
• SI and PI analysis
• Co-design of DSP & RF/MW

Page 28 May 2006

 ADS Product Bundles for SI

Signal Integrity Designer - E9010

Signal Integrity Designer Pro - E9011

EMDS - 85270

Page 29 May 2006

 Agilent’s Signal Integrity Solutions

Page 30 May 2006

 Summary

Accurate models of interconnects

+
Accurate models of the active devices
+
Accurate models of Tx and Rx Functions
+
Robust simulator
=
Accurate Prediction of performance

Theearlier
The earlierin
inthe
thedesign
designcycle
cyclethat
thatproblems
problemsare
are
foundand
found anddesigned
designedout,
out,the
theshorter
shorterthe
thecycle
cycletime,
time,
thelower
the lowerthe
thedevelopment
developmentcosts
costs

Page 31 May 2006

 SI Web Resources

Agilent EEsof EDA home page

http://eesof.tm.agilent.com
Signal Integrity Applications and Wireline Applications
http://eesof.tm.agilent.com/applications/signal_integrity-b.html
http://eesof.tm.agilent.com/applications/wireline-b.html
Signal Integrity Application Central
http://www.agilent.com/find/si
Signal Integrity Series eSeminars
http://www.agilent.com/find/sigint
Jitter Measurements
http://www.agilent.com/find/jitter_info
High-Speed Serial Interconnects
http://www.agilent.com/find/serial_info

Page 32 May 2006