FP5001 PDF

FP5001
PWM Controller With SCP / DTC Function
General Description
The FP5001 is a single chip pulse-width-modulation controller composed of an open collector
transistor output, an error amplifier and duty control comparators (DTC). The FP5001 contains a 1.0V
precision voltage reference regulator, under-voltage lockout circuit (UVLO), short circuit protection
circuit (SCP). It is applied to offer space and low cost in many applications such as the DC / DC
converter and backlight inverter.
Using FP5001, it is easy to complete a power conversion regulator design with few external
components. The circuit diagram of the typical application example is shown as below.
Features
 Wide Operating Voltage Range: 3.6~40V
 Reference Voltage Precision: 2%
 Oscillator Frequency: 500KHz Max.
 Output sink current up to 100mA
 Low Quiescent Supply Current
 Variable Dead-time Control (DTC)
 UVLO Protection Function
 SCP Protection Function
 Package: SOP-8L
Applications
 Graphic Card
 Telecom and Datacom Applications
 High Power DC-DC Regulators
Typical Application Circuit

VIN VOUT
VCC VO
FB
RT
SCP
FP5001A
DTC
GND COMP
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice.
No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product.
Website: http://www.feeling-tech.com.tw Rev. 0.9
1/14
FP5001
Function Block Diagram
VCC RT DTC OUT
UVLO
Idt
2.5V
1V Reference
Voltage 1V
1.5V
OSC
SCP
Error
COMP 1
AMP
PWM / DTC
COMP
FB
COMP
SCP
SCP
COMP 2
GND
Pin Descriptions
SOP-8L Name No. I / O Description

OUT 1 O Open Collector Transistor Output
VCC 2 P IC Power Supply
COMP 3 O Error Amplifier Output

FP5001
9Fa-86L
FB 4 I Error Amplifier Inverting Input
SCP 5 I Short Circuit Protection Input
DTC 6 I Duty Control Input
RT 7 I Oscillator Frequency Control Input
GND 8 P IC Ground
2/14
FP5001
Marking Information
SOP-8L
FP5001
-
Halogen Free
Lot Number
Internal ID
Per-Half Month
Year
Halogen Free: Halogen free product indicator
Lot Number: Wafer lot number’s last two digits
For Example: 132386TB  86
Internal ID: Internal Identification Code n
Per-Half Month: Production period indicated in half month time unit
For Example: January → A (Front Half Month), B (Last Half Month)
February → C (Front Half Month), D(Last Half Month)
Year: Production year’s last digit
3/14
FP5001
Ordering Information
Part Number Operating Temperature Package MOQ Description
FP5001DR-LF -20°C ~ +85°C SOP-8L 2500EA Tape & Reel
Absolute Maximum Ratings

Parameter Symbol Conditions Min. Typ. Max. Unit
Power Supply Voltage VCC 40 V
Differential Input Voltage VID 20 V
Collector Output Voltage Vo 40 V
Collector Output Current Io 150 mA
Maximum Junction Temperature TJ 150 ℃
Junction to Ambient Thermal

SOP-8L Package +175 ℃/W
Resistance
Power Dissipation (SOP-8L TA=25℃ 650 mW
package) TA=70℃ 550 mW
Storage Temperature Range -65 +150 °C
Lead Temperature (Soldering, 10

+260 °C
sec)
IR Re-flow Soldering Curve
4/14
FP5001
Recommended Operating Conditions

Supply Voltage VCC 3.6 40 V
Operating Temperature -20 +85 °C
Operating Junction Temperature -65 +150 °C
DC Electrical Characteristics (VCC= 6V, TA=25°C, fOSC=70KHz unless otherwise

specified)
Reference
Output Voltage VREF COMP Connected to FB 0.98 1 1.02 V
Input Regulation △VREF VCC＝3.6 V to 40 V 2 12.5 mV
Output Voltage Change with △VREF / TA＝-20℃ to 25℃ -10 -1 15 mV / V
Temperature VREF TA＝ 25℃ to 85℃ -10 -2 10 mV / V
Under Voltage Lockout

Upper Threshold Voltage Vupper 3 V
Lower Threshold Voltage Vlow 2.8 V
Hysteresis Vhys 100 200 mV
Reset Threshold Voltage Vreset 2.1 2.55 V
Short-Circuit Protection
SCP Threshold Voltage VTH 0.95 1.00 1.05 V
SCP Voltage, Latched VLATCH No Pullup 2.4 V
SCP Voltage, UVLO Operation VOPR 140 185 230 mV
SCP Voltage, UVLO Standby VSTANDBY No Pullup 60 120 mV
Input Source Current ISOURCR TA＝25℃ -10 -15 -20 μA
SCP Comparator 1 Threshold

VCOMP (TH) 1.5 V
Voltage
Oscillator
Frequency f RT＝100K 70 KHz
Standard Deviation of Frequency △f 15 KHz
Frequency Change with Voltage △f / △V VCC＝3.6V to 40V 1 KHz
Frequency Change with TA＝-20℃ to 25℃ -4 -0.4 4 KHz

△f / △T
Temperature TA＝ 25℃ to 85℃ -4 -0.2 4 KHz
Voltage at RT VRT 1 V
5/14
FP5001
DC Electrical Characteristics (Cont.)

Duty Control
Output (Source) Current ISOURCE V (DT)＝1.5V 0.9×IRT‡ 1.2×IRT μA
Duty Cycle＝0% 0.5 0.7 V

Input Threshold Voltage VTH
Duty Cycle＝100% 1.3 1.5 V
Error Amplifier
Input Voltage VIN VCC＝3.6V to 40V 0 1.5 V
Input Bias Current VBIAS -160 -500 nA
Output Voltage Swing Positive VPOS 1.5 2.3 V
Output Voltage Swing Negative VNEG 0.3 0.4 V
Open-loop Voltage Amplification AVO 80 dB
Unity-Gain Bandwidth BWU 1.5 MHz
Output（Sink）Current ISINK VI (FB)＝1.2V, COMP＝1V 600 1100 μA
Output（Source）Current ISOURCE VI (FB)＝0.8V, COMP＝1V -45 -70 μA
Output
Output Saturation Voltage VSAT IO＝10mA 0.8 1.2 V
VO＝40V， VCC＝0 10 μA
Off-state Current IOFF
VO＝40V 10 μA
Short-circuit Output Current ISC VO＝6V 40 mA
Total Device
Standby Supply Current Off State ISTANDBY 1 1.5 mA
Average Supply Current IAVE RT＝100k 1.2 1.5 mA
6/14
FP5001
Function Description
Voltage Reference
A 2.5-V regulator operating from VCC is used to power the internal circuitry of the FP5001. A
resistive divider provides 1V reference for the error amplifier and the SCP circuit.
Error Amplifier
The error amplifier compares a sample of the DC-DC converter’s output voltage to the 1V
reference and generates an error signal for the PWM comparator. The DC-DC converter’s output
voltage can be set by following expression:
Vo = (1 + R1 / R2) × (1 V)
3 COMP FP5001A
Compensatio
n
Network
R1
4 FB
VI(FB)
To PWM
Comparator
R2
Vref = 1 V
8 GND
Figure 1. Error-Amplifier Gain Setting
The error amplifier’s output is brought out as COMP for use in compensating the DC-DC
converter’s control loop for stability. Because the amplifier can only source 45 μA, the total DC load
resistance should be 100 kΩ or larger.
Oscillator / PWM
The oscillator frequency (fosc) can be set from 20 kHz to 500 kHz by connecting a resistor
between RT and GND. Acceptable resistor values range from 15 kΩ to 250 kΩ. The oscillator
frequency can be determined by using the graph shown in Figure 5.
The oscillator output is a triangular wave with a minimum value of approximately 0.7 V and a
maximum value of approximately 1.3 V. The PWM comparator compares the error amplifier’s output
voltage and the DTC input voltage to the triangular wave. It turns the output transistor off whenever the
triangular wave is greater than the lesser of the two inputs.
7/14
FP5001
Duty Control (DTC)

DTC provides a means of limiting the output-switch duty cycle to a value less than 100%, which is
critical for boost and flyback converters. A current source generates a reference current (IDT) at DTC
that is nominally equal to the current at the oscillator timing terminal, RT. Connecting a resistor
between DTC and GND generates a maximum duty reference voltage (VDT), which the PWM/DTC
comparator compares to the oscillator triangle wave as described in the previous section. Nominally,
the maximum duty cycle is 0% when VDT is smaller than 0.7 V and 100% when VDT is 1.3 V or greater.
Because the triangle wave amplitude is a function of frequency and the source impedance of RT is
relatively high (1250 Ω), choosing RDT for a specific maximum duty cycle, D, is accomplished using the
following equation. The voltage limits for the frequency in question can be found in Figure 11 (Voscmax
and Voscmin are the maximum and minimum oscillator levels):
RDT = ( RT + 1250 ) [ D ( Voscmax - Voscmin) + Voscmin ]
Where
RDT and RT are in ohms, D in decimal
Soft start can be implemented by paralleling the DTC resistor with a capacitor (CDT) as shown in
Figure 2. During soft start, the voltage at DTC is derived by the following equation:
VDT I DT R DT 1 - e - t / R DT C DT
6
DTC
FP5001A
CDT RDT
Figure 2. Soft-Start Circuit
lf the DC-DC converter must be in regulation within a specified period of time, the time constant,
RDTCDT, should be t0/3 to t0/5. The FP5001 remains off when VDT < 0.7 V, the minimum OSC ramp
value. CDT is discharged every time UVLO or SCP becomes active.
8/14
FP5001
Under Voltage Lockout (UVLO) Protection

The under voltage lockout circuit turns the output transistor off and resets the SCP latch
whenever the supply voltage drops too low (approximately 3 V at 25°C) for proper operation.
A hysteresis voltage of 200 mV eliminates false triggering on noise and chattering.
Short-circuit Protection (SCP)

The FP5001 includes short-circuit protection (see Figure 3), which turns the power switch off to
prevent damage when the converter output is shorted. When activated, the SCP prevents the switch
from being turned on until the internal latching circuit is reset. The circuit is reset by reducing the input
voltage until UVLO becomes active or until the SCP terminal is pulled to ground externally.
When a short circuit occurs, the error-amplifier output at COMP rises to increase the
power-switch duty cycle in an attempt to maintain the output voltage. SCP comparator 1 starts an RC
timing circuit when COMP exceeds 1.5V. If the short is removed and the error-amplifier output drops
below 1.5V before time out, normal converter operation continues. If the fault is still present at the end
of the time-out period, the timer sets the latching circuit and turns off the FP5001 output transistor.
2.5 V
Rscp 185 kΩ
SCP
12 kΩ Comparator 2
Cscp
SCP
5 To Output
From Error Drive Logic
Amp
Q1
SCP Vref = 1 V
Comparator 1
1.5 V
Q2
Figure 3. SCP Circuit
The timer operates by charging an external capacitor (CSCP), connected between the SCP
terminal and ground, towards 2.5V through a 185-kΩ resistor (RSCP). The circuit begins charging from
an initial voltage of approximately 185 mV and times out when the capacitor voltage reaches 1V. The
output of SCP comparator 2 then goes high, turns on Q2, and latches the timer circuit. The expression
for setting the SCP time period is derived from the following equation:
VSCP = (2.5 - 0.185)(1 – e-t/τ) + 0.185
Where
τ = RSCPCSCP
9/14
FP5001
The end of the time-out period, tSCP, occurs when VSCP = 1 V. Solving for CSCP yields:
CSCP = 12.46 × tSCP Where t is in seconds, C in μF.
tSCP must be much longer (generally 10 to 15 times) than the converter start-up period or the
converter will not start.
Output Transistor
The output of the FP5001 is an open-collector transistor with a maximum collector current rating
of 100mA and a voltage rating of 40V. The output is turned on under the following conditions: the
oscillator triangle wave is lower than both the DTC voltage and the error-amplifier output voltage, the
UVLO circuit is inactive, and the short-circuit protection circuit is inactive.
PARAMETER MEASUREMENT INFORMATION

COMP
1.5 V
DTC
OSC
PWM / DTC
Comparator
OUT
SCP
Comparator 1
1.0 V
SCP
SCP Timing period
SCP
0V
Comparator 2
Vcc 3.0 V
Figure 4. PWM Timing Diagram
10/14
FP5001
Typical Operating Characteristics
OSCILLATOR FREQUENCY OSCILLATOR FREQUENCY

VS VS
TIMING RESISTANCE AMBIENT TEMPERATURE
1M 75
Vcc = 6V
Vcc = 6 V R t =100kΩ
TA = 25 oC
70
fosc - Oscillator Frequency - kHz

fosc - Oscillator Frequency - Hz
65
100 K 60
55
50
10 K 45
10 K 100 K 1M - 50 - 25 0 25 50 75 100
Rt - Timing Resistance - ￠G
[F TA - Ambient Temperature - ℃
Figure 5 Figure 6
REFERENCE OUTPUT VOLTAGE REFERENCE OUTPUT VOLTAGE FLUCTUATION

VS VS
POWER-SUPPLY VOLTAGE AMBIENT TEMPERATURE
1.6 2.4
TA = 25 C
o
Vref - Reference Output Voltage Fluctuation - %
Vcc = 6V
1.4 FB and COMP 2.0
Connected Together FB and COMP
Connected Together
Vref - Reference Output Voltage - V
1.6
1.2
1.2
1.0
0.8
0.8
0.4
0.6
0
0.4
- 0.4
0.2 - 0.8
G
!¢F
g
0 - 1.2
0 1 2 3 4 5 6 7 8 9 10 - 50 - 25 0 25 50 75 100
Vcc - Power Supply Voltage - V TA - Ambient Temperature - ℃
Figure 7 Figure 8
AVERAGE SUPPLY CURRENT AVERAGE SUPPLY CURRENT

VS VS
POWER-SUPPLY VOLTAGE AMBIENT TEMPERATURE
2.0 1.3
TA = 25 oC Vcc = 6V
R t =100kΩ Rt =100kΩ
1.2
Icc - Average Supply Current - mA
Icc - Average Supply Current - mA
1.5
1.1
1.0 1.0
0.9
0.5
0.8
0 0
0 10 20 30 40 - 50 - 25 0 25 50 75 100
Vcc - Power-Supply Voltage - V TA - Ambient Temperature - ℃
Figure 9 Figure 10
11/14
FP5001
PWM TRIANGLE WAVE AMPLITUDE VOLTAGE ERROR AMPLIFIER OUTPUT VOLTAGE

VS VS
OSCILLATOR FREQUENCY OUTPUT (SINK) CURRENT
1.8 3.0
Vcc = 6 V TA = 25 oC
TA = 25 oC V I(FB) = 1.2 V
PWM Triangle Wave Amplitude Voltage - V
1.5 2.5 Vcc = 6 V
Vo - Error Amplifier Output Voltage - V

Vosc max (100% duty cycle)
1.2 2.0
0.9 1.5
Vosc min (zero duty cycle)
0.6 1.0
0.3 0.5
0 0
10 K 100 K 1M 10 M 0 0.2 0.4 0.6 0.8 1.0 1.2
fosc - Oscillator Frequency - Hz Io - Output (Sink) Current - mA
Figure 11 Figure 12
ERROR AMPLIFIER OUTPUT VOLTAGE ERROR AMPLIFIER OUTPUT VOLTAGE

vs VS
OUTPUT (SOURCE) CURRENT AMBIENT TEMPERATURE
3.0 2.40
Vcc = 6V
TA = 25 oC
2.35 V I(FB) = 0.8 V
V I(FB) = 0.8 V
2.5 No Load
Vcc = 6 V
2.30
2.0
2.25
1.5 2.20
2.15
1.0
2.10
0.5
2.05
0 2.00
0 20 40 60 80 100 120 - 50 - 25 0 25 50 75 100
Io - Output (Source) Current - μA TA - Ambient Temperature - ℃
Figure 13 Figure 14
ERROR AMPLIFIER OUTPUT VOLTAGE OUTPUT DUTY CYCLE

VS VS
AMBIENT TEMPERATURE DTC VOLTAGE
120 120
Vcc = 6V Vcc = 6V
V I(FB) = 1.2 V TA = 25 oC
115
Vo - Error Amplifier Output Voltage - mV
No Load 100 R t =100kΩ
110
Output Duty Cycle - %
80
105
60
100
40
95
20
90
85 0
- 50 - 25 0 25 50 75 100 0 0.5 1 1.5 2
TA - Ambient Temperature - ℃ DTC Voltage - V
Figure 15 Figure 16
12/14
FP5001
SCP TIME-OUT PERIOD DTC OUTPUT CURRENT

VS VS
SCP CAPACITANCE RT OUTPUT CURRENT
12 - 60
Vcc = 6V DTC Voltage = 1.3V

TA = 25 oC TA = 25 oC
10 - 50
R t =100kΩ
t(scp) - SCP Time-Out Period - ms
Io(DT) - DTC Output Current - μA

8 - 40
6 - 30
4 - 20
2 - 10
0 0
0 20 40 60 80 100 120 0 - 10 - 20 - 30 - 40 - 50 - 60
Cscp - SCP Capacitance - nF Io - RT Output Current - μA
Figure 17 Figure 18
OUTPUT SATURATION VOLTAGE

VS
OUTPUT (SINK) CURRENT
2
Vcc = 6V
TA = 25 oC
Vce - Output Saturation Voltage - V
1.5
0.5
0
0 5 10 15 20
Io - Output (Sink) Current - mA
Figure 19
13/14
FP5001
Package Outline
SOP-8L
UNIT: mm
Symbols Min. (mm) Max. (mm)

A 1.346 1.752
A1 0.101 0.254
A2 1.498
D 4.800 4.978
E 3.810 3.987
H 5.791 6.197
L 0.406 1.270
θ° 0° 8°
Note:
1. Package dimensions are in compliance with JEDEC outline: MS-012 AA.
2. Dimension “D” does not include molding flash, protrusions or gate burrs.
3. Dimension “E” does not include inter-lead flash or protrusions.
14/14

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FP5001

PWM Controller With SCP / DTC Function

Typical Application Circuit

Website: http://www.feeling-tech.com.tw Rev. 0.9

Function Block Diagram

VCC RT DTC OUT

SOP-8L Name No. I / O Description

VCC 2 P IC Power Supply

COMP 3 O Error Amplifier Output

FB 4 I Error Amplifier Inverting Input

SCP 5 I Short Circuit Protection Input

DTC 6 I Duty Control Input

RT 7 I Oscillator Frequency Control Input

Website: http://www.feeling-tech.com.tw Rev. 0.9

Halogen Free: Halogen free product indicator

Lot Number: Wafer lot number’s last two digits

For Example: 132386TB  86

Internal ID: Internal Identification Code n

Per-Half Month: Production period indicated in half month time unit

For Example: January → A (Front Half Month), B (Last Half Month)

February → C (Front Half Month), D(Last Half Month)

Year: Production year’s last digit

Website: http://www.feeling-tech.com.tw Rev. 0.9

Absolute Maximum Ratings

Differential Input Voltage VID 20 V

Collector Output Voltage Vo 40 V

Collector Output Current Io 150 mA

Maximum Junction Temperature TJ 150 ℃

Junction to Ambient Thermal

Power Dissipation (SOP-8L TA=25℃ 650 mW

package) TA=70℃ 550 mW

Storage Temperature Range -65 +150 °C

Lead Temperature (Soldering, 10

IR Re-flow Soldering Curve

Website: http://www.feeling-tech.com.tw Rev. 0.9

Recommended Operating Conditions

Operating Temperature -20 +85 °C

Operating Junction Temperature -65 +150 °C

DC Electrical Characteristics (VCC= 6V, TA=25°C, fOSC=70KHz unless otherwise

Input Regulation △VREF VCC＝3.6 V to 40 V 2 12.5 mV

Output Voltage Change with △VREF / TA＝-20℃ to 25℃ -10 -1 15 mV / V

Temperature VREF TA＝ 25℃ to 85℃ -10 -2 10 mV / V

Under Voltage Lockout

Lower Threshold Voltage Vlow 2.8 V

Hysteresis Vhys 100 200 mV

Reset Threshold Voltage Vreset 2.1 2.55 V

SCP Voltage, Latched VLATCH No Pullup 2.4 V

SCP Voltage, UVLO Operation VOPR 140 185 230 mV

SCP Voltage, UVLO Standby VSTANDBY No Pullup 60 120 mV

Input Source Current ISOURCR TA＝25℃ -10 -15 -20 μA

SCP Comparator 1 Threshold

Standard Deviation of Frequency △f 15 KHz

Frequency Change with Voltage △f / △V VCC＝3.6V to 40V 1 KHz

Frequency Change with TA＝-20℃ to 25℃ -4 -0.4 4 KHz

Website: http://www.feeling-tech.com.tw Rev. 0.9

DC Electrical Characteristics (Cont.)

Duty Cycle＝0% 0.5 0.7 V

Input Bias Current VBIAS -160 -500 nA

Output Voltage Swing Positive VPOS 1.5 2.3 V

Output Voltage Swing Negative VNEG 0.3 0.4 V

Open-loop Voltage Amplification AVO 80 dB

Unity-Gain Bandwidth BWU 1.5 MHz

Output（Sink）Current ISINK VI (FB)＝1.2V, COMP＝1V 600 1100 μA