Lic Lab Manual

SRV ENGINEERING COLLEGE B.E.
ELECTRONICS AND COMMUNICATION ENGINEERING
SEMBODAI RUKMANI VARATHARAJAN ENGINEERING

COLLEGE
SEMBODAI – 614809
(Approved By AICTE,New delhi – Affiliated To ANNA UNIVERSITY::Chennai)
EC6412 LINEAR INTEGRATED CIRCUITS

(REGULATION-2013)
LAB MANUAL
DEPARTMENT ELECTRONICS AND COMMUNICATION
ENGINEERING ENGINEERING
Prepared By, Approved By,

RAJARAMYA V.G SUNDAR .G
AP/ECE/SRVEC HOD/ECE/SRVEC
EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

SRV ENGINEERING COLLEGE B.E.ELECTRONICS AND COMMUNICATION ENGINEERING
(REGULATION 2013)
AS PER ANNA UNIVERSITY SYLLABUS
SYLLABUS
1. Inverting, Noninverting & Differntial Amplifier.

2. Integrator and Differentiator.
3. Instrumentation Amplifier.
4. Active Low Pass, High Pass And Band Pass Filter
5. Astable, Monostable Multivibrators And Schmitt Trigger Using Op-Amp.
6. RC Phase Shift Oscillator and Wein Bridge Oscillator.
7. Astable, Monostable Multivibrators Using NE555 Timer.
8. PLL Characteristics and Frequency Multiplier.
9. Dc Power Supply Using LM314 and LM723.
10. Study of SMPS.
Simulation Using Pspice

11.Instrumentation Amplifier.
12.Low Pass – Second Order Filter, High Pass – Second Order Filter and Band Pass –
Second Order Filter.
13.Astable Multivibrator, Monostable Multivibrator and Schmitt Trigger Using Op-
amp.
14.RC Phase Shift Oscillator, Wien Bridge Oscillator.
15.Astable Multivibrator and Monostable Multivibrator Using 555 Timer.
16.D/A and A/D converters.
17.Analog Multipliers.
18.CMOS inverter, NAND and NOR.

TABLE OF CONTENT
EXP NO NAME OF THE EXPERIMENT
Inverting, Noninverting & Differntial Amplifier
1.
2. Integrator And Differentiator
Instrumentation Amplifier
3.
Active Low Pass, High Pass And Band Pass Filter
4.
Astable, Monostable Multivibrators And Schmitt Trigger Using
5.
Op-Amp
Astable, Monostable Multivibrators And Schmitt Trigger Using
6.
Op-Amp
RC Phase Shift Oscillator And Wein Bridge Oscillator
7.
Astable, Monostable Multivibrators Using NE555 Timer
8.
PLL Characteristics And Frequency Multiplier.
9.
DC Power Supply Using LM314 And LM723
10.
Study Of SMPS
11.
Simulation Using Pspice
Instrumentation Amplifier
12.
Low Pass – Second Order Filter, High Pass – Second Order
13.
Filter and Band Pass – Second Order Filter.
Astable Multivibrator,Monostable Multivibrator and Schmitt
14.
Trigger Using Opamp.
RC Phase Shift Oscillator,Wien Bridge Oscillator
15.
Astable Multivibrator and Monostable Multivibrator Using 555
16.
Timer
17. D/A and A/D converters.
18. Analog Multipliers.
19. CMOS inverter, NAND and NOR.

Ex.No. 1 INVERTING, NONINVERTING & DIFFERNTIAL AMPLIFIER
Date
AIM: To construct an Inverting, Non-inverting and Differential amplifier using Operational

amplifier & observe their performance.
APPARATUS REQUIRED:
S.No. APPARATUS / EQUIPMENT RANGE QUANTITY
1. IC741 - 1
2. Resistors 1KΩ,10KΩ,19KΩ 1,5,1
3. AFO 30 MHz 1
4. Power supply (0- 15)v 1
5. CRO 30 MHz 1
6. Connecting wires - As required
CIRCUIT DIAGRAM:
Fig 1.1 Circuit diagram of Inverting Amplifier

Fig 1.2 Circuit diagram of Non-Inverting Amplifier
Rf = 10K
Cf = 0.1F
R1 = 1K 4
2 V 1
- -OS
1 6
Vout
OU
3 T 5
Vin = 1 Vpp + 7 OS
V2 LM74
+ U2
1
Fig 1.3 Circuit diagram of Differential Amplifier
THEORY:
INVERTING AMPLIFIER:
 This perhaps the most widely used of all the op amp circuits. The circuit is shown
in figure 1.1. The output voltage Vo is feedback to the inverting input terminal
through the Rf - R1 network where Rf is the feedback resistor.
 Input signal Vi is applied to the inverting input terminal through R1 and non-
inverting input terminal of op amp is grounded.
 Output Vo = -Vi
NON INVERTING AMPLIFIER:
 If the signal is applied to the non-inverting input terminal and feedback is given
as shown in the figure. The circuit amplifiers without inverting the input signal.
Such a circuit is called as non-inverting amplifier.
 It may be noted that it is also a negative feedback system as output is being

feedback to the inverting input terminal.
DIFFERENTIAL AMPLIFIER:
 The differential amplifier amplifies the difference between two input voltage
signals. Hence it is also called difference amplifier.
 V1 and V2 are the two input signals while Vo is the single ended output. Each
signal is measured with respect to the ground.
 In an ideal differential amplifier, the output voltage V o is proportional to the

difference between the two input signals.
 Hence we can write, V0 = (V1 - V2).
PROCEDURE:
INVERTING AMPLIFIER:
 Connections are made as per the circuit diagram.
 Set 1v peak to peak in AG and observe the output waveform in CRO.
 Change the Rf and Rse in to different values and repeat the same procedure
 Enter the all value in the tabular column.
 Calculate the Vout by using formula. And verify with practical value.
NON INVERTING AMPLIFIER:

 Set the 1v peak to peak in AG and observe the output waveform in CRO.
DIFFERENTIAL AMPLIFIER:
 Set 1v peak to peak in AG and observe the output waveform in CRO.

TABULATION:
Inverting amplifier:
S.No. R f R1  Vin (v) Time Vo (v) Time Vo (v)
(ms) (ms)
Non-inverting amplifier:
S.No. Rf  R2  Vin (v) Time Vo (v) Time Vo (v)

(ms) (ms)
Differential amplifier:
S.NO: V1 V2 V0 (Volts) gain

(Volts) (Volts)

MODEL GRAPH:
Fig 1.4 Model Graph for Inverting Amplifier:
Fig 1.5 Model Graph for Non-Inverting Amplifier:

Fig 1.6 Model Graph for Differential Amplifier:
RESULT: From this experiment we constructed the inverting, non-inverting amplifier and
differential amplifier using operational amplifier and observed their characteristics.
VIVA QUESTIONS:
1. What is an op-amp?
2. What is an inverting amplifier?
3. What is the difference between inverting and non inverting amplifier?
4. Define CMRR.
5. Write the equation for gain of an inverting amplifier.

Ex.No. 2 INTEGRATOR AND DIFFERENTIATOR
Date
AIM: To construct an integrator and differentiator using Operational amplifier & observe their
performance.
APPARATUS REQUIRED:
APPARATUS /
S.No. RANGE QUANTITY
EQUIPMENT
1. IC741 - 1
2. Resistors 100Ω,150Ω,1KΩ,10KΩ,12KΩ 1,1,1,2,1
3. Capacitors 0.01μF,0.3 μF,1μF Each one
4. AFO 30 MHz 1
6. CRO 30 MHz 1
CIRCUIT DIAGRAM:
Fig 2.1 circuit diagram of INTEGRATOR

Fig 2.2 Circuit diagram of DIFFERENTIATOR

THEORY:
INTEGRATOR:
The gain of an integrator at low frequency can be limited to avoid the saturation
problem if the feedback capacitor is shunted by a resistance Rf. The parallel combination of Rf
and Cf behaves like a practical capacitor. For this circuit is also called a lossy gain to Rf/R, and
thus provides dc stabilization.
The feedback resistor Rf limits the gain and prevents it from becoming infinite for
dc signals. This is magnitude of the gain of an inverting amplifier which is the lossy integrator
becomes an open circuit.
DIFFERENTIATOR:
The operational amplifier circuits that contain capacitor as the differentiating
amplifier as differentiator. This circuit eliminates the problem of stability & high frequency
noise.
The value of fa should be selected such that, fa < fb < fc, where fc is the unity gain
bandwidth of the operation amplifier in open loop configuration.
PROCEDURE:
DIFFERENTIATOR:

 Set the 1v peak to peak in AFO and observe the output waveform in CRO.
 Find the values Rf , R1, C1, Cf as per the calculation.
 Calculate the Vout by using formula and verify with practical value.

INTEGRATOR:

 Set the 1v peak to peak in AFO and observe the output waveform in CRO.
 Find the values Rf , R1, C1, Cf as per the calculation.
 Calculate the Vout by using formula and verify with practical value.
TABULATION:
Integrator:
S.No. Input Output
Vo (v) Time Vo (v) Time

(ms) (ms)
Differentiator:
S.No. Input Output
Vo (v) Time Vo (v) Time

(ms) (ms)

MODEL GRAPH:
Fig 2.3 Model Graph for Integrator:
Fig 2.4 Model Graph for Differentiator:

RESULT: From this experiment, we constructed the differentiator and integrator using op-amp
and observed their performance.
VIVA QUESTIONS.
1. Define an integrator.
2. State the applications of an integrator.
3. What is a differentiator?
4. What are the steps to design a differentiator?
5. What are the steps to design an integrator?

Ex.No. 3 INSTRUMENTATION AMPLIFIER
Date
AIM: To construct an instrumentation amplifier circuit in order to amplify the AC signal.
APPARATUS REQUIRED:
1. IC741 - 3
2. Resistors 5KΩ,10KΩ 3,4
3. AFO 30 MHz 1
5. CRO 30 MHz 1
CIRCUIT DIAGRAM:
Fig 3.1 circuit diagram of Instrumentation Amplifier

THEORY:
INSTRUMENTATION AMPLIFIER:
 The output-measuring device required power for their operation. This power is
usually drawn from the measuring circuit itself.
 The electromechanical output device requires power, which typically ranges

from a few microvolts in the case recorder.
 In many applications the measuring circuit cannot supply the power

demanded by the output device.
 Thus if an output device is directly connected to the circuit. Signal gate
distorted on account of the loading effect.
 The instrumentation amplifiers in such cases are required to supply the

necessary power required by the output devices in order that the signal is
faithfully measured or recorded.
 Amplifiers are also used when the quantity under measurement has to be
processed or is to be stored. An instrumentation amplifier should have long
operating life and high degree of reliability.
PROCEDURE:
INSTRUMENTATION AMPLIFIER
 The connections are given as per the circuit diagram.
 Switch on the power supply.
 The input voltages V1 & V2 are noted for given circuit.
 The gain is calculated theoretically for the resistance values.
 Corresponding Vo voltage are Observed.
 The practical gain is calculated and all the values in the tabular Column.

TABULATION:
S.No. V1 (V) V2 (V) Vo (v) Practical Theoretical

gain (dB) gain (dB)
Fig 3.2 Model Graph for Instrumentation Amplifier:

RESULT: Thus the instrumentation amplifier was designed for the given specification.
VIVA QUESTIONS:
1. What are the features of instrumentation amplifier?
2. What are the applications of instrumentation amplifier?
3. What is an instrumentation amplifier?
4. Write the expression for output voltage.
5. What is the use of transducer in an instrumentation amplifier?

Ex.No. 4 ACTIVE LOW PASS, HIGH PASS AND BAND PASS FILTER
Date
AIM : To construct and plot the frequency response of a second order low pass filter,High
pass filter and Band pass filter. To measure the cutoff frequency in each case and verify
with theoretical values.
APPARATUS REQUIRED:
1. IC741 - 1
2. Resistors 5KΩ,10KΩ,4.7KΩ,6.2KΩ,100KΩ 1,3,1,1,3
3. Capacitors 0.001μF,0.01 μF 1,3
4. AFO 30 MHz 1
6. CRO 30 MHz 1
CIRCUIT DIAGRAM:
Fig 4.1 Circuit diagram of Active low pass filter

Fig 4.2 Circuit diagram of Active High pass filter
Fig 4.3 Circuit diagram of Active Band pass filter
THEORY:
LOW PASS FILTER:
 A Second order low pass filter consists of a two RC network connected to the
positive input terminal of a non-inverting op amp.
 Resisters Ri and Rf determine gain of the filter in the pass band. The practical
response of the filter must be very close to an ideal one.
 In case of a second order filter, the gain rolls off at a rate of 40 dB / decade.
 Thus the slope of the frequency response after f = fH is – 40 dB / decade, for a
second order low pass filter.

HIGH PASS FILTER:

 A high-pass filter (HPF) is an electronic filter that passes high-frequency signals
but attenuates (reduces the amplitude of) signals with frequencies lower than the
cutoff frequency.
 The actual amount of attenuation for each frequency varies from filter to filter. A
high-pass filter is usually modeled as a linear time-invariant system. It is
sometimes called a low-cut filter or bass-cut filter.
 High-pass filters have many uses, such as blocking DC from circuitry sensitive to
non-zero average voltages or RF devices. They can also be used in conjunction
with a low-pass filter to make a bandpass filter.
BAND PASS FILTER:

 A band pass filter is basically a frequency selector. It allows one particular band
of frequencies to pass.
 Thus the, the pass band is between the two cut-off frequencies fH and fL
 Where fH > fL any frequency outside this band gets attenuated. BW = fH-fL
PROCEDURE:
LOW PASS FILTER:
 Connections are given as per the circuit diagram.

 Given an input signal Vi of IV peak to peak and measure the output for different
input frequencies.
 The input and the output waveforms are seen to the CRO.
HIGH PASS FILTER:

input frequencies.
BAND PASS FILTER:

input frequencies.

TABULATION:
Active low pass filter:
Vin =
S.No. Frequency in hertz Vo (v) Gain = 20 log (Vo / Vin)

Active High pass filter:

Vin =

Active Band pass filter

Vin =

Fig 4.4 Model Graph for Active Low Pass Filter:
Fig 4.5 Model Graph for Active High Pass Filter
Fig 4.6 Model Graph for Active Band Pass Filter:

RESULT: Thus the LPF, HPF&BPF is constructed and its frequency response is plotted.
VIVA QUESTIONS:
1. What is the switched capacity filters?
2. What are the common applications of filters?
3. Define a state variable filter.
4. Why do we use higher order filters.
5. What is the roll-off a first order filter?
6. List out the other filters rather than these filters.

ASTABLE, MONOSTABLE MULTIVIBRATORS AND

Ex.No. 5
SCHMITT TRIGGER USING OP-AMP
Date
AIM : To construct an Astable, Monostable multivibrators and Schmitt Trigger using

Op-amp and observe their performance.
APPARATUS REQUIRED:
1. IC741 - 1
2. Resistors 1KΩ,10KΩ,48.3KΩ,100KΩ 1,2,1,2
3. Capacitors 0.01 μF 2
4. Diode IN4007 2
5. AFO 30 MHz 1
7. CRO 30 MHz 1
CIRCUIT DIAGRAM:
Fig 5.1 Circuit diagram of Astable multivibrator

Fig 5.2 Circuit diagram of Monostable multivibrator
Fig 5.3 circuit diagram of Schmitt trigger

THEORY:
ASTABLE MULTIVIBRATOR:
 The Astable multivibrator is also called as a free running oscillator. The principle
of op-amp is to force an op-amp to operate in the saturation region.
 The output of the op-amp in the circuit will be positive and negative saturation
level depending on the differential voltage across the capacitor.
 At any instant the DC supply voltage +Vcc & - Vcc are applied. This means the
voltage at the inverting terminal is zero initially at the same time.
 The voltage V at the non-inverting terminal a small infinite value. The voltage V1
will be started to drive the op-amp in to the saturation soon as voltage is more
than V1, the output forced to switch to –Vsat the voltage is negative then input
drives the op-amp + Vsat.
MONOSTABLE MULTIVIBRATOR:
 The mono stable multivibrator has one stable state and other is quasi state. This
is useful for generating single output pulse of adjustable time duration in
response to a triggering signal.
 The width of pulse depends only on the external components connected to the
op-amp. Diode D2 produces a negative going triggering pulse and supply to the
just slightly.
 The diode D2 id used to avoid the malfunctioning by blocking the positive noise
spikes the may be present at the differentiated triggered input.
SCHMITT TRIGGER:
 The Schmitt Trigger is called as Regenerative comparator. If the feedback is

added to comparator circuit, gain can be increased greatly.
 The input voltage is applied to the negative input terminal and feedback voltage
to the input terminal.
 The input voltage Vi triggers the output Vo every time it exceeds certain voltage
levels.
 These voltage levels are called upper threshold voltage. The hysteresis with this
the difference between these two threshold voltages is +VUT –VLT .
 This voltage is called Upper threshold voltage VUT, Where Vi is just greater than
VUT . The output regenerative switches to Vsat and remains at this level as long
as Vi > VUT .
 This voltage is referred to as lower threshold voltage VLT. Then VLT < VUT and
difference between these voltages is hysteresis width Vh and it can be written as,
Vh = VUT – VLT
 If peak to peak input signal Vi were smaller than Vh then Schmitt trigger circuit
having responded at a threshold voltages. The vertical edges of the output
waveform will not occur at the time, the sine wave passes through zero.

PROCEDURE:
ASTABLE MULTIVIBRATOR:

 The capacitor voltage waveform is observed and the frequency of the output
waveform is measured
 Tabulate the reading in tabular column.
MONOSTABLE MULTIVIBRATOR:

 Set the input voltage using AFO and output waveform observed in CRO.
SCHMITT TRIGGER

 Set the input voltage using AFO and output waveform observed in CRO.
TABULATION:
Astable multivibrator
Vin (v) Time (ms) VO (V) Time (ms) VUT (V) VLT (V) Time
(ms)
Monostable multivibrator

Vin (v) Time (ms) VO (V) Time (ms) VUT (V) VLT (V) Time (ms)
Schmitt trigger
Vin (v) Time (ms) VO (V) Time (ms) VUT (V) VLT (V) Time (ms)
MODEL GRAPH:
Fig 5.4Model Graph for Astable multivibrator:

Fig 5.5 Model Graph for Monostable multivibrator:
Fig 5.6 Model Graph for Schmitt trigger:

RESULT: Thus an Astable, Monostable multivibrators and Schmitt Trigger using Op-amp its
performance is observed .
VIVA QUESTIONS:
1. What is the use of a monostable multivibrator?
2. Explain how a non symmetrical wave can be obtained.
3. What is the application of astable multivibrator.
4. What is hysteresis?
5. What parameters determine hysteresis?
6. List the different types of comparator.
7. What is the other name of one chart?
8. What is the other name of astable multivibrator?
9. State the two conditions of oscillations.
10. What is Schmitt trigger?

RC PHASE SHIFT OSCILLATOR AND WEIN BRIDGE

Ex.No. 6 OSCILLATOR
Date
AIM: To construct and observe RC phase shift oscillator and Wein bridge oscillator using
op-amp.
APPARATUS REQUIRED:
APPARATUS /
EQUIPMENT
1. IC741 - 1
1.2KΩ,3.18KΩ,10KΩ,20KΩ,
2. Resistors 3,1,1,1,1,1,1
50KΩ,290KΩ
3. Capacitors 0.01 μF,0.05μF 1,1
4. Inductor Box - 1
5. Capacitor Box - 1
6. AFO 30 MHz 1
8. CRO 30 MHz 1
Connecting
9. - As required
wires
CIRCUIT DIAGRAM:
Fig 6.1 Circuit diagram of RC phase shift oscillator

Fig 6.2 Circuit diagram of Wein Bridge oscillator

THEORY:
RC Phase shift oscillator:
The op-amp provides a phase shift of 180 degree as it is used in the inverting mode. An
additional phase shift of 180 degree is provided by the feedback RC network.The transfer
function of the RC network can be easily calculated as, For Avβ = 1, beta should be real, so
the imaginary term in equation (1) must be equal to zero. The frequency of the oscillation fo is
given by,The gain of the inverting op- amp should be at least 29 or Rf=29R1. The gain Av is
kept greater than 29 to ensure that variations in circuit parameter the oscillations will be die
out.
Wein Bridge Oscillator:
Another commonly used audio frequency oscillator is a Wein bridge oscillation. It

may be noted that the feedback signal in this circuit is connected to the positive input
terminal so that the op-amp is working as a non-inverting amplifier. The feedback
signal need not possible any phase shift.
The circuit can be viewed as a wein bridge with a series RC network in one arm and a
parallel RC network in one arm and a parallel RC network in the adjoining arm. Resistors R1
and Rf are connected in the remaining two arms. The condition of zero phase shift answered
the circuit is achieved by balancing the bridge. At fo is equal to 1/3. The amplifier must have a
gain of precisely 3. However from practical point of view, Av may be slightly less than or
greater than 3. In this circuit,that oscillations start. The output signal in amplitude until the

voltage across R3 approaches the cut in voltage of the diode. This will reduce the gain of the
amplifier.
PROCEDURE:
RC Phase shift oscillator:
 Set up the Phase shift oscillator with values obtained in the design.
 The output waveform is observed in CRO. Adjust the Rf to obtain a sine wave
output.
 Measure the frequency of oscillation and voltage amplitude.
Wein Bridge Oscillator:
 Set up the Phase shift oscillator with values obtained in the design.
 The output waveform is observed in CRO. Adjust the R f to obtain a sine wave
output.
 Measure the frequency of oscillation and voltage amplitude.
TABULATION:
RC phase shift oscillator:
S.No. R (K) C (f) Vo (V) Time (ms) Theoretical Practical

frequency frequency
(hz) (hz)
Wein Bridge oscillator:
S.No. R (K) C (f) Vo (V) Time (ms) Theoretical Practical

frequency frequency
(hz) (hz)

MODEL GRAPH:
Fig 6.3 Model Graph for RC phase shift oscillator:
Fig 6.4 Model Graph for Wein Bridge oscillator:

RESULT : From this experiment, we have constructed RC phase shift and Wein bridge
oscillator using op-amp and observed their performance.
VIVA QUESTIONS:
1. State the two conditions for oscillator.
2. What is barkhausen criterion?
3. What is damped oscillation?
4. What are the applications of wein bridge oscillator.
5. What is the formula for RC-phase shift oscillator?
6. What is the formula for Wein Bridge oscillator oscillator?

Ex.No. 7 ASTABLE, MONOSTABLE MULTIVIBRATORS USING NE555

TIMER
Date
AIM: To construct an Astable, Monostable multivibrators using NE555 timer

and observe their performance.
APPARATUS REQUIRED:
APPARATUS /
EQUIPMENT
1. IC741 - 1
2. Resistors 3.6KΩ,7.2kΩ,10KΩ, 1,1,1
3. Capacitors 0.1 μF,0.01μF 1,2
4. AFO 30 MHz 1
6. CRO 30 MHz 1
Connecting
7. - As required
wires
CIRCUIT DIAGRAM:
Fig 7.1 Circuit diagram of Astable multivibrator using 555 timer

Fig 7.2 Circuit diagram of Monostable multivibrator

THEORY:
Astable Multivibrator:
 The Astable multivibrator can produce a square wave outout simply by
connecting diode D across resistor RB.
 Capacitor C charges through diode and RA to approximately to 2/3 Vcc and
discharges through RB and terminal 7 untill the capacitor voltage equals
approximately 1/3 Vcc and then the cycle repeats.
 To obtain Square wave output RA is a combination opf fixed resistor and
potentiometer so that the potentiometer can be adjusted for exact square wave.
Monostable Multivibrator:
 The mono stable multivibrator often called as one shot multivibrator is a pulse
generating circuit in which the duration of the pulse is determined by the RC
network connected externally to 555 timer.
 In a stable (or) standby state, output of the circuit is approximately zero ()or_ a
logic low level.
 When the external trigger pulse is applied output is formed to go high.
 Output stays low until trigger pulse is again applied.
 Then the cycle repeats the monostable circuit has only one state. Hence it is
called so.

PROCEDURE:
Astable Multivibrator:

 The capacitor voltage waveform is observed and the frequency of the output
waveform is measured
Monostable Multivibrator:

 To plot the graph.
TABULATION:
Astable multivibrator:
S.No Vin(V) VO (V) Time (ms) Trigger Theoretical Practical

input frequency Frequency
(Hz) (Hz)
Monostable multivibrator:
S.No Vin(V) VO (V) Time (ms) Trigger Theoretical Practical

input frequency Frequency
(Hz) (Hz)

MODEL GRAPH:
Fig 7.3 Model Graph for Astable multivibrator:
Fig 7.4 Model Graph for Monostable multivibrator:
RESULT : Thus an Astable, Monostable multivibrators using NE555 timer its performance
is observed.
VIVA QUESTIONS:
1. What is the use of a monostable multivibrator using NE555?
2. What is the application of astable multivibrator?
3. What are the modes of operation of a timer?
4. Give some applications of timer in monostable mode.
5. How is an astable multivibrator connected to PPM?

Ex.No. 8
PLL CHARACTERISTICS AND FREQUENCY MULTIPLIER
Date
AIM: To find PLL characteristics and construct frequency multiplier.
APPARATUS REQUIRED:
APPARATUS /
EQUIPMENT
1. NE/SE 565 - 1
2. Resistors 10KΩ, 1
3. Capacitors 0.01μF,10μF 1,1
4. AFO 30 MHz 1
6. CRO 30 MHz 1
Connecting
7. - As required
wires
CIRCUIT DIAGRAM:
Fig 8.1 Circuit diagram of PLL using NE565

THEORY:
PLL:
A phase-locked loop or phase lock loop (PLL) is a control system that generates
an output signal whose phase is related to the phase of an input signal. While there are
several differing types, it is easy to initially visualize as an electronic circuit consisting of
a variable frequency oscillator and a phase detector.
The oscillator generates a periodic signal. The phase detector compares the
phase of that signal with the phase of the input periodic signal and adjusts the oscillator
to keep the phases matched. Bringing the output signal back toward the input signal for
comparison is called a feedback loop since the output is 'fed back' toward the input
forming a loop.
PROCEDURE:
PLL

 Apply input pin ‗IN‘ and get demodulated output at pin ‗OUT‘
 Enter the all value in table.
Frequency Multiplier:
 Apply input frequency and get output frequency.‘
 Enter the all value in table.
 Calculate the frequency by using formula and verify with practical value.
MODEL GRAPH:
Fig 8.2 Model Graph for PLL

RESULT : Thus we found PLL characteristics and constructed frequency multiplier using
PLL and observed their performances.
VIVA QUESTIONS:
1. State the various blocks included in PLL.
2. Define capture range.
3. What is a VCO?
4. Define Lock-in Range.
5. What is the function of a phase detector?

Ex.No. 9
DC POWER SUPPLY USING LM317 AND LM723
Date
AIM: To construct and test the regulator using IC LM 723 & LM 317.
APPARATUS REQUIRED:
APPARATUS /
EQUIPMENT
1. LM 723,LM 317 - Each one
2. Resistors 470Ω,450Ω,1KΩ 10KΩ, Each one
3. Capacitors 0.01μF,10μF 1,1
4. Transistor BC547 1
5. Diode IN4007 2
6. Voltmeter (0-30)v 1
7. Inductor Box - 1
9. CRO 30 MHz 1
CIRCUIT DIAGRAM:

Fig 8.1 Circuit diagram of DC power supply Using LM723
Fig 8.2 Circuit diagram of Dc power supply Using LM317
THEORY:
DC power supply
 Voltage regulator is a device which gives constant output voltage.

 Irrespective changes of the line voltage or supply voltage or load current.
 This is also known as general purpose voltage regulator.
 It is adjustable output voltage regulator, output voltage can be varied from
(2-37) v.
 Maximum input voltage is 40v.
 It can be used as a linear regulator or switching regulator.
PROCEDURE:
DC power supply

 Vary the feedback resistance (DRB) to boost or buck the output voltage.
 The output voltage is measured at pin2 of LM317 with respect to ground.

TABULATION:
Dc power supply (LM 723 & LM 317)
S.NO Input Voltage(Vin) VOLTAGE(Vo) in volts
1.
2.
3.
4.
5.
RESULT: Thus the power supply was constructed using LM317 and LM723.
VIVA QUESTIONS:
1. What are the advantages of LM723 general purpose regulators?

2. Discuss current limiting technique.
3. What is the disadvantage of LM723 regulators?
4. What is the function of a voltage regulator?
5. Discuss current foldback characteristics.

Ex.No. 10 STUDY OF SMPS CONTROL IC SG3524/SG3525
Date
AIM: To study the SMPS control using IC SG 3524.
DESCRIPTION:
This monolithic integrated circuit contains all the control circuitry for a regulating power
supply inverter or switching regulator. Included in a 16-pin dual-in-line package is the voltage
reference, error amplifier, oscillator, pulse-width modulator, pulse steering flip-flop, dual
alternating output switches and current-limiting and shut-down circuitry. This device can be
used for switching regulators of either polarity, transformer-coupled DC-to-DC converters,
transformer less voltage doublers and polarity converters, as well as other power control
applications. The SG3524 is designed for commercial applications of 0°C to +70°C.
Oscillator
The oscillator in the SG3524 uses an external resistor (RT) to establish a constant
charging current into an external capacitor (CT). While this uses more current than a series-
connected RC, it provides a linear ramp voltage on the capacitor which is also used as a

reference for the comparator. The charging current is equal to 3.6 V ÷ RT and should be kept
within the approximate range of 30Ma to 2mA; i.e., 1.8k<RT<100k. The range of values for CT
also has limits as the discharge time of CT determines the pulse-width of the oscillator output
pulse. This pulse is used (among other things) as a blanking pulse to both outputs to insure
that there is no possibility of having both outputs on simultaneously during transitions. This
output dead time relationship is shown in Figure. A pulse width below approximately 0.5ms
may allow false triggering of one output by removing the blanking pulse prior to the flip-flop‘s
reaching a stable state. If small values of CT must be used, the pulse-width may still be
expanded by adding a shunt capacitance (@100pF) to ground at the oscillator output. [(Note:
Although the oscillator output is a convenient oscilloscope sync input, the cable and input
capacitance may increase the blanking pulse-width slightly.)] Obviously, the upper limit to the
pulse width is determined by the maximum duty cycle acceptable. Practical values of CT fall
between 0.001 and 0.1 mF. The oscillator period is approximately t=RTCT where t is in
microseconds when RT=W and CT=mF. The use of Figure 6 will allow selection of RT and CT
for a wide range of operating frequencies. Note that for series regulator applications, the two
outputs can be connected in parallel for an effective 0-90% duty cycle and the frequency of the
oscillator is the frequency of the output. For push-pull applications, the outputs are separated
and the flip-flop divides the frequency such that each output‘s duty cycle is 0-45% and the
overall frequency is one-half that of the oscillator.
External Synchronization
If it is desired to synchronize the SG3524 to an external clock, a pulse of @+3V may be
applied to the oscillator output terminal with RTCT set slightly greater than the clock period.
The same considerations of pulse-width apply. The impedance to ground at this point is
approximately 2kW.If two or more SG3524s must be synchronized together, one must be
designated as master with its RTCT set for the correct period. The slaves should each have an
RTCT set for approximately 10% longer period than the master with the added requirement
that CT(slave)=one-half CT (master). Then connecting Pin 3 on all units together will insure
that the master output pulse—which occurs first and has a wider pulse width—will reset the
slave units

Error Amplifier
This circuit is a simple differential input transconductance amplifier. The output is the
compensation terminal, Pin 9, which is a high-impedance node (RL@ 5MW). The gain is AV _
gMRL _ 8 IC RL 2kT _ 0.002RL and can easily be reduced from a nominal of 10,000 by an
external shunt resistance from Pin 9 to ground, as shown in Figure 7. In addition to DC gain
control, the compensation terminal is also the place for AC phase compensation. The
frequency response curves of Figure 7 show the uncompensated amplifier with a single pole at
approximately 200Hz and a unity gain crossover at 5MHz. Typically, most output filter designs
will introduce one or more additional poles at a significantly lower frequency. Therefore, the
best stabilizing network is a series RC combination between Pin 9 and ground which
introduces a zero to cancel one of the output filterpoles. A good starting point is 50kW plus
0.001mF. One final point on the compensation terminal is that this is also a convenient place to
insert any programming signal which is to override the error amplifier. Internal shutdown and
current limit circuits are connected here, but any other circuit which can sink 200mA can pull
this point to ground, thus shutting off both outputs. While feedback is normally applied around
the entire regulator, the error amplifier can be used with conventional operational amplifier
feedback and is stable in either the inverting or non-inverting mode. Regardless of the
connections, however, input common-mode limits must be observed or output signal
inversions may result. For conventional regulator applications, the 5V reference voltage must
be divided down as shown in Figure 8. The error amplifier may also be used in fixed duty cycle
applications by using the unity gain configuration shown in the open-loop test circuit.
Current Limiting
The current limiting circuitry of the SG3524 is shown in Figure By matching the base-
emitter voltages of Q1 and Q2, and assuming a negligible voltage drop across R1:
Threshold=VBE(Q1)+I1R2-VBE(Q2) =I1R2 @ 200mV Although this circuit provides a relatively
small threshold with a negligible temperature coefficient, there are some limitations to its use,
the most important of which is the ±1V common-mode range which requires sensing in the
ground line. Another factor to consider is that the frequency compensation provided by R1C1
and Q1 provides a roll-off pole at approximately 300Hz. Since the gain of this circuit is
relatively low, there is a transition region as the current limit amplifier takes over pulse width
control from the error amplifier. For testing purposes, threshold is defined as the input voltage
required to get 25% duty cycle with the error amplifier signaling maximum duty cycle. In

addition to constant current limiting, Pins 4 and 5 may also be used in transformer-coupled
circuits to sense primary current and to shorten an output pulse, should transformer saturation
occur. Another application is to ground Pin 5 and use Pin 4 as an additional shutdown terminal:
i.e., the output will be off with Pin 4 open and on when it is grounded. Finally, foldback current
limiting can be provided with the network of Figure 10. This circuit can reduce the short-circuit
current (ISC) to approximately one-third the maximum available output current (IMAX).
RESULT: Thus the SMPS control using SG3524 was studied successfully.
VIVA QUESTIONS:
1. What is a switched mode power supply?
2. Discuss the limiting factor of 723 regulators.
3. What is the advantage of SMPS?
4. What is the disadvantage of SMPS?
5. What is the function of an error amplifier?

SIMULATION USING PSPICE
Ex.No. 11
INSTRUMENTATION AMPLIFIER
Date
AIM:To simulate instrumentation amplifier circuit using PSPICE circuit simulator and to verify
the corresponding graphs plotted.
SOFTWARE REQUIRED:
PSPICE students‘ version 9.1
PROCEDURE:
 Draw the schematic diagram in pspice schematic editor
 Go choose the icon ―set up -> analysis‖, for choosing proper analysis options.
 Now select the option ―DC sweep‖.
 Choose ―voltage source‖ and complete the remaining options like start value and end
value.
 Now choose the icon ―set up -> Examine netlist‖, and if the netlist has no errors, choose
the ―simulate‖ option which is under ―set up‖.
 The waveform will pop up after the simulation is done.
CIRCUIT DIAGRAM:
Fig 11.1 Circuit diagram of instrumentation amplifier

MODEL GRAPH:
Fig 11.2 Model Graph for Instrumentation Amplifier
RESULT: Thus the instrumentation amplifier circuit is simulated and the required graphs are
Plotted
VIVA QUESTIONS:
1. What are the features of instrumentation amplifier?
2. What are the applications of instrumentation amplifier?
3. What is an instrumentation amplifier?
4. Write the expression for output voltage.
5. What is the use of transducer in an instrumentation amplifier?

Ex.No. 12(a)
LOW PASS – SECOND ORDER FILTER
Date
AIM: To simulate low pass – second order filter circuit using PSPICE circuit simulator and to
verify its frequency response graph.
SOFTWARE REQUIRED:
PROCEDURE:
 Now select the option ―AC sweep‖.
 Choose ―Decade‖ for graph type and complete the remaining options like start
frequency and end frequency .
CIRCUIT DIAGRAM:
Fig 12.1(a) Circuit diagram of low pass – second order filter

MODEL GRAPH:
Fig 12.2(a) Model Graph for low pass – second order filter
RESULT: Thus the low pass – second order filter circuit is simulated and the required
frequency response graphs are plotted.
VIVA QUESTIONS:
1. What is an electric filter?

2. Classify filters.
3. What is a passive filter?
4. What is the roll off rate for second order low pass filter?
5. What is the function of a low pass filter?

Ex.No. 12(b)
HIGH PASS – SECOND ORDER FILTER
Date
AIM: To simulate high pass – second order filter circuit using PSPICE circuit simulator and to
SOFTWARE REQUIRED:
PROCEDURE:
 Draw the schematic diagram in pspice schematic editor Go choose the icon ―set up ->
analysis‖, for choosing proper analysis options.
frequency and end frequency.
CIRCUIT DIAGRAM:
Fig 12.1(b) Circuit diagram of High pass – second order filter

MODEL GRAPH:
Fig 12.2 (b) Model Graph for High pass – second order filter
RESULT: Thus the high pass – second order filter circuit is simulated and the required
frequency response graphs are plotted.
VIVA QUESTIONS:
1. How a low pass filter is converted into a HPF?

2. Write the transfer function for second order HPF.
3. What is the function of a HPF?
4. What is the roll off rate of a second order HPF?
5. How higher order filters are constructed?

Ex.No. 12(c)
BAND PASS – SECOND ORDER FILTER
Date
AIM: To simulate band pass – second order filter circuit using PSPICE circuit simulator and to
SOFTWARE REQUIRED:
PROCEDURE:
frequency and end frequency.
 Now choose the icon ―set up -> Examine netlist‖, and if the netlist has no errors,
choose the ―simulate‖ option which is under ―set up‖.
CIRCUIT DIAGRAM:
Fig 12.1(c) Circuit diagram of Band pass – second order filter

MODEL GRAPH:
Fig 12.2 (C) Model Graph for Band pass – second order filter
RESULT: Thus the band pass – second order filter circuit is simulated and the required
frequency response graphs are plotted
VIVA QUESTIONS:
1. What is a band pass filter?

2. Define pass band.
3. Define stop band.
4. What is a state variable filter?
5. What is the advantage of an active filter using OTA‘s?

Ex.No. 13(a)
ASTABLE MULTIVIBRATOR
Date
AIM: To simulate astable multivibrator circuit (opamp based) using PSPICE circuit simulator
and to verify the waveform
SOFTWARE REQUIRED:
PROCEDURE:

 Now select the option ―transient‖.
 Choose appropriate print step (eg: 10 ns) and final time.
 The waveform window will pop up after the simulation.
CIRCUIT DIAGRAM:
Fig 13.1(a) Circuit diagram of Astable multivibrator using opamp

MODEL GRAPH:
Fig 13.2 (a) Model Graph for Astable multivibrator using opamp
RESULT: Thus the Astable multivibrator circuit using op-amp is simulated and the required
waveforms are obtained.
VIVA QUESTIONS:
1. What is an astable multivibrator?

2. What is the use of astable multivibrator?
3. What is the significance of overshoot in astable multivibrator?
4. Explain the working of astable multivibrator.
5. What is the application of astable multivibrator?

Ex.No. 13(b) MONOSTABLE MULTIVIBRATOR
Date
AIM: To simulate Monostable multivibrator circuit (opamp based) using PSPICE circuit
simulator and to verify the waveform.
SOFTWARE REQUIRED:
PROCEDURE:

 Choose appropriate print step (eg:10 ns) and final time.
CIRCUIT DIAGRAM:
Fig 13.1(b) Circuit diagram of Monostable multivibrator using opamp

MODEL GRAPH:
Fig 13.2 (b) Model Graph for Astable multivibrator using opamp
RESULT: Thus the Monostable multivibrator circuit using op-amp is simulated and the required
VIVA QUESTIONS:
1. What are the functions of a monostable multivibrator?

2. State the applications of monostable multivibrator.
3. Why it is called one shot multivibrator?
4. How pulse is generated?
5. Describe the working of monostable multivibrator.

Ex.No. 13(C) SCHMITT TRIGGER
Date
AIM: To simulate Schimitt trigger circuit (op-amp based) using PSPICE circuit
SOFTWARE REQUIRED:
PROCEDURE:

CIRCUIT DIAGRAM:
Fig 13.1(c) Circuit diagram of Schmitt Trigger using opamp

MODEL GRAPH:
Fig 13.2 (c) Model Graph for Schmitt Trigger using opamp
RESULT: Thus the Schmitt Trigger circuit using op-amp is simulated and the required
VIVA QUESTIONS:
1. What is hysteresis?
2. What parameters determine hysteresis?
3. Explain the working of schmitt trigger
4. What are applications of a schmitt trigger?
5. Why Schmitt trigger is called regenerative comparator?

Ex.No. 14(a) RC PHASE SHIFT OSCILLATOR
Date
AIM: To simulate the RC phase shift oscillator using PSPICE circuit simulator and to verify the
waveform.
SOFTWARE REQUIRED:
PROCEDURE:

CIRCUIT DIAGRAM:
Fig 14.1(a) Circuit diagram of RC phase shift oscillator using opamp

MODEL GRAPH:
Fig 14.2 (a) Model Graph for RC phase shift oscillator using opamp
RESULT: Thus the RC phase shift oscillator circuit using op-amp is simulated and the required
VIVA QUESTIONS:
1. Classify oscillators.
2. State the conditions for oscillator.
3. What is barkhausen criterion?
5. What are the applications of RC phase shift oscillator.?

Ex.No. 14(b) WIEN BRIDGE OSCILLATOR
Date
AIM: To simulate the wien bridge oscillator using PSPICE circuit simulator and to verify the
waveform.
SOFTWARE REQUIRED:
PROCEDURE:

CIRCUIT DIAGRAM:
Fig 14.1(b) Circuit diagram of wien bridge oscillator using opamp

MODEL GRAPH:
Fig 14.2 (b) Model Graph for wien bridge oscillator using opamp
RESULT: Thus the wein bridge oscillator circuit using op-amp is simulated and the required
VIVA QUESTIONS:
1. Classify oscillators.
2. What are the types of active filters?
3. What are the applications of filters?
5. What are the applications of wein bridge oscillator.?

Ex.No. 15(a)
ASTABLE MULTIVIBRATOR USING 555 TIMER
Date
AIM: To simulate the Astable multivibrator (555 timer based) using PSPICE circuit simulator
and to verify the waveform.
SOFTWARE REQUIRED:
PROCEDURE:

CIRCUIT DIAGRAM:
Fig 15.1(a) Circuit diagram of Astable multivibrator circuit using 555 timer

MODEL GRAPH:
Fig 15.2 (a) Model Graph for Astable multivibrator circuit using 555 timer
RESULT: Thus the Astable multivibrator circuit using 555 timer is simulated and the required
VIVA QUESTIONS:
1. What is the application of astable multivibrator.

2. What are the modes of operation of a timer?
3. How is an astable multivibrator connected to PPM?
4. Give the applications of 555-timer Astable multivibrator
5. Explain the operation of astable multivibrator.

Ex.No. 15(b)
MONOSTABLE MULTIVIBRATOR USING 555 TIMER
Date
AIM: To simulate the Monostable multivibrator (555 timer based) using PSPICE circuit
SOFTWARE REQUIRED:
PROCEDURE:

CIRCUIT DIAGRAM:
Fig 15.1(b) Circuit diagram of Monostable multivibrator circuit using 555 timer

MODEL GRAPH:
Fig 15.2 (b) Model Graph for Monostable multivibrator circuit using 555 timer
RESULT: Thus the Monostable multivibrator circuit using 555 timer is simulated and the
required waveforms are obtained.
Viva questions:
1. Give some applications of timer in monostable mode.

2. What is quasi stable state?
3. List the applications of monostable mode of 555 timer
4. What is the advantage of 555 IC over op amp?
5. Explain the operation of the monostable multivibrator.

Ex.No. 16
D/A AND A/D CONVERTERS
Date
AIM: To simulate the DAC and ADC circuit using PSPICE simulator circuit and to verify the
waveform.
SOFTWARE REQUIRED:
PROCEDURE:

CIRCUIT DIAGRAM:
Fig 16.1 Circuit diagram of D/A Converters

MODEL GRAPH:
Fig 16.2 Model Graph for D/A Converters
CIRCUIT DIAGRAM:
Fig 16.3 Circuit diagram of A/D Converters

MODEL GRAPH:
Fig 16.4 Model Graph for A/D Converters
RESULT: Thus the DAC AND ADC is simulated and the required waveforms are obtained.
Viva questions:
1. Name the essential parts of a DAC.

2. How many resistors are required in a 12 bit weighted resistors DAC?
3. List the various analog to digital conversion techniques.
4. Which is the fastest ADC and why?
5. What is conversion time in ADC?

Ex.No. 17
ANALOG MULTIPLIER
Date
AIM: To simulate the analog multiplier circuit using PSPICE simulator circuit and to verify the
waveform.
SOFTWARE REQUIRED:
PROCEDURE:

 choose the ―simulate‖ option which is under ―set up‖.
 The waveform window will pop up after the simulation
CIRCUIT DIAGRAM:
Q4
Q2N3904
R14
100
+15V
7
R17 U3
3 5
V+
Vin1 V1 + OS2 R8 R9
1k
6
S R11 OUT
1k 1k
2 1 R7
V-
- OS1
1k
uA741
1k
-15V +15V
4
U6
3 5 +15V
V+
Q7
4
+ OS2 uA741
Q5
uA741 6 2 1
V-
Q2N3904 OUT - OS1

2 1 6
V-
- OS1 OUT Vout

R15 Q2N3906 3 5
V+
VCC 100 -15V + OS2

4
7
R6 U4 U5
3 5 R16 R13 -15V
7
V+
Vin2 + OS2 R10 909 1k

1k
V2 6
S R12 OUT
1k
2 1
V-
- OS1
1k
uA741
-15V
4
Fig 17.1 Circuit diagram of analog multiplier

MODEL GRAPH:
Fig 17.2 Model Graph for Analog Multiplier
RESULT: Thus the analog multiplier is simulated and the required waveforms are obtained.
VIVA QUESTIONS:
1. What is a four-quadrant multiplier?

2. What is a two quadrant multiplier?
3. What are applications of multiplier?
4. What are the types?
5. Mention the uses of multiplier.

Ex.No. 18(a)
CMOS INVERTER
Date
AIM: To simulate CMOS inverter circuit using PSPICE circuit simulator and to
verify its output.
SOFTWARE REQUIRED:
PROCEDURE:
 Set up the CMOS inverter above using the appropriate SPICE model (see page 1).
 Perform a DC sweep of the input voltage from 0V to 5V, at 0.25V increments.
 Record the output values (Vo) when the input is 0V, 2.5V and 5V.
 Using the plot functions, plot Vo (y-axis) vs. Vi (x-axis). Label the axes scales and units.
Identify when the MOS is in cutoff, linear, and saturation regions.
 Using the plot functions, plot ID (y-axis) vs. Vi (x-axis). Label the axes scales and units.
Measurement Procedure:
For this experiment use the CMOS inverter that is attached to pins 9 through 12.
Assemble the circuit on the prototype-board. As in experiment 1, set up the function generator
to produce a triangular wave with a peak-to-peak amplitude of 5 V and a DC offset of 2.5 V.
Apply this signal to the input of the gate. Attach scope channel A to the input and scope
channel B to the output. Set the scope display to XY mode. You should see the transfer
characteristics of the inverter circuit on the scope display.
Make a hard copy of the transfer function Vo (y-axis) vs. Vi (x-axis) and on the hard
copy, draw Vi and Vo axes and label and mark the voltage scales. Identify regions in which
NMOS and PMOS are in cut-off, linear, and saturation regions.

CIRCUIT DIAGRAM:
Fig 18.1(a) Circuit diagram of CMOS Inverter
TRUTH TABLE:
A Q
0 1
1 0
MODEL GRAPH:

Fig 18.2 (a) Model Graph for CMOS Inverter
RESULT: Thus the CMOS inverter circuit is simulated and the required output is verified.
VIVA QUESTIONS:
1. What is a CMOS inverter?
2. What are uses of CMOS inverter?
3. Mention the applications of CMOS inverter
4. Write the truth table .
5. Draw the circuit diagram of CMOS inverter

Ex.No. 18(b)
CMOS NOR
Date
AIM: To simulate CMOS NOR circuit using PSPICE circuit simulator and to verify its output.
SOFTWARE REQUIRED:
PROCEDURE:
 Perform a transient response simulation. You can demonstrate NOR operation but sending
two square waves. Send one square wave (using VPULSE) to Input A with period T. Send
another one to Input B with period 2*T. Based on the simulation results, show how the
circuit corresponds to the NOR operation using a truth table.
 For this experiment use the CMOS inverter that is attached to pins 9 through 12 and
MOS transistors with the gate connected to pin 6. Draw the circuit diagram NOR gate in
your lab report and identify chip pins on the circuit diagram and explain which pins
should be connected together. Wire your chip to make a two-input NOR gate. Test your
NOR gate with attaching a 1 kHz square wave (0-5 V) to pin 6 and a DC voltage of
either zero or 5 V to pin 10. In each case, attach the waveform to the lab report.
Describe the output waveform in each case and explain how it corresponds to the NOR
of the two inputs, using a truth table format.
 Draw the circuit diagram (provided above as an example). Identify and explain how you
connected the pins (you can do this by writing now the pin number next to the gate, source,
and drain of the FETs on the circuit diagram).
 Wire your chip to make a two-input NOR gate.
 Test your NOR gate with attaching a 1 kHz square wave (0-5 V) to pin 6 and a DC voltage
of case(a) 0V and case(b) 5 V to pin 10. In each case, attached the hardcopies of input and
output waveform to the lab report.
 Describe how the output waveform corresponds to NOR gate operation, using a truth table.

CIRCUIT DIAGRAM:
Fig 18.1(b) Circuit diagram of CMOS NOR
TRUTH TABLE:
B A Q
0 0 1
0 1 0
1 0 0
1 1 0
RESULT: Thus the CMOS NOR circuit is simulated and the required output is verified.
VIVA QUESTIONS:
1. What is a CMOS NOR gate?
2. What are uses of CMOS NOR gate?
3. Mention the applications of CMOS NOR gate.
4. Write the truth table.
5. Draw the circuit diagram of CMOS NOR gate.

Ex.No. 18(c)
CMOS NAND
Date
AIM: To simulate CMOS NAND circuit using PSPICE circuit simulator and to verify its
frequency response graph.
SOFTWARE REQUIRED:
PROCEDURE:
 Perform a transient response simulation. You can demonstrate NAND operation but
sending two square waves. Send one square wave (using VPULSE) to Input A with period
T. Send another one to Input B with period 2*T. Based on the simulation results, show how
the circuit corresponds to the NAND operation using a truth table.
 For this experiment use the CMOS inverter that is attached to pins 9 through 12 and
MOS transistors with the gate connected to pin 6. Draw the circuit diagram NAND gate
in your lab report and identify chip pins on the circuit diagram and explain which pins
should be connected together. Wire your chip to make a two-input NAND gate. Test
your NAND gate with attaching a 1 kHz square wave (0-5 V) to pin 6 and a DC voltage
of either zero or 5 V to pin 10. In each case, attach the waveform to the lab report.
Describe the output waveform in each case and explain how it corresponds to the
NAND of the two inputs, using a truth table format.
 Draw the circuit diagram (no figure provided – for the student to figure out). Identify and
explain how you connected the pins (you can do this by writing now the pin number next
to the gate, source, and drain of the FETs on the circuit diagram).
 Wire your chip to make a two-input NAND gate.
 Test your NAND gate with attaching a 1 kHz square wave (0-5 V) to pin 6 and a DC
voltage of case(a) 0V and case(b) 5 V to pin 10. In each case, attached the hardcopies
of input and output waveform to the lab report.
 Describe how the output waveform corresponds to NAND gate operation, using a truth
table.

CIRCUIT DIAGRAM:
Fig 18.1(C) Circuit diagram of CMOS NAND
TRUTH TABLE:
B A Q
0 0 1
0 1 1
1 0 1
1 1 0

RESULT: Thus the CMOS NAND circuit is simulated and the required Output is verified.
VIVA QUESTIONS:
1. What is the function of a CMOS NAND gate?
2. What are the uses of CMOS NAND gate?
3. Mention the applications of CMOS NAND gate.
4. Write the truth table. .
5. Draw the circuit diagram of CMOS NAND gate.

Lic Lab Manual

Încărcat de

Informații document

Titlu original

Drepturi de autor

Formate disponibile

Partajați acest document

Partajați sau inserați document

Opțiuni de partajare

Vi se pare util acest document?

Este necorespunzător acest conținut?

Drepturi de autor:

Formate disponibile

Lic Lab Manual

Încărcat de

Drepturi de autor:

Formate disponibile

SRV ENGINEERING COLLEGE B.E.

ELECTRONICS AND COMMUNICATION ENGINEERING

SEMBODAI RUKMANI VARATHARAJAN ENGINEERING

EC6412 LINEAR INTEGRATED CIRCUITS

Prepared By, Approved By,

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

1. Inverting, Noninverting & Differntial Amplifier.

Simulation Using Pspice

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

2. Integrator And Differentiator

18. Analog Multipliers.

19. CMOS inverter, NAND and NOR.

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

Ex.No. 1 INVERTING, NONINVERTING & DIFFERNTIAL AMPLIFIER

AIM: To construct an Inverting, Non-inverting and Differential amplifier using Operational

S.No. APPARATUS / EQUIPMENT RANGE QUANTITY

Fig 1.1 Circuit diagram of Inverting Amplifier

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

Fig 1.2 Circuit diagram of Non-Inverting Amplifier

Fig 1.3 Circuit diagram of Differential Amplifier

NON INVERTING AMPLIFIER:

 It may be noted that it is also a negative feedback system as output is being

 In an ideal differential amplifier, the output voltage V o is proportional to the

 Hence we can write, V0 = (V1 - V2).

NON INVERTING AMPLIFIER:

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

S.No. Rf  R2  Vin (v) Time Vo (v) Time Vo (v)

S.NO: V1 V2 V0 (Volts) gain

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

Fig 1.4 Model Graph for Inverting Amplifier:

Fig 1.5 Model Graph for Non-Inverting Amplifier:

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

Fig 1.6 Model Graph for Differential Amplifier:

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

Ex.No. 2 INTEGRATOR AND DIFFERENTIATOR

Fig 2.1 circuit diagram of INTEGRATOR

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

Fig 2.2 Circuit diagram of DIFFERENTIATOR

 Connections are made as per the circuit diagram.

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

 Connections are made as per the circuit diagram.

S.No. Input Output

Vo (v) Time Vo (v) Time

S.No. Input Output

Vo (v) Time Vo (v) Time

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

Fig 2.3 Model Graph for Integrator:

Fig 2.4 Model Graph for Differentiator:

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

Ex.No. 3 INSTRUMENTATION AMPLIFIER

AIM: To construct an instrumentation amplifier circuit in order to amplify the AC signal.

S.No. APPARATUS / EQUIPMENT RANGE QUANTITY

Fig 3.1 circuit diagram of Instrumentation Amplifier

EC6412 LINEAR INTEGRATED CIRCUITS /V.G.RAJARAMYA/AP/ECE/SRVEC

 The electromechanical output device requires power, which typically ranges

 In many applications the measuring circuit cannot supply the power

 The instrumentation amplifiers in such cases are required to supply the

 The connections are given as per the circuit diagram.

 Switch on the power supply.

 The input voltages V1 & V2 are noted for given circuit.

 The gain is calculated theoretically for the resistance values.

 Corresponding Vo voltage are Observed.