Power Electronics Lab (EE 452L/552L)

Duration: 2 weeks – Lab Sessions 05 and 06

Experiment # 3

Design and analysis of Buck converter:

Objective:

To study the characteristics of buck converter and understand the components used to model its behavior.

Equipment and Components:

 Oscilloscope
 Function Generator
 Power Supply
 Power Diode
 Power MOSFETs
 Inductor
 Capacitor
 Resistor

Background:
A buck converter is a switching converter that steps down an input DC voltage to a DC voltage at the output. Its design consists
of a SPDT switch that can be realized with two electronic switches (a transistor and a diode). Voltage regulation and harmonics
reduction is achieved by a lossless low pass filter consisting of an inductor and a capacitor.

Buck converter can have a high conversion efficiency (>95%) and is preferred over active voltage regulator ICs like LM317 or
LM7805 which have high power dissipation. The switching converters can operate in continuous or discontinuous mode
depending on whether one or more energy storage elements in the circuit lose their energy completely during the switching
cycle.

Continuous mode
A buck converter operates in continuous mode if the current through the inductor (IL) never falls to zero during the
commutation cycle. In this mode, the operating principle is described by the chronogram in figure below:
  When the switch pictured above is closed (state1 of figure below), the voltage across the inductor is V L=Vi-Vo. The
current through the inductor rises linearly. As the diode is reverse-biased by the voltage source V, no current flows
through it;

 When the switch is opened (state2 of figure below), the diode is forward biased. The voltage across the inductor is
VL=-Vo (neglecting diode drop). Current IL decreases.

The energy stored in inductor L is E=0.5LI L2 and the energy stored in L increases during On-time (as I L increases) and then
decreases during the Off-state. L is used to transfer energy from the input to the output of the converter. From the circuit,
ton=DT and toff=(1–D)T. D is the duty cycle with a value between 0 and 1. If we assume that the converter operates in steady
state, the energy stored in each component at the end of a commutation cycle T s is equal to that at the beginning of the cycle.
That means that the current IL is the same at t=0 and at t=T s. It is worth noting that the above integrations can be done
graphically: As these surfaces are simple rectangles, their areas can be found easily: (Vi–Vo)ton for the yellow rectangle and –
Votoff for the orange one. For steady state operation, these areas must be equal. Applying Volt-second balance yields:
V i−V o Vo
t on− t off =0  M=Vo/Vi=D.
L L
From this equation, it can be seen that the output voltage of the converter varies linearly with the duty cycle for a given input
voltage. As the duty cycle D is ≤ 1, Vo ≤ Vi. This is why this converter is referred to as step-down converter.
The rate of change of IL can be calculated from: V L=L dIL/dt. With VL=Vi-Vo during the On-state and to V L= -Vo during the Off-
state. Therefore, the increase in current during the On-state is given by:

t on
VL (V −V o )
2 ∆ i Lon =∫ dt = i t on, ton = DTs  ΔIL = Vi(1-D)DTs/2L
0
L L

Identically, the decrease in current during the Off-state is given by:

T=t on +toff
VL −V o
2 ∆ i Loff = ∫ dt= t , toff = (1–D)T
t on
L L off

This equation can be used for design of the inductor value for a desired reduction in Inductor current ripple.
For calculation of capacitance, we need to compute the ripple in output voltage. This is done by computing the variation in
capacitor voltage by the inductor ripple current. Capacitor is charged for the time inductor current is above the dc value of I L
and discharged when inductor current is below the dc value. If we assume linear charging of inductor current (small ripple
approximation), the time of charging comes out to Ts/2. This yields the following result for output voltage ripple:
0.5ΔiL (Ts/2) = C (2Δvo)  Δvo=ΔiLTs/8C and this can be used to find the value of capacitor for a desired ripple.

Discontinuous Mode:
If the load resistance connected at the output of the converter is increased, the dc value of output current (and hence the
inductor current) decreases but the inductor current ripple remains the same as it does not depend on the load. If the
requirement of the load current decreases below a critical value, the converter goes into discontinuous conduction mode. In
the discontinuous conduction mode, the energy transfer element (inductor in the case of buck converter) turns off for part of
the total cycle. This results in three distinct regions of operation as depicted below:
At the boundary of CCM and DCM, dc value of inductor current is equal to the ripple current. Thus the converter operates in
CCM for DVi/R > Vi(1-D)DTs/2L  R < 2L/Ts(1-D). By employing the volt-second balance and small ripple approximation for
capacitor voltage, it can be shown that the conversion ratio for DCM is modified to:

Vo 2
=  For the same duty cycle, the output voltage is larger than the CCM operation.
V i 1+ √1+4 K / D 21

Inductor and Capacitor Parasitics:

Equivalent Series Resistance (ESR) of both the Inductor and Capacitor can have an effect on the output of the converter.
Inductor ESR can affect the efficiency of the converter while the capacitor ESR affects the output voltage ripple limiting the
minimum ripple that can be achieved.

Practical inductors exhibit power loss of two types: (1) copper loss, originating in the resistance of the wire, and (2) core loss,
due to hysteresis and eddy current losses in the magnetic core. A suitable model that describes the inductor copper loss
includes a resistor, rL, in series with the inductor. The actual inductor then consists of an ideal inductor, L, in series with the
copper loss resistor called the Equivalent Series Resistance (ESR). The Buck converter can now be analyzed in the same manner
as used for the ideal lossless converter, using the principles of inductor volt-second balance, capacitor charge balance, and the
small-ripple approximation. The voltage conversion ratio now comes out to be M = Vo/Vi = DR/(R+rL); where R is the effective
Load Resistance.

A more realistic model of a capacitor than just a capacitance C, consists of a series connection of capacitance C and resistance
rC. The resistance rC is called an equivalent series resistance (ESR) of the capacitor and is due to losses in the dielectric and
physical resistance of leads and connections. The value of filter capacitance in a buck converter is determined by the peak-to-
peak output voltage ripple. The equation was derived under an assumption that the entire triangular ac component of the
inductor current flows through a capacitance C. It is, however, closer to reality to maintain that this triangular component flows
through a series connection of capacitance C and resistance r C. The voltage ripple across the output capacitor is the sum of
ripple voltages due to the Effective Series resistance (ESR), the voltage drop due to the load current that must be supplied by
the capacitor as the inductor is discharged, and the voltage ripple due to the capacitor’s Effect Series Inductance”. We will
ignore the effect of ESL in this experiment. As switching frequencies increase, the ESL specification will become more important.
The peak-to-peak ripple voltage is independent of the voltage across the filter capacitor and is determined only by the ripple
voltage of the ESR if the following condition is satisfied:
C ≥ Cmin = max {(1–Dmin)/2rCf, Dmax/2rCf}  Vripple = rC ΔiLmax = rCVo(1–Dmin)/fsL

The ESR dominates voltage ripple and the output capacitor selection. When ESR requirement is met, the capacitor’s capacitance
is usually adequate. Estimate of maximum ESR an application can tolerate is determined by the output voltage ripple
requirements. Rarely is the capacitor’s capacitance value an issue when operating at moderate frequencies. (> 100 KHz). Exotic
capacitors such as specialty electrolytic, large ceramics, or film capacitors are useful in space limited applications. These
advanced capacitors feature extremely low ESR for their small size, BUT, their small size implies a very limited capacitance. The
limited capacitance of advanced capacitors may create issues with system stability and voltage “droop”.

Simulation and Experiment

Buck Converter Design Specifications:
Vin = 24 V
Vout = 10 – 15 volts (variable)
Pout = 2 Watts
fs = 20 kHz
Inductor current Ripple: ≤20%
Output voltage ripple: <5%
Schematic:

Steps to follow:
1. Calculate the required value of inductor and capacitor assuming operation in CCM
2. Select the diode and MOSFET
3. Calculate the converter Efficiency
4. Examine the working of the designed Buck Converter in CCM and DCM
5. Observe the effect of ESR on operation of the converter in terms of efficiency and ripple content
6. Validate the design and compare the measured values against expected values

Calculate Inductance and Capacitance:

Starting with the relationship for inductor current ripple and capacitor voltage ripple, establish the condition for maximum
ripple based on design specifications of your converter. Outline the design process and state the values obtained in your lab
journal. You may ignore the effect of ESR in this part.
For performance of this experiment, you will need to wind your own inductor using ferrite cores available in the lab.

Diode and MOSFET Selection:

Estimate the maximum current flowing through the devices and maximum voltage blocking capability required. Maintain a
design cushion of 50% on these values to allow for current and voltage spikes in the converter. From the specifications of the
selected devices, establish the on-state and switching losses of these devices and note them in your lab journal. For switching of
the MOSFET, you may use an isolated function generator connected between gate and source for this experiment. For those
who are more adventurous, may want to use a gate drive IC in this experiment to drive the MOSFET.

Converter Efficiency
Compute the efficiency of the converter at 10V output and full load by taking into account the following parameters:
1. Output Power
2. Input Power
3. Switch losses (MOSFET and Diode)
4. Inductor and Capacitor Loss (When ESR is taken into account)
You may find that the losses in diode represent a significant component of the total losses. These can be reduced by using a
controlled switch instead of diode and the resulting circuit is called “Synchronous Converter”.

CCM and DCM mode of Operation:

Increase the value of load resistance to determine the boundary of CCM and DCM. Compare it with the expected value as per
design of the circuit.
Increase the load resistance further and note the effect on conversion ratio when the converter operates in DCM.
Compare the efficiency of the converter in DCM to CCM

Effect of ESR on Operation of Converter:

Include a series resistance of suitable value with the inductor and capacitor to observe the effect on conversion ratio and ripple
for different duty cycles and the effect on efficiency of the converter as stated above.
To gain insight, try at-least two different values for capacitor ESR when observing the effect on output voltage.
With ESR dominating in the circuit, increasing the value of capacitance should not alter the output voltage ripple. You may want
to investigate the effect of decreasing the inductor ripple current on the value of output ripple voltage with ESR included.