Introducing

Introducing Samsung
Samsung DVD
DVD Recorder
Recorder
(( DVD-R128_R129
DVD-R128_R129 ))

Samsung Electronics Co. LTD

Digital Video Division
1. What is SEC’s DVD-R128_R129?

Digital
DigitalA/V
A/Vsystem
systemfor forvideo
videoplaying
playing&&recording
recording
using
usingoptical
opticaldisc
discas
asthe
themedium
mediumformat
format

High-quality Recording Optical Medium Recording

Digital recording by an optical
High picture and sound quality
medium format allows random
recording capability comparing
access capability and easy &
with analog medium recording
convenient recording
systems

2
 2. Samsung DVD Recorder
 General Introduction

❏ Model No : DVD-R128_R129
❏ Market Introduction Date
: Feb 2006 (Europe)

 Characteristics

1. Super picture & sound quality recording with MPEG-2(VBR)

2. Convenient control through random accessibility of optical discs

- One touch recording : Automatic empty area recording
- Program Navigation
- High Speed Search and Play

3. Advanced playback functions for multiple purposes

(Compatible with DVD, Audio-CD, CD-R/RW(MP-3), DVD-R, DVD-RW,DVD-RAM Disc)

3
3. DVD-R128_R129 Playback & other Features

■ Progressive Scan
By scanning all 480 lines in one pass,
progressive scanning provides high vertical
resolution and flicker-free, high-density image
output that does not suffer from the loss of
quality during subject movement -- which is
characteristic of the conventional interlaced
scanning method. (U.S. version Only) 30 Frame/Sec 60 Frame/Sec

■ Program Navigator

Recorded programs are shown as thumbnail pictures, and information

such as title, recording dates and times are displayed on menu screen.
User can choose a desired program.
■ Editing
Simple non-linear editing is possible on menu screen without additional editing
system. User can delete part of a program or entire program, and edit program title.
4
■ Product Specification
■ Chassis Product Specification
4. Disassembly and Reassembly
5. Specifications
6. DVD-R120 Key Features
 Recording Features
■ MPEG-2 VBR(Variable Bit Rate) Recording
■ Creating a DVD video title using DVD-RW/DVD-R
■ One-Touch Recording
■ Automated Quality Adjustment for Timer Recording
■ Copying data from a digital camcorder using a DV input jack
■ Selectable Recording Mode
■ Quick Recording
 Playing Features

■ Progressive Scan
■ Program Navigation

 Other Features
■ Easy Editing
■ Aut o Chapt er i ng 16
7. BLOCK DIAGRAM & CIRCUITS EXPLANATION
7- 1. S5L3200 H/ W
I nt er f ace
■ HOST Interface
■ Per i pher al / St or age
I nt er f ace
■ ATAPI Cont r ol l er
■ I EEE 1394 I nt er f ace
■ Vi deo I nt er f ace
■ Audi o I nt er f ace
■ SDRAM I nt er f ace
■ Ser i al I / O I nt er f ace
■ UART I nt er f ace
7- 2. Fr ont - Mi com I nt er f ace

• Front- Micom MN101D10F(IC601, Panasonic)is used to

control Power, LED Module, MTS Block, EDS, KEY Input
Matrix etc.
• The SPI(Serial Peripheral Interface) port provides a bus for
a serial interface with AV- CODEC
S5L3200(DIC1)
 7- 3. Video Input Outline
• DVD-R130 is the two AV Video input. AV 1 Video input is CVBS1 & S-Video1 at
the Rear Panel. AV 2 Video input is CVBS2 at the Front Panel.
The analog Video signal select AV 1 or AV 2 by the IC601 (Front Micom).
VIC1 (Video Decoder) diverges from the 27MHz crystal, then generates ITU-
R656 (10bits) and 27MHz clock.
VIC1 (Video Decoder) does closed caption, copy guard detect processing and
A/D conversion of analog Video signal converted into 11bit Digital Video
signal (ITU-R656 Format) is outputted via U1 (MPEG2 Decoder & Encoder with
video Encoder) of digital part.
7- 4. Anal og MUX( MM1113)

 IC702 is Analog Mux.

 As Pin 2, 4 of the IC702 are controlled by the Front Micom,
IC702 select RF OF CVBS(Pin1) AV1 of CVBS[Pin3] and AV2 of
CVBS [Pin 5]
 The analog Video Signal of IC201 output is selected by the
ic601 via VIC1(Video Decoder : TW9906) of analog Video Input
parts.
 7- 5. NTSC/ PAL Vi deo DECODER
 The VIC1 (Video Decoder : TW9906) device is a high quality, single-chip digital
video decoder that digitizes and decodes all popular baseband analog video
formats into digital component video. The VIC1 (Video Decoder :TW9906)
supports the analog-to-digital (A/D) conversion of component RGB and YPbPr
signals, as well as the A/D conversion and decoding of NTSC, PAL and SECAM
composite and S-video into component YCbCr.
 This VIC1 (Video Decoder : TW9906) includes four 10-bit 30-MSPS A/D
converters. and A/D conversion of 10bit analog Video signal converted into
Digital Video signal (ITU-R656 Format) is outputted via DIC1 (MPEG2 Decoder
& Encoder with video Encoder) of digital part.
 The following output formats supply 10-bit 4:2:2 YCbCr to the DIC1 (MPEG2
Decoder & Encoder with video Encoder) of digital part.
 On CVBS and S-video inputs, the user can control video characteristics such as
contrast, Brightness, saturation, and hue via an I2C U1 port [PIN V17, V18]
interface.
 The TW9906 decoder includes methods for advanced vertical blanking interval
(VBI) data retrieval. The VBI data processor (VDP) slices, parses, and performs
error checking on teletext, closed caption (CC), Copy Guard Detect Processing
and other VBI data.
 7- 6. Vi deo Out put I nt er f ace
 DIC1 (MPEG2 Decoder & Encoder with video Encoder) diverges
from the 13.5MHz crystal, then generates VSYNC and HSYNC.
 DIC1 (MPEG2 Decoder & Encoder with video Encoder) does RGB
encoding, copy guard processing and D/A conversion of 10bit
Video signal converted into analog signal is outputted via amplifer
of analog part.
7- 7. NTSC/ PAL Di gi t al encoder
 DIC1 inputted from pin E1 with 13.5MHz generates HSYNC and
VSYNC which are based on video signal. DIC1 is synchronous
signals with decoded video signal.
 The above signals, which are CVBS (Composite Video Burst
Synchronized), Y(S_Video), C(S_Video), Y(Component)/G(Green),
Cr(component)/R(Red), Cb(component)/B(Blue), are selectively
outputted 480i (interlaced Video Output), 480P(progressive
Video Output) by the Pront button DIC1 adopts 10bit D/A
converter.
 DIC1 perform video en-coding as well as copy protection.
7- 8. AMP ( MM1692)
 VIC1 is 6dB amplifier.

 Based on CVBS signal, the final output level must be 2Vpp without 75 ohm
terminal resistance. Because the level of video encoder output is only 1Vpp,
the level is adjusted with the special amplifier.

 When mute of pin 5 is high active, if the pin is floating and connect
to power, the output signal is never outputted.

 Y, C, Y(R), Cb(B), Cr(R) outputted from video encoder are inputted to

VIC1 [Pin14, 16, 13, 12, 11] respectively. And CVBS Output[Pin 15]
is made by Y & C Mixing signal.

 The signal to which gain is adjusted by amplifier is outputted from

jack via 75ohm Resistance (VDR1,2,4,5,6,).
 7- 9. AUDI O
1. I nput bl ock
This Model has two stereo line input terminals. and internal TV-audio
from RF Tuner Block.
These three Analog audio signal source are converted to digital data by
Input Block.
Input Block has a Multiplexer (IC203), A/D converter (AIC2).
IC203 change it’s output by selection control signal from IC601 (Front
Micom).

2. Out put Bl ock

DVD-R130 has two stereo analog line out terminal, and two digital
output terminal.
Decoded signal by DIC1 is inputted to AIC1 (D/A Converter), then
filtered and amplified by AIC4 (OP-Amp).
And the digital audio signal (IEC-958) is outputted in Optical/Coaxial
(S/PDIF) terminal..
<Bl ock di agr am>
 7- 10. St er eo/ Bi l i ngual ( MTS)
 s ummar y

1) MTS SIGNAL : mono(L+R),STEREO(L,R),MONO+SAP,STEREO+SAP

2) SAP : Sub Audio Program Signal (american MTS system only)

< MTS s ys t em bas e- band s pect r um >

(KHz) A M- D B S - S C
50

L- R
주 db x- TV
파 NR
수 25 Sub Audio Prog ram S ig na l
편 ↓
이 15 FM
L+ R P ilo t S AP
50~ 15KHz ↙ db x- TV N R Telem etry S ig na l
5 FM 10 KHz ↓
3 50~ 10KHz

0 fh 2fh 3fh 4fh 5fh 6fh 6.5fh

< MTS s i gnal t abl e >

i tem Si gnal Maxi mum Audi o

Si gnal Pr oces s i ng Sys t em
signal f r eq. Band Car r i er dev( KHz)
Monaural Si gnal
50Hz~15KHz 25
( L +R)

Stereo Pi l ot 15. 734 KHz Onl y St er eo Br oadcas t i ng 5

Stereo Si gnal AM modul at i on( Car r i er f r equency 2f h)

50Hz~15KHz 50
( L- R) dbx Noi s e Reduct i on pr oces s i ng
FM modul at i on( Car r i er f r equency 5f h)
SAP Si gnal 50Hz~10KHz Maxi mum f r equency devi at i on 10KHz) 15
dbx Noi s e Reduct i on pr oces s i ng

Audi o 0Hz~3. 4KHz

Tel em
etry FM modul at i on( Car r i er f r equency 6. 5f h)
3
Signal Maxi mum f r equency devi at i on 3KHz)
Dat a 0Hz~1. 5KHz
 Si gnal r out e

1) SIF signal from tuner(TM1) is connected to MTS processor (IC604 1pin).

* . SI F : Sound I nt er medi at e Fr equency

2) MTS processor(IC604) detect the stereo and sap signal , send the
detecting state to front micom(IC601) by I2C data.
It will display the screen by OSD.
* . OSD : On Scr een Di s pl ay

3) MTS processor decode the SIF signal and send the decoded audio signal to
22pin(R out) and 23pin(Lout).

4) Lout(23pin) and Rout(22pin) of MTS processor go to IC203 for audio processing.

7- 11. Tuner / Demodul at or

<Bl ock di ag r am of
Tuner >
 Tuner

Tuner consists of LPF/HPF,Single Tune,RF amplifier,Double Tune and MOP circuits.(see the
block diagram)

ⓐ LPF/HPF(Low Pass Filter/High Pass Filter)

- . IF rejection : preventing for IF frequency signal interference from antenna.
- . LPF : for VHF band ,remove UHF band signal
- . HPF : for UHF band, remove VHF band signal

ⓑ Single Tune/RF AMP

- . Single Tune: for receiving Channel initially
- . RF AMP : Gain control of tuned signal from Single Tune.
AMP Gain is controlled by AGC circuits in IF Demodulator.

ⓒ Double Tune
- . Improve the band quality,
- . minimize the loss of band signal
- . Remove the spurious signal
ⓓ MOP(Mixer,OSC,PLL)

- . MOP is consisted of VHF OSC,UHF OSC,Mixer circuits.

- . It have double balance mixer for removing interference.
- . MOP tuned the selected channel.
- . It is very important function in tuner.
- . MOP generate IF signal and connect to IF demodulator.
* . OSC : OSCI LLATOR, PLL : Phas e Locked Loop
I F : I nt er medi at e Fr equency
 Demodul at or
- . Demodulate the IF signal for base band video and audio.
- . The demodulated video and audio signal go to AV processing.
: go to MUX IC for AV input switching
* . MUX : Mul t i pl exer

< Bl ock di agr am of demodul at or >

7- 12. Loader
 Loader System Overview and Rambo- II Block Diagram
 S5L1482
 S5L1482 Features
 PRML
 Data Processor I, II (DP1, DP2)
 ATAPI
 ARM7TDMI
 WSC Interface
 Servo Block
 Servo Hardware and Software Features
 Data Management
 One Chip Solution
 RF Processor and Sub Blocks
 Loader System Overview

FPD, PD, I/V amp

RF Si gnal
( AGC/ EQ) PRML
SERVO DRAM
Pr oces s or
Ser vo Er r or
( FE/ TE/ CE/ PE
SBAD/ RC/ TI LT)
ENDEC
Mi s cel l aneous
LD, LD Driver Si gnal
( DFT/ LPP
Focus Actuator / WOBBLE) ECC ATAPI
WRI TE Pr oces s or
Tracking Actuator APC & OPC STRATEGY

TILT Actuator

Sl ed Spi ndl e Tr ay Mot or

Mot or Mot or Mot or Dr i ver

MI COM
 Rambo- III Block Diagram
RAMBO II Chipset

Pick-up Host I/F

I/V AMP 16-Mbit DRAM
Elantec PRML 1-Mbit SRAM
RF Processor ATAPI Controller
LD Drive Data Processor 2 Back-
Elantec CD ENDEC End
Data Processor 1
Mecha. Copy Protection
APC WSC Servo DSP ·CSS/CPRM/CPPM
SpindleMotor
LC895040
Feed Motor CMOS/0.35um
216Pins/LQFP

MICOM
ARM7
 S5L1482A

 S5L1482A is the Integrated Circuit(IC) adequate for dvd- recorder which

not only plays CD Family, DVD- ROM/- R/- RW/+R/+RW/RAM Disc but record
video and audio to DVD- R/- RW/+R/+RW/RAM Disc.
 This IC is dealing with transferring playable signals generated by optical
pick- up unit (OPU). Signal from OPU is transferred to RF chip which
performs analog signal processing in order to generate RF signal. This RF
signal is fed to S5L1482A which the RF signal is transferred to the HOST
through PRML, Data Processor1(DP1), Data Processor2(DP2) and ATAPI inside
of.
 Various blocks such as ARM7TDMI core which controls the entire chip
itself, WSC I/F block for the support of dvd- recording, SERVO Control block
dealing with controlling spindle motor and processing focus and tracking
signals are embedded in S5L1482A.
 S5L1482 Features 1
§ CD- ROM/R/RW/DA/Video Maximum 8X Play
§ DVD- ROM/R/RW,DVD- RAM 8X Play
§ DVD- R/- RW/+R/+RW/RAM 8X Play
§ System on Chip Solution which includes SERVO, PRML, Data Processor
I(DP1), Data Processor II(DP2), ATAPI, WSC I/F
§ ARM 7TDMI Embedded
§ ATAPI Interface Support
§ External Micom I/F Support
§ Auto Disc Detection and Motor Control
§ Tilt Compensation
 S5L1482 Features 2
§ Digital DC Offset Compensation
§ EFM & EFM+ De- modulation
§ BCA(Burst Cutting Area) Decoding
§ Descrambling, ECC & EDC Check
§ Bus- authentication (CSS, CPPM, CPRM)
§ Jitter Measurement of Write pattern
§ Maximum 16MByte External SDRAM Support
§ 33.8688MHz x 8 PLL Adoption
§ 0.18um(STD130, Samsung Library)
§ 3.3V (5V tolerant)
§ Operating Temperature Range : 0℃ ~ 70℃
§ 256- PIN QFP
 PRML

 Data Sync- Lock is generated as well as Asymmetry and DC- offset are
compensated by extracting frequency and phase difference using analog-
to- digital(A/D) conversion of signal from RF.
 Data restoration ability is improved by adopting wave quantization, Viterbi
detector and adaptation technique through the equalizer.
 Data Processor I (DP1)

 EFM/EFM+ demodulation is performed by detection, protection and

insertion of bit stream transferred from PRML in terms of synchronization
signal, and generation of internal synchronization signal.
 Data is transferred to DP2 in order to be stored in buffer memory. During
encoring, the position information is identified by land pre- pit(LPP) data,
PID or address in pre- groove(ADIP).
 After performing EFM+ 8/16 modulation by requesting data stored in
buffer memory embedded in DP2, data related to DVD format such as SYNC,
Guard1, VFO3, PS, Guard2 and etc. are added and NRZI bit stream
transformed in order to facilitate record propagate through Write Strategy
Block.
 Data Processor II (DP2)
After deinterleaving data transferred from DP1, data is stored in buffer
memory. As far as the DVD data in buffer memory, after performing error
correction code(ECC), descrambling and verifying error detection code(EDC),
data is transferred to ATAPI. As for CD data, after performing error
correction, interpolation and attenuation, data is transferred to
DAC/ATAPI/AV Decoder. Burst cutting area(BCA) data fed through RF- Amp.
originated from DVD- Disc, is stored to the buffer memory after detecting
the synchronization signal, then it performs error correction and verifies
EDC. Next, data is transferred to the microprocessor unit. In addition, data
transferred from ATAPI is activated by EDC and scrambling. Data is stored
in buffer memory after appending EDC parity and Data- ID. After the
procedures of appending the parity utilized in error correction, transferring
to DP1, performing EFM+ modulation, and adding data required for the
DVD- format such as SYNC, bit stream which will be recorded in DVD- RAM is
outputted to Auto Laser Power Controller(ALPC).
 ATAPI

 It is dealing with data scramble(CD case), functionalities related to data

communication to host(PIO,DMA,UDMA), management of packet command,
and authentication(CSS,CPRM).
 It supports PIO/MDMA/UltraDMA, which abide by ATA/ATAPI standard
transmission method.
 It is capable of controlling external buffer memory. SRAM, external buffer,
can be supported by maximum capacity of 16Mbytes, which is shared with
DP2 for the purpose of data storage.
 ARM7TDMI

 ARM7TDMI play a role of microprocessor by controlling various internal

blocks. Without intervention of an external microprocessor, it is capable of
controlling S5L1482A.
 It embeds 16KByte SRAM and 4KByte ROM as well as supports an external
ROM/SDRAM/Flash.
 If necessary, the firmware is upgradeable through ATAPI interface.
 S5L1482A not only embeds ARM core but also has the capability of
adopting various kinds of external microprocessor units according to its
hardware configurations.
 WSC Interface

 WSC I/F is in charge of the interface between LD driver chip generating

the write pulses utilized in recording to optical disc and data processors
making write data.
 The recordable optical discs are DVD- R, DVD- RW, 4.7GB DVD- RAM and
2.6GB DVD- RAM.
 Servo Block

 Servo block includes digital servo controller(Teaklite Core) in order to

play DVD- RAM/ROM/R/RW and CD- ROM/R/RW discs.
 Disc auto detection, focus and tracking control is performed in automatic
manner.
 Servo Block Hardware Features
- Downloadable 16Kwords Program RAM
- Built- in 10Bit ADC, 8ch Sample&Hold DAC
- Track Counter : Long Distance Velocity Control Oriented Direct Seek
- Shock / Defect Detection
- De_track Detection
- Header(DVD- RAM)/LAND Pre- Pit(DVD- R/RW) Detection
- Various Servo Monitor Signal Generation
- Determination of Various Loop Filter Characteristics and Coefficients by
System Controller
- RF IC , Elantec IC serial Interface
- Micom Interface : Compatible with NEC and HITACHI Microprocessor I/F
 Servo Block Software Features
- Digital Servo Controller (Focus Controller, Tracking Controller, Sled
Controller, Seek Controller)
- Disc Auto Detection, Focus/Tracking Pull_in
- Auto Adjustment/Calibration: Focus/Tracking Loop 의 Offset/Balance/Loop
Gain Adjustment
- Velocity Control Oriented Direct Seek
- Step Motor Control : Macro Seek
- De- track Compensation
- Center Error Control Servo
- DVD Layer Jump
- Shock/Defect Handling
- Tilt Compensation
 Data Management

 The data size for data transfer between internal buffer memory and each
functional block of data processor is dependent upon disc media. Data is
transferred by 2 symbol units(2bytes, 16bits) in the case of DVD and 2
symbol units(1bytes, 8bits) in the case of CD and BCA. The microprocessor
deals with memory management.
 The microprocessor manages DVD data by 1 ECC block unit and CD data
by frame unit automatically.
 BCA data is stored at the specific location of memory and managed. In
the case of an external buffer memory, the microprocessor is also in
charge of memory management and the buffer control block of ATAPI deals
with the a serious if data transfer process.
 One Chip Solution

 The rest block systems except RF, that is PRML, SERVO, Data Processor,
ATAPI, WSC I/F and ARM7TDMI, integrated into one chip.
 This system on chip solution reinforces the reduction of power
consumption, stable and hi- speed data transfer, minimal size and
improvement of reliability.
 RF Processor
 RAMBO- II drive RF processor is the analog front end LSI which has the
capability of playing and recording DVD media(DVD- ROM/R/RW/RAM) as well
as playing CD media.
 By adopting 0.65um Bi- CMOS manufacturing process, the frequency
characteristics and power consumption are significantly improved.
 It is operated by +5V power and it does level shift for the external
interface. RF processor LSI is mainly divided by for four sub- blocks.
 RF Processor Sub Blocks
▶Pick- up Interface Block : As the input interface block, this block consists
of RF Input Mux and Servo Input Mux. By receiving PD signal and sum signal
from pick- up as inputs, it selects corresponding signal and amplification
degree with respect to disc media.
▶RF Signal Processing Block : By receiving output from RF Input mux, it
performs AGC, EQ, and Header signal processing. Then, it outputs signals to
PRML and DP.
▶Servo Error Signal Processing Block : It generates various servo signal and
outputs to Servo DSP.
▶Various Signal Detection and ALPC Block : It detects Mirror, Defect, BCA,
Land Pre- pit, Wobble signals which are utilized for signal processing in
Servo and DP. Also, it has the functionality of controlling LD Power which
are Automation Power Control(APC), Optimum Power Control(OPC) and
Running Optimum Power Contol(ROPC).
8. Troubleshooting
9. Software Upgrade