CXA1390AQ/AR

S/H and AGC for CCD Camera

Description
The CXA1390AQ/AR are CCD camera's signal CXA1390AQ CXA1390AR
processing ICs which extract signals from the CCD 48 pin QFP (Plastic) 48 pin LQFP (Plastic)
output. These bipolar ICs perform correlated double
sampling. AGC, color separation, high luminance
detection and others. Additionary, these ICs are not
affected by irregular pulses which occure during the
CCD shutter mode.

Featuers
• Pin compatible upgraded version of CXA1390Q/R
which can be swapped out while using same
peripheral chips Application
• Almost completely corrects irregular pulses and S/H and AGC for CCD camera
their negative affects
• Correlated double sampling function alllows for the Structure
suppression of low band noise in the CCD output Bipolar silicon monolithic IC
• AGC amplifier, which has High S/N ratio and wide
gain control range, enhances the camera sensitivity Absolute Maximum Ratings (Ta = 25°C)
• Output for iris adjustment. High luminance • Supply voltage VCC 12 V
detection output • Operating temperature Topr –20 to +75 °C
• Usage of Vg (regulator) output allows for the • Storage temperature Tstg –65 to +150 °C
formation of IRIS and AGC LOOP which are not • Allowable power dissipation
affected by supply voltage functation PD 600 (QFP) mW
950 (VQFP) ∗ mW
Operating Conditions ∗ (40mm × 40mm, t = 0.8mm with a mounted glass epoxy
Supply voltage VCC 4.75 to 5.25 V substrate)
Block Diagram and Pin Configuration (Top View)
IRIS LEVEL
DET OUT

IRIS OUT
DET CLP

IRIS CLP
IRIS GC

VG OUT

PBLK

CLP1
W ND
V CC2

GND

24 23 22 21 20 19 18 17 16 15 14 13
VG

DET LEVEL 25 12 CSAGC SL

CLP

CLP1

CLP1

AGC CLP 26 11 CSAGC GC

CLP
BLK

W ND PBLK

MODE
W ND

W ND

SW
OR

AGC OUT 27 SLICE GC 10 CS OUT

W ND

OP IN + 28 9 CS CCD GC
PBLK
BLK

SLICE GC CLP
GC

OP IN – 29 8 CS CCD SL
OP

CLP

CLP1

OP OUT 30 7 CS CLP
MAX

CLP1
AGC

AGC CONT 31 6 F3 OUT

LPF CLP
SH BLK
AGC MAX 32 PBLK 5 F2 OUT
XSP3 CLP1
XSHP

XSHP

CLP
SH

33
SH

AGC SEL SH LPF 4 F1 OUT

BLK
PBLK
XSP2 CLP1
XSHP 34 3 GY OUT
XSHD

CLP4
XSHD
SH

SH

CLP4

SH LPF CLP
COM
COM

BLK
XSHD 35 2 DC OUT
XSHP

XSP1 PBLK GATE

SH

CLP4 36 1 XSH1

37 38 39 40 41 42 43 44 45 46 47 48
V CC1

XSP3

XSP2

XSP1

FSH1

XSH2
F3 CLP

F2 CLP

F1 CLP
PG IN

DATA IN

GND

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

–1–
E90941A78
 CXA1390AQ/AR

Pin Description and Standard Pin voltage (VCC = 5V)

PIn
Symbol Voltage Equivalent circuit Description
No.
1 XSH1
1 200
34 XSHP
34
35 XSHD 35 130
H: 4V and above 40
High speed pulse input
40 XSP3
L: 1V and below pin for S/H (active at L)
41
41 XSP2
42
200
42 XSP1 48
48 XSH2

1k

DC output pin of f1 to f3
2 DC OUT 1.8 to 2.1V 2
output black level
180µA

3 GY OUT
300
4 F1 OUT 3
4
Black level
5 F2 OUT 5 Signal output pin
1.8 to 2.1V
6
360µA
6 F3 OUT 27

27 AGC OUT

7 CS CLP 2.6 to 3.3V

7
18 IRIS CLP 2.0 to 2.6V
18
20 DET CLP 1.9 to 2.6V 20
130 Capacitor connecting
26 AGC CLP 2.3 to 2.8V 26
pin for clamp
45
45 F3 CLP 2.0 to 2.6V
46
46 F2 CLP 2.0 to 2.6V 47
47 F1 CLP 2.0 to 2.6V

10 CS OUT 1.7 to 2.2V Signal output pin

300

10
17 IRIS OUT 1.7 to 2.0V 17
Signal output pin Vcc
24
200µA fluctuations effect is
minor on DC level
24 DET OUT 1.7 to 2.0V

–2–
 CXA1390AQ/AR

PIn
Symbol Voltage Equivalent circuit Description
No.
Level adjustment pin of high
8 CS CCD SL luminance detection pin of the
input signal
Gain adjustment pin of input
9 CS CCD GC
signal high luminance part
Gain adjustment pin of high
11 CSAGC GC 8
luminance port after AGC
9
11 Level adjustment pin of high
12 CSAGC SL
luminance detection after AGC
12
130
(Test mode at 0V) 21 Adjustment pin of IRIS output
21 IRIS LEVEL
22 weighting (Active at WND = L)
25 Gain adjustment pin of IRIS
22 IRIS GC
31 output
32
Adjustment pin of DET output
25 DET LEVEL
weighting (Active at WND = L)
AGC amplifier gain
31 AGC CONT
adjustment pin
AGC amplifier MAX gain
32 AGC MAX
adjustment pin

CLP1 pulse input pin

13 CLP1
Active at H (OPB clamp)
130
13
14
Pre BLK pulse input pin
14 P BLK
Active at L
H: 4V and above
L: 1V and below
Window pulse input pin
15 WND
Active at L
130
15
36 CLP4 pulse input pin
36 CLP4
Active at H

Regulator output pin

16 VG OUT 2.6 to 3.1V 16 (Used for the formation of
100µA AGC and IRIS loop)

Operation amplifier non

28 OP IN + 130
28
inverted input pin

1 to 3.3V

130 Operation amplifier inverted

29 OP IN – 29
input pin

–3–
 CXA1390AQ/AR

PIn
Symbol Voltage Equivalent circuit Description
No.

500µA

30
H: 4.2V and above
30 OP OUT Output pin
L: 1.2V and below
3.6V

3.3V 50k
VCC: Low Gain mode AGC amplifier gain
33 AGC SEL 33
GND: High Gain mode selection pin

100µA

37
37 PG IN Black level
38 CCD signal input pin
38 DATA IN 2.7 to 3.2V

8.5k
Adjustment pin for color
44
130
separation S/H follow up
44 FSHI 1.4 to 1.8V
speed
(Normally used OPEN)

–4–
 CXA1390AQ/AR

Electrical Characteristics (Ta = 25°C, VCC = 5.0V)

Item Symbol Conditions Min. Typ. Max. Unit
Current consumption ID 32 48 65 mA
AGC OUT/DATA IN
ACON AGC CONT = 1.5V
CONT Min. 6 8 dB
Min. AGC MAX = 5V
AGC SEL = 0V
AGC OUT/DATA IN
ACON AGC CONT = 4.5V
CONT Max. 30 32 dB
Max. AGC MAX = 5V
AGC SEL = 0V
AGC
AGC OUT/DATA IN
MAX AGC CONT = 4.5V
Max. Min. 17 20 dB
Min. AGC MAX = 1.5V
AGC SEL = 0V
AGC OUT (SEL = 5V) /AGC OUT
Gain shift GSHI –5 –4 –3 dB
(SEL = 0V)
BLK offset ∆BLK Note 1) –10 0 +10 mV

Color Gain Color separation output/AGC OUT

f Gain –0.5 0 +0.5 dB
sepa- (f1, f2, f3)
ration BLK offset f ∆BLK Note 1) –10 0 +10 mV
DC OUT DC 1.8 1.95 2.1 V
Gate Gain GY GY OUT/AGC OUT –0.5 0 +0.5 dB
IRIS OUT/DATA IN
Gain Cont Max. IR Max. IRIS GC = 5V 18 22 dB
WND = 5V
IRIS OUT/DATA IN
Gain Cont Min. IR Min. IRIS GC = 1.5V 4 8 dB
WND = 5V

IRIS Gain Cont Max. ratio (attenuation)

IRW IRIS GC = 1.5V
Window Level Max. –1 0 dB
Max. IRIS LEVEL = 5V
WND = 0V
Gain Cont Max. ratio (attenuation)
IRW IRIS GC = 1.5V
Window Level Min. –14 dB
Min. IRIS LEVEL = 1.5V
WND = 0V
DET OUT/AGC OUT
Gain DET G –2 –1 +0.5 dB
WND = 5V
DET OUT/AGC OUT
DET
Window Level Max. DET LEVEL = 5V –2 –1 +0.5 dB
DET Max.
WND = 0V
Level Max. ratio
DET
Window Level Min. DET LEVEL = 1.5V –13 dB
Min.
WND = 0V

–5–
 CXA1390AQ/AR

Item Symbol Conditions Min. Typ. Max. Unit

CSOUT differential/
DATA IN differential
CSC
Max. Gain CS CCD SL = 4.1V 13 16 dB
Max.
CS CCD GC = 5V
PBLK = 0V
CSOUT differential/
DATA IN differential
CSC
CS Min. Gain CS CCD SL = 4.1V –1 1 dB
Min.
CCD CS CCD GC = 1.5V
PBLK = 0V
Input conversion slice level
CSC
Max. SLICE CS CCD SL = 1.5V 0.7 V
Max. SL
Note 1)
Input conversion slice level
CSC
Min. SLICE CS CCD SL = 5V 40 100 mV
Min. SL
Note 1)
CS OUT DATA IN = 0.2Vpp
CS AGC GC = 5V
CSA CS AGC SL = 4.2V
Max. Gain 0.5 Vpp
Max. CS CCD GC = 1.5V
CS CCD SL = 1.5V
Note 2)
CS OUT differential/
AGC OUTdifferential
CS AGC GC = 1.5V
CS CSA
Min. Gain CS AGC SL = 4.2V –1 1 dB
AGC Min.
CS CCD GC = 1.5V
CS CCD SL = 1.5V
Note 2)
AGC OUT conversion
CSA
Max. SLICE CS AGC SL = 1.5V 1.2 V
Max. SL
Note 3)
AGC OUT conversion
CSA
Min. SLICE CS AGC SL = 5V 0.06 0.1 V
Min. SL
Note 3)
DATA IN = 0.5Vpp
TEST mode TEST CS CCD GC = 0V 0.5 Vpp
Note 4)
OP IN + = 2.1V
H level OPH 4.2 V
OP- OP IN – = 2.0V
Amp OP IN + = 2.0V
L level OPL 0.9 1.2 V
OP IN – = 2.1V
Vg OUT Vg At no load 2.6 2.85 3.1 V

–6–
 CXA1390AQ/AR

Note 1)

Indicates the specification

Output signal

BLK input 5
0

Note 2)
Voltage between DATA IN input black level and the high luminance level determined by CS CCD SL pin voltage.

Black level
DATA IN High luminance level

Indicates the specification

CS OUT

Note 3)
Voltage between the black level at AGC OUT and the high luminance level determined by CS AGC SL pin voltage.

High luminance level

AGC OUT
Black level

CS OUT Indicates the specification

Note 4)
S/H output DATA IN input can be monitored by turning CS CCD GC (Pin 9) to 0V.

–7–
 CXA1390AQ/AR

Test Circuit

VCC 5V (3V) (3V) (3V) (3V)

0.1 0.1 CLP2

10µ

IRIS LEVEL
DET OUT

IRIS OUT
DET CLP

IRIS CLP
IRIS GC

VG OUT

PBLK

CLP1
W ND
V CC2

GND
24 23 22 21 20 19 18 17 16 15 14 13

VG
(3V) DET LEVEL 25 12 CSAGC SL (3V )
CLP

CLP1

AGC CLP 26 CLP1 11 CSAGC GC (3V)

CLP
BLK
0.1

W ND PBLK

MODE
W ND

W ND

SW
OR
AGC OUT 27 SLICE GC 10 CS OUT
W ND

(2V) OP IN + 28 9 CS CCD GC (3V)

PBLK
BLK

SLICE GC CLP
GC

(2V) OP IN – 29 8 CS CCD SL (3V)

OP

CLP

CLP1

OP OUT 30 7 CS CLP

MAX
CLP1 0.1
AGC

(1.5V) AGC CONT 31 6 F3 OUT

LPF CLP
SH BLK
(5V) AGC MAX 32 PBLK 5 F2 OUT
XSP3 CLP1
XSHP

XSHP

CLP
SH

33
SH

(0V) AGC SEL SH LPF 4 F1 OUT

BLK
PBLK
XSP2 CLP1
XSHP 34 3 GY OUT
CLP4
XSHD

XSHD
SH

SH

CLP4

SH LPF CLP
COM
COM

BLK
XSHD 35 2 DC OUT
PBLK
XSHP

CLP4 GATE
XSP1
SH

CLP4 36 1 XSH1

37 38 39 40 41 42 43 44 45 46 47 48
XSH2
FSH1
V CC1

XSP3

XSP2

XSP1

F3 CLP

F2 CLP

F1 CLP
GND
PG IN

DATA IN

0.1
0.1 0.1 0.1 0.1
IN 10µ

VCC 5V

Note 1) Capacitor unit value at µF.

Note 2) Voltage in parentheses are those not specified in the Electrical Characteristics Test Conditions.
Note 3) indicates a test pin. (For both AC and DC)

–8–
 CXA1390AQ/AR

Timing Diagram for Testing

Equivalent to black

DATA IN input

Differs with every test

1H
2µsec
5V

CLP 1 0

2µsec
5V

CLP 4
0

Output waveform Output signal level

AGC OUT
IRIS OUT
F1 to F3 OUT
GY OUT
DET OUT
CS OUT

–9–
 CXA1390AQ/AR

Standard Control Characteristics (VCC = 5V, Ta = 25°C)

AGC amplifier gain control characteristics AGC maximum control characteristics

dB dB
(AGC Max. = 5V) (AGC CONT = 5V)

30 30

25

20 20

15

10 10

5 5
0 1 2 3 4 5 V 0 1 2 3 4 5 V
AGC CONT voltage AGC maximum voltage

IRIS WINDOW control characteristics

IRIS gain control characteristics (Weighting characteristics)
dB dB
(WND = 0V)
Gain control characteristics
25 when IRIS LEVEL=5V is set at 0dB
0
20
–5
15
–10
10
–15
5
–20
0
0 1 2 3 4 5 V 1 2 3 4 5 V
IRIS GC voltage IRIS LEVEL voltage

DET WINDOW control characteristics

(Weighting characteristics)
dB
(WND = 0V)
Gain control characteristics
when DET LEVEL = 5V is set at 0dB
0

–5

–10

–15

–20

1 2 3 4 5 V
DET LEVEL voltage

– 10 –
 CXA1390AQ/AR

CS CCD gain control characteristics CS CCD slice control characteristics

dB V
(High luminance detection
level control) Note 1-b
20 0 Input conversion value
Note 1-a

0.2
15

0.4
10
0.6

5
0.8

0 1.0
0 1 2 3 4 5 V 0 1 2 3 4 5 V
CS CCD GC voltage CS CCD SL voltage

CS AGC gain control characteristics CS AGC slice control characteristics

dB V

Note 2-b
20 1.6
Note 2-a

1.2
15

0.8
10
0.4

5 (High luminance detection

0
level control after AGC)
Input conversion value
0
1 2 3 4 5 V 1 2 3 4 5 V
CS AGC GC voltage CS AGC SL voltage

Note 1-a, 1-b Note 2-a, 2-b

(2) COLOR (2)
DATA IN CS OUT SEPARATION CS OUT
SLICE GCA AGC SLICE GCA

(1) (3) (1) (3)

CS CCD SL CS CCD GC CS AGC SL CS AGC GC
Detection level
Black level Note 2-b
Voltage indicated at CS AGC
(1) Note 1-b (1) slice control characteristics
Voltage indicated at CS CCD
slice control characteristics Black level
Detection level
(2) (2)
Note 1-a Note 2-a
Characteristics indicated at CS CCD Characteristics indicated at CS AGC
gain control characteristics slice control characteristics
(3) =ratio of 3 and 2 (dB) (3) =ratio of 3 and 2 (dB)

– 11 –
 CXA1390AQ/AR

Supply voltage Characteristics Standard Design Documentation (Ta = 25°C)

AGC amplifier gain control characteristics AGC maximum control characteristics

dB dB
5.25V 5V 5.25V
5V
(AGC CONT = VCC)
30 (AGC Max. = VCC) 30
4.75V

25 4.75V

20 20

15

10 10

5 5
0 1 2 3 4 5 (× VCC ) 0 1 2 3 4 5 (× VCC )
5 5
AGC CONT voltage AGC maximum voltage

IRIS WINDOW control characeristics

IRIS gain control characteristics (Weighting characteristics)
dB dB
WND = 0V
Gain control characteristics when
25 IRIS LEVEL = Vcc is set at 0dB
5.25V
5V 0
4.75V 5.25V 5V
20
–5
15
4.75V
–10
10
–15
5
–20
0
0 1 2 3 4 5 × VCC 1 2 3 4 5 (×
VCC
)
5 5
IRIS GC volage IRIS LEVEL voltage

DET WINDOW control

(Weighting characteristics)
dB
WND=0V
Gain control characteristics when
DET LEVEL=Vcc is set at 0dB
0
5.25V 5V
4.75V
–5

–10

–15

–20

1 2 3 4 5 VCC
(× )
5
DET LEVEL voltage

– 12 –
 CXA1390AQ/AR

CS CCD gain control characteristics CS CCD slice control characteristics

dB V
(High luminance detection
Note 1-a level control) Note 1-b
20 0 Input conversion value
5.25V 5.25V 5V

5V
0.2
15 4.75V

4.75V
0.4
10
0.6

5
0.8

0 1.0
0 1 2 3 4 5 VCC 0 1 2 3 4 5 VCC
(× ) (× )
5 5
CS CCD GC voltage CS CCD SL voltage

CS AGC gain control characteristics CS AGC slice control characteristics

dB V
Note 2-a Note 2-b
20 1.6
5.25V
5V
4.75V 1.2
15

0.8
4.75V
10
0.4
(High luminance detection 5V
level control after AGC)
5
0 Input conversion value
5.25V

0
1 2 3 4 5 (× VCC ) 1 2 3 4 5 (× VCC )
5 5
CS AGC GC voltage CS AGC SL voltage

Note 1-a, 1-b Note 2-a, 2-b

(2) COLOR (2)
SEPARATION
DATA IN CS OUT CS OUT
SLICE GCA AGC SLICE GCA

(1) (3) (1) (3)

CS CCD SL CS CCD GC CS AGC SL CS AGC GC
Detection level
Black level Note 2-b
Note 1-b Voltage indicated at CS AGC
(1) (1) slice control characteristics
Voltage indicated at CS CCD
slice control characteristics Black level
Detection level
(2) (2)
Note 1-a Note 2-a
Characteristics indicated at CS CCD Characteristics indicated at CS AGC
gain control characteristics slice control characteristics
(3) =ratio of 3 and 2 (dB) (3) =ratio of 3 and 2 (dB)

– 13 –
 CXA1390AQ/AR

Standard Design Documentation Temperature Characteristics (VCC = 5V)

AGC amplifier gain control characteristics AGC maximum control characteristics

dB dB
–20°C –20°C
25°C
(AGC Max. = VCC) 25°C (AGC CONT = VCC)
30 30
75°C
75°C
25

20 20

15

10 10

5 5
0 1 2 3 4 5 V 0 1 2 3 4 5 V
AGC CONT voltage AGC maximum voltage

IRIS WINDOW control characteristics

IRIS gain control characteristics (Weighting characteristics)
dB dB
(WND = 0V)
Gain control characteristics
25 when IRIS LEVEL = VCC, Ta=25°C
–20°C is set at 0dB.
25°C 0 25°C
75°C –20°C
20
75°C
–5
15
–10
10
–15
5
–20
0
0 1 2 3 4 5 V 1 2 3 4 5 V
IRIS GC voltage IRIS LEVEL voltage

DET WINDOW control

(Weighting characteristics)
dB
(WND = 0V)
Gain control characteristics
when DET LEVEL = VCC, Ta = 25°C
is set at 0dB.
0
–20°C 25°C
75°C
–5

–10

–15

–20

1 2 3 4 5 V
DET LEVEL voltage

– 14 –
 CXA1390AQ/AR

CS CCD gain control characteristics CS CCD slice control characteristics

dB V
(High luminance detection
Note 1-a level control) Note 1-b
20 0 Input conversion value
–20°C 25°C
–20°C
25°C 75°C
0.2
15 75°C

0.4
10
0.6

5
0.8

0 1.0
0 1 2 3 4 5 V 0 1 2 3 4 5 V
CS CCD GC voltage CS CCD SL voltage

CS AGC gain control characteristics CS AGC slice control characteristics

dB V
Note 2-a
–20°C Note 2-b
20 1.6
25°C
75°C
1.2
15

0.8
10
0.4
(High luminance detection 75°C
5 level control after AGC) 25°C
0 Input conversion value
–20°C

0
1 2 3 4 5 V 1 2 3 4 5 V
CS AGC GC voltage CS AGC SL voltage

Note 1-a, 1-b Note 2-a, 2-b

(2) COLOR (2)
SEPARATION
DATA IN CS OUT CS OUT
SLICE GCA AGC SLICE GCA

(1) (3) (1) (3)

CS CCD SL CS CCD GC CS AGC SL CS AGC GC
Detection level
Black level Note 2-b
Note 1-b Voltage indicated at CS AGC
(1) (1) slice control characteristics
Voltage indicated at CS CCD
slice control characteristics Black level
Detection level
(2) (2)
Note 1-a Note 2-a
Characteristics indicated at CS Characteristics indicated at CS
CCD gain control characteristics AGC slice control characteristics
(3) =ratio of 3 and 2 (dB) (3) =ratio of 3 and 2 (dB)

– 15 –
 CXA1390 Series System Diagram (The title insertion function can be removed by doing away with CXA1393AN)

W/B
CONTROLLER
CCD IHDL IHDL IHDL

DL

51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33

DETECTOR
ID
36 35 34 33 32 31 30 29 28 27 26 25 36 35 34 33 32 31 30 29 28 27 26 25

YO-
CLP
S1-IN
S2-IN
C

R-MIX
B-CLP
G-CLP
R-CLP

B-MTX
LEVEL
52 DLY0-

B-GAIN
R-GAIN
C- 32

B-CONT
R-CONT
DLE
DLD

DLC1-IN
C1-GAIN

DET-
OUT SLICE

SHP-

CLP4
SYNC

XSHD
XSHP
DLCO-OUT
LEVEL

MPX2-CLP
MPX1-CLP

LEVEL
SETUP

OPIN-N
OPIN-P
37 PG-IN DET- 24 53 DLY1-OUT WB-DC 31 WC 24

OP-OUT
37 YTBLK
OUT
Y-LEVEL
SHP-OUT
5V

AGC-SEL
AGC-OUT
AGC-CLP

AGC-MAX
SHP-CLP1
SHP-CLP2

AGC-CONT
54 Y1-GAIN
FADER-SIG

38 DATA-IN V CC 2 23 WB-B 30 38 NOISE-SLICE SETUP- 23

5V CLP
SYNC-LEVEL

FADER-MODE

39 V CC 1 IRIS-GC 22 55 DLY1-IN WB-G 29 39 YH-CLP V-OUT 22 Y

40 XSP3 IRIS-LEVEL 21 56 DLY2-IN WB-R 28 40 YH-IN VIDEO-OUT 21 Vid
41 XSP2 DET-CLP 20 57 Y2-GAIN CGAM-CONT 27 41 YL-YH CLP CHROMA-OUT 20 C
42 XSP1 GND 19 58 GND CXA1391 Q/R GND 26 42 YL-YH IN DGND 19
CXA1390AQ/AR CXA1392Q/R
43 GND IRIS-CLP 18 59 LPF-ADJ1 YL-OUT 25 43 AGND C-IN 18
5V
44 FSHI IRIS-OUT 17 60 LPF-ADJ2 CS-OUT 24 44 CLP4 AV CC 17
45 F3-CLP VG-OUT 16 5V 61 LPF-ADJ3 VCS-GAIN 23 45 CLP2 C-OUT 16 BPF
46 F2-CLP WND 15 62 V CC R-Y HUE 22 46 B-LEVEL CS-Y 15
47 F1-CLP PBLK 14 63 YGAM- B-Y HUE 21 47 B-Y IN CS-AGC 14
CONT
48 XSH2 CLP1 13 64 YH-IN R-Y 20 48 B-Y MODE 13
OUT CLP
R-Y IN
R-Y CLP
DV CC
4FSC
LALT
NC
NC
FSC-OUT
BFG
BF
CBLK
CTBLK

XSH1
DC-OUT
GY-OUT
F1-OUT
F2-OUT
F3-OUT
CS-CLP
CS-CCD-SL
CS-CCD-GC
CS-OUT
CS-AGC-GC
CS-AGC-
SL
YH-
CLP
DLYH-IN
DLYH-CLP
DLYH-OUT
YH-OUT1
YH-OUT2
TP
DLYH-GAIN
CLP4
CLP2
VAP-OUT
VAP-GAIN
VAP-CLP
VAP-SLICE
CS-CLP
CS-IN
R-Y GAIN
B-Y GAIN
B-Y OUT
1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 1 2 3 4 5 6 7 8 9 10 11 12

– 16 –
5V 5V

LPF
DL
LPF IHDL

LPF DL

12 11 10 9 8 7 6 5 4 3 2 1
OUT

GND
HYS-

CLP4
DB-IN
DR-IN
CB-IN
CG-IN
CR-IN
CONT
COMP-

CXA1393AN/AM
TH-CONT
COMP-IN

XSH1 XSH2 CLP1 ID PBLK

CLP2
DR-OUT
CT-BLK DB-OUT
DY-OUT
YT-BLK
DY-CLP
DY-IN
V CC
YG-IN
YR-IN
YB-IN
YT-GC
CT-GC

XSP1
XSP2 13 14 15 16 17 18 19 20 21 22 23 24

WND CR CG CB
TG
CONTROLLER
CLP4 FOR TITLER
SG
XSHD
YR YG YB
XSHP
BLK BF SYNC LALT 4fSC
BFG
CXA1390AQ/AR
 CXA1390AQ/AR

Package Outline Unit: mm

CXA1390AQ

48PIN QFP (PLASTIC)

15.3 ± 0.4

+ 0.4 + 0.1
12.0 – 0.1 0.15 – 0.05

36 25
0.15

37 24

13.5
48 13 + 0.2
0.1 – 0.1

1 12

0.9 ± 0.2
+ 0.15
0.8 0.3 – 0.1
± 0.12 M
+ 0.35
2.2 – 0.15

PACKAGE STRUCTURE
PACKAGE MATERIAL EPOXY RESIN

SONY CODE LEAD TREATMENT SOLDER / PALLADIUM

QFP-48P-L04 PLATING
EIAJ CODE ∗QFP048-P-1212-B LEAD MATERIAL COPPER / 42 ALLOY

JEDEC CODE PACKAGE WEIGHT 0.7g

CXA1390AR

48PIN LQFP (PLASTIC)

9.0 ± 0.2

∗ 7.0 ± 0.1

36 25

37 24
(8.0)

0.5 ± 0.2

48 13
(0.22)

1 12
+ 0.05
0.5 ± 0.08 0.127 – 0.02
+ 0.08 + 0.2
0.18 – 0.03 1.5 – 0.1
0.1

0.1 ± 0.1
0.5 ± 0.2

0° to 10°

NOTE: Dimension “∗” does not include mold protrusion.

DETAIL A

PACKAGE STRUCTURE
PACKAGE MATERIAL EPOXY / PHENOL RESIN

SONY CODE LQFP-48P-L01 LEAD TREATMENT SOLDER PLATING

EIAJ CODE ∗QFP048-P-0707-A LEAD MATERIAL 42 ALLOY

JEDEC CODE PACKAGE WEIGHT 0.2g

– 17 –
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Datasheets for electronic components.