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ELECTRONICS & COMMUNICATION ENGINEERING IV SEMESTER (COMMON TO EC/TC/ML)
Written by Administrator
Friday, 06 November 2009 14:24
Teaching hours/week Examination

Teaching
Subject
Title Depart
Theory/ Total
Code
Theory Practical Duration I. A
ment
Practical Marks
06MAT - Engineering
Mat 04 03 25 100 125
41 Mathematics - IV
06ES– 42 Microcontrollers @ 04 03 25 100 125
06ES – 43 Control Systems @ 04 03 25 100 125
06EC – 44 Signals & Systems @ 04 03 25 100 125
06EC– 45 Fundamentals of HDL @ 04 03 25 100 125
Linear ICs &

06EC – 46 @ 04 03 25 100 125
Applications
06ESL – 47 Microcontrollers Lab @ 03 03 25 50 75
06ECL –
HDL Lab @ 03 03 25 50 75
48
Total 24 06 24 200 700 900
Note : @ indicates concerned discipline. ES ( for theory) & ECL ( for Lab) in the subject code indicates that the
subject is common to electrical and electronics stream consisting of EE/EC/IT/TC/ML/BM branches of
engineering.
Last Updated on Friday, 06 November 2009 14:39
1 of 1 12/23/2010 8:54 PM
ENGINEERING MATHEMATICS - IV http://vtu.ac.in/index.php/scheme-and-syllabus/686-engineering-mathemat...
ENGINEERING MATHEMATICS - IV
Sub Code IA Marks

: 06MAT41 : 25
Exam Hours
Hrs/ Week : 04 : 03
Total Hrs. : 52 Exam Marks : 100
PART – A
UNIT 1:
Numerical Methods
Numerical solutions of first order and first degree ordinary differential equations – Taylor’s series method, Modified
Euler’s method, Runge – Kutta method of fourth order, Milne’s and Adams-Bashforth predictor and corrector methods
(All formulae without Proof).
6 Hours
UNIT 2:
Complex Variables
Function of a complex variable, Limit, Continuity Differentiability – Definitions. Analytic functions, Cauchy –
Riemann equations in cartesian and polar forms, Properties of analytic functions. Conformal Transformation –
Definition. Discussion of transformations: W = z2, W = ez, W = z + (I/z), z ≠ 0 Bilinear transformations.
7 Hours
UNIT 3:
Complex Integration
Complex line integrals, Cauchy’s theorem, Cauchy’s integral formula. Taylor’s and Laurent’s series (Statements only)
Singularities, Poles, Residues, Cauchy’s residue theorem (statement only).
1 of 4 12/23/2010 8:55 PM
6 Hours
UNIT 4:
Series solution of Ordinary Differential Equations and Special Functions
Series solution – Frobenius method, Series solution of Bessel’s D.E. leading to Bessel function of fist kind. Equations
reducible to Bessel’s D.E., Series solution of Legendre’s D.E. leading to Legendre Polynomials. Rodirgue’s formula.
7 Hours
PART – B
UNIT 5:
Statistical Methods
Curve fitting by the method of least squares: y = a + bx, y = a + bx + cx2, y = axb y = abx, y = aebx, Correlation
and Regression.
Probability: Addition rule, Conditional probability, Multiplication rule, Baye’s theorem.
6 Hours
UNIT 6:
Random Variables (Discrete and Continuous) p.d.f., c.d.f. Binomial, Poisson, Normal and Exponential distributions.
7 Hours
UNIT 7:
Sampling, Sampling distribution, Standard error. Testing of hypothesis for means. Confidence limits for means,
Student’s t distribution, Chi-square distribution as a test of goodness of fit.
7 Hours
UNIT 8:
Concept of joint probability – Joint probability distribution, Discrete and Independent random variables. Expectation,
Covariance, Correlation coefficient.
2 of 4 12/23/2010 8:55 PM
Probability vectors, Stochastic matrices, Fixed points, Regular stochastic matrices. Markov chains, Higher transition
probabilities. Stationary distribution of regular Markov chains and absorbing states.
6 Hours
Text Book: Higher Engineering Mathematics by Dr. B.S. Grewal (36th Edition – Khanna Publishers)
Unit Chapter Article Numbers Page Nos.

No. No.
I 27 27.1, 27.3, 27.5, 27.7, 27.8 914, 916 – 922
924, 933
II 20 20.1 to 20.10 630 – 650
III 20 20.12 to 20.14, 20.16 to 20.19 652 – 658
661 – 671
IV 16 16.1 to 16.6, 16.10, 16.13, 16.14 507 – 514,
521 – 523
526 – 529
V 1 1.12 to 1.14 20 – 25
23 23.9, 23.10, 23.11, 23.14, 23.16 to 755 – 762, 765
3 of 4 12/23/2010 8:55 PM
23.18
768 – 776
VI 23 23.19 to 23.22, 23.26 to 23.30 776 – 780
783 – 798
VII 23 23.31 to 23.37 791 – 816
Unit – VIII: Text book: Probability by Seymour Lipschutz (Schaum’s series) Chapters 5 & 7
Reference Books:
1. Higher Engineering Mathematics by B.V. Ramana (Tata-Macgraw Hill).
2. Advanced Modern Engineering Mathematics by Glyn James – Pearson Education.
Note:
1. One question is to be set from each unit.
2. To answer Five questions choosing atleast Two questions from each part.
4 of 4 12/23/2010 8:55 PM
CONTROL SYSTEMS (Common to EC/TC/EE/IT/BM/ML) http://vtu.ac.in/index.php/scheme-and-syllabus/688-control-systems-com...
CONTROL SYSTEMS (Common to EC/TC/EE/IT/BM/ML)

Sub Code IA Marks

: 06ES43 : 25
Exam Hours
Hrs/ Week : 04 : 03
PART – A
UNIT 1:
Modeling of Systems: The control system, Mathematical models of physical systems – Introduction, Differential equations of
physical systems – Mechanical systems, Friction, Translational systems (Mechanical accelerometer, Levered systems excluded),
Rotational systems, Gear trains, Electrical systems, Analogous systems
6 Hours
UNIT 2:
Block diagrams and signal flow graphs: Transfer functions, Block diagram algebra, Signal Flow graphs (State variable formulation
excluded),
7 Hours
UNIT 3:
Time Response of feed back control systems: Standard test signals, Unit step response of First and second order systems, Time
response specifications, Time response specifications of second order systems, steady – state errors and error
constants.
7 Hours
UNIT 4:
Stability analysis: Concepts of stability, Necessary conditions for Stability, Routh- stability criterion, Relative stability analysis;
More on the Routh stability criterion
1 of 3 12/23/2010 8:56 PM
6 Hours
PART – B
UNIT 5:
Root–Locus Techniques: Introduction, The root locus concepts, Construction of root loci.
6 Hours
UNIT 6:
Stability in the frequency domain: Mathematical preliminaries, Nyquist Stability criterion, (Inverse polar plots excluded),
Assessment of relative stability using Nyquist criterion, (Systems with transportation lag excluded).
7 Hours
UNIT 7:
Frequency domain analysis: Introduction, Correlation between time and frequency response, Bode plots, All pass and minimum
phase systems, Experimental determination of transfer functions, Assessment of relative stability using Bode
Plots.
7 Hours
UNIT 8:
Introduction to State variable analysis: Concepts of state, state variable and state models for electrical systems, Solution of state
equations.
6 Hours
TEXT BOOK :
1. J. Nagarath and M.Gopal, “Control Systems Engineering”, New Age International (P) Limited, Publishers, Fourth edition –
2005
REFERENCE BOOKS:
2 of 3 12/23/2010 8:56 PM
1. “Modern Control Engineering “, K. Ogata, Pearson Education Asia/ PHI, 4th Edition, 2002.
2. “Concepts of Control Systems”, P. S. Satyanarayana; Dynaram publishers, Bangalore, 2001
3. “Control Systems – Principles and Design”, M. Gopal, TMH, 1999
4. “Feedback control system analysis and synthesis”, J. J. D’Azzo and C. H. Houpis; McGraw Hill, International student
Edition.
Question Paper Pattern: Student should answer FIVE full questions out of 8 questions to be set each carrying 20 marks, selecting
at least TWO questions from each part
COVERAGE IN THE TEXT BOOK:
UNIT 1: 1.1, 2.1, 2.2, 2.7
UNIT 2: 2.4, 2.5, 2.6, 2.7
UNIT 3: 5.1, 5.2, 5.3, 5.4, 5.5
UNIT 4: 6.1, 6.2, 6.4, 6.5, 6.6
UNIT 5: 7.1, 7.2, 7.3
UNIT 6: 9.1, 9.2, 9.3, 9.4,
UNIT 7: 8.1, 8.2, 8.4, 8.5, 8.6
UNIT 8: 12.1, 12.2, 12.3, 12.6
3 of 3 12/23/2010 8:56 PM
FUNDAMENTALS OF HDL (Common to EC/TC/IT/BM/ML) http://vtu.ac.in/index.php/scheme-and-syllabus/690-fundamentals-of-hdl-...
FUNDAMENTALS OF HDL (Common to EC/TC/IT/BM/ML)

Sub Code IA Marks

: 06EC45 : 25
Exam Hours
Hrs/ Week : 04 : 03
PART-A
UNIT 1:
Introduction: Why HDL? , A Brief History of HDL, Structure of HDL Module, Operators, Data types, Types of
Descriptions, simulation and synthesis, Brief comparison of VHDL and
Verilog
6 Hours
UNIT 2:
Data –Flow Descriptions: Highlights of Data-Flow Descriptions, Structure of Data-Flow Description, Data Type –
Vectors
6 Hours
UNIT 3:
Behavioral Descriptions: Behavioral Description highlights, structure of HDL behavioral Description, The VHDL
variable –Assignment Statement, sequential
statements.
7 Hours
UNIT 4:
1 of 3 12/23/2010 8:56 PM
Structural Descriptions: Highlights of structural Description, Organization of the structural Descriptions, Binding,
state Machines, Generate, Generic, and Parameter
statements.
7 Hours
PART-B
UNIT 5: Procedures, Tasks, and Functions: Highlights of Procedures, tasks, and Functions, Procedures and tasks,
Functions.
Advanced HDL Descriptions: File Processing, Examples of File Processing
7 Hours
UNIT 6:
Mixed –Type Descriptions: Why Mixed-Type Description? VHDL User-Defined Types, VHDL Packages,
Mixed-Type Description examples
6 Hours
UNIT 7:
Mixed –Language Descriptions: Highlights of Mixed-Language Description, How to invoke One language from the
Other, Mixed-language Description Examples, Limitations of Mixed-Language
Description
7 Hours
UNIT 8:
Synthesis Basics: Highlights of Synthesis, Synthesis information from Entity and Module, Mapping Process and
Always in the Hardware Domain.
6 Hours
TEXT BOOKS:
1. HDL Programming (VHDL and Verilog)- Nazeih M.Botros- Dreamtech Press
2 of 3 12/23/2010 8:56 PM
2. (Available through John Wiley – India and Thomson Learning) 2006 Edition
REFERENCE BOOKS:
1. Verilog HDL –Samir Palnitkar-Pearson Education
2. VHDL -Douglas perry-Tata McGraw-Hill
3. A Verilog HDL Primer- J.Bhaskar – BS Publications
4. Circuit Design with VHDL-Volnei A.Pedroni-PHI
3 of 3 12/23/2010 8:56 PM
HDL LAB (Common to EC/TC/IT/BM/ML) http://vtu.ac.in/index.php/scheme-and-syllabus/693-hdl-lab-common-to-ec...
HDL LAB (Common to EC/TC/IT/BM/ML)

Sub Code IA Marks

: 06ECL48 : 25
Hrs/ Week : 03 Exam Hours : 03
Note: Programming can be done using any compiler. Download the programs on a FPGA/CPLD boards such as Apex/Acex
/Max/Spartan/Sinfi/TK Base or equivalent and performance testing may be done using 32 channel pattern generator and logic
analyzer apart from verification by simulation with tools such as Altera/Modelsim or equivalent.
PROGRAMMING (using VHDL and Verilog)
1. Write HDL code to realize all the logic gates
2. Write a HDL program for the following combinational designs
a. 2 to 4 decoder
b. 8 to 3 (encoder without priority & with priority)
c. 8 to 1 multiplexer
d. 4 bit binary to gray converter
e. Multiplexer, de-multiplexer, comparator.
3. Write a HDL code to describe the functions of a Full Adder Using three modeling styles.
4. Write a model for 32 bit ALU using the schematic diagram shown below
A (31:0) B (31:0)
1 of 3 12/23/2010 8:57 PM
Opcode (3:0)
Enable
Out
· ALU should use combinational logic to calculate an output based on the four bit op-code input.
· ALU should pass the result to the out bus when enable line in high, and tri-state the out bus when the enable line is low.
· ALU should decode the 4 bit op-code according to the given in example below.
OPCODE ALU OPERATION
1. A+B
2. A–B
3. A Complement
4. A*B
5. A AND B
6. A OR B
7. A NAND B
8. A XOR B
2 of 3 12/23/2010 8:57 PM
3 of 3 12/23/2010 8:57 PM
LINEAR IC’s & APPLICATIONS (Common to EC/TC/IT/BM/ML) http://vtu.ac.in/index.php/scheme-and-syllabus/691-linear-ics-a-applicati...
LINEAR IC’s & APPLICATIONS (Common to EC/TC/IT/BM/ML)

Sub Code IA Marks

: 06EC46 : 25
Exam Hours
Hrs/ Week : 04 : 03
PART - A
UNIT 1:
Operational Amplifier Fundamentals: Basic Op-Amp circuit, Op-Amp parameters – Input and output voltage,
CMRR and PSRR, offset voltages and currents, Input and output impedances, Slew rate and Frequency limitations;
Op-Amps as DC Amplifiers- Biasing Op-Amps, Direct coupled -Voltage Followers, Non-inverting Amplifiers,
Inverting amplifiers, Summing amplifiers, Difference amplifier. (Text 1: Chapter 1 – 1.2, Chapter 2 – 2.1, 2.2, 2.3, 2.4,
2.5, and Chapter 3 – 3.1, 3.2, 3.3, 3.4, 3.5, 3.6)
7 Hours
UNIT 2:
Op-Amps as AC Amplifiers: Capacitor coupled Voltage Follower, High input impedance - Capacitor coupled Voltage
Follower, Capacitor coupled Non-inverting Amplifiers, High input impedance - Capacitor coupled Non-inverting
Amplifiers, Capacitor coupled Inverting amplifiers, setting the upper cut-off frequency, Capacitor coupled Difference
amplifier, Use of a single polarity power supply.
(Text 1: Chapter 4)
6 Hours
UNIT 3:
Op-Amps frequency response and compensation: Circuit stability, Frequency and phase response, Frequency
compensating methods, Band width, Slew rate effects, Zin Mod compensation, and circuit stability precautions. (Text 1:
Chapter 5 – 5.1, 5.2, 5.3, 5.5, 5.6, 5.9, 5.10)
1 of 4 12/23/2010 8:56 PM
6 Hours
UNIT 4:
OP-AMP Applications: Voltage sources, current sources and current sinks, Current amplifiers, instrumentation
amplifier, precision rectifiers, Limiting circuits, (Text 1: Chapter 6 – 6.1, 6.2, 6.4, 6.8, and Chapter 7 – 7.1, 7.2,
7.3)
7 Hours
PART – B
UNIT 5:
More applications: Clamping circuits, Peak detectors, sample and hold circuits, V to I and I to V converters, Log and
antilog amplifiers, Multiplier and divider, Triangular / rectangular wave generators, Wave form generator design, phase
shift oscillator, Wein bridge oscillator. (Text 1: Chapter 7 – 7.4, 7.5, 7.6; Chapters 10 -10.1, 10.2, 10.3, 10.5; Text 2:
Sections 4.5, 4.8 and 4.9)
6 Hours
UNIT 6:
Non-linear circuit applications: crossing detectors, inverting Schmitt trigger circuits, Monostable & Astable
multivibrator, Active Filters –First and second order Low pass & High pass filters. (Text 1: Chapter 9 – 9.2, 9.3, 9.5,
9.6; Chapter 11 – 11.2, 11.3, 11.4, 11.5)
7 Hours
UNIT 7:
Voltage Regulators: Introduction, Series Op-Amp regulator, IC Voltage regulators, 723 general purpose regulator,
Switching regulator. (Text 2: Chapter 6)
6 Hours
UNIT 8:
Other Linear IC applications: 555 timer - Basic timer circuit, 555 timer used as astable and monostable multivibrator,
Schmitt trigger; PLL-operating principles, Phase detector / comparator, VCO; D/A and A/ D converters – Basic DAC
Techniques, AD converters(Text 2: Chapter 8 – 8.1, 8.2, 8.3, 8.4, 8.5; Chapter 9 – 9.1, 9.2, 9.3, 9.4; Chapter 10 – 10.
1, 10.2, 10.3 ; Except 8.3.1, 8.4.1, 10.2.5, 10.4)
2 of 4 12/23/2010 8:56 PM
7 Hours
TEXT BOOKS:
1. “Operational Amplifiers and Linear IC’s”, David A. Bell, 2nd edition,
PHI/Pearson, 2004
2. “Linear Integrated Circuits”, D. Roy Choudhury and Shail B. Jain, 2nd edition, Reprint 2006, New Age
International
REFERENCE BOOKS:
1. “Op - Amps and Linear Integrated Circuits”, Ramakant A. Gayakwad, 4th edition, PHI,
2. “Operational Amplifiers and Linear Integrated Circuits”, Robert. F. Coughlin & Fred.F. Driscoll,
PHI/Pearson, 2006
3. “Op - Amps and Linear Integrated Circuits”, James M. Fiore, Thomson Learning, 2001
4. “Design with Operational Amplifiers and Analog Integrated Circuits”, Sergio Franco, TMH, 3e, 2005
Question Paper Pattern: Student should answer FIVE full questions out of 8 questions to be set each carrying 20
marks, selecting at least TWO questions from each part
Coverage in the Text books:
UNIT 1: (Text 1: Chapter 1 – 1.2, Chapter 2 – 2.1, 2.2, 2.3, 2.4, 2.5,
and Chapter 3 – 3.1, 3.2, 3.3, 3.4, 3.5, 3.6)
UNIT 2: Text 1: Chapter 4
UNIT 3: Text 1: (Text 1: Chapter 5 – 5.1, 5.2, 5.3, 5.5, 5.6, 5.9, 5.10)
UNIT 4: (Text 1: Chapter 6 – 6.1, 6.2, 6.4, 6.8, and Chapter 7 – 7.1, 7.2, 7.3)
UNIT 5: (Text 1: Chapter 7 – 7.4, 7.5, 7.6; Chapters 10 -10.1, 10.2, 10.3, 10.5;
Text 2: Sections 4.5, 4.8 and 4.9)
UNIT 6: Text 1: Chapter 9 – 9.2, 9.3, 9.5, 9.6; Chapter 11 – 11.2, 11.3, 11.4, 11.5
UNIT 7: Text 2: Chapter 6
3 of 4 12/23/2010 8:56 PM
UNIT 8: Text 2: Chapter 8 – 8.1, 8.2, 8.3, 8.4, 8.5; Chapter 9 – 9.1, 9.2, 9.3, 9.4;
Chapter 10 – 10. 1, 10.2, 10.3; Except 8.3.1, 8.4.1, 10.2.5, 10.4
4 of 4 12/23/2010 8:56 PM
MICROCONTROLLERS (Common to EC/TC/EE/IT/BM/ML) http://vtu.ac.in/index.php/scheme-and-syllabus/687-microcontrollers-co...
MICROCONTROLLERS (Common to EC/TC/EE/IT/BM/ML)

Sub Code IA Marks

: 06ES42 : 25
Exam Hours
Hrs/ Week : 04 : 03
PART – A
UNIT 1:
Microprocessors and microcontroller. Introduction, Microprocessors and Microcontrollers, A

Microprocessors survey. RISC & CISC CPU Architectures, Harvard & Von-Neumann CPU
architecture.
The 8051 Architecture: Introduction, 8051 Microcontroller Hardware, Input / Output Pins, Ports and
Circuits External Memory, Counter and Timers, Serial Data Input / Output,
Interrupts.
7 Hours
UNIT 2:
Addressing Modes and Operations: Introduction, Addressing modes, External data Moves, Code Memory,
Read Only Data Moves / Indexed Addressing mode, PUSH and POP Opcodes, Data exchanges, Example
Programs; Byte level logical Operations, Bit level Logical Operations, Rotate and Swap Operations, Example
Programs. Arithmetic Operations: Flags, Incrementing and Decrementing, Addition, Subtraction,
Multiplication and Division, Decimal Arithmetic, Example Programs.
7 Hours
1 of 4 12/23/2010 8:55 PM
UNIT 3:
Jump and Call Instructions: The JUMP and CALL Program range, Jumps, calls and Subroutines, Interrupts
and Returns, More Detail on Interrupts, Example Problems
6 Hours
UNIT 4:
8051 programming in C: Data types and time delays in 8051C, I/O programming, logic operations, data
conversion programs, accessing code ROM space, data
serialization.
6 Hours
PART – B
UNIT 5:
Timer / Counter Programming in 8051: Programming 8051 Timers, Counter Programming, programming
timers 0 and 1 in 8051 C
6 Hours
UNIT 6:
8051 Serial Communication: Basics of Serial Communication, 8051 connections to RS-232, 8051 Serial
communication Programming, Programming the second serial port, Serial port programming in C.
7 Hours
UNIT 7:
Interrupts Programming: 8051 Interrupts, Programming Timer Interrupts, Programming External Hardware
Interrupts, Programming the Serial Communication Interrupts, Interrupt Priority in the 8051/52, Interrupt
programming in C
6 Hours
2 of 4 12/23/2010 8:55 PM
UNIT 8:
8051 Interfacing and Applications: Interfacing 8051 to LCD, Keyboard, parallel and serial ADC, DAC,
Stepper motor interfacing, DC motor interfacing and PWM
7 Hours
TEXT BOOKS:
1. “The 8051 Microcontroller Architecture, Programming & Applications”, 2e Kenneth J. Ayala ;, Penram
International, 1996 / Thomson Learning 2005
2. “The 8051 Microcontroller and Embedded Systems – using assembly and C ”-, Muhammad Ali Mazidi
and Janice Gillespie Mazidi and Rollin D. McKinlay; PHI, 2006 / Pearson, 2006
REFERENCE BOOKS:
1. “Programming and Customizing the 8051 Microcontroller” Predko ;–, TMH
2. Microcontrollers: Architecture, Programming, Interfacing and System Design”,Raj Kamal, “Pearson

Education, 2005
3. “Microcontrollers- Theory and Applications”, Ajay V.Deshmukh; TMH,2005
4. “Microcontroller and its applications”, Dr.Ramani Kalpathi and Ganesh Raja; Sanguine Technical
publishers,Bangalore-2005
at least TWO questions from each part.
Coverage in the Text books:
UNIT 1:Text 1 – Chapter 1( excluding 1.2 and 1.4) and chapter 3, R1 - chapter 1
UNIT 2:Text 1-chapters 5, 6 & 7
UNIT 3: Text 1 - chapter 8
UNIT 4:Text 2 – chapter 7
3 of 4 12/23/2010 8:55 PM
UNIT 5: Text 2 – chapter 9
UNIT 8: Text 2 – chapter 12, chapter 13(13.1&13.2), chapter 17 ( except 17.1 )
4 of 4 12/23/2010 8:55 PM
MICROCONTROLLERS LAB (Common to EC/TC/EE/IT/BM/ML) http://vtu.ac.in/index.php/scheme-and-syllabus/692-microcontrollers-lab...
MICROCONTROLLERS LAB (Common to EC/TC/EE/IT/BM/ML)

Sub Code IA Marks

: 06ESL47 : 25
Exam Hours
Hrs/ Week : 03 : 03
I. PROGRAMMING
1. Data Transfer - Block move, Exchange, Sorting, Finding largest element in an array.
2. Arithmetic Instructions - Addition/subtraction, multiplication and division, square, Cube – (16 bits Arithmetic operations – bit
addressable).
3. Counters.
4. Boolean & Logical Instructions (Bit manipulations).
5. Conditional CALL & RETURN.
6. Code conversion: BCD – ASCII; ASCII – Decimal; Decimal - ASCII; HEX - Decimal and Decimal - HEX .
7. Programs to generate delay, Programs using serial port and on-Chip timer / counter.
II. INTERFACING:
Write C programs to interface 8051 chip to Interfacing modules to develop single chip solutions.
8. Simple Calculator using 6 digit seven segment display and Hex Keyboard interface to 8051.
9. Alphanumeric LCD panel and Hex keypad input interface to 8051.
10. External ADC and Temperature control interface to 8051.
11. Generate different waveforms Sine, Square, Triangular, Ramp etc. using DAC interface to 8051; change the frequency and
amplitude.
12. Stepper and DC motor control interface to 8051.
1 of 2 12/23/2010 8:57 PM
MICROCONTROLLERS LAB (Common to EC/TC/EE/IT/BM/ML) http://vtu.ac.in/index.php/scheme-and-syllabus/692-microcontrollers-lab...
13.. Elevator interface to 8051.
2 of 2 12/23/2010 8:57 PM
SIGNALS & SYSTEMS (Common to EC/TC/IT/BM/ML) http://vtu.ac.in/index.php/scheme-and-syllabus/689-signals-a-systems-c...
SIGNALS & SYSTEMS (Common to EC/TC/IT/BM/ML)

Sub Code IA Marks

: 06EC44 : 25
Exam Hours
Hrs/ Week : 04 : 03
PART – A
UNIT 1:
Introduction: Definitions of a signal and a system, classification of signals, basic Operations on signals, elementary signals,
Systems viewed as Interconnections of operations, properties of systems.
7 Hours
UNIT 2:
Time-domain representations for LTI systems – 1: Convolution, impulse response representation, Convolution Sum and
Convolution Integral.
6 Hours
UNIT 3:
Time-domain representations for LTI systems – 2: properties of impulse response representation, Differential and difference
equation Representations, Block diagram representations.
7 Hours
UNIT 4:
Fourier representation for signals – 1: Introduction, Discrete time and continuous time Fourier series (derivation of series
excluded) and their properties .
6 Hours
1 of 3 12/23/2010 8:56 PM
PART – B
UNIT 5:
Fourier representation for signals – 2: Discrete and continuous Fourier transforms(derivations of transforms are excluded) and
their properties.
6 Hours
UNIT 6:
Applications of Fourier representations: Introduction, Frequency response of LTI systems, Fourier transform representation of
periodic signals, Fourier transform representation of discrete time signals
7 Hours
UNIT 7:
Z-Transforms – 1: Introduction, Z – transform, properties of ROC, properties of Z – transforms, inversion of Z –

transforms.
07 Hours
UNIT 8:
Z-transforms – 2: Transform analysis of LTI Systems, unilateral Z- Transform and its application to solve difference
equations.
06 Hours
TEXT BOOK
Simon Haykin and Barry Van Veen “Signals and Systems”, John Wiley & Sons, 2001.Reprint 2002
REFERENCE BOOKS:
1. Alan V Oppenheim, Alan S, Willsky and A Hamid Nawab, “Signals and Systems” Pearson Education Asia / PHI, 2nd edition,
1997. Indian Reprint 2002
2. H. P Hsu, R. Ranjan, “Signals and Systems”, Scham’s outlines, TMH, 2006
3. B. P. Lathi, “Linear Systems and Signals”, Oxford University Press, 2005
4. Ganesh Rao and Satish Tunga, “Signals and Systems”, Sanguine Technical Publishers, 2004
at least TWO questions from each part
Coverage in the Text:
UNIT 1: 1.1, 1.2, 1.4 to 1.8
2 of 3 12/23/2010 8:56 PM
UNIT 2: 2.1, 2.2
UNIT 3: 2.3, 2.4, 2.5
UNIT 4: 3.1, 3.2, 3.3, 3.6
UNIT 5: 3.4, 3.5, 3.6
UNIT 6: 4.1, 4.2, 4.3, 4.5, 4.6.
UNIT 7: 7.1, 7.2, 7.3, 7.4, 7.5
UNIT 8: 7.6 (Excluding ‘relating the transfer function and the State-Variable description, determining the frequency response from
poles and zeros) and 7.8
3 of 3 12/23/2010 8:56 PM

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ELECTRONICS & COMMUNICATION ENGINEERING IV SEMESTE... http://vtu.ac.in/index.php/scheme-and-syllabus/685-electronics-a-commun...

A-PDF Merger DEMO : Purchase from www.A-PDF.com to remove the watermark

Teaching hours/week Examination

06ES– 42 Microcontrollers @ 04 03 25 100 125

06ES – 43 Control Systems @ 04 03 25 100 125

06EC – 44 Signals & Systems @ 04 03 25 100 125

06EC– 45 Fundamentals of HDL @ 04 03 25 100 125

Linear ICs &

06ESL – 47 Microcontrollers Lab @ 03 03 25 50 75

Total 24 06 24 200 700 900

Sub Code IA Marks

Total Hrs. : 52 Exam Marks : 100

Series solution of Ordinary Differential Equations and Special Functions

Probability: Addition rule, Conditional probability, Multiplication rule, Baye’s theorem.

Unit Chapter Article Numbers Page Nos.

I 27 27.1, 27.3, 27.5, 27.7, 27.8 914, 916 – 922

II 20 20.1 to 20.10 630 – 650

III 20 20.12 to 20.14, 20.16 to 20.19 652 – 658

IV 16 16.1 to 16.6, 16.10, 16.13, 16.14 507 – 514,

23 23.9, 23.10, 23.11, 23.14, 23.16 to 755 – 762, 765

VI 23 23.19 to 23.22, 23.26 to 23.30 776 – 780

VII 23 23.31 to 23.37 791 – 816

1. Higher Engineering Mathematics by B.V. Ramana (Tata-Macgraw Hill).

2. Advanced Modern Engineering Mathematics by Glyn James – Pearson Education.

1. One question is to be set from each unit.

CONTROL SYSTEMS (Common to EC/TC/EE/IT/BM/ML)

Sub Code IA Marks

Total Hrs. : 52 Exam Marks : 100

COVERAGE IN THE TEXT BOOK:

UNIT 1: 1.1, 2.1, 2.2, 2.7

UNIT 2: 2.4, 2.5, 2.6, 2.7

UNIT 3: 5.1, 5.2, 5.3, 5.4, 5.5

UNIT 4: 6.1, 6.2, 6.4, 6.5, 6.6

UNIT 5: 7.1, 7.2, 7.3

UNIT 6: 9.1, 9.2, 9.3, 9.4,

UNIT 7: 8.1, 8.2, 8.4, 8.5, 8.6

UNIT 8: 12.1, 12.2, 12.3, 12.6

FUNDAMENTALS OF HDL (Common to EC/TC/IT/BM/ML)

Sub Code IA Marks

Total Hrs. : 52 Exam Marks : 100

Advanced HDL Descriptions: File Processing, Examples of File Processing

1. HDL Programming (VHDL and Verilog)- Nazeih M.Botros- Dreamtech Press

1. Verilog HDL –Samir Palnitkar-Pearson Education

2. VHDL -Douglas perry-Tata McGraw-Hill

3. A Verilog HDL Primer- J.Bhaskar – BS Publications

4. Circuit Design with VHDL-Volnei A.Pedroni-PHI

HDL LAB (Common to EC/TC/IT/BM/ML)

Sub Code IA Marks

Hrs/ Week : 03 Exam Hours : 03

Total Hrs. : 42 Exam Marks : 50

PROGRAMMING (using VHDL and Verilog)

1. Write HDL code to realize all the logic gates

2. Write a HDL program for the following combinational designs

b. 8 to 3 (encoder without priority & with priority)

d. 4 bit binary to gray converter

e. Multiplexer, de-multiplexer, comparator.

OPCODE ALU OPERATION

LINEAR IC’s & APPLICATIONS (Common to EC/TC/IT/BM/ML)

Sub Code IA Marks

Total Hrs. : 52 Exam Marks : 100

1. “Operational Amplifiers and Linear IC’s”, David A. Bell, 2nd edition,

Coverage in the Text books: