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5 4 3 2 1

M50S / X55S
BLOCK DIAGRAM CPU
Clock Generator Discharge Circuit
Page 57
ICS ICS9LPR363
MEROM
Page 29
Reset Circuit
Page 3~5 Page 32
D D
Thermal Sensor
LCD Panel Maxim MAX6657 Sequnce Logic
Page 50 Page 68
Page 45

CRT PWM Fan DC Conn.


Page 46 MXM North Bridge Page 50 Page 60
Intel 965PM DDR2 So-DIMM
TV-Out Page 7~9 Skew Holes Battery Conn.
Page 70
Page 47 Page 10~16 Page 65 Page 60

HDMI
Page 48

ODD MiniCard
Page 51 WLAN
C
Power C

Page 53
HDD VCORE
Page 51 MiniCard Page 80
Robson
1394
CardReader 1394 Page 58 System
Page 41
Ricoh R5C833 Page 81

Cardreader Page 40~41


GigaLAN
1.5VS & 1.05VS
Page 42 Marvell 88E8055 Transformer RJ45/RJ11
South Bridge Page 33 Page 34 Page 34
Page 82
TPM 1.2 ICH8-M
Page 62 DDR & VTT
eSATA Page 83
Debug Conn. JMicron JMB360
Page 44 Page 66 +1.25VS
B B

Touchpad Page 84

Page 31
EC ExpressCard
Page 43 Charger
ITE IT8752E
Keyboard Page 30
USB/eSATA Page 88
Page 66
Page 31 Detect
CIR SPI ROM
Page 31 Page 30
USB Port MiniCard Page 90
Page 45 WWAN
Load Switch
Page 67
Azalia MDC USB Port Page 91
Page 35 Page 65
MiniCard Power Protect
Audio Amp
Azalia Codec USB Port TV Tuner Page 92
Page 37
Realtek ALC888S Page 65 Page 64

Jack Page 36
A

Page 95
Fingerprint Bluetooth A

Page 63 Page 61
Array Mic.DSP
Array Mic CMOS Camera
Fortemedia FM2010 Title : Block Diagram
Page 45 Page 45
Page 38 Page 20~23 ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 1 of 95
5 4 3 2 1
5 4 3 2 1

ICH8-M GPIO SETTING EC IT8752E GPIO SETTING 965GM/PM co-layout option:


Pin Pin Name Signal Name Type Pin Pin Name Signal Name Type Pin Pin Name Signal Name Type
AG12 BM_BUSY#/GPIO0 PM_BMBUSY# I 28 PWM0/GPA0 PWR_LED_UP# O 105 CLKRUN#/GPH0 PM_CLKRUN# I/O 965PM
AJ8 TACH1/GPIO1 BT_DECT# I 29 PWM1/GPA1 CHG_LED_UP# O 106 CRX1/GPH1 3G_ON# O
Change:
F8 PIRQE#/GPIO2 PCI_INTE# I/OD 32 PWM2/GPA2 107 CTX1/GPH2 3G_LED_ON# O U1001 to 965PM, U3601 to ALC888S
D D
G11 PIRQF#/GPIO3 PCI_INTF# I/OD 33 PWM3/GPA3 108 GPH3 BAT_LEARN I/O R1213~R1219 to 0ohm
C1406, C1501~C1504, C1506~C1507, C1510, C1514 to 0ohm
F12 PIRQG#/GPIO4 PCI_INTG# I/OD 34 PWM4/GPA4 LCD_BL_PWM O 109 GPH4
B3 PIRQH#/GPIO5 PCI_INTH# I/OD 35 PWM5/GPA5 FAN_PWM O 110 GPH5 NUM_LED O Mount:
D4801~D4803
AJ9 TACH2/GPIO6 36 PWM6/GPA6 111 GPH6 CAP_LED O
F4801
AH9 TACH3/GPIO7 WLAN_LED_ON O 38 PWM7/GPA7 74 ADC0/GPI0 NV_OVERT# I J4801, J7001
AE16 GPIO8 EXT_SMI# I 122 RXD/GPB0 CHG_EN# O 75 ADC1/GPI1 SUS_PWRGD I H7001~H7004
Q4801
AG19 WOL_EN/GPIO9 123 TXD/GPB1 PRECHG O 76 ADC2/GPI2 ALL_SYS_PWRGD I R1112~R1117, R1203~R1212, R1502, R2910, R3618~R3620, R4801~R4804
AJ24 CLGPIO1/GPIO10 139 CTX0/GPB2 77 ADC3/GPI3 CPU_PWRGD I RX2901~RX2902, RX4801~RX4810
CX1201~CX1232
AG22 SMBALERT#/GPIO11 SMB_ALERT# I 124 SMCLK0/GPB3 SMB0_CLK I/O 78 ADC4/GPI4 PWR_MON I
AC19 GPIO12 EXT_SCI# I 125 SMDAT0/GPB4 SMB0_DAT I/O 79 ADC5/GPI5 ALS_DA I Un-mount:
R1202, R1401~R1403, R1501, R1503~R1505, R2909, R3621, R7001~R7008
AH21 GLAN_DOCK#/GPIO13 142 GA20/GPB5 A20GATE O 80 ADC6/GPI6
RN7001~RN7011
AF22 CLGPIO2/GPIO14 4 KBRST#/GPB6 RC_IN# O 81 ADC7/GPI7 RNX1201, RNX2901, RNX2915
AE20 STP_PCI#/GPIO15 STP_PCI# I/O 126 GPB7 PM_RSMRST# O 84 DAC0/GPJ0 EC_CLK_EN L1501~L1505
C1404~C1405, C1407~C1409, C1505, C1509, C1511~C1513
AJ14 DPRSLPVR/GPIO16 PM_DPRSLPVR O 133 CRX0/GPC0 CRX0 I 85 DAC1/GPJ1 PM_PWROK CE1404, CE1501~CE1503
AG8 TACH0/GPIO17 WLAN_ON# O 129 SMCLK1/GPC1 SMB1_CLK I/O 86 DAC1/GPJ2
C C
AH12 GPIO18 130 SMDAT1/GPC2 SMB1_DAT I/O 87 DAC1/GPJ3
AJ10 GPIO19/SATA1GP 64 GPC3 PM_PWRBTN# O 88 DAC1/GPJ4 965GM
AE11 GPIO20 BT_LED_ON O 136 WUI2/GPC4 AC_IN_OC# I 89 DAC1/GPJ5
Change:
AJ12 SATA0GP/GPIO21 65 GPC5 OP_SD# O 15 GPK0 U1001 to 965GM
AG10 SCLOCK/GPIO22 140 WUI3/GPC6 BAT1_IN_OC# I 16 GPK1 R1213~R1218 to 150ohm
R1219 to 1.3Kohm
E6 LDRQ1#/GPIO23 20 GPC7 RFON_SW# I 17 GPK2
AJ27 CLGPIO0/GPIO24 22 WUI0/GPD0 PWRLIMIT# I 18 GPK3 Un-mount:
D4801~D4803
AG18 STP_CPU#/GPIO25 STP_CPU# O 25 WUI1/GPD1 PM_SUSC# I 48 GPK4
F4801
AH27 S4_STATE#/GPIO26 26 WUI4/GPD2 BUF_PLT_RST# I 49 GPK5 J4801, J7001
AH25 QRT_STATE0/GPIO27 BT_ON# O 27 ECSCI#/GPD3 EXT_SCI# O 62 GPK6 H7001~H7004
Q4801
AD16 QRT_STATE1/GPIO28 CB_SD# O 19 GPD4 EXT_SMI# O 63 GPK7 R1112~R1117, R1203~R1212, R1502, R2910, R3618~R3620, R4801~R4804
AG17 OC#5/GPIO29 INT_USB_OC# I 37 GPD5 LCD_BACKOFF# O 90 GPL0 RX2901~RX2902, RX4801~RX4810
CX1201~CX1232
AD12 OC#6/GPIO30 INT_USB_OC# I 53 TACH0 / GPD6 FAN0_TACH I 91 GPL1
AJ18 OC#7/GPIO31 INT_USB_OC# I 54 GPD7 92 GPL2 Mount:
R1202, R1401~R1403, R1501, R1503~R1505, R2909, R3621, R7001~R7008
AH11 CLKRUN#/GPIO32 PM_CLKRUN# O 23 GPE0 VSUS_ON O 93 GPL3
RN7001~RN7011
B AE10 AZ_DOCK_EN#/GPIO33 94 GPE1 SUSC_EC# O 119 GPL4 RNX1201, RNX2901, RNX2915 B

AG14 AZ_DOCK_RST#/GPIO34 95 GPE2 SUSB_EC# O 120 GPL5 L1501~L1505


C1404~C1409, C1501~C1507, C1509~C1514
AG13 SATACLKREQ#/GPIO35 96 GPE3 CPU_VRON O 134 GPL6 CE1404, CE1501~CE1503
AF11 SATA2GP/GPIO36 EMAIL_LED# O 141 PWRSW/GPE4 PWR_SW# I 135 GPL7
AG11 SATA3GP/GPIO37 PCB_ID0 I 39 WUI5/GPE5 BAT2_IN_OC# I
AF9 SLOAD/GPIO38 PCB_ID1 I 21 GPE6 LID_SW# I
AJ11 SDATAOUT0/GPIO39 PCB_ID2 I 24 GPE7 INSTANT_ON# I
AG16 OC#1/GPIO40 USB_CON01_OC# I 97 PS2CLK0/GPF0
AG15 OC#2/GPIO41 USB_CON23_OC# I 98 PS2DAT0/GPF1 COLOREN# I
AE15 OC#3/GPIO42 USB_CON23_OC# I 99 PS2CLK1/GPF2 MARATHON# I
AF15 OC#4/GPIO43 NEWCARD_OC# I 100 PS2DAT1/GPF3 DISTP# I
AD10 SATAOUT1/GPIO48 101 PS2CLK2/GPF4 TP_CLK I/O
AG29 CPUPWRGD/GPIO49 H_PWRGD O 102 PS2DAT2/GPF5 TP_DAT I/O
E18 REQ1#/GPIO50 PCI_REQ#1 I/O 131 SMCLK2/GPF6 THRO_CPU O
C18 GNT1#/GPIO51 132 SMDAT2/GPF7 TP_LED O
A B19 REQ2#/GPIO52 PCI_REQ#2 I/O 118 WUI7/GPG0 A

F18 GNT2#/GPIO53 121 GPG1 PM_SUSB# I


A11 REQ3#/GPIO54 PCI_REQ#3 I/O 112 GPG2
C10 GNT3#/GPIO55 116 GPG6
Title : System Setting
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 2 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

10 H_A#[16:3] U0301A 10 H_D#[15:0] U0301B H_D#[47:32] 10


H_A#3 J4 H1 H_ADS# 10 H_D#0 E22 Y22 H_D#32
H_A#4 A[3]# ADS# H_D#1 D[0]# D[32]# H_D#33
D L5 A[4]# BNR# E2 H_BNR# 10 F24 D[1]# D[33]# AB24 D
H_A#5 L4 G5 +VCCP H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 10 D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
H_A#7 A[6]# H_D#4 D[3]# D[35]# H_D#36
M3 A[7]# DEFER# H5 H_DEFER# 10 F23 D[4]# D[36]# V23
H_A#8 N2 F21 H_DRDY# 10 H_D#5 G25 T22 H_D#37
H_A#9 A[8]# DRDY# R0301 H_D#6 D[5]# D[37]# H_D#38
J1 A[9]# DBSY# E1 H_DBSY# 10 E25 D[6]# D[38]# U25
H_A#10 N3 56Ohm H_D#7 E23 U23 H_D#39
H_A#11 A[10]# H_D#8 D[7]# D[39]# H_D#40
P5 A[11]# BR0# F1 H_BR0# 10 K24 D[8]# D[40]# Y25
H_A#12 P2 H_D#9 G24 W22 H_D#41
H_A#13 A[12]# H_IERR# H_D#10 D[9]# D[41]# H_D#42
L2 A[13]# IERR# D20 J24 D[10]# D[42]# Y23
H_A#14 P4 B3 H_D#11 J23 W24 H_D#43
A[14]# INIT# H_INIT# 20 D[11]# D[43]#
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 10 F26 D[13]# D[45]# AA23
10 H_ADSTB#0 M1 H_D#14 K22 AA24 H_D#46
ADSTB[0]# H_D#15 D[14]# D[46]# H_D#47
10 H_REQ#[4:0] RESET# C1 H_CPURST# 10 H23 D[15]# D[47]# AB25
H_REQ#0 K3 F3 H_RS#0 10 10 H_DSTBN#0 J26 Y26 H_DSTBN#2 10
H_REQ#1 REQ[0]# RS[0]# DSTBN[0]# DSTBN[2]#
H2 REQ[1]# RS[1]# F4 H_RS#1 10 10 H_DSTBP#0 H26 DSTBP[0]# DSTBP[2]# AA26 H_DSTBP#2 10
H_REQ#2 K2 G3 H_RS#2 10 10 H_DINV#0 H25 U22 H_DINV#2 10
H_REQ#3 REQ[2]# RS[2]# DINV[0]# DINV[2]#
J3 REQ[3]# TRDY# G2 H_TRDY# 10
H_REQ#4 L1 REQ[4]# 10 H_D#[31:16] H_D#[63:48] 10
10 H_A#[35:17] G6 H_HIT# 10 H_D#16 N22 AE24 H_D#48
H_A#17 HIT# H_D#17 D[16]# D[48]# H_D#49
Y2 A[17]# HITM# E4 H_HITM# 10 K25 D[17]# D[49]# AD24
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AB22
H_A#20 H_D#20 H_D#52
H_A#21
W6
U4
A[20]# BPM[1]# AD3
AD1
AGTL+ I/O H_D#21
L23
M24
D[20]# D[52]# AB21
AC26 H_D#53
A[21]# BPM[2]# D[21]# D[53]#
H_A#22
H_A#23
Y5 A[22]# BPM[3]# AC4 Voltage H_D#22
H_D#23
L22 D[22]# D[54]# AD20 H_D#54
H_D#55
U1 A[23]# PRDY# AC2 M23 D[23]# D[55]# AE22
H_A#24 R4 A[24]# PREQ# AC1 H_PREQ# Reference H_D#24 P25 D[24]# D[56]# AF23 H_D#56
H_A#25 T5 AC5 H_TCK H_D#25 P23 AC25 H_D#57
H_A#26 A[25]# TCK H_TDI H_D#26 D[25]# D[57]# H_D#58
C
T3 A[26]# TDI AA6 P22 D[26]# D[58]# AE21 C
H_A#27 W2 AB3 +VCCP +VCCP H_D#27 T24 AD21 H_D#59
H_A#28 A[27]# TDO H_TMS H_D#28 D[27]# D[59]# H_D#60
W5 A[28]# TMS AB5 R24 D[28]# D[60]# AC22
H_A#29 Y4 AB6 H_TRST# H_D#29 L25 AD23 H_D#61
H_A#30 A[29]# TRST# H_D#30 D[29]# D[61]# H_D#62
U2 A[30]# DBR# C20 T25 D[30]# D[62]# AF22
H_A#31 V4 R0302 R0304 H_D#31 N25 AC23 H_D#63
H_A#32 A[31]# 1KOhm 1KOhm D[31]# D[63]#
W3 A[32]# 10 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 10
H_A#33 AA4 THERMAL 1% 10 H_DSTBP#1 M26 AF24 H_DSTBP#3 10
H_A#34 A[33]# DSTBP[1]# DSTBP[3]#
AB2 A[34]# 10 H_DINV#1 N24 DINV[1]# DINV[3]# AC20 H_DINV#3 10
H_A#35 AA3 D21 H_PROCHOT_S#
A[35]# PROCHOT# GTL_REF H_COMP0
10 H_ADSTB#1 V1 ADSTB[1]# THRMDA A24 CPU_THRM_DA 50 AD26 GTLREF COMP[0] R26
B25 CPU_THRM_DC 50 CPU_T1 C23 MISC U26 H_COMP1
THRMDC CPU_T2 TEST1 COMP[1] H_COMP2
20 H_A20M# A6 A20M# D25 TEST2 COMP[2] AA1
A5 C7 R0305 T0305 1 C24 Y1 H_COMP3
20 H_FERR# FERR# THERMTRIP# PM_THRMTRIP# 11,32 TEST3 COMP[3]
20 H_IGNNE# C4 2KOhm AF26
IGNNE# 1% T0306 TEST4
1 AF1 TEST5 DPRSTP# E5 H_DPRSTP# 11,20,80
20 H_STPCLK# D5 STPCLK# A26 TEST6 DPSLP# B5 H_DPSLP# 20
20 H_INTR C6 H CLK 1 T0303 D24 H_DPWR# 10
LINT0 DPWR#
20 H_NMI B4 A22 CLK_CPU_BCLK 29 29 CPU_BSEL0 B22 D6 H_PWRGD 20
LINT1 BCLK[0] BSEL[0] PWRGOOD
20 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 29 29 CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 10
1 29 CPU_BSEL2 C21 AE6 PM_PSI# 80
T0304 BSEL[2] PSI#
M4 RSVD1
N5 SOCKET478B
RSVD2
T2 RSVD3
V3 RSVD4
B2 RSVD5 BCLK FSB BSEL2BSEL1BSEL0
C3 RSVD6
T0301 1 D2 166 667 0 1 1
RSVD7
D22 RSVD8
D3 RSVD9 200 800 0 1 0
T0302 1 F6 RSVD10
B B

Default Strapping When XDP/ITP Not Used CPU Test Pin AGTL+ I/O Buffer Compensation
SOCKET478B
+VCCP R0306 @ R0308
1KOhm 1% 27.4Ohm 1%
H_PREQ# R0312 1 2 54.9Ohm 1% 2 1 CPU_T1 H_COMP0 1 2
H_TDI R0313 1 2 150Ohm 1%
H_TMS R0314 1 2 39Ohm
H_TCK R0315 1 2 27.4Ohm 1%

H_TRST# R0303 1 2 649Ohm 1%


R0307 @ R0309
1KOhm 1% 54.9Ohm 1%
2 1 CPU_T2 H_COMP1 1 2

R0310
27.4Ohm 1%
H_COMP2 1 2

D0301 @
RB751V-40
H_PROCHOT_S# 1 2 PWRLIMIT# 30,88 R0311
54.9Ohm 1%
H_COMP3 1 2
A 3 A
D Q0301
2N7002

11
THRO_CPU 30
G
S 2

Title : CPU_Merom(Host)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 3 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

U0301D
A4 VSS1 VSS82 P6
A8 VSS2 VSS83 P21
A11 VSS3 VSS84 P24
D A14 VSS4 VSS85 R2 D
A16 VSS5 VSS86 R5
+VCORE +VCORE
Max: 44A A19 VSS6 VSS87 R22
A23 VSS7 VSS88 R25
U0301C AF2 T1
VSS8 VSS89
A7 VCC1 VCC68 AB20 B6 VSS9 VSS90 T4
A9 VCC2 VCC69 AB7 B8 VSS10 VSS91 T23
A10 VCC3 VCC70 AC7 B11 VSS11 VSS92 T26
A12 VCC4 VCC71 AC9 B13 VSS12 VSS93 U3
A13 VCC5 VCC72 AC12 B16 VSS13 VSS94 U6
A15 VCC6 VCC73 AC13 B19 VSS14 VSS95 U21
A17 VCC7 VCC74 AC15 B21 VSS15 VSS96 U24
A18 VCC8 VCC75 AC17 B24 VSS16 VSS97 V2
A20 VCC9 VCC76 AC18 C5 VSS17 VSS98 V5
B7 VCC10 VCC77 AD7 C8 VSS18 VSS99 V22
B9 VCC11 VCC78 AD9 C11 VSS19 VSS100 V25
B10 VCC12 VCC79 AD10 C14 VSS20 VSS101 W1
B12 VCC13 VCC80 AD12 C16 VSS21 VSS102 W4
B14 VCC14 VCC81 AD14 C19 VSS22 VSS103 W23
B15 VCC15 VCC82 AD15 C2 VSS23 VSS104 W26
B17 VCC16 VCC83 AD17 C22 VSS24 VSS105 Y3
B18 VCC17 VCC84 AD18 C25 VSS25 VSS106 Y6
B20 VCC18 VCC85 AE9 D1 VSS26 VSS107 Y21
C9 VCC19 VCC86 AE10 D4 VSS27 VSS108 Y24
C10 VCC20 VCC87 AE12 D8 VSS28 VSS109 AA2
C12 AE13 D11 AA5
VCC21 VCC88 VSS29 VSS110
C13 VCC22 VCC89 AE15 D13 VSS30 VSS111 AA8
C15 VCC23 VCC90 AE17 D16 VSS31 VSS112 AA11
C17 VCC24 VCC91 AE18 D19 VSS32 VSS113 AA14
C18 VCC25 VCC92 AE20 D23 VSS33 VSS114 AA16
C
D9 VCC26 VCC93 AF9 D26 VSS34 VSS115 AA19 C
D10 VCC27 VCC94 AF10 E3 VSS35 VSS116 AA22
D12 VCC28 VCC95 AF12 E6 VSS36 VSS117 AA25
D14 VCC29 VCC96 AF14 E8 VSS37 VSS118 AB1
D15 VCC30 VCC97 AF15 E11 VSS38 VSS119 AB4
D17 VCC31 VCC98 AF17
+VCCP
1.00V~1.10V E14 VSS39 VSS120 AB8
D18 AF18 E16 AB11
E7
VCC32 VCC99
AF20
Max: 4.5A E19
VSS40 VSS121
AB13
VCC33 VCC100 VSS41 VSS122
E9 VCC34 E21 VSS42 VSS123 AB16
E10 VCC35 VCCP1 G21 E24 VSS43 VSS124 AB19
E12 VCC36 VCCP2 V6 F5 VSS44 VSS125 AB23
E13 VCC37 VCCP3 J6 F8 VSS45 VSS126 AB26
E15 VCC38 VCCP4 K6 F11 VSS46 VSS127 AC3
E17 VCC39 VCCP5 M6 F13 VSS47 VSS128 AC6
E18 VCC40 VCCP6 J21 F16 VSS48 VSS129 AC8
E20 VCC41 VCCP7 K21 F19 VSS49 VSS130 AC11
F7 VCC42 VCCP8 M21 F2 VSS50 VSS131 AC14
F9 VCC43 VCCP9 N21
+1.5VS
1.425V~1.575V F22 VSS51 VSS132 AC16
F10 N6 F25 AC19
F12
VCC44 VCCP10
R21
Max: 130mA G4
VSS52 VSS133
AC21
VCC45 VCCP11 VSS53 VSS134
F14 VCC46 VCCP12 R6 G1 VSS54 VSS135 AC24
F15 VCC47 VCCP13 T21 G23 VSS55 VSS136 AD2
F17 T6 C0401 C0402 G26 AD5
VCC48 VCCP14 0.01UF/16V 10UF/10V VSS56 VSS137
F18 VCC49 VCCP15 V21 H3 VSS57 VSS138 AD8
F20 VCC50 VCCP16 W21 H6 VSS58 VSS139 AD11
AA7 VCC51 H21 VSS59 VSS140 AD13
AA9 VCC52 VCCA1 B26 H24 VSS60 VSS141 AD16
AA10 VCC53 VCCA2 C26 J2 VSS61 VSS142 AD19
AA12 VCC54 J5 VSS62 VSS143 AD22
AA13 VCC55 VID[0] AD6 VR_VID0 80 J22 VSS63 VSS144 AD25
AA15 VCC56 VID[1] AF5 VR_VID1 80 J25 VSS64 VSS145 AE1
B AA17 VCC57 VID[2] AE5 VR_VID2 80 K1 VSS65 VSS146 AE4 B
AA18 VCC58 VID[3] AF4 VR_VID3 80 K4 VSS66 VSS147 AE8
AA20 VCC59 VID[4] AE3 VR_VID4 80 K23 VSS67 VSS148 AE11
AB9 VCC60 VID[5] AF3 VR_VID5 80 K26 VSS68 VSS149 AE14
AC10 VCC61 VID[6] AE2 VR_VID6 80 L3 VSS69 VSS150 AE16
AB10 VCC62 R1.1-01 L6 VSS70 VSS151 AE19
AB12 VCC63
2 1 +VCORE L21 VSS71 VSS152 AE23
AB14 AF7 R0401 100Ohm 1% L24 AE26
VCC64 VCCSENSE VSS72 VSS153
AB15 VCC65 VCCSENSE 80 M2 VSS73 VSS154 A2
AB17 VCC66 VSSSENSE 80 M5 VSS74 VSS155 AF6
AB18 VCC67 VSSSENSE AE7 M22 VSS75 VSS156 AF8
1 2 M25 VSS76 VSS157 AF11
SOCKET478B R0402 100Ohm 1% N1 AF13
VSS77 VSS158
N4 VSS78 VSS159 AF16
N23 VSS79 VSS160 AF19
N26 VSS80 VSS161 AF21
P3 VSS81 VSS162 A25
AF25
VSS163
SOCKET478B

A A

Title : CPU_Merom(PWR)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 4 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

+VCORE
Intel: 330uF *6, 22uF *32
Design IP: 330uF *2, 10uF *32
F3Sv: 220uF *1, 10uF *16
D D
+
CE0501
220UF/2V
@

C0502 C0505 C0506 C0507 C0509 C0501 C0503 C0504


10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
@ @ @

C0510 C0511 C0512 C0514 C0516 C0508 C0513 C515


10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
@ @ @

R1.1-02

C C

+VCCP
Intel: 270uF *1, 0.1uF *6
Design IP: 150uF *1, 0.1uF *6, 10uF *1
F3S: 100uF *1, 0.1 uF *4

+
CE0502
100UF/2.5V

C0517 C0518 C0519 C0520


0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V

B B

A A

Title : CPU_Capacitors
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 5 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : CPU-****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 6 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

Reserved for 3G
M_CLK_DDR0 M_CLK_DDR1

C0706 C0707
10PF/50V 10PF/50V
D @ @ D

M_CLK_DDR#0 M_CLK_DDR#1

Reverse Type
H = 9.2 mm

9,13 M_A_A[13:0] J0701A M_A_DQ[63:0] 13


M_A_A0 102 5 M_A_DQ0
M_A_A1 A0 DQ0 M_A_DQ4
101 A1 DQ1 7
M_A_A2 100 17 M_A_DQ1
M_A_A3 A2 DQ2 M_A_DQ2
99 A3 DQ3 19
M_A_A4 98 4 M_A_DQ6 +1.8V
M_A_A5 A4 DQ4 M_A_DQ5 J0701B
97 A5 DQ5 6
M_A_A6 94 14 M_A_DQ3 112 18
M_A_A7 A6 DQ6 M_A_DQ7 VDD1 VSS16
92 16 111 24
M_A_A8 A7 DQ7 M_A_DQ12 VDD2 VSS17
93 A8 DQ8 23 2 CN0701A
1 0.1UF/25V 117 VDD3 VSS18 41
M_A_A9 91 25 M_A_DQ15 C0701 4 CN0701B
3 0.1UF/25V 96 53
M_A_A10 A9 DQ9 M_A_DQ11 10UF/10V VDD4 VSS19
105 35 6 CN0701C
5 0.1UF/25V 95 42
M_A_A11 A10/AP DQ10 M_A_DQ10 VDD5 VSS20
90 A11 DQ11 37 8 CN0701D
7 0.1UF/25V 118 VDD6 VSS21 54
M_A_A12 89 20 M_A_DQ9 81 59
C
M_A_A13 A12 DQ12 M_A_DQ8 VDD7 VSS22 C
116 A13 DQ13 22 82 VDD8 VSS23 65
9,11 M_A_A14 86 36 M_A_DQ14 87 60
A14 DQ14 M_A_DQ13 VDD9 VSS24
84 A15 DQ15 38 103 VDD10 VSS25 66
9,13 M_A_BS2 85 43 M_A_DQ21 88 127
A16_BA2 DQ16 M_A_DQ16 +3VS VDD11 VSS26
DQ17 45 104 VDD12 VSS27 139
9,13 M_A_BS0 107 55 M_A_DQ22 128
BA0 DQ18 M_A_DQ23 VSS28
9,13 M_A_BS1 106 BA1 DQ19 57 199 VDDSPD VSS29 145
9,11 M_CS#0 110 44 M_A_DQ17 165
S0# DQ20 M_A_DQ20 C0702 C0703 VSS30
9,11 M_CS#1 115 S1# DQ21 46 83 NC1 VSS31 171
30 56 M_A_DQ19 1UF/10V 0.1UF/16V 120 172
11 M_CLK_DDR0 CK0 DQ22 NC2 VSS32
11 M_CLK_DDR#0 32 58 M_A_DQ18 50 177
CK0# DQ23 M_A_DQ25 NC3 VSS33
11 M_CLK_DDR1 164 CK1 DQ24 61 69 NC4 VSS34 187
166 63 M_A_DQ29 163 178
11 M_CLK_DDR#1 CK1# DQ25 NCTEST VSS35
9,11 M_CKE0 79 73 M_A_DQ26 190
CKE0 DQ26 M_A_DQ30 VSS36
9,11 M_CKE1 80 CKE1 DQ27 75 8,9,11 M_VREF_MCH 1 VREF VSS37 9
9,13 M_A_CAS# 113 62 M_A_DQ28 21
CAS# DQ28 M_A_DQ24 C0704 C0705 VSS38
9,13 M_A_RAS# 108 RAS# DQ29 64 201 GND0 VSS39 33
9,13 M_A_WE# 109 74 M_A_DQ31 1UF/10V 0.1UF/16V 202 155
WE# DQ30 M_A_DQ27 GND1 VSS40
198 SA0 DQ31 76 VSS41 34
200 123 M_A_DQ33 203 132
SA1 DQ32 M_A_DQ36 NP_NC1 VSS42
8,22,29,38,44 SMB_CLK_S 197 SCL DQ33 125 204 NP_NC2 VSS43 144
8,22,29,38,44 SMB_DAT_S 195 135 M_A_DQ39 156
SDA DQ34 M_A_DQ35 VSS44
DQ35 137 47 VSS1 VSS45 168
9,11 M_ODT0 114 124 M_A_DQ38 133 2
ODT0 DQ36 M_A_DQ32 VSS2 VSS46
9,11 M_ODT1 119 ODT1 DQ37 126 183 VSS3 VSS47 3
13 M_A_DM[7:0] 134 M_A_DQ37 77 15
M_A_DM0 DQ38 M_A_DQ34 VSS4 VSS48
10 DM0 DQ39 136 12 VSS5 VSS49 27
M_A_DM1 26 141 M_A_DQ41 48 39
M_A_DM2 DM1 DQ40 M_A_DQ44 VSS6 VSS50
52 DM2 DQ41 143 184 VSS7 VSS51 149
M_A_DM3 67 151 M_A_DQ45 78 161
M_A_DM4 DM3 DQ42 M_A_DQ43 VSS8 VSS52
B 130 DM4 DQ43 153 71 VSS9 VSS53 28 B
M_A_DM5 147 140 M_A_DQ40 72 40
M_A_DM6 DM5 DQ44 M_A_DQ47 VSS10 VSS54
170 DM6 DQ45 142 121 VSS11 VSS55 138
M_A_DM7 185 152 M_A_DQ46 122 150
DM7 DQ46 M_A_DQ42 VSS12 VSS56
13 M_A_DQS[7:0] DQ47 154 196 VSS13 VSS57 162
M_A_DQS0 13 157 M_A_DQ53 193
M_A_DQS1 DQS0 DQ48 M_A_DQ49 VSS14
31 DQS1 DQ49 159 8 VSS15
M_A_DQS2 51 173 M_A_DQ55
M_A_DQS3 DQS2 DQ50 M_A_DQ50 DDR2_DIMM_200P
70 DQS3 DQ51 175
M_A_DQS4 131 158 M_A_DQ48
M_A_DQS5 DQS4 DQ52 M_A_DQ52
148 DQS5 DQ53 160
M_A_DQS6 169 174 M_A_DQ54
M_A_DQS7 DQS6 DQ54 M_A_DQ51
13 M_A_DQS#[7:0] 188 DQS7 DQ55 176
M_A_DQS#0 11 179 M_A_DQ56
M_A_DQS#1 DQS#0 DQ56 M_A_DQ60
29 DQS#1 DQ57 181
M_A_DQS#2 49 189 M_A_DQ62
M_A_DQS#3 DQS#2 DQ58 M_A_DQ61
68 DQS#3 DQ59 191
M_A_DQS#4 129 180 M_A_DQ58
M_A_DQS#5 DQS#4 DQ60 M_A_DQ57
146 DQS#5 DQ61 182
M_A_DQS#6 167 192 M_A_DQ59
M_A_DQS#7 DQS#6 DQ62 M_A_DQ63
186 DQS#7 DQ63 194

DDR2_DIMM_200P

A A

Title : DIM_So-DIMM 0
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 7 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

Reserved for 3G
M_CLK_DDR2 M_CLK_DDR3

C0806 C0807
10PF/50V 10PF/50V
D @ @ D

M_CLK_DDR#2 M_CLK_DDR#3

Reverse Type
H = 4.0 mm

9,13 M_B_A[13:0] J0801A M_B_DQ[63:0] 13


M_B_A0 102 5 M_B_DQ1
M_B_A1 A0 DQ0 M_B_DQ0
101 A1 DQ1 7
M_B_A2 100 17 M_B_DQ7
M_B_A3 A2 DQ2 M_B_DQ3
99 A3 DQ3 19
M_B_A4 98 4 M_B_DQ5 +1.8V
M_B_A5 A4 DQ4 M_B_DQ4 J0801B
97 A5 DQ5 6
M_B_A6 94 14 M_B_DQ6 112 18
M_B_A7 A6 DQ6 M_B_DQ2 VDD1 VSS16
92 16 111 24
M_B_A8 A7 DQ7 M_B_DQ8 VDD2 VSS17
93 A8 DQ8 23 2 CN0801A
1 0.1UF/25V 117 VDD3 VSS18 41
M_B_A9 91 25 M_B_DQ12 C0801 4 CN0801B
3 0.1UF/25V 96 53
M_B_A10 A9 DQ9 M_B_DQ15 10UF/10V VDD4 VSS19
105 35 6 CN0801C
5 0.1UF/25V 95 42
M_B_A11 A10/AP DQ10 M_B_DQ9 VDD5 VSS20
90 A11 DQ11 37 8 CN0801D
7 0.1UF/25V 118 VDD6 VSS21 54
M_B_A12 89 20 M_B_DQ13 81 59
C
M_B_A13 A12 DQ12 M_B_DQ10 VDD7 VSS22 C
116 A13 DQ13 22 82 VDD8 VSS23 65
9,11 M_B_A14 86 36 M_B_DQ11 87 60
A14 DQ14 M_B_DQ14 VDD9 VSS24
84 A15 DQ15 38 103 VDD10 VSS25 66
9,13 M_B_BS2 85 43 M_B_DQ17 88 127
A16_BA2 DQ16 M_B_DQ16 +3VS VDD11 VSS26
DQ17 45 104 VDD12 VSS27 139
9,13 M_B_BS0 107 55 M_B_DQ23 128
BA0 DQ18 M_B_DQ18 VSS28
9,13 M_B_BS1 106 BA1 DQ19 57 199 VDDSPD VSS29 145
9,11 M_CS#2 110 44 M_B_DQ20 165
S0# DQ20 M_B_DQ21 C0802 C0803 VSS30
9,11 M_CS#3 115 S1# DQ21 46 83 NC1 VSS31 171
30 56 M_B_DQ19 1UF/10V 0.1UF/16V 120 172
11 M_CLK_DDR2 CK0 DQ22 NC2 VSS32
+3VS 11 M_CLK_DDR#2 32 58 M_B_DQ22 50 177
CK0# DQ23 M_B_DQ28 NC3 VSS33
11 M_CLK_DDR3 164 CK1 DQ24 61 69 NC4 VSS34 187
166 63 M_B_DQ25 163 178
11 M_CLK_DDR#3 CK1# DQ25 NCTEST VSS35
9,11 M_CKE2 79 73 M_B_DQ31 190
R0801 CKE0 DQ26 M_B_DQ26 VSS36
9,11 M_CKE3 80 CKE1 DQ27 75 7,9,11 M_VREF_MCH 1 VREF VSS37 9
10KOhm 9,13 M_B_CAS# 113 62 M_B_DQ29 21
CAS# DQ28 M_B_DQ24 C0804 C0805 VSS38
9,13 M_B_RAS# 108 RAS# DQ29 64 201 GND0 VSS39 33
9,13 M_B_WE# 109 74 M_B_DQ27 1UF/10V 0.1UF/16V 202 155
WE# DQ30 M_B_DQ30 GND1 VSS40
198 SA0 DQ31 76 VSS41 34
200 123 M_B_DQ36 203 132
SA1 DQ32 M_B_DQ35 NP_NC1 VSS42
7,22,29,38,44 SMB_CLK_S 197 SCL DQ33 125 204 NP_NC2 VSS43 144
7,22,29,38,44 SMB_DAT_S 195 135 M_B_DQ39 156
SDA DQ34 M_B_DQ33 VSS44
DQ35 137 47 VSS1 VSS45 168
9,11 M_ODT2 114 124 M_B_DQ32 133 2
ODT0 DQ36 M_B_DQ38 VSS2 VSS46
9,11 M_ODT3 119 ODT1 DQ37 126 183 VSS3 VSS47 3
13 M_B_DM[7:0] 134 M_B_DQ37 77 15
M_B_DM0 DQ38 M_B_DQ34 VSS4 VSS48
10 DM0 DQ39 136 12 VSS5 VSS49 27
M_B_DM1 26 141 M_B_DQ41 48 39
M_B_DM2 DM1 DQ40 M_B_DQ44 VSS6 VSS50
52 DM2 DQ41 143 184 VSS7 VSS51 149
M_B_DM3 67 151 M_B_DQ46 78 161
M_B_DM4 DM3 DQ42 M_B_DQ42 VSS8 VSS52
B 130 DM4 DQ43 153 71 VSS9 VSS53 28 B
M_B_DM5 147 140 M_B_DQ40 72 40
M_B_DM6 DM5 DQ44 M_B_DQ45 VSS10 VSS54
170 DM6 DQ45 142 121 VSS11 VSS55 138
M_B_DM7 185 152 M_B_DQ43 122 150
DM7 DQ46 M_B_DQ47 VSS12 VSS56
13 M_B_DQS[7:0] DQ47 154 196 VSS13 VSS57 162
M_B_DQS0 13 157 M_B_DQ52 193
M_B_DQS1 DQS0 DQ48 M_B_DQ49 VSS14
31 DQS1 DQ49 159 8 VSS15
M_B_DQS2 51 173 M_B_DQ53
M_B_DQS3 DQS2 DQ50 M_B_DQ48 DDR_DIMM_200P
70 DQS3 DQ51 175
M_B_DQS4 131 158 M_B_DQ50
M_B_DQS5 DQS4 DQ52 M_B_DQ55
148 DQS5 DQ53 160
M_B_DQS6 169 174 M_B_DQ54
M_B_DQS7 DQS6 DQ54 M_B_DQ51
13 M_B_DQS#[7:0] 188 DQS7 DQ55 176
M_B_DQS#0 11 179 M_B_DQ57
M_B_DQS#1 DQS#0 DQ56 M_B_DQ56
29 DQS#1 DQ57 181
M_B_DQS#2 49 189 M_B_DQ62
M_B_DQS#3 DQS#2 DQ58 M_B_DQ63
68 DQS#3 DQ59 191
M_B_DQS#4 129 180 M_B_DQ60
M_B_DQS#5 DQS#4 DQ60 M_B_DQ61
146 DQS#5 DQ61 182
M_B_DQS#6 167 192 M_B_DQ58
M_B_DQS#7 DQS#6 DQ62 M_B_DQ59
186 DQS#7 DQ63 194

DDR_DIMM_200P

A A

Title : DIM_So-DIMM 1
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 8 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

L0901
120Ohm/100Mhz
83 0.9V_VTT_REF 1 2

D +1.8V D

R0901 C0901
10KOhm 0.1UF/16V
1% @ @ L0902 @
120Ohm/100Mhz
M_VREF 1 2 M_VREF_MCH 7,8,11

R0902 C0902
10KOhm 0.1UF/16V
1% @ @

C C

+0.9VS +0.9VS

7,13 M_A_A[13:0]
8,13 M_B_A[13:0]

7,13 M_A_WE# 1 16 RN0901A


56Ohm
7,13 M_A_BS0 2 15 RN0901B M_B_A4 1 16 RN0905A
56Ohm 56Ohm
7,13 M_A_CAS# 3 14 RN0901C 2 CN0901A
1 0.1UF/25V M_B_A5 2 15 RN0905B
56Ohm 56Ohm
M_A_A1 4 13 RN0901D 4 CN0901B
3 0.1UF/25V M_B_A3 3 14 RN0905C 1 2 CN0904A @
56Ohm 56Ohm 0.1UF/25V
M_A_A13 5 12 RN0901E 6 CN0901C
5 0.1UF/25V M_B_A1 4 13 RN0905D 3 4 CN0904B @
56Ohm 56Ohm 0.1UF/25V
7,11 M_CS#1 6 11 RN0901F 8 CN0901D
7 0.1UF/25V 8,13 M_B_BS0 5 12 RN0905E 5 6 CN0904C @
56Ohm 56Ohm 0.1UF/25V
7 10 RN0901G M_B_A10 6 11 RN0905F 7 8 CN0904D @
7,11 M_ODT1 56Ohm 56Ohm 0.1UF/25V
M_A_A7 8 9 RN0901H 7 10 RN0905G
56Ohm 8,13 M_B_BS1 56Ohm
M_B_A0 8 9 RN0905H R1.1-03
56Ohm
B B

M_A_A3 1 16 RN0902A
56Ohm
M_A_A10 2 15 RN0902B M_B_A9 1 16 RN0906A
56Ohm 56Ohm
M_A_A8 3 14 RN0902C 1 2 CN0902A @ M_B_A12 2 15 RN0906B
56Ohm 0.1UF/25V 56Ohm
M_A_A11 4 13 RN0902D 3 4 CN0902B @ M_B_A11 3 14 RN0906C 1 2 CN0905A
56Ohm 0.1UF/25V 56Ohm 0.1UF/25V
7,11 M_A_A14 5 12 RN0902E 5 6 CN0902C @ M_B_A6 4 13 RN0906D 3 4 CN0905B
56Ohm 0.1UF/25V 56Ohm 0.1UF/25V
M_A_A5 6 11 RN0902F 7 8 CN0902D @ M_B_A8 5 12 RN0906E 5 6 CN0905C
56Ohm 0.1UF/25V 56Ohm 0.1UF/25V
M_A_A9 7 10 RN0902G M_B_A7 6 11 RN0906F 7 8 CN0905D
56Ohm 56Ohm 0.1UF/25V
7,11 M_CKE1 8 9 RN0902H R1.1-03 8,11 M_B_A14 7 10 RN0906G
56Ohm 56Ohm
M_B_A2 8 9 RN0906H
56Ohm

M_A_A6 1 16 RN0903A
56Ohm
M_A_A4 2 15 RN0903B 8,13 M_B_WE# 1 16 RN0907A
56Ohm 56Ohm
M_A_A2 3 14 RN0903C 2 CN0903A @
1 0.1UF/25V 2 15 RN0907B
56Ohm 8,13 M_B_CAS# 56Ohm
M_A_A0 4 13 RN0903D 4 CN0903B @
3 0.1UF/25V 8,13 M_B_RAS# 3 14 RN0907C 2 CN0906A
1 0.1UF/25V
56Ohm 56Ohm
5 12 RN0903E 6 CN0903C @
5 0.1UF/25V M_B_A13 4 13 RN0907D 4 CN0906B
3 0.1UF/25V
7,13 M_A_BS1 56Ohm 56Ohm
7,13 M_A_RAS# 6 11 RN0903F 8 CN0903D @
7 0.1UF/25V 8,11 M_CS#2 5 12 RN0907E 6 CN0906C
5 0.1UF/25V
56Ohm 56Ohm
7,11 M_CS#0 7 10 RN0903G 8,11 M_ODT2 6 11 RN0907F 8 CN0906D
7 0.1UF/25V
56Ohm 56Ohm
7,11 M_ODT0 8 9 RN0903H R1.1-03 8,11 M_CS#3 7 10 RN0907G
56Ohm 56Ohm
8,11 M_ODT3 8 9 RN0907H
56Ohm

7,13 M_A_BS2 1 2 RN0904A


56OHM
M_A_A12 3 4 RN0904B 0.1UF/16V 1 2 C0903 8,11 M_CKE2 1 2 RN0908A
56OHM 56OHM
7,11 M_CKE0 5 6 RN0904C 8,13 M_B_BS2 3 4 RN0908B 0.1UF/16V 1 2 C0904
56OHM 56OHM
7 8 RN0904D 8,11 M_CKE3 5 6 RN0908C
56OHM 56OHM
7 8 RN0908D
A 56OHM A

Title : DIM_DDR2 Termination


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 9 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

U1001A H_A#[35:3] 3
H_A#3
FSB RCOMP 3 H_D#[63:0]
H_D#0 E2
H_A#_3 J13
B11 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
G2 H_D#_1 H_A#_5 C11
D For Calibrating the FSB I/O Buffer H_D#2 G7 M11 H_A#6 D
H_D#3 H_D#_2 H_A#_6 H_A#7
M6 H_D#_3 H_A#_7 C15
H_RCOMP H_D#4 H7 F16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H3 H_D#_5 H_A#_9 L13
H_D#6 G4 G17 H_A#10
R1001 H_D#7 H_D#_6 H_A#_10 H_A#11
F3 H_D#_7 H_A#_11 C14
24.9Ohm H_D#8 N8 K16 H_A#12
1% H_D#9 H_D#_8 H_A#_12 H_A#13
H2 H_D#_9 H_A#_13 B13
H_D#10 M10 L16 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
N12 H_D#_11 H_A#_15 J17
H_D#12 N9 B14 H_A#16
H_D#13 H_D#_12 H_A#_16 H_A#17
H5 H_D#_13 H_A#_17 K19
H_D#14 P13 P15 H_A#18
H_D#15 H_D#_14 H_A#_18 H_A#19
K9 H_D#_15 H_A#_19 R17
H_D#16 H_A#20
FSB SCOMP H_D#17
M2
W10
H_D#_16 H_A#_20 B16
H20 H_A#21
H_D#18 H_D#_17 H_A#_21 H_A#22
Y8 H_D#_18 H_A#_22 L19
For Slew Rate Compenssation on the FSB H_D#19 V4 D17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
M3 H_D#_20 H_A#_24 M17
+VCCP +VCCP H_D#21 J1 N16 H_A#25
H_D#22 H_D#_21 H_A#_25 H_A#26
N5 H_D#_22 H_A#_26 J19
H_D#23 N3 B18 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
W6 H_D#_24 H_A#_28 E19
R1002 R1003 H_D#25 W9 B17 H_A#29
54.9Ohm 54.9Ohm H_D#26 H_D#_25 H_A#_29 H_A#30
N2 H_D#_26 H_A#_30 B15
1% 1% H_D#27 Y7 E17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
Y9 H_D#_28 H_A#_32 C18
H_SCOMP H_SCOMP# H_D#29 P4 A19 H_A#33
H_D#30 H_D#_29 H_A#_33 H_A#34
W3 H_D#_30 H_A#_34 B19
H_D#31 N1 N19 H_A#35
H_D#32 H_D#_31 H_A#_35
C
AD12 H_D#_32 C
H_D#33 AE3 G12 H_ADS# 3
H_D#34 H_D#_33 H_ADS#
AD9 H_D#_34 H_ADSTB#_0 H17 H_ADSTB#0 3
H_D#35
FSB Voltage Swing H_D#36
AC9
AC7
H_D#_35 H_ADSTB#_1 G20
C8
H_ADSTB#1 3
H_D#_36 H_BNR# H_BNR# 3
H_D#37 AC14 E8
H_D#_37 H_BPRI# H_BPRI# 3
For Providing a Reference Voltage to The FSB RCOMP circuits H_D#38 AD11 F12 H_BR0# 3
H_D#39 H_D#_38 H_BREQ#
AC11 H_D#_39 H_DEFER# D6 H_DEFER# 3
+VCCP H_D#40 AB2 C10
H_D#_40 H_DBSY# H_DBSY# 3
H_D#41 AD7 AM5 CLK_MCH_BCLK 29 CLK_MCH_BCLK 1 T1001
H_D#42 H_D#_41 HPLL_CLK CLK_MCH_BCLK# T1002
AB1 H_D#_42 HPLL_CLK# AM7 CLK_MCH_BCLK# 29 1
H_D#43 Y3 H8 H_DPWR# 3
R1004 H_D#44 H_D#_43 H_DPWR#
AC6 H_D#_44 H_DRDY# K7 H_DRDY# 3
221Ohm H_D#45 AE2 E4
H_D#_45 H_HIT# H_HIT# 3
1% H_D#46 AC5 C6 H_HITM# 3
H_D#47 H_D#_46 H_HITM#
AG3 H_D#_47 H_LOCK# G10 H_LOCK# 3
H_SWING H_D#48 AJ9 B7 H_TRDY# 3
H_D#49 H_D#_48 H_TRDY#
AH8 H_D#_49
H_D#50 AJ14
R1005 C1001 H_D#51 H_D#_50
AE9 H_D#_51
100Ohm 0.1UF/16V H_D#52 AE11
1% H_D#53 H_D#_52
AH12 H_D#_53 H_DINV#_0 K5 H_DINV#0 3
H_D#54 AJ5 L2 H_DINV#1 3
H_D#55 H_D#_54 H_DINV#_1
AH5 H_D#_55 H_DINV#_2 AD13 H_DINV#2 3
H_D#56 AJ6 AE13 H_DINV#3 3
H_D#57 H_D#_56 H_DINV#_3
AE7 H_D#_57
H_D#58 AJ7 M7 H_DSTBN#0 3
H_D#59 H_D#_58 H_DSTBN#_0
AJ2 H_D#_59 H_DSTBN#_1 K3 H_DSTBN#1 3
H_D#60
FSB VREF H_D#61
AE5
AJ3
H_D#_60 H_DSTBN#_2 AD2
AH11
H_DSTBN#2 3
H_D#_61 H_DSTBN#_3 H_DSTBN#3 3
H_D#62 AH2
H_D#63 H_D#_62
B For Providing Reference Voltage for FSB Signals AH13 H_D#_63 H_DSTBP#_0 L7 H_DSTBP#0 3 B

H_DSTBP#_1 K2 H_DSTBP#1 3
+VCCP AC2
H_DSTBP#_2 H_DSTBP#2 3
H_SWING B3 AJ10 H_DSTBP#3 3
H_RCOMP H_SWING H_DSTBP#_3
C2 H_RCOMP H_REQ#[4:0] 3
M14 H_REQ#0
R1006 H_SCOMP H_REQ#_0 H_REQ#1
W1 H_SCOMP H_REQ#_1 E13
1KOhm H_SCOMP# W2 A11 H_REQ#2
1% H_SCOMP# H_REQ#_2 H_REQ#3
H_REQ#_3 H13
3 H_CPURST# B6 B12 H_REQ#4
H_VREF H_CPURST# H_REQ#_4
3 H_CPUSLP# E5 H_CPUSLP#
H_RS#_0 E12 H_RS#0 3
H_RS#_1 D7 H_RS#1 3
R1007 C1002 D8 H_RS#2 3
2KOhm 0.1UF/16V H_VREF H_RS#_2
B9 H_AVREF
1% A9 H_DVREF
CRESTLINE_965PM

A A

Title : NB_965PM(Host)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 10 of 95
5 4 3 2 1
5 4 3 2 1

Main Board
U1001B
+1.8V
CFG5 : DMI Strap P36 RSVD1
P37 RSVD2 SM_CK_0 AV29 M_CLK_DDR0 7
0 = DMI x2 R35 BB23 M_CLK_DDR1 7
RSVD3 SM_CK_1 R1105
1 = DMI x4 (D) N35 RSVD4 SM_CK_3 BA25 M_CLK_DDR2 8
20Ohm
AR12 RSVD5 SM_CK_4 AV23 M_CLK_DDR3 8
AR13 1%
RSVD6
AM12 RSVD7 SM_CK#_0 AW30 M_CLK_DDR#0 7
AN13 BA23 M_CLK_DDR#1 7 SM_RCOMP
RSVD8 SM_CK#_1
D CFG7 : CPU Strap J12 RSVD9 SM_CK#_3 AW25 M_CLK_DDR#2 8 D
AR37 RSVD10 SM_CK#_4 AW23 M_CLK_DDR#3 8
0 = Reserved AM36 SM_RCOMP#
RSVD11
1 = Mobile CPU (D) AL36 RSVD12 SM_CKE_0 BE29 M_CKE0 7,9
AM37 RSVD13 SM_CKE_1 AY32 M_CKE1 7,9
D20 BD39 M_CKE2 8,9 R1106
RSVD14 SM_CKE_3 20Ohm
SM_CKE_4 BG37 M_CKE3 8,9
C1101 1%
CFG9 : PCIE Graphic Lane 0.1UF/16V BG20 M_CS#0 7,9
SM_CS#_0
BK16 M_CS#1 7,9
0 = Reverse Lane SM_CS#_1
BG16 M_CS#2 8,9
SM_CS#_2
1 = Normal Operation (D) H10 RSVD20 SM_CS#_3 BE13 M_CS#3 8,9
B51 RSVD21
R1101 @ BJ20 BH18 M_ODT0 7,9
4.02KOHM 1% RSVD22 SM_ODT_0 +1.8V
BK22 RSVD23 SM_ODT_1 BJ15 M_ODT1 7,9
2 1 MCH_CFG9 BF19 RSVD24 SM_ODT_2 BJ14 M_ODT2 8,9
BH20 RSVD25 SM_ODT_3 BE16 M_ODT3 8,9
BK18 RSVD26
BJ18 BL15 SM_RCOMP R1107
RSVD27 SM_RCOMP SM_RCOMP# 1KOhm
BF23 RSVD28 SM_RCOMP# BK14
BG23 1%
RSVD29 SM_RCOMP_VOH
CFG[13:12] : GMCH Test Mode BC23 RSVD30 SM_RCOMP_VOH BK31
SM_RCOMP_VOL
BD24 RSVD31 SM_RCOMP_VOL BL31
00 = Partial CLK Gating Disable 7,9 M_A_A14 BJ29 SM_RCOMP_VOH
SA_MA_14
01 = XOR Mode Enable 8,9 M_B_A14 BE24 SB_MA_14 SM_VREF_0 AR49 M_VREF_MCH 7,8,9
BH39 AW4
10 = All Z Mode Enable RSVD34 SM_VREF_1 C1102 C1103 R1108
AW20 RSVD35 0.01UF/16V 1UF/10V 3.01KOhm
11 = Normal Operation (D) BK20 RSVD36 1%
C48 LVDSA_DATA#_3
D47 LVDSA_DATA_3 DPLL_REF_CLK B42 CLK_DREF 29
C
B44 RSVD39 DPLL_REF_CLK# C42 CLK_DREF# 29 C
C44 RSVD40 DPLL_REF_SSCLK H48 CLK_DREFSS 29
CFG16 : FSB Dynamic ODT A35 H47 CLK_DREFSS# 29 SM_RCOMP_VOL
RSVD41 DPLL_REF_SSCLK#
B37 RSVD42
0 = Dynamic ODT Disable B36 K44 CLK_MCH_3GPLL 29
RSVD43 PEG_CLK C1104 C1105 R1109
1 = Dynamic ODT Enable (D) B34 RSVD44 PEG_CLK# K45 CLK_MCH_3GPLL# 29
0.01UF/16V 1UF/10V 1KOhm
C34 RSVD45 1%
DMI_TXN[3:0] 21
AN47 DMI_TXN0
DMI_RXN_0 DMI_TXN1
CFG18: Core Voltage DMI_RXN_1 AJ38
DMI_TXN2
AN42
0 = 1.05V (D) DMI_RXN_2
AN46 DMI_TXN3
DMI_RXN_3 M_VREF_MCH
1 = 1.5V DMI_TXP0
DMI_TXP[3:0] 21
DMI_RXP_0 AM47
29 MCH_BSEL0 P27 AJ39 DMI_TXP1 C1106 C1107
CFG_0 DMI_RXP_1 DMI_TXP2 0.1UF/16V 0.1UF/16V
29 MCH_BSEL1 N27 CFG_1 DMI_RXP_2 AN41
N24 AN45 DMI_TXP3
29 MCH_BSEL2 CFG_2 DMI_RXP_3
CFG19 : DMI Lane Reversal C21
CFG_3 DMI_RXN0
DMI_RXN[3:0] 21
C23 CFG_4 DMI_TXN_0 AJ46
0 = Normal Operation (D) T1101 1 F23 AJ41 DMI_RXN1
CFG_5 DMI_TXN_1 DMI_RXN2
1 = Lanes Reversed T1102
N23 CFG_6 DMI_TXN_2 AM40
DMI_RXN3
1 G23 CFG_7 DMI_TXN_3 AM44
J20 CFG_8 DMI_RXP[3:0] 21
+3VS R1102 @ MCH_CFG9 C20 AJ47 DMI_RXP0
4.02KOHM 1% CFG_9 DMI_TXP_0 DMI_RXP1
R24 CFG_10 DMI_TXP_1 AJ42
2 1 MCH_CFG19 L23 AM39 DMI_RXP2 +1.25VS
T1103 CFG_11 DMI_TXP_2 DMI_RXP3
1 J23 CFG_12 DMI_TXP_3 AM43
T1104 1 E23 CFG_13
E20 CFG_14
K23 R1110
T1105 CFG_15 1KOhm
B CFG20 : Concurrent SDVO / PCIe 1 M20 CFG_16
B
M24 1%
0 = Only one is operational (D) T1106 CFG_17
1 L32 CFG_18
1 = operate simultaneous MCH_CFG19 N33
T1107 CFG_19 CL_VREF_MCH
1 L35 CFG_20

E35 C1108 R1111


GFX_VID_0 0.1UF/16V 392OHM
22 PM_BMBUSY# G41 PM_BM_BUSY# GFX_VID_1 A39
3,20,80 H_DPRSTP# L39 C38 1%
PM_EXTTS#0 PM_DPRSTP# GFX_VID_2
L36 PM_EXT_TS#_0 GFX_VID_3 B39
PM_EXTTS#1 J36 E36
PM_EXT_TS#_1 GFX_VR_EN
22,30 PM_PWROK AW49 PWROK
21,30,33,38,43,51,53,58,62,66,70 BUF_PLT_RST# R1103 1 2 100Ohm AV20 RSTIN#
3,32 PM_THRMTRIP# N20 THERMTRIP#
22,80 PM_DPRSLPVR G36 DPRSLPVR
Option for 965PM/GM
AM49 CL_CLK0 22
+3VS CL_CLK 965PM: Mount R1112~R1117
CL_DATA AK50 CL_DATA0 22
BJ51 AT43 PM_PWROK 965GM: Un-mount R1112~R1117
RN1101A PM_EXTTS#0 NC_1 CL_PWROK
1 10KOhm 2 BK51 NC_2 CL_RST# AN49 CL_RST#0 22
3 RN1101B PM_EXTTS#1 CL_VREF_MCH
10KOhm 4 BK50 NC_3 CL_VREF AM50
5 RN1101C MCH_CLKREQ# CLK_DREF R1112 2 0Ohm
10KOhm 6 BL50
NC_4
1
7 RN1101D CLK_DREF# R1113 2 0Ohm
10KOhm 8 BL49
NC_5
1
BL3 NC_6
BL2 CLK_DREFSS R1114 1 2 0Ohm
NC_7 CLK_DREFSS# R1115
BK1 1 2 0Ohm
NC_8 SDVO_CTRL_CLK
BJ1 NC_9 SDVO_CTRL_CLK H35
E1 K36 SDVO_CTRL_DATA SDVO_CTRL_CLK R1116 1 2 0Ohm
NC_10 SDVO_CTRL_DATA MCH_CLKREQ# SDVO_CTRL_DATA R1117
A5 NC_11 CLK_REQ# G39 1 2 0Ohm
C51 G40 MCH_ICH_SYNC# 22
A NC_12 ICH_SYNC# A
B50
NC_13 R1104
A50 NC_14
A49 A37 20KOhm 1%
NC_15 TEST_1
BK2 NC_16 TEST_2 R32 1 2

CRESTLINE_965PM

Title : NB_965PM(DMI/CFG)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 11 of 95
5 4 3 2 1
5 4 3 2 1

Main Board
U1001C
+VCCP
J40 L_BKLT_CTRL
70 LCD_BACKEN_GM H39 N43 PEG_COMP R1201 2 1 24.9Ohm 1%
L_CTRL_CLK L_BKLT_EN PEG_COMPI
E39 L_CTRL_CLK PEG_COMPO M43
L_CTRL_DATA E40
EDID_CLK_GM L_CTRL_DATA
70 EDID_CLK_GM C37 L_DDC_CLK PCIENB_RXN[15:0] 70
70 EDID_DATA_GM EDID_DATA_GM D35 J51 PCIENB_RXN0
L_DDC_DATA PEG_RX#_0 PCIENB_RXN1
70 L_VDDEN_GM K40 L_VDD_EN PEG_RX#_1 L51
N47 PCIENB_RXN2
LVDS_IBG PEG_RX#_2 PCIENB_RXN3
L41 LVDS_IBG PEG_RX#_3 T45
L43 T50 PCIENB_RXN4
LVDS_VBG PEG_RX#_4 PCIENB_RXN5
D N41 LVDS_VREFH PEG_RX#_5 U40 D
N40 Y44 PCIENB_RXN6
LVDS_VREFL PEG_RX#_6 PCIENB_RXN7
70 LVDS_LCLKN_GM D46 LVDSA_CLK# PEG_RX#_7 Y40
70 LVDS_LCLKP_GM C45 AB51 PCIENB_RXN8
LVDSA_CLK PEG_RX#_8 PCIENB_RXN9
70 LVDS_UCLKN_GM D44 LVDSB_CLK# PEG_RX#_9 W49
70 LVDS_UCLKP_GM E42 AD44 PCIENB_RXN10
LVDSB_CLK PEG_RX#_10 PCIENB_RXN11
PEG_RX#_11 AD40
70 LVDS_L0N_GM G51 AG46 PCIENB_RXN12
LVDSA_DATA#_0 PEG_RX#_12 PCIENB_RXN13
70 LVDS_L1N_GM E51 LVDSA_DATA#_1 PEG_RX#_13 AH49
70 LVDS_L2N_GM F49 AG45 PCIENB_RXN14
LVDSA_DATA#_2 PEG_RX#_14 PCIENB_RXN15
PEG_RX#_15 AG41
PCIENB_RXP[15:0] 70
70 LVDS_L0P_GM G50 J50 PCIENB_RXP0
LVDSA_DATA_0 PEG_RX_0 PCIENB_RXP1
70 LVDS_L1P_GM E50 LVDSA_DATA_1 PEG_RX_1 L50
70 LVDS_L2P_GM F48 M47 PCIENB_RXP2
LVDSA_DATA_2 PEG_RX_2 PCIENB_RXP3
PEG_RX_3 U44
T49 PCIENB_RXP4
PEG_RX_4 PCIENB_RXP5
70 LVDS_U0N_GM G44 LVDSB_DATA#_0 PEG_RX_5 T41
70 LVDS_U1N_GM B47 W45 PCIENB_RXP6
LVDSB_DATA#_1 PEG_RX_6 PCIENB_RXP7
70 LVDS_U2N_GM B45 LVDSB_DATA#_2 PEG_RX_7 W41
AB50 PCIENB_RXP8
PEG_RX_8 PCIENB_RXP9
PEG_RX_9 Y48
70 LVDS_U0P_GM E44 AC45 PCIENB_RXP10
LVDSB_DATA_0 PEG_RX_10 PCIENB_RXP11
70 LVDS_U1P_GM A47 LVDSB_DATA_1 PEG_RX_11 AC41
A45 AH47 PCIENB_RXP12
70 LVDS_U2P_GM LVDSB_DATA_2 PEG_RX_12
AG49 PCIENB_RXP13
PEG_RX_13 PCIENB_RXP14
PEG_RX_14 AH45
AG42 PCIENB_RXP15
PEG_RX_15
PCIEG_RXN[15:0] 70
70 TV_CVBS_GM E27 N45 PCIENB_TXN0 CX1201 1 2 0.1UF/10V PCIEG_RXN0
TVA_DAC PEG_TX#_0 PCIENB_TXN1 CX1202 1
C 70 TV_Y_GM G27 TVB_DAC PEG_TX#_1 U39 2 0.1UF/10V PCIEG_RXN1
C
70 TV_C_GM K27 U47 PCIENB_TXN2 CX1203 1 2 0.1UF/10V PCIEG_RXN2
TVC_DAC PEG_TX#_2 PCIENB_TXN3 CX1204 1 PCIEG_RXN3
N51 2 0.1UF/10V
PEG_TX#_3 PCIENB_TXN4 CX1205 1 PCIEG_RXN4
F27 TVA_RTN PEG_TX#_4 R50 2 0.1UF/10V
J27 T42 PCIENB_TXN5 CX1206 1 2 0.1UF/10V PCIEG_RXN5
TVB_RTN PEG_TX#_5 PCIENB_TXN6 CX1207 1 PCIEG_RXN6
L27 TVC_RTN PEG_TX#_6 Y43 2 0.1UF/10V
W46 PCIENB_TXN7 CX1208 1 2 0.1UF/10V PCIEG_RXN7
TV_DCONSEL0 PEG_TX#_7 PCIENB_TXN8 CX1209 1 PCIEG_RXN8
M35 TV_DCONSEL_0 PEG_TX#_8 W38 2 0.1UF/10V
TV_DCONSEL1 P33 AD39 PCIENB_TXN9 CX1210 1 2 0.1UF/10V PCIEG_RXN9
TV_DCONSEL_1 PEG_TX#_9 PCIENB_TXN10 CX1211 1
PEG_TX#_10 AC46 2 0.1UF/10V PCIEG_RXN10
AC49 PCIENB_TXN11 CX1212 1 2 0.1UF/10V PCIEG_RXN11
PEG_TX#_11 PCIENB_TXN12 CX1213 1
AC42 2 0.1UF/10V PCIEG_RXN12
PEG_TX#_12 PCIENB_TXN13 CX1214 1 PCIEG_RXN13
PEG_TX#_13 AH39 2 0.1UF/10V
AE49 PCIENB_TXN14 CX1215 1 2 0.1UF/10V PCIEG_RXN14
PEG_TX#_14 PCIENB_TXN15 CX1216 1
PEG_TX#_15 AH44 2 0.1UF/10V PCIEG_RXN15
PCIEG_RXP[15:0] 70
70 CRT_BLUE_GM H32 M45 PCIENB_TXP0 CX1217 1 2 0.1UF/10V PCIEG_RXP0
CRT_BLUE PEG_TX_0 PCIENB_TXP1 CX1218 1 PCIEG_RXP1
G32 CRT_BLUE# PEG_TX_1 T38 2 0.1UF/10V
70 CRT_GREEN_GM K29 T46 PCIENB_TXP2 CX1219 1 2 0.1UF/10V PCIEG_RXP2
CRT_GREEN PEG_TX_2 PCIENB_TXP3 CX1220 1 PCIEG_RXP3
J29 CRT_GREEN# PEG_TX_3 N50 2 0.1UF/10V
70 CRT_RED_GM F29 R51 PCIENB_TXP4 CX1221 1 2 0.1UF/10V PCIEG_RXP4
CRT_RED PEG_TX_4 PCIENB_TXP5 CX1222 1 PCIEG_RXP5
E29 CRT_RED# PEG_TX_5 U43 2 0.1UF/10V
W42 PCIENB_TXP6 CX1223 1 2 0.1UF/10V PCIEG_RXP6
PEG_TX_6 PCIENB_TXP7 CX1224 1
PEG_TX_7 Y47 2 0.1UF/10V PCIEG_RXP7
70 CRT_DDC_CLK_GM K33 Y39 PCIENB_TXP8 CX1225 1 2 0.1UF/10V PCIEG_RXP8
CRT_DDC_CLK PEG_TX_8 PCIENB_TXP9 CX1226 1
70 CRT_DDC_DATA_GM G35 CRT_DDC_DATA PEG_TX_9 AC38 2 0.1UF/10V PCIEG_RXP9
HSYNC_GM F33 AD47 PCIENB_TXP10 CX1227 1 2 0.1UF/10V PCIEG_RXP10
CRT_IREF CRT_HSYNC PEG_TX_10 PCIENB_TXP11 CX1228 1 PCIEG_RXP11
C32 CRT_TVO_IREF PEG_TX_11 AC50 2 0.1UF/10V
VSYNC_GM E33 AD43 PCIENB_TXP12 CX1229 1 2 0.1UF/10V PCIEG_RXP12
CRT_VSYNC PEG_TX_12 PCIENB_TXP13 CX1230 1
AG39 2 0.1UF/10V PCIEG_RXP13
PEG_TX_13 PCIENB_TXP14 CX1231 1 PCIEG_RXP14
PEG_TX_14 AE50 2 0.1UF/10V
B AH43 PCIENB_TXP15 CX1232 1 2 0.1UF/10V PCIEG_RXP15 B
PEG_TX_15

CRESTLINE_965PM

@ 1 RNX1201A HSYNC_GM
70 CRT_HSYNC_GM 33Ohm 2
@ 3 RNX1201B VSYNC_GM 965PM: Un-mount RNX1201, R1202
70 CRT_VSYNC_GM 33Ohm 4
Mount R1203~R1212,CX1201~CX1232
@ R1202 2 1 2.37KOHM 1% LVDS_IBG Change R1213~R1218 to 0ohm
Change R1219 to 0ohm.
R1203 2 1 0Ohm L_CTRL_CLK
R1204 2 1 0Ohm L_CTRL_DATA
965GM: Mount RNX1201, R1202
R1205 1 0Ohm EDID_CLK_GM
R1206
2 Un-mount R1203~R1212,CX1201~CX1232
2 1 0Ohm EDID_DATA_GM
Change R1213~R1218 to 150ohm
R1207 2 1 0Ohm TV_DCONSEL0
R1208
Change R1219 to 1.3Kohm
2 1 0Ohm TV_DCONSEL1

R1209 2 1 0Ohm CRT_DDC_CLK_GM


R1210 2 1 0Ohm CRT_DDC_DATA_GM

R1211 2 1 0Ohm HSYNC_GM


R1212 2 1 0Ohm VSYNC_GM

R1213 2 1 0Ohm TV_CVBS_GM


A A
R1214 2 1 0Ohm TV_Y_GM
R1215 2 1 0Ohm TV_C_GM

R1216 2 1 0Ohm CRT_BLUE_GM


R1217 2 1 0Ohm CRT_GREEN_GM
R1218 2 1 0Ohm CRT_RED_GM

R1219 2 1 0Ohm CRT_IREF


Title : NB_965PM(GFX)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 12 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

7 M_A_DQ[63:0] U1001D
M_A_DQ0 AR43 BB19 U1001E
SA_DQ_0 SA_BS_0 M_A_BS0 7,9 8 M_B_DQ[63:0]
M_A_DQ1 AW44 BK19 M_A_BS1 7,9 M_B_DQ0 AP49 AY17 M_B_BS0 8,9
M_A_DQ2 SA_DQ_1 SA_BS_1 M_B_DQ1 SB_DQ_0 SB_BS_0
BA45 SA_DQ_2 SA_BS_2 BF29 M_A_BS2 7,9 AR51 SB_DQ_1 SB_BS_1 BG18 M_B_BS1 8,9
M_A_DQ3 AY46 M_B_DQ2 AW50 BG36 M_B_BS2 8,9
M_A_DQ4 SA_DQ_3 M_B_DQ3 SB_DQ_2 SB_BS_2
AR41 SA_DQ_4 SA_CAS# BL17 M_A_CAS# 7,9 AW51 SB_DQ_3
M_A_DQ5 AR45 M_A_DM[7:0] 7 M_B_DQ4 AN51 BE17 M_B_CAS# 8,9
M_A_DQ6 SA_DQ_5 M_A_DM0 M_B_DQ5 SB_DQ_4 SB_CAS#
AT42 SA_DQ_6 SA_DM_0 AT45 AN50 SB_DQ_5 M_B_DM[7:0] 8
M_A_DQ7 AW47 BD44 M_A_DM1 M_B_DQ6 AV50 AR50 M_B_DM0
M_A_DQ8 SA_DQ_7 SA_DM_1 M_A_DM2 M_B_DQ7 SB_DQ_6 SB_DM_0 M_B_DM1
BB45 SA_DQ_8 SA_DM_2 BD42 AV49 SB_DQ_7 SB_DM_1 BD49
M_A_DQ9 BF48 AW38 M_A_DM3 M_B_DQ8 BA50 BK45 M_B_DM2
M_A_DQ10 SA_DQ_9 SA_DM_3 M_A_DM4 M_B_DQ9 SB_DQ_8 SB_DM_2 M_B_DM3
BG47 SA_DQ_10 SA_DM_4 AW13 BB50 SB_DQ_9 SB_DM_3 BL39
M_A_DQ11 BJ45 BG8 M_A_DM5 M_B_DQ10 BA49 BH12 M_B_DM4
M_A_DQ12 SA_DQ_11 SA_DM_5 M_A_DM6 M_B_DQ11 SB_DQ_10 SB_DM_4 M_B_DM5
BB47 SA_DQ_12 SA_DM_6 AY5 BE50 SB_DQ_11 SB_DM_5 BJ7
M_A_DQ13 BG50 AN6 M_A_DM7 M_B_DQ12 BA51 BF3 M_B_DM6
M_A_DQ14 SA_DQ_13 SA_DM_7 M_B_DQ13 SB_DQ_12 SB_DM_6 M_B_DM7
BH49 SA_DQ_14 M_A_DQS[7:0] 7 AY49 SB_DQ_13 SB_DM_7 AW2
M_A_DQ15 BE45 AT46 M_A_DQS0 M_B_DQ14 BF50 M_B_DQS[7:0] 8
M_A_DQ16 SA_DQ_15 SA_DQS_0 M_A_DQS1 M_B_DQ15 SB_DQ_14 M_B_DQS0
AW43 SA_DQ_16 SA_DQS_1 BE48 BF49 SB_DQ_15 SB_DQS_0 AT50
M_A_DQ17 BE44 BB43 M_A_DQS2 M_B_DQ16 BJ50 BD50 M_B_DQS1
M_A_DQ18 SA_DQ_17 SA_DQS_2 M_A_DQS3 M_B_DQ17 SB_DQ_16 SB_DQS_1 M_B_DQS2
BG42 SA_DQ_18 SA_DQS_3 BC37 BJ44 SB_DQ_17 SB_DQS_2 BK46
M_A_DQ19 BE40 BB16 M_A_DQS4 M_B_DQ18 BJ43 BK39 M_B_DQS3
M_A_DQ20 SA_DQ_19 SA_DQS_4 M_A_DQS5 M_B_DQ19 SB_DQ_18 SB_DQS_3 M_B_DQS4
C
BF44 SA_DQ_20 SA_DQS_5 BH6 BL43 SB_DQ_19 SB_DQS_4 BJ12 C
M_A_DQ21 BH45 BB2 M_A_DQS6 M_B_DQ20 BK47 BL7 M_B_DQS5
M_A_DQ22 SA_DQ_21 SA_DQS_6 M_A_DQS7 M_B_DQ21 SB_DQ_20 SB_DQS_5 M_B_DQS6
BG40 SA_DQ_22 SA_DQS_7 AP3 M_A_DQS#[7:0] 7 BK49 SB_DQ_21 SB_DQS_6 BE2
M_A_DQ23 BF40 AT47 M_A_DQS#0 M_B_DQ22 BK43 AV2 M_B_DQS7
SA_DQ_23 SA_DQS#_0 SB_DQ_22 SB_DQS_7 M_B_DQS#[7:0] 8
M_A_DQ24 AR40 BD47 M_A_DQS#1 M_B_DQ23 BK42 AU50 M_B_DQS#0
M_A_DQ25 SA_DQ_24 SA_DQS#_1 M_A_DQS#2 M_B_DQ24 SB_DQ_23 SB_DQS#_0 M_B_DQS#1
AW40 SA_DQ_25 SA_DQS#_2 BC41 BJ41 SB_DQ_24 SB_DQS#_1 BC50
M_A_DQ26 AT39 BA37 M_A_DQS#3 M_B_DQ25 BL41 BL45 M_B_DQS#2
M_A_DQ27 SA_DQ_26 SA_DQS#_3 M_A_DQS#4 M_B_DQ26 SB_DQ_25 SB_DQS#_2 M_B_DQS#3
AW36 SA_DQ_27 SA_DQS#_4 BA16 BJ37 SB_DQ_26 SB_DQS#_3 BK38
M_A_DQ28 AW41 BH7 M_A_DQS#5 M_B_DQ27 BJ36 BK12 M_B_DQS#4
M_A_DQ29 SA_DQ_28 SA_DQS#_5 M_A_DQS#6 M_B_DQ28 SB_DQ_27 SB_DQS#_4 M_B_DQS#5
AY41 SA_DQ_29 SA_DQS#_6 BC1 BK41 SB_DQ_28 SB_DQS#_5 BK7
M_A_DQ30 AV38 AP2 M_A_DQS#7 M_B_DQ29 BJ40 BF2 M_B_DQS#6
M_A_DQ31 SA_DQ_30 SA_DQS#_7 M_B_DQ30 SB_DQ_29 SB_DQS#_6 M_B_DQS#7
AT38 SA_DQ_31 M_A_A[13:0] 7,9 BL35 SB_DQ_30 SB_DQS#_7 AV3
M_A_DQ32 AV13 BJ19 M_A_A0 M_B_DQ31 BK37 M_B_A[13:0] 8,9
M_A_DQ33 SA_DQ_32 SA_MA_0 M_A_A1 M_B_DQ32 SB_DQ_31 M_B_A0
AT13 SA_DQ_33 SA_MA_1 BD20 BK13 SB_DQ_32 SB_MA_0 BC18
M_A_DQ34 AW11 BK27 M_A_A2 M_B_DQ33 BE11 BG28 M_B_A1
M_A_DQ35 SA_DQ_34 SA_MA_2 M_A_A3 M_B_DQ34 SB_DQ_33 SB_MA_1 M_B_A2
AV11 SA_DQ_35 SA_MA_3 BH28 BK11 SB_DQ_34 SB_MA_2 BG25
M_A_DQ36 AU15 BL24 M_A_A4 M_B_DQ35 BC11 AW17 M_B_A3
M_A_DQ37 SA_DQ_36 SA_MA_4 M_A_A5 M_B_DQ36 SB_DQ_35 SB_MA_3 M_B_A4
AT11 SA_DQ_37 SA_MA_5 BK28 BC13 SB_DQ_36 SB_MA_4 BF25
M_A_DQ38 BA13 BJ27 M_A_A6 M_B_DQ37 BE12 BE25 M_B_A5
M_A_DQ39 SA_DQ_38 SA_MA_6 M_A_A7 M_B_DQ38 SB_DQ_37 SB_MA_5 M_B_A6
BA11 SA_DQ_39 SA_MA_7 BJ25 BC12 SB_DQ_38 SB_MA_6 BA29
M_A_DQ40 BE10 BL28 M_A_A8 M_B_DQ39 BG12 BC28 M_B_A7
M_A_DQ41 SA_DQ_40 SA_MA_8 M_A_A9 M_B_DQ40 SB_DQ_39 SB_MA_7 M_B_A8
BD10 SA_DQ_41 SA_MA_9 BA28 BJ10 SB_DQ_40 SB_MA_8 AY28
M_A_DQ42 BD8 BC19 M_A_A10 M_B_DQ41 BL9 BD37 M_B_A9
M_A_DQ43 SA_DQ_42 SA_MA_10 M_A_A11 M_B_DQ42 SB_DQ_41 SB_MA_9 M_B_A10
AY9 SA_DQ_43 SA_MA_11 BE28 BK5 SB_DQ_42 SB_MA_10 BG17
M_A_DQ44 BG10 BG30 M_A_A12 M_B_DQ43 BL5 BE37 M_B_A11
M_A_DQ45 SA_DQ_44 SA_MA_12 M_A_A13 M_B_DQ44 SB_DQ_43 SB_MA_11 M_B_A12
AW9 SA_DQ_45 SA_MA_13 BJ16 BK9 SB_DQ_44 SB_MA_12 BA39
M_A_DQ46 BD7 M_B_DQ45 BK10 BG13 M_B_A13
M_A_DQ47 SA_DQ_46 M_B_DQ46 SB_DQ_45 SB_MA_13
BB9 SA_DQ_47 BJ8 SB_DQ_46
M_A_DQ48 BB5 BE18 M_B_DQ47 BJ6 AV16
SA_DQ_48 SA_RAS# M_A_RAS# 7,9 SB_DQ_47 SB_RAS# M_B_RAS# 8,9
M_A_DQ49 AY7 AY20 M_B_DQ48 BF4 AY18
M_A_DQ50 SA_DQ_49 SA_RCVEN# M_B_DQ49 SB_DQ_48 SB_RCVEN#
AT5 SA_DQ_50 BH5 SB_DQ_49
B M_A_DQ51 AT7 BA19 M_A_WE# 7,9 M_B_DQ50 BG1 BC17 M_B_WE# 8,9 B
M_A_DQ52 SA_DQ_51 SA_WE# M_B_DQ51 SB_DQ_50 SB_WE#
AY6 SA_DQ_52 BC2 SB_DQ_51
M_A_DQ53 BB7 M_B_DQ52 BK3
M_A_DQ54 SA_DQ_53 M_B_DQ53 SB_DQ_52
AR5 SA_DQ_54 BE4 SB_DQ_53
M_A_DQ55 AR8 M_B_DQ54 BD3
M_A_DQ56 SA_DQ_55 M_B_DQ55 SB_DQ_54
AR9 SA_DQ_56 BJ2 SB_DQ_55
M_A_DQ57 AN3 M_B_DQ56 BA3
M_A_DQ58 SA_DQ_57 M_B_DQ57 SB_DQ_56
AM8 SA_DQ_58 BB3 SB_DQ_57
M_A_DQ59 AN10 M_B_DQ58 AR1
M_A_DQ60 SA_DQ_59 M_B_DQ59 SB_DQ_58
AT9 SA_DQ_60 AT3 SB_DQ_59
M_A_DQ61 AN9 M_B_DQ60 AY2
M_A_DQ62 SA_DQ_61 M_B_DQ61 SB_DQ_60
AM9 SA_DQ_62 AY3 SB_DQ_61
M_A_DQ63 AN11 M_B_DQ62 AU2
SA_DQ_63 M_B_DQ63 SB_DQ_62
AT2 SB_DQ_63
CRESTLINE_965PM
CRESTLINE_965PM

A A

Title : NB_965PM(DDR2)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 13 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

+VCCP U1001G
Max: 1573 mA +VGFX_CORE +VCCP +VCCP
Max: 7700 mA (965GM) U1001F
AT35 VCC_1
AT34 T17 R1401 2 1 0Ohm @ AB33
VCC_2 VCC_AXG_NCTF_1 R1402 VCC_NCTF_1
+ + AH28 VCC_3 VCC_AXG_NCTF_2 T18 2 1 0Ohm @ AB36 VCC_NCTF_2
CE1401 CE1402 AC32 T19 C1404 C1405 R1403 2 1 0Ohm @ C1410 C1411 AB37
100UF/2.5V 100UF/2.5V VCC_5 VCC_AXG_NCTF_3 10UF/10V 10UF/10V 0.1UF/16V 0.1UF/16V VCC_NCTF_3
AC31 VCC_4 VCC_AXG_NCTF_4 T21 AC33 VCC_NCTF_4 VSS_NCTF_1 T27
@ AK32 T22 @ @ AC35 T37
VCC_6 VCC_AXG_NCTF_5 VCC_NCTF_5 VSS_NCTF_2
D AJ31 VCC_7 VCC_AXG_NCTF_6 T23 AC36 VCC_NCTF_6 VSS_NCTF_3 U24 D
AJ28 VCC_8 VCC_AXG_NCTF_7 T25 AD35 VCC_NCTF_7 VSS_NCTF_4 U28
AH32 VCC_9 VCC_AXG_NCTF_8 U15 AD36 VCC_NCTF_8 VSS_NCTF_5 V31
AH31 VCC_10 VCC_AXG_NCTF_9 U16 AF33 VCC_NCTF_9 VSS_NCTF_6 V35
AH29 VCC_11 VCC_AXG_NCTF_10 U17 + AF36 VCC_NCTF_10 VSS_NCTF_7 AA19
AF32 U19 C1407 CE1404 C1412 C1413 AH33 AB17
VCC_12 VCC_AXG_NCTF_11 C1406 1UF/10V 100UF/2.5V 10UF/10V 0.1UF/16V VCC_NCTF_11 VSS_NCTF_8
VCC_AXG_NCTF_12 U20 AH35 VCC_NCTF_12 VSS_NCTF_9 AB35
U21 0Ohm @ @ AH36 AD19
VCC_AXG_NCTF_13 VCC_NCTF_13 VSS_NCTF_10
VCC_AXG_NCTF_14 U23 AH37 VCC_NCTF_14 VSS_NCTF_11 AD37
R30 VCC_13 VCC_AXG_NCTF_15 U26 AJ33 VCC_NCTF_15 VSS_NCTF_12 AF17
VCC_AXG_NCTF_16 V16 AJ35 VCC_NCTF_16 VSS_NCTF_13 AF35
VCC_AXG_NCTF_17 V17 AK33 VCC_NCTF_17 VSS_NCTF_14 AK17
VCC_AXG_NCTF_18 V19 AK35 VCC_NCTF_18 VSS_NCTF_15 AM17
VCC_AXG_NCTF_19 V20 AK36 VCC_NCTF_19 VSS_NCTF_16 AM24
V21 C1408 C1409 AK37 AP26
VCC_AXG_NCTF_20 0.1UF/16V 0.1UF/16V VCC_NCTF_20 VSS_NCTF_17
VCC_AXG_NCTF_21 V23 AD33 VCC_NCTF_21 VSS_NCTF_18 AP28
V24 @ @ AJ36 AR15
VCC_AXG_NCTF_22 VCC_NCTF_22 VSS_NCTF_19
Y15 AM35 AR19
+1.8V
Max: 3300 mA POWER VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
Y16
Y17
AL33
AL35
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VSS_NCTF_20
VSS_NCTF_21 AR28

AU32 VCC_SM_1 VCC_AXG_NCTF_26 Y19 965PM: Un-mount R1401~R1402, CE1404, C1404~C1405, C1407~C1409 AA33 VCC_NCTF_26
AU33 VCC_SM_2 VCC_AXG_NCTF_27 Y20 AA35 VCC_NCTF_27
+ AU35 Y21 Change C1406 to 0ohm. AA36
CE1403 VCC_SM_3 VCC_AXG_NCTF_28 VCC_NCTF_28
100UF/2.5V
AV33 VCC_SM_4 VCC_AXG_NCTF_29 Y23 965GM: Mount R1401~R1402, CE1404, C1404~C1409 AP35 VCC_NCTF_29
AW33 VCC_SM_5 VCC_AXG_NCTF_30 Y24 AP36 VCC_NCTF_30
AW35 Y26 AR35
VCC_SM_6 VCC_AXG_NCTF_31 VCC_NCTF_31
AY35 VCC_SM_7 VCC_AXG_NCTF_32 Y28 AR36 VCC_NCTF_32
BA32 VCC_SM_8 VCC_AXG_NCTF_33 Y29 Y32 VCC_NCTF_33
BA33 AA16 Y33

C
BA35
BB33
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
AA17
AB16 For EMI
Y35
Y36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
POWER C
C1401 C1402 BC32 AB19 Y37 A3
10UF/10V 10UF/10V VCC_SM_12 VCC_AXG_NCTF_37 VCC_NCTF_37 VSS_SCB1
BC33 VCC_SM_13 VCC_AXG_NCTF_38 AC16 T30 VCC_NCTF_38 VSS_SCB2 B2
BC35 AC17 +VCCP T34 C1
VCC_SM_14 VCC_AXG_NCTF_39 VCC_NCTF_39 VSS_SCB3
BD32 VCC_SM_15 VCC_AXG_NCTF_40 AC19 T35 VCC_NCTF_40 VSS_SCB4 BL1
BD35 VCC_SM_16 VCC_AXG_NCTF_41 AD15 U29 VCC_NCTF_41 VSS_SCB5 BL51
BE32 VCC_SM_17 VCC_AXG_NCTF_42 AD16 U31 VCC_NCTF_42 VSS_SCB6 A51
BE33 AD17 C1427 C1428 C1429 U32
VCC_SM_18 VCC_AXG_NCTF_43 0.1UF/16V 0.1UF/16V 0.1UF/16V VCC_NCTF_43
BE35 VCC_SM_19 VCC_AXG_NCTF_44 AF16 U33 VCC_NCTF_44
C1403 BF33 AF19 U35
0.1UF/16V VCC_SM_20 VCC_AXG_NCTF_45 VCC_NCTF_45
BF34 VCC_SM_21 VCC_AXG_NCTF_46 AH15 U36 VCC_NCTF_46
BG32 VCC_SM_22 VCC_AXG_NCTF_47 AH16 V32 VCC_NCTF_47
BG33 VCC_SM_23 VCC_AXG_NCTF_48 AH17 V33 VCC_NCTF_48
BG35 VCC_SM_24 VCC_AXG_NCTF_49 AH19 V36 VCC_NCTF_49
BH32 AJ16 V37 +VCCP
VCC_SM_25 VCC_AXG_NCTF_50 VCC_NCTF_50
BH34 VCC_SM_26 VCC_AXG_NCTF_51 AJ17
BH35 VCC_SM_27 VCC_AXG_NCTF_52 AJ19 VCC_AXM_1 AT33
BJ32 VCC_SM_28 VCC_AXG_NCTF_53 AK16 VCC_AXM_2 AT31
BJ33 AK19 AK29 C1425 C1426
VCC_SM_29 VCC_AXG_NCTF_54 +VCCP VCC_AXM_3 0.1UF/16V 0.1UF/16V
BJ34 VCC_SM_30 VCC_AXG_NCTF_55 AL16 Max: 540 mA VCC_AXM_4 AK24
BK32 VCC_SM_31 VCC_AXG_NCTF_56 AL17 VCC_AXM_5 AK23
BK33 VCC_SM_32 VCC_AXG_NCTF_57 AL19 AL24 VCC_AXM_NCTF_1 VCC_AXM_6 AJ26
BK34 VCC_SM_33 VCC_AXG_NCTF_58 AL20 AL26 VCC_AXM_NCTF_2 VCC_AXM_7 AJ23
BK35 AL21 C1414 C1415 AL28
VCC_SM_34 VCC_AXG_NCTF_59 10UF/10V 0.1UF/16V VCC_AXM_NCTF_3
BL33 VCC_SM_35 VCC_AXG_NCTF_60 AL23 AM26 VCC_AXM_NCTF_4
AU30 VCC_SM_36 VCC_AXG_NCTF_61 AM15 AM28 VCC_AXM_NCTF_5
VCC_AXG_NCTF_62 AM16 AM29 VCC_AXM_NCTF_6
VCC_AXG_NCTF_63 AM19 AM31 VCC_AXM_NCTF_7
+VGFX_CORE AM20 AM32
VCC_AXG_NCTF_64 VCC_AXM_NCTF_8
VCC_AXG_NCTF_65 AM21 AM33 VCC_AXM_NCTF_9
R20 VCC_AXG_1 VCC_AXG_NCTF_66 AM23 AP29 VCC_AXM_NCTF_10
B T14 AP15 C1416 C1417 AP31 B
VCC_AXG_2 VCC_AXG_NCTF_67 0.1UF/16V 0.1UF/16V VCC_AXM_NCTF_11
W13 VCC_AXG_3 VCC_AXG_NCTF_68 AP16 AP32 VCC_AXM_NCTF_12
W14 VCC_AXG_4 VCC_AXG_NCTF_69 AP17 AP33 VCC_AXM_NCTF_13
Y12 VCC_AXG_5 VCC_AXG_NCTF_70 AP19 AL29 VCC_AXM_NCTF_14
AA20 VCC_AXG_6 VCC_AXG_NCTF_71 AP20 AL31 VCC_AXM_NCTF_15
AA23 VCC_AXG_7 VCC_AXG_NCTF_72 AP21 AL32 VCC_AXM_NCTF_16
AA26 VCC_AXG_8 VCC_AXG_NCTF_73 AP23 AR31 VCC_AXM_NCTF_17
AA28 VCC_AXG_9 VCC_AXG_NCTF_74 AP24 AR32 VCC_AXM_NCTF_18
AB21 VCC_AXG_10 VCC_AXG_NCTF_75 AR20 AR33 VCC_AXM_NCTF_19
AB24 VCC_AXG_11 VCC_AXG_NCTF_76 AR21
AB29 VCC_AXG_12 VCC_AXG_NCTF_77 AR23
AC20 VCC_AXG_13 VCC_AXG_NCTF_78 AR24
AC21 VCC_AXG_14 VCC_AXG_NCTF_79 AR26
AC23 V26 CRESTLINE_965PM
VCC_AXG_15 VCC_AXG_NCTF_80
AC24 VCC_AXG_16 VCC_AXG_NCTF_81 V28
AC26 VCC_AXG_17 VCC_AXG_NCTF_82 V29
AC28 VCC_AXG_18 VCC_AXG_NCTF_83 Y31
AC29
VCC_AXG_19
AD20 VCC_AXG_20
AD23
VCC_AXG_21
AD24 VCC_AXG_22 VCC_SM_LF1 AW45
AD28 VCC_AXG_23 VCC_SM_LF2 BC39
AF21 BE39
VCC_AXG_24 VCC_SM_LF3
AF26 BD17
VCC_AXG_25 VCC_SM_LF4
AA31 VCC_AXG_26 VCC_SM_LF5 BD4
AH20 AW8
VCC_AXG_27 VCC_SM_LF6
AH21 AT6
VCC_AXG_28 VCC_SM_LF7
AH23 VCC_AXG_29
AH24 C1418 C1419 C1420 C1421 C1422 C1423 C1424
VCC_AXG_30 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/10V 1UF/10V 1UF/10V
AH26 VCC_AXG_31
AD31
A VCC_AXG_32 A
AJ20
VCC_AXG_33
AN14 VCC_AXG_34

CRESTLINE_965PM
Title : NB_965PM(PWR)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Tuesday, September 04, 2007 Sheet 14 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

+1.5VS
R1501 @ U1001H +VCCP
0Ohm
1 2 +1.5VS_CRT Max: 5mA +3VS_SYNC J32 U13 Max: 850mA
VCCSYNC VTT_1
D
VTT_2 U12 D
R1502 +3VS_CRTDAC A33 U11 +
0Ohm VCCA_CRT_DAC_1 VTT_3 C1529 C1530 C1531 C1532 CE1505
B33 VCCA_CRT_DAC_2 VTT_4 U9
1 2 U8 1UF/10V 1UF/10V 10UF/10V 10UF/10V 100UF/2.5V
+1.25VS L1506 VTT_5
VTT_6 U7
120Ohm/100Mhz Max: 50mA +3VS_TVDAC A30 U5
VCCA_DAC_BG VTT_7
1 2 VTT_8 U3
B32 VSSA_DAC_BG VTT_9 U2
+3VS R1503 @ C1515 C1516 U1
0Ohm 10UF/10V 0.1UF/16V VTT_10
VTT_11 T13
1 2 +3VS_SYNC Max: 10mA +1.25VS_DPLLA B49 T11
VCCA_DPLLA VTT_12
VTT_13 T10
+1.25VS_DPLLB H49 T9
C1501 VCCA_DPLLB VTT_14
VTT_15 T7
0Ohm +1.25VS L1507 +1.25VS_HPLL AL2 T6
120Ohm/100Mhz VCCA_HPLL VTT_16
Max: 150mA VTT_17 T5
1 2 +1.25VS_MPLL AM2 T3
VCCA_MPLL VTT_18
VTT_19 T2
C1518 R3
+1.25VS R1508 1UF/10V +1.8V_TXLVDS VTT_20
A41 VCCA_LVDS VTT_21 R2
L1501 @ 1Ohm Max: 150mA R1
120Ohm/100Mhz 1% +3VS VTT_22 +1.25VS
B41 VSSA_LVDS
1 2 +1.25VS_DPLLA Max: 80mA
VCC_AXD_1 AT23 Max: 200mA
+ C1517 Max: 400uA AU28
CE1501 C1502 10UF/10V C1519 VCC_AXD_2 C1533 C1534
K50 AU24
47UF/6.3V 0Ohm 0.1UF/16V VCCA_PEG_BG VCC_AXD_3 1UF/10V 10UF/10V
VCC_AXD_4 AT29
@ K49 AT25 @
+1.25VS L1508 VSSA_PEG_BG VCC_AXD_5 +1.25VS
VCC_AXD_6 AT30
120Ohm/100Mhz
L1502 @ 1 2 +1.25VS_PEGPLL U51 AR29
C
120Ohm/100Mhz VCCA_PEG_PLL VCC_AXD_NCTF C
Max: 100mA
1 2 +1.25VS_DPLLB C1521 C1535 C1536
R1509 0.1UF/16V AW18 B23 1UF/10V 10UF/10V
1Ohm VCCA_SM_1 VCC_AXF_1
+ AV19 B21 Max: 350mA
CE1502
47UF/6.3V
C1503
0Ohm
1%
+1.25VS
AU19
AU18
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
POWER VCC_AXF_2
VCC_AXF_3 A21 +1.25VS

@ AU17 AJ50 Max: 100mA


C1520 VCCA_SM_5 VCC_DMI
Max: 640mA
10UF/10V AT22 C1537
VCCA_SM_7 0.1UF/16V
+ AT21 VCCA_SM_8 VCC_SM_CK_1 BK24
CE1504 C1522 AT19 BK23
+1.8V L1503 @ 100UF/2.5V 10UF/10V VCCA_SM_9 VCC_SM_CK_2 L1509 +1.8V
AT18 VCCA_SM_10 VCC_SM_CK_3 BJ24
120Ohm/100Mhz R2.0-01 AT17 BJ23 120Ohm/100Mhz
+1.8V_TXLVDS VCCA_SM_11 VCC_SM_CK_4 +1.8V_SM_CK
1 2 Max: 110mA AR17 VCCA_SM_NCTF_1 1 2
AR16 VCCA_SM_NCTF_2 Max: 200mA
+ C1538 C1540
CE1503 C1505 C1505 +1.25VS A43 +1.8V_TXLVDS 0.1UF/16V R1510 10UF/10V
47UF/6.3V 0Ohm 1000PF/50V VCC_TX_LVDS 1Ohm
BC29
@ @ VCCA_SM_CK_1 +3VS 1%
Max: 35mA BB29 VCCA_SM_CK_2
VCC_HV_1 C40
C1523 C1524 C25 B40 Max: 100mA
R1504 @ 10UF/10V 0.1UF/16V VCCA_TVA_DAC_1 VCC_HV_2 C1539
B25 VCCA_TVA_DAC_2
0Ohm C27 C1541 10UF/10V
+1.8V_LVDS VCCA_TVB_DAC_1 0.1UF/16V +VCCP
1 2 Max: 150mA B27 VCCA_TVB_DAC_2 VCC_PEG_1 AD51
B28 VCCA_TVC_DAC_1 VCC_PEG_2 W50
+3VS_TVDAC A28 W51 L1510
C1506 VCCA_TVC_DAC_2 VCC_PEG_3 80Ohm/100Mhz
0Ohm +1.5VS VCC_PEG_4 V49
+VCCP_PEG
R2.0-01
VCC_PEG_5 V50 1 2
+1.5VS_CRT M32 Max: 1200mA
VCCD_CRT C1542 C1543
Max: 60mA L29 VCCD_TVDAC +
B AH50 10UF/10V 10UF/10V CE1506 B
C1525 C1526 C1527 +1.25VS +1.5VS_QDAC VCC_RXR_DMI_1 @ 100UF/2.5V
N28 VCCD_QDAC VCC_RXR_DMI_2 AH51 Max: 250mA
10UF/10V 0.1UF/16V 0.01UF/16V
+1.5VS R1505 @ @ Max: 250mA AN2 VCCD_HPLL
100Ohm A7
+1.5VS_QDAC C1528 +1.25VS_PEGPLL VTTLF1
2 1 Max: 5mA U48 VCCD_PEG_PLL VTTLF2 F2
0.1UF/16V AH1
VTTLF3
J41 VCCD_LVDS_1
C1507 +1.8V_LVDS H42 C1544 C1545 C1546
0Ohm VCCD_LVDS_2 1UF/10V 1UF/10V 1UF/10V

CRESTLINE_965PM

+3VS L1504 @
+5V +3VS 120Ohm/100Mhz
U1501 @ L1505 @
965PM: Mount R1502
1 2
1 120Ohm/100Mhz Un-mount R1501,R1503~R1505
VIN +3VS_TVDAC +3VS_CRTDAC
VOUT 5 Max: 205mA 1 2 Max: 5mA Un-mount L1501~L1505
C1508 2
10UF/10V GND C1511 Un-mount CE1501~CE1503
4 2 1
@ FB C1510 0.1UF/16V C1514
3 SD# R1506 0Ohm @ 0Ohm
Un-mount C1505,C1509,C1511~C1513
SI9183DT 35.7KOhm Change C1501~C1504,C1506,C1507,C1510,C1514 to 0ohm
@ 1%
A 965GM: Un-mount R1502 A
Mount R1501,R1503~R1505
R1507
Mount L1501~L1505
20KOhm C1509 C1512 C1513 Mount CE1501~CE1503
@ 1% 10UF/10V 0.1UF/16V 0.1UF/16V
@ @ @
Mount C1501~C1507,C1509~C1514
Title : NB_965PM(PWR)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 15 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

U1001I U1001J
C46 VSS_199 VSS_287 W11
A13 VSS_1 VSS_100 AW24 C50 VSS_200 VSS_288 W39
A15 VSS_2 VSS_101 AW29 C7 VSS_201 VSS_289 W43
A17 VSS_3 VSS_102 AW32 D13 VSS_202 VSS_290 W47
A24 VSS_4 VSS_103 AW5 D24 VSS_203 VSS_291 W5
D AA21 VSS_5 VSS_104 AW7 D3 VSS_204 VSS_292 W7 D
AA24 VSS_6 VSS_105 AY10 D32 VSS_205 VSS_293 Y13
AA29 VSS_7 VSS_106 AY24 D39 VSS_206 VSS_294 Y2
AB20 VSS_8 VSS_107 AY37 D45 VSS_207 VSS_295 Y41
AB23 VSS_9 VSS_108 AY42 D49 VSS_208 VSS_296 Y45
AB26 VSS_10 VSS_109 AY43 E10 VSS_209 VSS_297 Y49
AB28 VSS_11 VSS_110 AY45 E16 VSS_210 VSS_298 Y5
AB31 VSS_12 VSS_111 AY47 E24 VSS_211 VSS_299 Y50
AC10 VSS_13 VSS_112 AY50 E28 VSS_212 VSS_300 Y11
AC13 VSS_14 VSS_113 B10 E32 VSS_213 VSS_301 P29
AC3 VSS_15 VSS_114 B20 E47 VSS_214 VSS_302 T29
AC39 VSS_16 VSS_115 B24 F19 VSS_215 VSS_303 T31
AC43 VSS_17 VSS_116 B29 F36 VSS_216 VSS_304 T33
AC47 VSS_18 VSS_117 B30 F4 VSS_217 VSS_305 R28
AD1 VSS_19 VSS_118 B35 F40 VSS_218
AD21 VSS_20 VSS_119 B38 F50 VSS_219
AD26 VSS_21 VSS_120 B43 G1 VSS_220
AD29 VSS_22 VSS_121 B46 G13 VSS_221 VSS_306 AA32
AD3 VSS_23 VSS_122 B5 G16 VSS_222 VSS_307 AB32
AD41 VSS_24 VSS_123 B8 G19 VSS_223 VSS_308 AD32
AD45 VSS_25 VSS_124 BA1 G24 VSS_224 VSS_309 AF28
AD49 VSS_26 VSS_125 BA17 G28 VSS_225 VSS_310 AF29
AD5 VSS_27 VSS_126 BA18 G29 VSS_226 VSS_311 AT27
AD50 VSS_28 VSS_127 BA2 G33 VSS_227 VSS_312 AV25
AD8 VSS_29 VSS_128 BA24 G42 VSS_228 VSS_313 H50
AE10 BB12 G45
VSS_30 VSS_129 VSS_229
AE14 VSS_31 VSS_130 BB25 G48 VSS_230
AE6 VSS_32 VSS_131 BB40 G8 VSS_231
AF20 BB44 H24

C
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
H28
H4
VSS_232
VSS_233
VSS_234 C
AF31 VSS_36 VSS_135 BC16 H45 VSS_235
AG2 VSS_37 VSS_136 BC24 J11 VSS_236
AG38 VSS_38 VSS_137 BC25 J16 VSS_237
AG43 VSS_39 VSS_138 BC36 J2 VSS_238
AG47 VSS_40 VSS_139 BC40 J24 VSS_239
AG50 VSS_41 VSS_140 BC51 J28 VSS_240
AH3 BD13 J33
AH40
AH41
VSS_42
VSS_43
VSS_44
VSS_141
VSS_142
VSS_143
BD2
BD28
J35
J39
VSS_241
VSS_242
VSS_243
VSS
AH7 VSS_45 VSS_144 BD45
AH9 VSS_46 VSS_145 BD48 K12 VSS_245
AJ11 VSS_47 VSS_146 BD5 K47 VSS_246
AJ13 VSS_48 VSS_147 BE1 K8 VSS_247
AJ21 VSS_49 VSS_148 BE19 L1 VSS_248
AJ24 VSS_50 VSS_149 BE23 L17 VSS_249
AJ29 VSS_51 VSS_150 BE30 L20 VSS_250
AJ32 VSS_52 VSS_151 BE42 L24 VSS_251
AJ43 BE51 L28
VSS_53 VSS_152 VSS_252
AJ45 VSS_54 VSS_153 BE8 L3 VSS_253
AJ49 VSS_55 VSS_154 BF12 L33 VSS_254
AK20 VSS_56 VSS_155 BF16 L49 VSS_255
AK21 VSS_57 VSS_156 BF36 M28 VSS_256
AK26 VSS_58 VSS_157 BG19 M42 VSS_257
AK28 VSS_59 VSS_158 BG2 M46 VSS_258
AK31 VSS_60 VSS_159 BG24 M49 VSS_259
AK51 VSS_61 VSS_160 BG29 M5 VSS_260
AL1 VSS_62 VSS_161 BG39 M50 VSS_261
AM11 VSS_63 VSS_162 BG48 M9 VSS_262
AM13 VSS_64 VSS_163 BG5 N11 VSS_263
AM3 VSS_65 VSS_164 BG51 N14 VSS_264
B AM4 VSS_66 VSS_165 BH17 N17 VSS_265
B
AM41 VSS_67 VSS_166 BH30 N29 VSS_266
AM45 VSS_68 VSS_167 BH44 N32 VSS_267
AN1 VSS_69 VSS_168 BH46 N36 VSS_268
AN38 VSS_70 VSS_169 BH8 N39 VSS_269
AN39 VSS_71 VSS_170 BJ11 N44 VSS_270
AN43 VSS_72 VSS_171 BJ13 N49 VSS_271
AN5 VSS_73 VSS_172 BJ38 N7 VSS_272
AN7 VSS_74 VSS_173 BJ4 P19 VSS_273
AP4 VSS_75 VSS_174 BJ42 P2 VSS_274
AP48 VSS_76 VSS_175 BJ46 P23 VSS_275
AP50 VSS_77 VSS_176 BK15 P3 VSS_276
AR11 VSS_78 VSS_177 BK17 P50 VSS_277
AR2 VSS_79 VSS_178 BK25 R49 VSS_278
AR39 VSS_80 VSS_179 BK29 T39 VSS_279
AR44 VSS_81 VSS_180 BK36 T43 VSS_280
AR47 VSS_82 VSS_181 BK40 T47 VSS_281
AR7 BK44 U41
VSS_83 VSS_182 VSS_282
AT10 VSS_84 VSS_183 BK6 U45 VSS_283
AT14 BK8 U50
VSS_85 VSS_184 VSS_284
AT41 VSS_86 VSS_185 BL11 V2 VSS_285
AT49 VSS_87 VSS_186 BL13 V3 VSS_286
AU1 BL19
VSS_88 VSS_187
AU23 BL22
VSS_89 VSS_188 CRESTLINE_965PM
AU29 VSS_90 VSS_189 BL37
AU3 BL47
VSS_91 VSS_190
AU36 C12
VSS_92 VSS_191
AU49 VSS_93 VSS_192 C16
AU51 C19
VSS_94 VSS_193
AV39 VSS_95 VSS_194 C28
AV48 C29
A VSS_96 VSS_195 A
AW1 C33
VSS_97 VSS_196
AW12 VSS_98 VSS_197 C36
AW16 C41
VSS_99 VSS_198

CRESTLINE_965PM

Title : NB_965PM(GND)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 16 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : NB_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 17 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : NB_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 18 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : MEM_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 19 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

+RTCBAT +3VA +VCC_RTC


D2001
R2001 1
1KOhm 3
1 2 +RTC_BAT 2

BAT54C
BAT2001 C2001
D BATT_HOLDER 1UF/10V D

2 1 X1_RTC

C2002
12PF/50V
2 X2001 R2002
32.768Khz 10MOhm
3

C2003 U2001A
+VCC_RTC 12PF/50V AG25 E5
RTCX1 FWH0/LAD0 LPC_AD0 30,44,62
2 1 X2_RTC AF24 F5 LPC_AD1 30,44,62
RTCX2 FWH1/LAD1
FWH2/LAD2 G8 LPC_AD2 30,44,62
1 2 RTCRST# AF23 F6 LPC_AD3 30,44,62
RTCRST# FWH3/LAD3
R2003 C2004 +VCC_RTC R2004 1 2 1MOhm INTRUDER# AD22 C4 LPC_FRAME# 30,44,62
20KOhm 1UF/10V INTRUDER# FWH4/LFRAME#
1% R2005 1 2 330KOhm INTVRMEN AF25 G9
JRST2001 R2006 INTVRMEN LDRQ0# +VCCP
1 2 330KOhm ICH_LAN100 AD21 LAN100_SLP LDRQ1#/GPIO23 E6
SGL_JUMP
B24 AF13 A20GATE 22,30
GLAN_CLK A20GATE
RTCRST# RC delay A20M# AG26 H_A20M# 3
D22 R2008
should be 18ms~25ms LAN_RSTSYNC
AF26 56Ohm
DPRSTP# H_DPRSTP# 3,11,80
C21 LAN_RXD0 DPSLP# AE26 H_DPSLP# 3
C
B21 LAN_RXD1 C
C22 LAN_RXD2 FERR# AD24 H_FERR# 3
Request of CSC
D21 AG29 H_PWRGD 3
for CMOS clear E20
LAN_TXD0 CPUPWRGD/GPIO49
LAN_TXD1
function C20 LAN_TXD2 IGNNE# AF27 H_IGNNE# 3
AH21 GLAN_DOCK#/GPIO13 INIT# AE24 H_INIT# 3
AC20 +VCCP
INTR H_INTR 3
D25 GLAN_COMPI RCIN# AH14 RCIN# 22,30
C25 GLAN_COMPO
36 ACZ_BCLK_AUD 3 4 RNX2001B AD23 H_NMI 3
33Ohm NMI
35 ACZ_BCLK_MDC 3 4 RNX2003B ACZ_BCLK AJ16 AG28 H_SMI# 3 R2009
33Ohm HDA_BIT_CLK SMI#
1 2 RNX2001A ACZ_SYNC AJ15 56Ohm
36 ACZ_SYNC_AUD 33Ohm HDA_SYNC
35 ACZ_SYNC_MDC 1 2 RNX2003A AA24 H_STPCLK# 3
33Ohm STPCLK#
36,37 ACZ_RST#_AUD 1 2 RNX2002A ACZ_RST# AE14
33Ohm HDA_RST#
35 ACZ_RST#_MDC 1 2 RNX2004A AE27 SB_THRMTRIP#
33Ohm THRMTRIP#
ACZ_SDIN0 CODEC 36 ACZ_SDIN0 AJ17 HDA_SDIN0
35 ACZ_SDIN1 AH17 AA23
HDA_SDIN1 TP8
ACZ_SDIN1 MODEM AH15 HDA_SDIN2 IDE_PDD[15:0] 51
AD13 V1 IDE_PDD0
HDA_SDIN3 DD0 IDE_PDD1
DD1 U2
3 RNX2002B ACZ_SDOUT IDE_PDD2
36 ACZ_SDOUT_AUD 33Ohm 4 AE13 HDA_SDOUT DD2 V3
3 RNX2004B IDE_PDD3
35 ACZ_SDOUT_MDC 33Ohm 4 DD3 T1
AE10 V4 IDE_PDD4
HDA_DOCK_EN#/GPIO33 DD4 IDE_PDD5
AG14 HDA_DOCK_RST#/GPIO34 DD5 T5
AB2 IDE_PDD6
DD6 IDE_PDD7
56 SATA_LED# AF10 SATALED# DD7 T6
T3 IDE_PDD8
DD8 IDE_PDD9
51 SATA_RXN0 AF6 SATA0RXN DD9 R2
51 SATA_RXP0 AF5 T4 IDE_PDD10
SATA0RXP DD10 IDE_PDD11
B 51 SATA_TXN0 AH5 SATA0TXN DD11 V6 B
51 SATA_TXP0 AH6 V5 IDE_PDD12
SATA0TXP DD12 IDE_PDD13
DD13 U1
AG3 V2 IDE_PDD14
SATA1RXN DD14 IDE_PDD15
AG4 SATA1RXP DD15 U6
AJ4 SATA1TXN
AJ3 SATA1TXP DA0 AA4 IDE_PDA0 51
DA1 AA1 IDE_PDA1 51
AF2 SATA2RXN DA2 AB3 IDE_PDA2 51
AF1 SATA2RXP
AE4 SATA2TXN DCS1# Y6 IDE_PDCS1# 51
AE3 SATA2TXP DCS3# Y5 IDE_PDCS3# 51

29 CLK_PCIE_SATA# AB7 SATA_CLKN DIOR# W4 IDE_PDIOR# 51


29 CLK_PCIE_SATA AC6 SATA_CLKP DIOW# W3 IDE_PDIOW# 51
DDACK# Y2 IDE_PDDACK# 51
R2007 2 1 24.9Ohm SATARBIAS# AG1 Y3
SATARBIAS# IDEIRQ INT_IRQ14 22,51
1% AG2 Y1 IDE_PIORDY 22,51
SATARBIAS IORDY
DDREQ W5 IDE_PDDREQ 51
ICH8-M

A A

Title : SB_ICH8M(1)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 20 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

40 PCI_AD[31:0] U2001B
ICH_TP3, ACZ_SDOUT : XOR Chain Entrance Strap PCI_AD0 D20 A4
AD0 REQ0# PCI_REQ#0 22,40
PCI_AD1
00 = Reserved PCI_AD2
E19
D19
AD1 PCI GNT0# D7
E18
PCI_GNT#0 40
AD2 REQ1#/GPIO50 PCI_REQ#1 22
01 = Enter XOR Chain PCI_AD3 A20 C18
PCI_AD4 AD3 GNT1#/GPIO51
D17 AD4 REQ2#/GPIO52 B19 PCI_REQ#2 22
10 = Normal Operation (D) PCI_AD5 A21 F18
PCI_AD6 AD5 GNT2#/GPIO53
D
11 = Set PCIe Port Config Bit 1 PCI_AD7
A19 AD6 REQ3#/GPIO54 A11 PCI_REQ#3 22 D
C19 AD7 GNT3#/GPIO55 C10 1
PCI_AD8 A18 T2101
PCI_AD9 AD8
B16 AD9 C/BE0# C17 PCI_C/BE#0 40
GNT0#, SPI_CS1 : ICH8 Boot BIOS Select PCI_AD10 A12 E15 PCI_C/BE#1 40
PCI_AD11 AD10 C/BE1#
E16 AD11 C/BE2# F16 PCI_C/BE#2 40
00 = Reserved PCI_AD12 A14 E17 PCI_C/BE#3 40
PCI_AD13 AD12 C/BE3#
01 = SPI PCI_AD14
G16 AD13
A15 AD14 IRDY# C8 PCI_IRDY# 22,40
10 = PCI PCI_AD15 B6 D9 PCI_PAR 40
PCI_AD16 AD15 PAR
11 = LPC (D) PCI_AD17
C11 AD16 PCIRST# G6 PCI_RST# 40
A9 AD17 DEVSEL# D16 PCI_DEVSEL# 22,40
PCI_AD18 D11 A7 PCI_PERR# 22,40
PCI_AD19 AD18 PERR#
B12 AD19 PLOCK# B7 PCI_LOCK# 22
GNT2# : PCIe Port Configuration 2(Port 5/6) PCI_AD20 C12 F10 PCI_SERR# 22,40
PCI_AD21 AD20 SERR# +3VS
D10 AD21 STOP# C16 PCI_STOP# 22,40
0 = Port 5 (x2) PCI_AD22 C7 C9 PCI_TRDY# 22,40 U2101
PCI_AD23 AD22 TRDY#
1 = Port 5 (x1), Port 6(x1) (D) F13 AD23 FRAME# A17 PCI_FRAME# 22,40 1 A VCC 5
PCI_AD24 E11
PCI_AD25 AD24 PLT_RST#
E13 AD25 PLTRST# AG24 2 B
PCI_AD26 E12 B10 CLK_ICHPCI 29
PCI_AD27 AD26 PCICLK
GNT3# : A16 Swap override strip PCI_AD28
D8 AD27 PME# G7 3 GND
Y
4 BUF_PLT_RST# 11,30,33,38,43,51,53,58,62,66,70
A6 AD28
0 = Enable PCI_AD29 E8 NC7SZ08P5X
PCI_AD30 AD29 R2101
1 = Default (D) PCI_AD31
D6 AD30 1KOhm
A3
AD31 Buffer to Reduce
Interrupt I/F Loading on
22,40 PCI_INTA# F9 PIRQA# PIRQE#/GPIO2 F8 PCI_INTE# 22 PLT_RST#
22,40 PCI_INTB# B5 PIRQB# PIRQF#/GPIO3 G11 PCI_INTF# 22
C 22 PCI_INTC# C5 PIRQC# PIRQG#/GPIO4 F12 PCI_INTG# 22 C
22 PCI_INTD# A10 PIRQD# PIRQH#/GPIO5 B3 PCI_INTH# 22
ICH8-M

U2001D
33 PCIE_RXN1_SB P27 PERN1 DMI0RXN V27 DMI_RXN0 11
33 PCIE_RXP1_SB P26 PERP1 DMI0RXP V26 DMI_RXP0 11
33 PCIE_RXN_LAN 1 2 CX2101 0.1UF/10V PCIE_TXN1_SB N29 U29 DMI_TXN0 11
PCIE_TXP1_SB PETN1 DMI0TXN
33 PCIE_RXP_LAN 1 2 CX2102 0.1UF/10V N28 PETP1 DMI0TXP U28 DMI_TXP0 11

M27 PERN2 DMI1RXN Y27 DMI_RXN1 11


M26 PERP2 DMI1RXP Y26 DMI_RXP1 11
L29 PETN2 DMI1TXN W29 DMI_TXN1 11
L28 PETP2 DMI1TXP W28 DMI_TXP1 11

43 PCIE_RXN3_SB K27 PERN3 DMI2RXN AB26 DMI_RXN2 11


43 PCIE_RXP3_SB K26 PERP3 DMI2RXP AB25 DMI_RXP2 11
1 2 CX2105 0.1UF/10V PCIE_TXN3_SB J29 AA29
43 PCIE_RXN_NEWCARD PETN3 DMI2TXN DMI_TXN2 11
43 PCIE_RXP_NEWCARD 1 2 CX2106 0.1UF/10V PCIE_TXP3_SB J28 AA28 DMI_TXP2 11
PETP3 DMI2TXP
B 58 PCIE_RXN4_SB H27 PERN4 DMI3RXN AD27 DMI_RXN3 11 B
58 PCIE_RXP4_SB H26 PERP4 DMI3RXP AD26 DMI_RXP3 11
1 2 CX2107 0.1UF/10V PCIE_TXN4_SB G29 AC29
58 PCIE_RXN_ROBSON PETN4 DMI3TXN DMI_TXN3 11
58 PCIE_RXP_ROBSON 1 2 CX2108 0.1UF/10V PCIE_TXP4_SB G28 AC28 DMI_TXP3 11
PETP4 DMI3TXP

66 PCIE_RXN5_SB F27 PERN5 DMI_CLKN T26 CLK_PCIE_ICH# 29


66 PCIE_RXP5_SB F26 PERP5 DMI_CLKP T25 CLK_PCIE_ICH 29
66 PCIE_RXN_ESATA 1 2 CX2109 0.1UF/10V PCIE_TXN5_SB E29 PETN5
66 PCIE_RXP_ESATA 1 2 CX2110 0.1UF/10V PCIE_TXP5_SB E28 PETP5 DMI_ZCOMP Y23 DMIRCOMP R2102 2 1 24.9Ohm +1.5VS
Y24 1%
DMI_IRCOMP
53 PCIE_RXN6_SB D27 PERN6/GLAN_RXN
53 PCIE_RXP6_SB D26 PERP6/GLAN_RXP USBP0N G3 USB_PN0 65 USB 0 USB Conn.
53 PCIE_RXN_WLAN 1 2 CX2111 0.1UF/10V PCIE_TXN6_SB C29 G2 USB_PP0 65
PCIE_TXP6_SB PETN6/GLAN_TXN USBP0P
53 PCIE_RXP_WLAN 1 2 CX2112 0.1UF/10V C28 PETP6/GLAN_TXP USBP1N H5 USB_PN1 65 USB 1 USB Conn.
USBP1P H4 USB_PP1 65
C23 SPI_CLK USBP2N H2 USB_PN2 45 USB 2 USB Conn.
B23 SPI_CS0# USBP2P H1 USB_PP2 45
1 E22
SPI_CS1# USBP3N
J3 USB_PN3 66 USB 3 eSATA/USB
T2102 J2 USB_PP3 66
USBP3P
D23
SPI_MOSI USBP4N
K5 USB_PN4 43 USB 4 NewCard
F21 SPI_MISO USBP4P K4 USB_PP4 43
USBP5N K2 USB_PN5 45 USB 5 Camera
65 USB_CON01_OC# AJ19
OC0# USBP5P
K1 USB_PP5 45 R1.1-04
AG16
OC1#/GPIO40 USBP6N
L3 USB_PN6 61 USB 6 Bluetooth
45 USB_CON25_OC# AG15
AE15
OC2#/GPIO41 USB USBP6P L2
M5
USB_PP6 61
USB 7 3G Card
66 USB_ESATA_OC# OC3#/GPIO42 USBP7N USB_PN7 67
22,43 NEWCARD_OC# AF15 M4 USB_PP7 67
OC4#/GPIO43 USBP7P
AG17 OC5#/GPIO29 USBP8N M2 USB_PN8 63 USB 8 Fingerprint
R1.1-04 22 INT_USB_OC# AD12
OC6#/GPIO30 USBP8P
M1 USB_PP8 63
AJ18 OC7#/GPIO31 USBP9N N3 USB_PN9 64 USB 9 TV Tuner
AD14 N2 USB_PP9 64
A OC8# USBP9P A
AH18
OC9# USBRBIAS R2103
USBRBIAS# F2 1 2 22.6Ohm
F3 1%
USBRBIAS
ICH8-M

Title : SB_ICH8M(2)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 21 of 95
5 4 3 2 1
5 4 3 2 1

Main Board
U2001C
SMB_CLK AJ26 AJ12 ICH_GPIO21
SMB_DAT SMBCLK SATA0GP/GPIO21 ICH_GPIO19
AD19 SMBDATA SATA1GP/GPIO19 AJ10
LINKALERT# AG21 AF11 R1.1-05
LINKALERT# SATA2GP/GPIO36 EMAIL_LED# 56 +3VSUS
SMB_LINK0 AC17 AG11 PCB_ID0
SMB_LINK1 SMLINK0 SATA3GP/GPIO37
AE19 SMLINK1
CLK14 AG9 CLK_ICH14 29
RING# AF17 G5 CLK_USB48 29
RI# CLK48 R2212
62 PM_SUS_SAT# F4 D3 SUSCLK 62 10KOhm
SYS_RST# SUS_STAT#/LPCPD# SUSCLK
AD15 SYS_RESET#
D AG23 PM_SUSB# 30 D2201 D
SLP_S3# BAT54C
11 PM_BMBUSY# AG12 BMBUSY#/GPIO0 SLP_S4# AF21 PM_SUSC# 30
AD18 SB_RSMRST# 1
SMBALERT# SLP_S5#
AG22 SMBALERT#/GPIO11
3 PM_RSMRST# 30
S4_STATE#/GPIO26 AH27 2
29 STP_PCI# AE20 STP_PCI#/GPIO15
29 STP_CPU# AG18 STP_CPU#/GPIO25 PWROK AE23 PM_PWROK 11,30

30,40,62 PM_CLKRUN# AH11 AJ14 PM_DPRSLPVR 11,80 Q2202A


CLKRUN#/GPIO32 DPRSLPVR/GPIO16 UM6K1N
AE17 AE21 BAT_LL# 2
33,44,53 PCIE_WAKE# WAKE# BATLOW# AC_IN_OC# 30,90
30,40,62 INT_SERIRQ# AF12 SERIRQ
PMTHERM# AC13 C2 PM_PWRBTN# 30
THRM# PWRBTN# Q2202B
30 EC_CLK_EN AJ20 AH20 UM6K1N
VRMPWRGD LAN_RST#
5 BAT1_IN_OC# 30,90
AJ22 AG27 SB_RSMRST#
TP7 RSMRST#

61 BT_DET# AJ8 TACH1/GPIO1 CK_PWRGD E1 CLK_PWRGD 29


AJ9 TACH2/GPIO6
56 WLAN_LED_ON AH9 E3 PM_PWROK R2.0-02
TACH3/GPIO7 CLPWROK
30 EXT_SMI# AE16 GPIO8
AC19 AJ25 +3VS +3VSUS
30 EXT_SCI# GPIO12 SLP_M#
53 WLAN_ON# AG8 TACH0/GPIO17
AH12 GPIO18 CL_CLK0 F23 CL_CLK0 11
56 BT_LED_ON AE11 AE18 1 T2202
GPIO20 CL_CLK1 R2201 R2203
AG10 SCLOCK/GPIO22
61 BT_ON# AH25 F22 CL_DATA0 11 3.24KOhm 3.24KOhm
QRT_STATE0/GPIO27 CL_DATA0 T2203 1% 1% @
40 CB_SD# AD16 QRT_STATE1/GPIO28 CL_DATA1 AF19 1
AG13 SATACLKREQ#/GPIO35
PCB_ID1 AF9 D24 CL_VREF0_ICH
C
PCB_ID2 SLOAD/GPIO38 CL_VREF0 CL_VREF1_ICH C
AJ11 SDATAOUT0/GPIO39 CL_VREF1 AH23
AD10 SDATAOUT1/GPIO48
CL_RST# AJ23 CL_RST#0 11
36 SB_SPKR AD9 C2201 R2202 C2202 R2204
SPKR 0.1UF/16V 453Ohm 0.1UF/16V 453Ohm
CLGPIO0/GPIO24 AJ27
11 MCH_ICH_SYNC# AJ13 AJ24 1% @ 1% @
MCH_SYNC# CLGPIO1/GPIO10
CLGPIO2/GPIO14 AF22
T2201 1 AJ21 AG19
TP3 WOL_EN/GPIO9
ICH8-M

Q2201A +3VSUS +3VS +3VS


UM6K1N
1 6 SMB_CLK PCIE_WAKE# R2211 2 1 1KOhm RP2201A 1 RP2203A
7,8,29,38,44 SMB_CLK_S 21,40 PCI_SERR# 10kOhm 5 21 PCI_INTE# 1 10kOhm 5
10 10
RP2201B 2 RP2203B
21,40 PCI_FRAME# 10kOhm 5 21 PCI_INTF# 2 10kOhm 5
1 RN2201A
21,43 NEWCARD_OC# 10KOhm 2 10 10
3 RN2201B RP2201C RP2203C
+5VS 21 INT_USB_OC# 10KOhm 4 21,40 PCI_DEVSEL# 3 10kOhm 5 21 PCI_INTG# 3 10kOhm 5
BAT_LL# 5 RN2201C
10KOhm 6 10 10
7 RN2201D RP2201D RP2203D
10KOhm 8 21,40 PCI_STOP# 4 10kOhm 5 21 PCI_INTH# 4 10kOhm 5
10 10
4 3 SMB_DAT RP2201E 6 PMTHERM# RP2203E
B 7,8,29,38,44 SMB_DAT_S 21,40 PCI_IRDY# 10kOhm 5 6 10kOhm 5 B
SMB_CLK 1 RN2202A
4.7KOhm2 10 10
UM6K1N SMB_DAT 3 RN2202B RP2201F PM_CLKRUN# RP2203F
4.7KOhm4 21,40 PCI_TRDY# 7 10kOhm 5 7 10kOhm 5
Q2201B 10 10
RP2201G 8 RP2203G
+3VS 21,40 PCI_PERR# 10kOhm 5 20,51 INT_IRQ14 8 10kOhm 5
10 10
RP2201H 9 RP2203H
21 PCI_LOCK# 10kOhm 5 20,51 IDE_PIORDY 9 10kOhm 5
SMB_CLK_S 5 RN2202C
4.7KOhm6 10 10
SMB_DAT_S 7 RN2202D
4.7KOhm8
+3VS
PCB_ID[2:0] +3VS +3VSUS
BT_DET# 1 RN2203A
00: R2.0 10KOhm 2
ICH_GPIO19 3 RN2203B
10KOhm 4
ICH_GPIO21 5 RN2203C RP2202A LINKALERT# RP2204A
10KOhm 6 21,40 PCI_REQ#0 1 10kOhm 5 1 10kOhm 5
R1.1-05 EMAIL_LED# 7 RN2203D
10KOhm 8 10 10
R2205 R2207 R2209 RP2202B 2 SMBALERT# RP2204B
21 PCI_REQ#1 10kOhm 5 2 10kOhm 5
10KOhm 10KOhm 10KOhm 10 10
@ @ @ 1 RN2204A RP2202C SMB_LINK0 RP2204C
20,30 A20GATE 10KOhm 2 21 PCI_REQ#2 3 10kOhm 5 3 10kOhm 5
INT_SERIRQ# 3 RN2204B
10KOhm 4 10 10
PCB_ID0 5 RN2204C RP2202D SMB_LINK1 RP2204D
20,30 RCIN# 10KOhm 6 21 PCI_REQ#3 4 10kOhm 5 4 10kOhm 5
PCB_ID1 WLAN_ON# 7 RN2204D
10KOhm 8 10 10
PCB_ID2 RP2202E 6 EXT_SCI# RP2204E
21,40 PCI_INTA# 10kOhm 5 6 10kOhm 5
10 10
RP2202F 7 SYS_RST# RP2204F
21,40 PCI_INTB# 10kOhm 5 7 10kOhm 5
R2206 R2208 R2210 PM_SUSB# 1 RN2205A
100KOhm2 10 10
10KOhm 10KOhm 10KOhm 3 RN2205B RP2202G 8 EXT_SMI# RP2204G
100KOhm4 21 PCI_INTC# 10kOhm 5 8 10kOhm 5
PM_SUSC# 5 RN2205C
100KOhm6 10 10
PM_PWROK 7 RN2205D RP2202H RING# RP2204H
100KOhm8 21 PCI_INTD# 9 10kOhm 5 9 10kOhm 5
10 10

A A

Title : SB_ICH8M(3)
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 22 of 95
5 4 3 2 1
5 4 3 2 1

Main Board
+5VSUS +3VSUS +5VS +3VS +VCC_RTC

D2302 C2301 C2302


R2301 D2301 R2302 BAT54C 0.1UF/10V 0.1UF/10V
10Ohm BAT54C 100Ohm +VCCP U2001E
Max: 1130mA
U2001F A23 K7
VSS[001] VSS[099]
AD25 VCCRTC VCC1_05[01] A13 A5 VSS[002] VSS[100] L1
VCC1_05[02] B13 AA2 VSS[003] VSS[101] L13
+5VREF_ICH A16 C13 C2318 C2319 AA7 L15
V5REF[1] VCC1_05[03] 0.01UF/16V 0.1UF/16V VSS[004] VSS[102]
Max: 1mA T7 V5REF[2] VCC1_05[04] C14 A25 VSS[005] VSS[103] L26
D
VCC1_05[05] D14 AB1 VSS[006] VSS[104] L27 D
+5VREFSUS_ICH G4 E14 AB24 L4
V5REF_SUS VCC1_05[06] VSS[007] VSS[105]
Max: 1mA VCC1_05[07] F14 AC11 VSS[008] VSS[106] L5
C2303 C2304 C2337 AA25 G14 AC14 M12
0.1UF/16V 1UF/16V 10UF/16V VCC1_5_B[01] VCC1_05[08] VSS[009] VSS[107]
AA26 VCC1_5_B[02] VCC1_05[09] L11 AC25 VSS[010] VSS[108] M13
@ AA27 L12 AC26 M14
VCC1_5_B[03] VCC1_05[10] VSS[011] VSS[109]
AB27 VCC1_5_B[04] VCC1_05[11] L14 AC27 VSS[012] VSS[110] M15
AB28 VCC1_5_B[05] VCC1_05[12] L16 AD17 VSS[013] VSS[111] M16
AB29 VCC1_5_B[06] VCC1_05[13] L17 AD20 VSS[014] VSS[112] M17
R1.1-06 R2.0-03 D28 VCC1_5_B[07] VCC1_05[14] L18 AD28 VSS[015] VSS[113] M23
D29 VCC1_5_B[08] VCC1_05[15] M11 AD29 VSS[016] VSS[114] M28
+1.5VS
E25 VCC1_5_B[09] VCC1_05[16] M18 Max: 23 mA AD3 VSS[017] VSS[115] M29
E26 P11 L2304 AD4 M3
VCC1_5_B[10] VCC1_05[17] 120Ohm/100Mhz VSS[018] VSS[116]
E27 VCC1_5_B[11] VCC1_05[18] P18 AD6 VSS[019] VSS[117] N1
F24 T11 +1.5VS_DMIPLL_ICH 1 2 AE1 N11
VCC1_5_B[12] VCC1_05[19] VSS[020] VSS[118]
F25 VCC1_5_B[13] VCC1_05[20] T18 AE12 VSS[021] VSS[119] N12
G24 U11 C2320 C2321 AE2 N13
VCC1_5_B[14] VCC1_05[21] 0.01UF/16V 10UF/10V VSS[022] VSS[120]
H23 VCC1_5_B[15] VCC1_05[22] U18 AE22 VSS[023] VSS[121] N14
H24 VCC1_5_B[16] VCC1_05[23] V11 AD1 VSS[024] VSS[122] N15
J23 VCC1_5_B[17] VCC1_05[24] V12 AE25 VSS[025] VSS[123] N16
J24 VCC1_5_B[18] VCC1_05[25] V14 AE5 VSS[026] VSS[124] N17
K24 VCC1_5_B[19] VCC1_05[26] V16 AE6 VSS[027] VSS[125] N18
K25 VCC1_5_B[20] VCC1_05[27] V17 AE9 VSS[028] VSS[126] N26
L23 VCC1_5_B[21] VCC1_05[28] V18 AF14 VSS[029] VSS[127] N27
L24 VCC1_5_B[22] AF16 VSS[030] VSS[128] N4
+1.5VS +1.25VS
L25
VCC1_5_B[23] VCCDMIPLL
R29 Max: 50 mA AF18
VSS[031] VSS[129]
N5
L2301 Max: 657 mA M24 AF3 N6
80Ohm/100Mhz VCC1_5_B[24] VSS[032] VSS[130]
M25 VCC1_5_B[25] VCC_DMI[1] AE28 AF4 VSS[033] VSS[131] P12
1 2 +1.5VS_PCIE_ICH N23 AE29 AG5 P13
VCC1_5_B[26] VCC_DMI[2] +VCCP C2322 VSS[034] VSS[132]
N24 VCC1_5_B[27] Max: 1 mA AG6 VSS[035] VSS[133] P14
+ N25 AC23 10UF/10V AH10 P15
C
CE2301 C2305 C2306 C2307 VCC1_5_B[28] V_CPU_IO[1] VSS[036] VSS[134] C
P24 VCC1_5_B[29] V_CPU_IO[2] AC24 AH13 VSS[037] VSS[135] P16
100UF/2.5V 10UF/10V 10UF/10V 1UF/10V P25 AH16 P17
VCC1_5_B[30] C2323 C2324 C2325 VSS[038] VSS[136]
R24 VCC1_5_B[31] VCC3_3[01] AF29 AH19 VSS[039] VSS[137] P23
R25 0.1UF/16V 0.1UF/16V 10UF/10V AH2 P28
VCC1_5_B[32] VSS[040] VSS[138]
R26 VCC1_5_B[33] VCC3_3[02] AD2 AF28 VSS[041] VSS[139] P29
R27 VCC1_5_B[34] AH22 VSS[042] VSS[140] R11
T23 VCC1_5_B[35] VCC3_3[03] AC8 AH24 VSS[043] VSS[141] R12
T24 VCC1_5_B[36] VCC3_3[04] AD8 AH26 VSS[044] VSS[142] R13
T27 VCC1_5_B[37] VCC3_3[05] AE8 AH3 VSS[045] VSS[143] R14
+3VS
T28 VCC1_5_B[38] VCC3_3[06] AF8 Max: 278 mA AH4 VSS[046] VSS[144] R15
T29 VCC1_5_B[39] AH8 VSS[047] VSS[145] R16
U24 VCC1_5_B[40] VCC3_3[07] AA3 AJ5 VSS[048] VSS[146] R17
U25 VCC1_5_B[41] VCC3_3[08] U7 B11 VSS[049] VSS[147] R18
V23 V7 C2326 C2327 C2328 C2329 C2330 C2331 B14 R28
VCC1_5_B[42] VCC3_3[09] 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V VSS[050] VSS[148]
V24 VCC1_5_B[43] VCC3_3[10] W1 B17 VSS[051] VSS[149] R4
V25 VCC1_5_B[44] VCC3_3[11] W6 B2 VSS[052] VSS[150] T12
+1.5VS W25 W7 B20 T13
L2302 VCC1_5_B[45] VCC3_3[12] VSS[053] VSS[151]
Max: 47 mA Y25
VCC1_5_B[46] VCC3_3[13]
Y7 B22
VSS[054] VSS[152]
T14
120Ohm/100Mhz B8 T15
+1.5VS_SATAPLL_ICH VSS[055] VSS[153]
1 2 AJ6 A8 C24 T16
VCCSATAPLL VCC3_3[14] VSS[056] VSS[154]
VCC3_3[15] B15 C26 VSS[057] VSS[155] T17
C2308 C2309 AE7 B18 C27 T2
10UF/10V 1UF/10V VCC1_5_A[01] VCC3_3[16] VSS[058] VSS[156]
AF7 VCC1_5_A[02] VCC3_3[17] B4 C6 VSS[059] VSS[157] U12
AG7 VCC1_5_A[03] VCC3_3[18] B9 D12 VSS[060] VSS[158] U13
AH7 VCC1_5_A[04] VCC3_3[19] C15 D15 VSS[061] VSS[159] U14
AJ7 VCC1_5_A[05] VCC3_3[20] D13 D18 VSS[062] VSS[160] U15
VCC3_3[21] D5 D2 VSS[063] VSS[161] U16
AC1 VCC1_5_A[06] VCC3_3[22] E10 D4 VSS[064] VSS[162] U17
AC2 VCC1_5_A[07] VCC3_3[23] E7 E21 VSS[065] VSS[163] U23
+1.5VS +3VS +3VSUS
AC3 VCC1_5_A[08] VCC3_3[24] F11 Max: 32 mA Max: 32 mA E24 VSS[066] VSS[164] U26
B AC4 VCC1_5_A[09] E4 VSS[067] VSS[165] U27 B
Max: 1560 mA AC5 VCC1_5_A[10] VCCHDA AC12 E9 VSS[068] VSS[166] U3
F15 VSS[069] VSS[167] U5
C2310 C2311 AC10 AD11 E23 V13
1UF/10V 1UF/10V VCC1_5_A[11] VCCSUSHDA VSS[070] VSS[168]
AC9 VCC1_5_A[12] F28 VSS[071] VSS[169] V15
J6 C2332 C2333 F29 V28
VCCSUS1_05[1] 0.1UF/16V 0.1UF/10V VSS[072] VSS[170]
AA5 VCC1_5_A[13] VCCSUS1_05[2] AF20 F7 VSS[073] VSS[171] V29
AA6 VCC1_5_A[14] G1 VSS[074] VSS[172] W2
VCCSUS1_5[1] AC16 E2 VSS[075] VSS[173] W26
G12 VCC1_5_A[15] G10 VSS[076] VSS[174] W27
G17 VCC1_5_A[16] VCCSUS1_5[2] J7 G13 VSS[077] VSS[175] Y28
H7 VCC1_5_A[17] G19 VSS[078] VSS[176] Y29
C3 +3VSUS Max: 177 mA G23 Y4
VCCSUS3_3[01] VSS[079] VSS[177]
AC7 VCC1_5_A[18] G25 VSS[080] VSS[178] AB4
+1.5VS AD7 AC18 G26 AB23
VCC1_5_A[19] VCCSUS3_3[02] VSS[081] VSS[179]
VCCSUS3_3[03] AC21 G27 VSS[082] VSS[180] AB5
Max: 10 mA D1 AC22 C2334 C2335 H25 AB6
VCCUSBPLL VCCSUS3_3[04] 0.1UF/10V 10UF/6.3V VSS[083] VSS[181]
AG20 H28 AD5
C2312 C2313 VCCSUS3_3[05] VSS[084] VSS[182]
F1 VCC1_5_A[20] VCCSUS3_3[06] AH28 H29 VSS[085] VSS[183] U4
0.1UF/16V 0.1UF/16V L6 H3 W24
VCC1_5_A[21] VSS[086] VSS[184]
L7 VCC1_5_A[22] VCCSUS3_3[07] P6 H6 VSS[087]
M6 VCC1_5_A[23] VCCSUS3_3[08] P7 J1 VSS[088] VSS_NCTF[01] A1
M7 C1 J25 A2
+3VS VCC1_5_A[24] VCCSUS3_3[09] VSS[089] VSS_NCTF[02]
N7 J26 A28
VCCSUS3_3[10] VSS[090] VSS_NCTF[03]
W23 VCC1_5_A[25] VCCSUS3_3[11] P1 J27 VSS[091] VSS_NCTF[04] A29
P2 J4 AH1
VCCSUS3_3[12] VSS[092] VSS_NCTF[05]
F17 P3 J5 AH29
C2314 VCCLAN1_05[1] VCCSUS3_3[13] VSS[093] VSS_NCTF[06]
G18 VCCLAN1_05[2] VCCSUS3_3[14] P4 K23 VSS[094] VSS_NCTF[07] AJ1
0.1UF/16V P5 K28 AJ2
VCCSUS3_3[15] VSS[095] VSS_NCTF[08]
+1.5VS
Max: 50 mA F19 VCCLAN3_3[1] VCCSUS3_3[16] R1 K29 VSS[096] VSS_NCTF[09] AJ28
L2303 G20 R3 K3 AJ29
A
120Ohm/100Mhz VCCLAN3_3[2] VCCSUS3_3[17] VSS[097] VSS_NCTF[10] A
R5 K6 B1
+1.5VS_GANPLL_ICH VCCSUS3_3[18] VSS[098] VSS_NCTF[11]
1 2 A24 VCCGLANPLL VCCSUS3_3[19] R6 VSS_NCTF[12] B29
Max: 23 mA
C2315 C2316 A26 G22 ICH8-M
10UF/10V 1UF/10V VCCGLAN1_5[1] VCCCL1_05
A27
+1.5VS_PCIE_ICH VCCGLAN1_5[2] +3VS
B26 VCCGLAN1_5[3] VCCCL1_5 A22 Max: 64 mA
Max: 80 mA B27
VCCGLAN1_5[4]
C2317
10UF/10V
+3VS B28 VCCGLAN1_5[5] VCCCL3_3[1] F20
G21
Title : SB_ICH8M(PWR)
VCCCL3_3[2] C2336
Max: 1 mA B25 VCCGLAN3_3 ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
0.1UF/10V
ICH8-M @ Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 23 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : SB_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 24 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : SB_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 25 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : SB_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 26 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : SB_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 27 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : SB_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 28 of 95
5 4 3 2 1
5 4 3 2 1

L2902
+3VS
Main Board
120Ohm/100Mhz
+3VS_VDDPCI 1 2

C2916 C2917
0.1UF/16V 0.1UF/16V

+3VS U2901 +3VS_VDDPCI


L2901
120Ohm/100Mhz
1 2 +3VS_VDDPCIEX 21 11 +3VS_VDD48 JP2902 1 2 SHORT_PIN
VDDPCIEX1 VDD48
D 28 VDDPCIEX2
D
C2901 C2902 C2903 C2904 42 56 +3VS_VDDREF JP2903 1 2 SHORT_PIN
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V VDDPCIEX3 VDDREF
34 PWRSAVE#* PCI/PCIEX_STOP# 63 STP_PCI# 22
C2918 C2919
R2.0-05
JP2901 50 62 STP_CPU# 22 0.1UF/16V 0.1UF/16V
SHORT_PIN VDDCPU CPU_STOP#
1 2 +3VS_VDDA 45 VDDA CLK_MCH RNX2904A
CPUT_L1F 49 1 33Ohm 2 CLK_MCH_BCLK 10
R2.0-05 C2906 C2907 46
C2905 0.1UF/16V 24PF/50V GNDA CLK_MCH# RNX2904B
CPUC_L1F 48 3 33Ohm 4 CLK_MCH_BCLK# 10
10UF/10V 2 1 X1_CLK 58 X1
52 CLK_CPU 1 RNX2905A
CPUT_L0 33Ohm 2 CLK_CPU_BCLK 3
X2901
C2908 14.318Mhz 51 CLK_CPU# 3 RNX2905B
CPUC_L0 33Ohm 4 CLK_CPU_BCLK# 3
24PF/50V
X2_CLK
2 1 57 X2
44 CLK_PCIE8 1 RNX2906A Latched Input Select
CPUITPT_L2/PCIeT_L8 33Ohm 2 CLK_PCIE_LAN 33
R1.1-29 CLK_PCIE8# RNX2906B
CPUITPC_L2/PCIeC_L8 43 3 33Ohm 4 CLK_PCIE_LAN# 33
0 : Pin 17/18 = LCD_SSCG
RX2901 2 1 33Ohm CLK_PCIE0 17 41 CLK_PCIE7 1 RNX2907A 1 : Pin 17/18 = PCIe_L0
70 CLK_GFX_NOSSC 27FIX/LCD_SSCGT/PCIeT_L0 PEREQ1#/PCIeT_L7 33Ohm 2 CLK_PCIE_ESATA 66
RNX2901A 1 @ CLK_PCIE7# RNX2907B 33PCI3 R2907 2 10KOhm
11 CLK_DREFSS 33Ohm 2 PEREQ2#/PCIeC_L7
40 3 33Ohm 4 CLK_PCIE_ESATA# 66 1

RNX2901B 3 @
11 CLK_DREFSS# 33Ohm 4
39 CLK_PCIE6 1 RNX2908A
PCIeT_L6 33Ohm 2 CLK_MCH_3GPLL 11
70 CLK_GFX_SSC RX2902 2 1 33Ohm CLK_PCIE0# 18 27SS/LCD_SSCGC/PCIeC_L0 CLK_PCIE6# RNX2908B
C PCIeC_L6 38 3 33Ohm 4 CLK_MCH_3GPLL# 11 C
0 : Pin 43/44 = SRC CLK
C2909 @ 1 2 10PF/50V 36 CLK_PCIE5 1 RNX2909A 1 : Pin 43/44 = CPU_ITP CLK
PCIeT_L5 33Ohm 2 CLK_PCIE_NEWCARD 43
RX2903 2 1 33Ohm USB48 12 35 CLK_PCIE5# 3 RNX2909B 33PCIF4 R2908 2 10KOhm
22 CLK_USB48 FSLA/USB_48MHz PCIeC_L5 33Ohm 4 CLK_PCIE_NEWCARD# 43 1

R2902 2 1 2.2KOhm CPU_BSEL0


30 CLK_PCIE4 3 RNX2910B
PCIeT_L4 33Ohm 4 CLK_PCIE_ROBSON 58

31 CLK_PCIE4# 1 RNX2910A
PCIeC_L4 33Ohm 2 CLK_PCIE_ROBSON# 58
CPU_BSEL1 16 0 : Pin 14/15 = PCIe_L9
FSLB/TEST_MODE
C2910 @ 1 2 10PF/50V 24 CLK_PCIE3 3 RNX2911B Pin 17/18 = 27FIX/27SS
PCIeT_L3 33Ohm 4 CLK_PCIE_PEG 70
1 : Pin 14/15 = DOT_96MHz
RX2904 2 1 33Ohm 25 CLK_PCIE3# 1 RNX2911A
44 CLK_DEBUG PCIeC_L3 33Ohm 2 CLK_PCIE_PEG# 70 Pin 17/18 = LCD_SSCG/PCIe_L0
RX2911 2 1 33Ohm 33PCI3 5 +3VS
44 CLK_DBGPCI2 *SELPCIEX0_LCD#PCICLK3
22 CLK_PCIE2 3 RNX2912B
PCIeT_L2 33Ohm 4 CLK_PCIE_WLAN 53
R2909 1 2 10KOhm @
23 CLK_PCIE2# 1 RNX2912A 33PCIF5 R2910 2 10KOhm
PCIeC_L2 33Ohm 2 CLK_PCIE_WLAN# 53 1
C2911 @ 1 2 10PF/50V

RNX2902B 3 33PCI2 CLK_PCIE1 RNX2913B


40 CLK_CBPCI 33Ohm 4 4 PCICLK2 PCIeT_L1 19 3 33Ohm 4 CLK_PCIE_ICH 21

20 CLK_PCIE1# 1 RNX2913A
PCIeC_L1 33Ohm 2 CLK_PCIE_ICH# 21
0 : Pin 40/41 = PCIe_L7
C2912 @ 1 2 10PF/50V
26 SATACLK 3 RNX2914B 1 : Pin 40/41 = PEREQ#
SATACLKT_L 33Ohm 4 CLK_PCIE_SATA 20
RNX2902A 1 33PCI1
62 CLK_TPMPCI 33Ohm 2 3 PCICLK1
27 SATACLK# 1 RNX2914A 33PCI0 R2911 2 10KOhm
SATACLKC_L 33Ohm 2 CLK_PCIE_SATA# 20 1
B B

C2913 @ 1 2 10PF/50V 14 CLK_DOT96 3 RNX2915B @


PCIeT_L9/DOTT_96MHzL 33Ohm 4 CLK_DREF 11
RX2905 2 1 33Ohm @ 33PCI0 64 15 CLK_DOT96# 1 RNX2915A @
38 CLK_DSPPCI PCICLK0/REQ_SEL** PCIeC_L9/DOTC_96MHzL 33Ohm 2 CLK_DREF# 11

C2914 @ 1 2 10PF/50V
*PEREQ3# 32 PEREQ3# : PCIEX2/4
RNX2903B 3 33PCIF5
21 CLK_ICHPCI 33Ohm 4 9 *SELLCD_27#/PCICLK_F5 PEREQ4# : PCIEX3/5/7
PEREQ4#* 33 CLK_NEWCARD_REQ# 43,44

C2915 @ 1 2 10PF/50V 10 CLK_PWRGD 22


VttPWR_GD/PD#
RNX2903A 1 33PCIF4
30 CLK_KBCPCI 33Ohm 2 8 ITP_EN/PCICLK_F4

7,8,22,38,44 SMB_CLK_S 54 SCLK


61 REF1 RX2906 1 2 10KOhm CPU_BSEL2
REF1/FSLC/TEST_SEL REF0 RX2907 1
7,8,22,38,44 SMB_DAT_S 55 SDATA REF0 60 2 33Ohm CLK_ICH14 22
47
+3VS VREF
+VCCP
Reserved for R1.0 Debug
BCLK FSB BSEL2BSEL1BSEL0
R2903 166 667 0 1 1
1KOhm 2
1% GND1 R2912 R2914 R2916
6 GND2 200 800 0 1 0
13 1KOhm 1KOhm 1KOhm
A
CK505_VREF GND3 @ A
29
GND4
37 GND7
53 3 CPU_BSEL0 RX2908 1 2 1KOhm MCH_BSEL0 11
GND6 RX2909 1
59 GND5 3 CPU_BSEL1 2 1KOhm MCH_BSEL1 11
R2904 3 CPU_BSEL2 RX2910 1 2 1KOhm MCH_BSEL2 11
270Ohm ICS9LPR363DGLF-T
1%
R2.0-04 R2913
1KOhm
R2915
1KOhm
R2917
1KOhm
Title : CLK_ICS9LPR363
R1.1-07 @ @ Engineer: John Hung
ASUSTeK COMPUTER INC. NB1
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Tuesday, September 04, 2007 Sheet 29 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

X3001
+3VA_EC +3VACC +3VS 32.768Khz
JP3002 X1_EC 1 4 X2_EC
SHORT_PIN
1 2
C3007 C3008
C3001 C3002 C3003 C3004 R2.0-07 C3005 C3006 10PF/50V 10PF/50V
10UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/16V

D R1.1-29 R1.1-29 D

EC_AGND

+3VA +3VA_EC +3VS +3VACC


L3001
120Ohm/100Mhz
1 2
+3VA_EC 1MB SPI ROM +3VA_EC

U3001 U3002
74 NV_OVERT# 70 SCE# 1 8
RNX3001B ADC0/GPI0 SO CS# VCC
20,44,62 LPC_AD0 3 33Ohm 4 10 75 SUS_PWRGD 81,92 2 7 2 1
RNX3001A LAD0 ADC1/GPI1 DO HOLD# SCK
20,44,62 LPC_AD1 1 33Ohm 2 9 LAD1 ADC2/GPI2 76 ALL_SYSTEM_PWRGD 92 2 1 3 WP# CLK 6
3 RNX3002B SI R3003 C3009
20,44,62 LPC_AD2 33Ohm 4 8 LAD2 ADC3/GPI3 77 VRM_PWRGD 32,80,92 4 GND DIO 5
1 RNX3002A R3002 10KOhm 1UF/10V
20,44,62 LPC_AD3 33Ohm 2 7 LAD3 ADC4/GPI4 78 PWR_MON 80
29 CLK_KBCPCI 13 79 ALS_DA 56 10KOhm W25X80VSSIG
LPCCLK ADC5/GPI5
20,44,62 LPC_FRAME# 6 LFRAME# ADC6/GPI6 80
11,21,33,38,43,51,53,58,62,66,70 BUF_PLT_RST# 26 LPCRST#/WUI4/GPD2 ADC7/GPI7 81
22,40,62 INT_SERIRQ# 5
SERIRQ
22 EXT_SMI# 19 ECSMI#/GPD4 PWM0/GPA0 28 PWR_LED_UP# 56
22 EXT_SCI# 27 ECSCI#/GPD3 PWM1/GPA1 29 CHG_LED_UP# 56
20,22 A20GATE 142 GA20/GPB5 PWM2/GPA2 32
20,22 RCIN# 4 KBRST#/GPB6 PWM3/GPA3 33
C 32 EC_RST# 14 WRST# PWM4/GPA4 34 LCD_BL_PWM 45 C
PWM5/GPA5 35 FAN_PWM 50
PWM6/GPA6 36
SCE# 113 38
SCK SCE# PWM7/GPA7
117 SCK
SI 114 122
SI RXD/GPB0 CHG_EN# 88 +3VA_EC
SO 115 123 PRECHG 88
SO TXD/GPB1
RING#/PWRFAIL#/LPCRST#/GPB7 126 PM_RSMRST# 22
66 AC_IN_OC# 1 RN3001A
31 KSI0 KSI0/STB# 100KOhm2
67 64 BAT1_IN_OC# 3 RN3001B
31 KSI1 KSI1/AFD# KSO16/GPC3 PM_PWRBTN# 22 100KOhm4
68 136 BAT2_IN_OC# 5 RN3001C
31 KSI2 KSI2/INIT# TMRI0/WUI2/GPC4 AC_IN_OC# 22,90 100KOhm6
69 65 PWRLIMIT# 7 RN3001D
31 KSI3 KSI3/SLIN# KSO17/GPC5 OP_SD# 37 100KOhm8
31 KSI4 70 KSI4 TMRI1/WUI3/GPC6 140 BAT1_IN_OC# 22,90
31 KSI5 71 KSI5 PWUREQ#/GPC7 20 RFON_SW# 53,56,61,67
72 SMB0_CLK 1 RN3002A
31 KSI6 KSI6 4.7KOhm2
73 22 SMB0_DAT 3 RN3002B
31 KSI7 KSI7 RI1#/WUI0/GPD0 PWRLIMIT# 3,88 4.7KOhm4
31 KSO0 40 KSO0/PD0 RI2#/WUI1/GPD1 25 PM_SUSC# 22
31 KSO1 41 KSO1/PD1 GINT/GPD5 37 LCD_BACKOFF# 45
31 KSO2 42 53 FAN0_TACH 50
KSO2/PD2 TACH0/GPD6
31 KSO3 43 KSO3/PD3 TACH1/GPD7 54
44 +3VS
31 KSO4 KSO4/PD4
31 KSO5 45 KSO5/PD5 L80HLAT/GPE0 23 VSUS_ON 81,93
46 94 SMB1_CLK 5 RN3002C
31 KSO6 KSO6/PD6 EGAD/GPE1 SUSC_EC# 57,91 4.7KOhm6
47 95 SMB1_DAT 7 RN3002D
31 KSO7 KSO7/PD7 EGCS#/GPE2 SUSB_EC# 43,57,91,92 4.7KOhm8
31 KSO8 50 KSO8/ACK# EGCLK/GPE3 96 CPU_VRON 80
31 KSO9 51 141 PWR_SW# 56 NV_OVERT# R3004 2 1 10KOhm
KSO9/BUSY PWRSW/GPE4 BAT2_IN_OC#
31 KSO10 52 KSO10/PE WUI5/GPE5 39
57 21 TP_CLK 1 RN3003A
31 KSO11 KSO11/ERR# LPCPD#/WUI6/GPE6 LID_SW# 45,56 4.7KOhm2
58 24 TP_DAT 3 RN3003B
31 KSO12 KSO12/SLCT L80LLAT/WUI7/GPE7 INSTANT_ON# 56 4.7KOhm4
31 KSO13 59 KSO13
31 KSO14 60 KSO14 GPG0/TM 118 R1.1-08 SUSC_EC# RN3003C
B 31 KSO15 61 KSO15 GPG1/ID7 121 PM_SUSB# 22 5 4.7KOhm6 B
112 SUSB_EC# 7 RN3003D
GPG2 4.7KOhm8
X1_EC 144 116
X2_EC CK32K GPG6
2 CK32KE
CLKRUN#/GPH0/ID0 105 PM_CLKRUN# 22,40,62
31 CRX0 133 CRX0/GPC0 CRX1/GPH1/ID1 106 3G_ON# 67
T3001 1 CTX0 139 107 3G_LED_ON 56
CTX0/GPB2 CTX1/GPH2/ID2
GPH3/ID3 108 BAT_LEARN 88
97 PS2CLK0/GPF0 GPH4/ID4 109
56 COLOREN# 98 PS2DAT0/GPF1 GPH5/ID5 110 NUM_LED 56
56 MARATHON# 99 PS2CLK1/GPF2 GPH6/ID6 111 CAP_LED 56
56 DISTP# 100 PS2DAT1/GPF3
31 TP_CLK 101 PS2CLK2/GPF4 WUI8/GPK0 15 R1.1-09
31 TP_DAT 102 PS2DAT2/GPF5 WUI9/GPK1 16
WUI10/GPK2 17
60 SMB0_CLK 124 SMCLK0/GPB3 WUI11/GPK3 18
60 SMB0_DAT 125 SMDAT0/GPB4 WUI12/GPK4 48
50,70 SMB1_CLK 129 49
SMCLK1/GPC1 WUI13/GPK5
50,70 SMB1_DAT 130 SMDAT1/GPC2 WUI14/GPK6 62
3 THRO_CPU 131 63
SMCLK2/GPF6 WUI15/GPK7
56 TP_LED 132 SMDAT2/GPF7
GPL0 90
R1.1-10 22 EC_CLK_EN 84
DAC0/GPJ0 GPL1
91
11,22 PM_PWROK 85 92
DAC1/GPJ1 GPL2
86 DAC2/GPJ2 GPL3 93
87 119
DAC3/GPJ3 GPL4
88 120
DAC4/GPJ4 GPL5
89 DAC5/GPJ5 GPL6 134
135
GPL7
IT8752TE-L
A A

R2.0-06

JP3001
1 2

SHORT_PIN
Title : KBC_IT8752
EC_AGND ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 30 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

Keyboard
EMI
J3101
1 2 CN3101A
100PF/50V
@ KSO7
24 24 KSO7 30
3 4 CN3101B @ KSO0 23 KSO0 30
100PF/50V 23
D 5 6 CN3101C
100PF/50V
@ KSI1
22 22 KSI1 30 D
7 8 CN3101D @ KSI7 21 KSI7 30
100PF/50V 21
1 2 CN3102A @ KSO9 20
100PF/50V 20 KSO9 30
3 4 CN3102B
100PF/50V
@ KSI6 26 19 KSI6 30
KSI5 SIDE2 19
5 6 CN3102C
100PF/50V
@
18 18 KSI5 30
7 8 CN3102D @ KSO3 17 KSO3 30
100PF/50V 17
1 2 CN3103A
100PF/50V
@ KSI4
16 16 KSI4 30
3 4 CN3103B @ KSI2 15 KSI2 30
100PF/50V 15
5 6 CN3103C @ KSO1 14
100PF/50V 14 KSO1 30
7 8 CN3103D
100PF/50V
@ KSI3 13 KSI3 30
KSI0 13
1 2 CN3104A
100PF/50V
@
12 12 KSI0 30
3 4 CN3104B
100PF/50V
@ KSO13 11 KSO13 30
KSO5 11
5 6 CN3104C
100PF/50V
@ 10 KSO5 30
KSO2 10
7 8 CN3104D
100PF/50V
@
9 9 KSO2 30
1 2 CN3105A
100PF/50V
@ KSO4
8 8 KSO4 30
3 4 CN3105B @ KSO8 7 KSO8 30
100PF/50V 7
5 6 CN3105C
100PF/50V
@ KSO6
6 6 KSO6 30
7 8 CN3105D @ KSO11 5 KSO11 30
100PF/50V 5
1 2 CN3106A
100PF/50V
@ KSO10 25 4 KSO10 30
KSO12 SIDE1 4
3 4 CN3106B
100PF/50V
@
3 3 KSO12 30
5 6 CN3106C
100PF/50V
@ KSO14
2 2 KSO14 30
7 8 CN3106D @ KSO15 1 KSO15 30
100PF/50V 1
ZIF_CON_24P

C Touchpad C

J3102
63 RIGHT 12 12 SIDE1 13
11 11
10 10
63 LEFT 9 9
8 8
7 7
30 TP_CLK 6 6
5 5
30 TP_DAT 4 4
3 3
+5VS 2 2
1 1 SIDE2 14
C3101
0.1UF/16V FPC_CON_12P
Bottom Contact

B B
CIR

+5VSUS

R3101
100Ohm U3101
1 GND1
2 GND2
+5VSUS_CIR 3 VS
30 CRX0 4 OUT
C3102 TSOP6236TR
0.1UF/16V
R1.1-11

A A

Title : KBC_KB, TP & CIR


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
R1.1-12 Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 31 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

+3VA_EC
C C
Force-OFF Switch IT8752 has built-in level detection for
R3204 power-on reset circuit
100KOhm

SW3201
1 2 2 1 +3VA_EC
1 2
3 4 R3202
3 4 33Ohm
TP_SWITCH_4P D3202
1SS355
R3205
0Ohm
1 2 EC_RST# 30
+3VS

U3201 @ +3VA_EC
5 CD OUT 1
R3203 2
100KOhm 3 VDD
D 4 NC GND 3
D3201 Q3202 C3201 C3202
1SS355 2N7002 4.7UF/10V RN5VD30CA 0.1UF/10V
30,80,92 VRM_PWRGD 2 1 11 @
G
3 2 S
C Q3201
2 1 1 B PMBS3904
3,11 PM_THRMTRIP#
R3201 E
B 330Ohm 2 B

A A

Title : RST_Reset Circuit


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 32 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

R1.1-13 CLK_PCIE_LAN# 29
X3301 CLK_PCIE_LAN 29
25Mhz
D X1_LAN 1 2 X2_LAN D
PCIE_RXP_LAN 21

PCIE_RXN_LAN 21
C3301 C3302
27PF/50V 27PF/50V PCIE_TXN_LAN CX3301 2 1 0.1UF/10V PCIE_RXN1_SB 21
+3VSUS
PCIE_TXP_LAN CX3302 2 1 0.1UF/10V PCIE_RXP1_SB 21
+LAN_VDD12

U3301

+3VS
1 VDDO_TTL1 VDD7 48
2 47 +3VSUS
1.2V_CTL VDD1 VMAIN_AVLBL
3 CTRL12 TESTMODE 46
1.8V_CTL 4 45
CTRL18 VDDO_TTL3 LAN_EEDATA RN3301A
11,21,30,38,43,51,53,58,62,66,70 BUF_PLT_RST# 5 PERSTN/TSTPT VDD6 44 1 10KOhm 2
6 43 LAN_EECLK 3 RN3301B
22,44,53 PCIE_WAKE# WAKEN RESERVED4 10KOhm 4
7 42 LOM_DISABLE# 5 RN3301C
VDD2 CLKREQN 10KOhm 6
8 41 LAN_EEDATA 7 RN3301D
AVDDH(3.3V) VPD_DATA 10KOhm 8
9 SWITCH_VAUX VDDO_TTL2 40
LOM_DISABLE# 10 39
LOM_DISABLEN VDD5 LAN_EECLK
11 SWITCH_VCC VPD_CLK 38
C
12 VAUX_AVLBL SPI_CLK 37 C
13 VDD3 SPI_CS 36
X2_LAN 14 35
X1_LAN XTALO SPI_DI
15 XTALI SPI_DO 34
16 RSET VDD4 33

R3301
4.99KOhm
1% 88E8055_B0_NNC1P123

+3VSUS
R1.1-14 +LAN_VDD18 C3321
0.1UF/10V
1 2
MDIN3 34
MDIP3 34
MDIN2 34 U3302
MDIP2 34 LAN_EEDATA 5 4
LAN_EECLK SDA GND
MDIN1 34 6 SCL A2 3
MDIP1 34 7 WP A1 2
MDIN0 34 8 VCC A0 1
MDIP0 34
AT24C08AN

1.8V_CTL
B B

R3302
4.7KOhm
+3VSUS L3301 Q3301 +LAN_VDD18
Max: 80 mA Max: 150 mA
120Ohm/100Mhz 2SB1132
1 2 +LAN_VDD33

C3303 C3304 C3305 C3306 C3307 C3308 C3309


0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V

1.2V_CTL

R3303
4.7KOhm
Q3302 Max: 290 mA
2SB1132
+LAN_VDD12

C3313 C3314 C3315 C3316 C3317 C3318 C3319 C3320


10UF/10V 10UF/6.3V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V

A A

Title : LAN_88E8055
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 33 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

+LAN_VDD18

U3401
1 24 L_CMT0 1 RN3401A
75OHM 2
D 33 MDIP0 2 23 LTRLP0 D

1000PF/50V 2 1 C3401 49.9Ohm 2 1 R3401 MDIP0 33 MDIN0 3 22 LTRLM0


1%
0.1UF/10V 2 1 C3402 49.9Ohm 2 1 R3402 MDIN0 4 21 L_CMT1 3 RN3401B
75OHM 4
1% 33 MDIP1 5 20 LTRLP1

1000PF/50V 2 1 C3403 49.9Ohm 2 1 R3403 MDIP1


1%
0.1UF/10V 2 1 C3404 49.9Ohm 2 1 R3404 MDIN1 33 MDIN1 6 19 LTRLM1
1%
7 18 L_CMT2 5 RN3401C
75OHM 6
33 MDIP2 8 17 LTRLP2
1000PF/50V 2 1 C3405 49.9Ohm 2 1 R3405 MDIP2
1%
0.1UF/10V 2 1 C3406 49.9Ohm 2 1 R3406 MDIN2
1% 33 MDIN2 9 16 LTRLM2

1000PF/50V 2 1 C3407 49.9Ohm 2 1 R3407 MDIP3 10 15 L_CMT3 7 RN3401D


75OHM 8
1% 33 MDIP3 11 14 LTRLP3
0.1UF/10V 2 1 C3408 49.9Ohm 2 1 R3408 MDIN3
1%

33 MDIN3 12 13 LTRLM3

IH-008

C3409 C3410 C3411 C3412


C C
1000PF/50V 0.1UF/10V 1500PF/50V 1000PF/3KV
@

B B

J3402
LTRLP0 1
LTRLM0 1
2 2
LTRLP1 3
LTRLP2 3
4 4 P_GND2 15
LTRLM2 5 14
LTRLM1 5 P_GND1
6 6
J3401 LTRLP3 7 13
LTRLM3 7 NP_NC3
SIDE2 4 8 8 NP_NC2 12
2 MODEM_RING_CON R3409 1 2 0Ohm MODEM_RING 9 11
2 MODEM_TIP_CON R3410 MODEM_TIP 9 NP_NC1
1 1 1 2 0Ohm 10 10
SIDE1 3
MODULAR_JACK_10P
WTOB_CON_2P C3413 C3414
1000PF/3KV 1000PF/3KV
R1.1-27
R1.1-28
R2.0-08

A A

Title : LAN_RJ45 & RJ11


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 34 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

+3V

C3501
0.1UF/16V
@
J3501

1 1 2 2
20 ACZ_SDOUT_MDC 3 3 4 4
5 5 6 6
20 ACZ_SYNC_MDC 7 7 8 8
20 ACZ_SDIN1 9 9 10 10
20 ACZ_RST#_MDC 11 12 ACZ_BCLK_MDC 20
11 12

BTOB_CON_12P

C C

H3501 H3502
L4E-1A L4E-1A

B B

A A

Title : LAN_MDC
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 35 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

FRONT_R CX3610 1 2 0.1UF/10V AC_SPK_R 37,38


D PM: ALC888S FRONT_L CX3611 1 2 0.1UF/10V AC_SPK_L 37,38 D

GM: ALC660-VD R3602 2 1 39.2KOhm 1% HP1_JD 65


R3617 2 1 10KOhm 1% SPDIF_JD 65 R1.1-17
R3618 2 1 20KOhm 1% HDMI_JD 48

R3619 2 1 0Ohm DEPOP# 37 R1.1-14


+5VS_AUDIO MIC2_REF 38
R3603 2 1 2.2KOhm EXT_MIC

C3606 C3607
C3601 C3602 0.1UF/16V 1UF/10V
0.1UF/16V 0.1UF/16V

U3601

GND_AUDIO
GND_AUDIO

LINE1_R(Port_C_R) 24
37 PIN37_VREFO LINE1_L(Port_C_L) 23
38 22 MIC1_R CX3603 2 1 1UF/10V EXT_MIC 65
AVDD2 MIC1_R(Port_B_R) MIC1_L CX3604 2
37 AC_HP2_L 39 SURR_L(Port_A_L) MIC1_L(Port_B_L) 21 1 1UF/10V
40 20 CD_R CX3605 2 1 1UF/10V @ 3G_SPK_P 67
C JDREF CD_R CD_GND CX3606 2 C
37 AC_HP2_R 41 SURR_R(Port_A_R) CD_GND 19 1 1UF/10V @ 3G_SPK_N 67 R1.1-16
42 18 CD_L CX3607 2 1 1UF/10V @
CX3601 2 CEN AVSS2 CD_L MIC2_R
R1.1-16 67 3G_MIC_P 1 1UF/10V @ 43 CENTER(Port_G_L) MIC2_R(Port_F_R) 17 CX3608 2 1 1UF/10V
CX3602 2 1 1UF/10V @ LFE 44 16 MIC2_L CX3609 2 1 1UF/10V INT_MIC 38
LFE(Port_G_R) MIC2_L(Port_F_L)
45 SIDE_L(Port_H_L) LINE2_R(Port_E_R) 15 AC_HP1_R 37
R1.1-18 37 EAPD 46 SIDE_R(port_H_R) LINE2_L(Port_E_L) 14 AC_HP1_L 37
47 13 R3605 2 1 20KOhm 1% EXT_MIC_JD 65
SPDIFI/EAPD Sense_A R3606
65 SPDIF1_OUT 48 SPDIFO 2 1 39.2KOhm 1% HP2_JD 65
R3604 2 1 5.1KOhm 1% @ 3G_MIC_JD 67 R1.1-16
R3601
20KOhm
1%

ALC888S_GR
+3VS GND_AUDIO
R1.1-15 C3608 R3607
1UF/10V 10KOhm
C3603 C3604 C3605 PCBEEP 2 1 PCSPK_AC 2 1 SB_SPKR 22
1UF/10V 0.1UF/16V 0.1UF/16V ACZ_RST#_AUD 20,37
@ ACZ_SYNC_AUD 20
ACZ_SDIN_AUD RX3601 1 2 33Ohm ACZ_SDIN0 20 C3609 R3608
ACZ_BCLK_AUD 20 100PF/50V 1KOhm
ACZ_SDOUT_AUD 20

R3620 2 1 0Ohm SPDIF2_OUT 70 R1.1-18


R3621 2 1 0Ohm @ DEPOP#
B B

R3611 1 2 0Ohm @
+5VS +5VS_AUDIO R3613 1 2 0Ohm @
U3602 R3623 1 2 0Ohm @
MAX8863 Vout = 1.25*[1+(100K/34K)]= 4.93V R3625 1 2 0Ohm @
1 SHDN# OUT 4
2 GND
3 5 1 2 JP3601 1 2 SHORT_PIN
IN SET C3611 1000PF/50V
1 2 JP3602 1 2 SHORT_PIN
MAX8863TEUK R3609 100KOhm
JP3603 1 2 SHORT_PIN
C3610 R3610 C3612 C3613 C3614
10UF/16V 34KOhm 1UF/16V 1UF/16V 0.1UF/16V JP3604 1 2 SHORT_PIN
1% @ @
JP3605 1 2 SHORT_PIN

JP3606 1 2 SHORT_PIN

JP3607 1 2 SHORT_PIN
GND_AUDIO
A A
GND_AUDIO

R1.1-28
R2.0-09

Title : AUD_ALC888S
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 36 of 95
5 4 3 2 1
5 4 3 2 1

Main Board
+5VS +5VS_AMP
L3701 +5VS_AMP
80Ohm/100Mhz
1 2

C3701 C3702 C3703 R3701


1UF/16V 0.1UF/16V 0.1UF/16V 10KOhm U3701

1
GND5 21
20
Internal Speaker Conn.
GND1 GND4 DE-POP#
D 2 GAIN0 SHUTDOWN# 19 D
GND_AUDIO GND_AUDIO GND_AUDIO 3 18 INTSPKR+
INTSPKL+ GAIN1 ROUT+ AMP_RIN J3701
4 LOUT+ RIN- 17
AMP_LIN 5 16 INTSPKR+ 4 6
LIN- VDD INTSPKR- 4 SIDE2
6 PVDD1 PVDD2 15 3 3
7 14 INTSPKR- INTSPKL+ 2
INTSPKL- RIN+ ROUT- INTSPKL- 2
8 LOUT- GND3 13 1 1 SIDE1 5
9 LIN+ NC 12
10 11 WTOB_CON_4P
BYPASS GND2
C3706 C3704 C3705 TPA6017A2PWP
0.33UF/16V 1UF/16V 1UF/16V

Reserved for 3G
R2.0-10 GND_AUDIO GND_AUDIO
INTSPKL- INTSPKL+ INTSPKR- INTSPKR+

C3708 C3709 C3710 C3711


10PF/50V 10PF/50V 10PF/50V 10PF/50V
@ @ @ @

Reserved for EMI


INTSPKL- INTSPKL+ INTSPKR- INTSPKR+

C R1.1-32 C

36,38 AC_SPK_L RX3701 1 2 3.24KOhm AMP_L CX3701 1 2 1UF/10V AMP_LIN D4509 D4508 D4510 D4511
1% 0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF
R3708 1 2 10KOhm @ @ @ @

GND_AUDIO

R1.1-32
36,38 AC_SPK_R RX3702 1 2 3KOhm AMP_R CX3702 1 2 1UF/10V AMP_RIN
1%
R3709 1 2 10KOhm

GND_AUDIO

Q3702B Q3702A CE3701


UM6K1N UM6K1N 47UF/6.3V
3 4 1 6 HP1_R 1 2 HP1_R_C 7 RN3701D
36 AC_HP1_R 75OHM 8 HP1_R_CON 65

B +3VS +12VS B

3 4 1 6 HP1_L 1 2 HP1_L_C 5 RN3701C


36 AC_HP1_L 75OHM 6 HP1_L_CON 65
UM6K1N UM6K1N 47UF/6.3V
R3702 Q3701 R3703 Q3704B Q3704A CE3702
D3701 10KOhm 2N7002 1MOhm
BAT54AW
30 OP_SD# 1
3 DE-POP# 2 3 MUTE_POP#
R1.1-18 36 EAPD 2
C3707
20,36 ACZ_RST#_AUD 1 1UF/25V
3
2 Q3703B Q3703A CE3703
36 DEPOP#
UM6K1N UM6K1N 47UF/6.3V
DEPOP# now D3702 3 4 1 6 HP2_R 1 2 HP2_R_C 1 RN3701A
36 AC_HP2_R 75OHM 2 HP2_R_CON 65
BAT54AW
no function, R1.1-34
just reserved.

3 4 1 6 HP2_L 1 2 HP2_L_C 3 RN3701B


36 AC_HP2_L 75OHM 4 HP2_L_CON 65
UM6K1N UM6K1N 47UF/6.3V
Q3705B Q3705A CE3704

R1.1-18 R2.0-11
A A

Title : AUD_Amp & Jack


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Wednesday, September 05, 2007 Sheet 37 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

MIC2_REF 36

R3803
330Ohm

C3809
R3804 1UF/10V
2.2KOhm @
@

CX3804 2 1 0.1UF/10V GND_AUDIO UNI_MIC_P 45


@
C3807
0.01UF/16V
@
CX3805 2 1 0.1UF/10V UNI_MIC_N 45
@

R3805 R3806
2.2KOhm 2.2KOhm
@
INT_MIC RX3804 1 2 0Ohm
C C

CX3806 2 1 0.1UF/10V GND_AUDIO OMNI_MIC_P 45


@
C3808
+1.8VS L3801 @ GND_AUDIO 0.01UF/16V
120Ohm/100Mhz @
1 2 +1.8VS_FM2010 U3801 CX3807 2 1 0.1UF/10V OMNI_MIC_N 45
@
36,37 AC_SPK_R CX3801 2 1 0.1UF/10V RX3801 2 1 10KOhm 1%
@ @ R3807
GND_AUDIO C3801 2 1 0.1UF/16V 1 36 2.2KOhm
@ NC6 NC11
2 VREF MIC1_N 35
CX3802 2 1 0.1UF/10V RX3802 2 1 10KOhm 1% CX3803 2 1 0.1UF/10V 3 34 TEST
36,37 AC_SPK_L LINE_IN_P TEST
@ @ @ 4 33
C3802 NC7 NC12
2 1 0.1UF/16V 5 LINE_IN_N NC13 32
R3801 C3803 @ 6 31 PWD# GND_AUDIO
1KOhm 0.01UF/16V LINE_OUT PWD#
7 NC8 NC14 30
@ 1% @ C3804 2 1 0.1UF/16V 8 29
@ VCOM NC15
9 VDD_CODEC NC16 28
36 INT_MIC 10 NC9 SCK 27 SMB_CLK_S 7,8,22,29,44
11 XTAL_IN(CLK_IN) NC17 26
12 NC10 NC18 25
GND_AUDIO RX3803 @ +1.8VS
1KOhm
29 CLK_DSPPCI 1 2 CLK_DSP PWD# R3808 1 2 10KOhm
@
SHI_S R3810 1 2 10KOhm
R3802 C3805 FM2010-NE @
1KOhm 1UF/10V @ TEST R3809 1 2 100KOhm
@ @ @
B +1.8VS B
SMB_DAT_S 7,8,22,29,44
BUF_PLT_RST# 11,21,30,33,43,51,53,58,62,66,70
GND_AUDIO SHI_S

C3806
0.1UF/16V
@

A A

Title : AUD_FM2010
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Tuesday, September 04, 2007 Sheet 38 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : AUD_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 39 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

+3VS

D C4001 C4002 C4003 C4004 D


10UF/10V 0.01UF/16V 0.01UF/16V 0.01UF/16V
@

U4001B +3VS
+3VS
10 VCC_PCI3V_1 VCC_3V 67
20 VCC_PCI3V_2
27 C4010 C4011
C4005 C4006 VCC_PCI3V_3 0.01UF/16V 10UF/10V
32 VCC_PCI3V_4
10UF/10V 0.1UF/16V 41
@ VCC_PCI3V_5
128 VCC_PCI3V_6
61 VCC_RIN
16 VCC_ROUT1
34 VCC_ROUT2
C4007 C4008 64
1UF/10V 0.01UF/16V VCC_ROUT3
114 VCC_ROUT4
120 VCC_ROUT5

VCC_MD 86

GND1 4
21 PCI_AD[31:0] GND2 13
PCI_AD31 125 22
PCI_AD30 AD31 GND3
126 AD30 GND4 28
PCI_AD29 127 54
C
PCI_AD28 AD29 GND5 C
1 AD28 GND6 62
PCI_AD27 2 63
PCI_AD26 AD27 GND7
3 AD26 GND8 68
PCI_AD25 5 118 +3VS
PCI_AD24 AD25 GND9
6 AD24 GND10 122
PCI_AD23 9
PCI_AD22 AD23 XD_EN RN4001A
11 AD22 1 10KOhm 2
PCI_AD21 12 99 1394_SCL 3 RN4001B
AD21 AGND1 10KOhm 4
PCI_AD20 14 102 1394_SDA 5 RN4001C
AD20 AGND3 10KOhm 6
PCI_AD19 15 103 MS_EN 7 RN4001D
AD19 AGND2 +3VS 10KOhm 8
PCI_AD18 17 107
PCI_AD17 AD18 AGND4
18 AD17 AGND5 111
PCI_AD16 19
PCI_AD15 AD16
36 AD15
PCI_AD14 37 R4003
PCI_AD13 AD14 10KOhm
38 AD13
PCI_AD12 39 D4001 @
PCI_AD11 AD12 1SS355
40
PCI_AD10 AD11 CB_HWSPND# +3VS
42 AD10 HWSPND# 69 1 2 CB_SD# 22
PCI_AD9 43
PCI_AD8 AD9
44 AD8
PCI_AD7 46
PCI_AD6 AD7 MS_EN R4005
47 AD6 MSEN 58
PCI_AD5 48 100KOhm +3VS C4012 @
PCI_AD4 AD5 XD_EN 0.01UF/16V
49 AD4 XDEN 55
PCI_AD3 50 R4006 @ 1 2
PCI_AD2 AD3 100KOhm
51 AD2
PCI_AD1 52 57 1 2
PCI_AD0 AD1 UDIO5
53 AD0 8 VCC A0 1
21 PCI_PAR 33 PAR 7 WP A1 2
B 21 PCI_C/BE#3 7 65 1394_SCL 6 3 B
C/BE3# UDIO3 1394_SDA SCL A2
21 PCI_C/BE#2 21 C/BE2# UDIO4 59 5 SDA GND 4
21 PCI_C/BE#1 35 C/BE1#
21 PCI_C/BE#0 45 56 U4002 @
PCI_AD17 R4001 IDSEL_CB IDSEL_CB C/BE0# UDIO2
1 2 100Ohm 8 IDSEL
AT24C02N
UDIO1 60
21,22 PCI_REQ#0 124 REQ#
+3VS 21 PCI_GNT#0 123 GNT# UDIO0/SRIRQ# 72 INT_SERIRQ# 22,30,62 SSID/SVID & GUID:
21,22 PCI_FRAME# 23
21,22 PCI_IRDY# 24
FRAME# 1. From BIOS: Monut R4005, unmount U4002/C4012/R4006.
IRDY#
21,22 PCI_TRDY# 25 TRDY# 2. From EEPROM: Mount U4002/C4012/R4006, unmount R4005.
21,22 PCI_DEVSEL# 26 DEVSEL#
R4002 21,22 PCI_STOP# 29 115 PCI_INTA# 21,22
100KOhm STOP# INTA#
21,22 PCI_PERR# 30 PERR#
21,22 PCI_SERR# 31 SERR# INTB# 116 PCI_INTB# 21,22
CB_GBRST# 71 GBRST#
21 PCI_RST# 119
C4009 PCIRST#
1UF/10V 29 CLK_CBPCI 121
PCICLK
70 PME# TEST 66

22,30,62 PM_CLKRUN# 117


CLKRUN# R4004
+3VS --> CB_GBRST# 100KOhm
1ms < T < 100ms
R5C833_TQFP128

A A

Title : CB_R5C833
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 40 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D
+3VS

U4001A L4101
120Ohm/100Mhz
+3VS_PHY 1 2

98 C4104 C4105 C4106


AVCC_PHY3V_1 0.01UF/16V 0.1UF/16V 1UF/10V
AVCC_PHY3V_2 106
AVCC_PHY3V_3 110
AVCC_PHY3V_4 112

TPBIAS0 113

C4101
24PF/50V 5 RN4101C C4107 2 0.01UF/16V
56OHM 6 1
2 1 X1_1394 94 XI RN4101D C4108
7 56OHM 8 1 2 0.33UF/16V
X4101
24.576Mhz J4101
104 TPB0- 1 5
TPBN0 1 P_GND1
2 2
2 1 X2_1394 95 105 TPB0+ 3 6
XO TPBP0 3 P_GND2
4
24PF/50V 4
C4102 IEEE_1394_4P
R1.1-29 TPA0-
TPAN0 108
C C
96 109 TPA0+
FIL0 TPAP0

1 RN4101A R4102 1 2 5.1KOhm 1%


56OHM 2
2 1 1394_REXT 101 R2.0-12
R4101 10KOhm 1% REXT RN4101B C4109 270PF/50V
3 56OHM 4 1 2

2 1 1394_VREF 100
C4103 0.01UF/16V VREF

MDIO17 87 XD_DAT7 42 Media IF SD MMC MS xD


MDIO16
92 XD_DAT6 42 MDIO00 SDCD# MMCCD# - XDCD0#
MDIO15 89 XD_DAT5 42 MDIO01 - - MSCD# XDCD1#
MDIO14 91 XD_DAT4 42 MDIO02 - - - XDCE#
MDIO13 90 SD/MS/XD_DAT3 42 MDIO03 SDWP# - - XDR/B#
MDIO12 93 SD/MS/XD_DAT2 42 MDIO04 SDPWR0 MMCPWR MSPWR XDPWR
MDIO11 81 SD/MS/XD_DAT1 42 MDIO05 SDPWR1 - - XDWP#
MDIO10 82 SD/MMC/MS/XD_DAT0 42 MDIO06 SDLED# MMCLED# MSLED# XDLED#
B B
MDIO07 MTEST - - -
MDIO05 75 SDPWR1/XD_WP# 42
MDIO08 SDCCMD MMCCMD MSBS XDWE#
MDIO08 88 SD/MMCCMD_MSBS_XDWE# 42
MDIO09 SDCCLK MMCCLK MSCCLK XDRE#
MDIO19 83 XD_ALE 42
MDIO10 SDCDAT0 MMCDAT0 MSCDAT0 XDCDAT0
MDIO18 85 XD_CLE 42
MDIO11 SDCDAT1 MMCDAT1 MSCDAT1 XDCDAT1
MDIO02 78 XD_CE# 42
MDIO12 SDCDAT2 MMCDAT2 MSCDAT2 XDCDAT2
MDIO03 77 SDWP#/XDRB# 42 MDIO13 SDCDAT3 MMCDAT3 MSCDAT3 XDCDAT3
MDIO00 80 SD/MMCCD#_XDCD0# 42 MDIO14 - MMCDAT4 - XDCDAT4
MDIO15 - MMCDAT5 - XDCDAT5
MDIO01 79 MSCD#/XDCD1# 42
MDIO16 - MMCDAT6 - XDCDAT6
MDIO09 84 SD/MMC/MSCLK_XDRE# 42 MDIO17 - MMCDAT7 - XDCDAT7
MDIO18 - - - XDCLE
MDIO04 76 SD/MS/MMCXDPWR0 42
MDIO19 - - - XDALE
74
MDIO06
97
RSV
MDIO07 73
A A

R5C833_TQFP128

Title : CB_R5C833
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 41 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

+3VS Solve MS Duo Adaptor short problem


Q4203A
UM6K1N
SD/MS/XD_DAT1 6 1 SD/XD_DAT1
R4201
10KOhm 2
S
Q4201 Q4203B
SI2301BDS_T1_E3 UM6K1N
11 SD/MS/XD_DAT2 3 4 SD/XD_DAT2
G +MC_VCC
3 D

Q4202A R4203 1 2 10KOhm


+12V
UM6K1N C4201 R4202
41 SD/MS/MMCXDPWR0 2 1UF/10V 150KOhm
Q4202B
UM6K1N
SD/MMCCD#_xDCD0# 5

C C

+MC_VCC +MC_VCC
D4201
BAT54C
J4201 1 MSCD#/XDCD1# 41
1 23 XD_CD# 3
SD/MMCCMD_MSBS_XDWE# MS_GND1 XD_CD
2 MS_BS XD_GND1 24 2 SD/MMCCD#_XDCD0# 41
B SD/MS/XD_DAT1 3 25 SDWP#/XDRB# 41 B
SD/MMC/MS/XD_DAT0 MS_DATA1 XD_R/B
4 MS_DATA0 XD_RE 26 SD/MMC/MSCLK_XDRE# 41
SD/MS/XD_DAT2 5 27
MS_DATA2 XD_CE XD_CE# 41
MSCD#/XDCD1# 6 28 XD_CLE 41
SD/MS/XD_DAT3 MS_INS XD_CLE
7 MS_DATA3 XD_ALE 29 XD_ALE 41
SD/MMC/MSCLK_XDRE# 8 30 SD/MMCCMD_MSBS_XDWE# 41
MS_SCLK XD_WE
9 MS_VCC XD_WP 31 SDPWR1/XD_WP# 41
10 MS_GND2 XD_GND2 32
SD/XD_DAT2 11 33 SD/MMC/MS/XD_DAT0 41
SD/MS/XD_DAT3 SD_DAT2 XD_D0
12 SD_DAT3 XD_D1 34 SD/MS/XD_DAT1 41
SD/MMCCMD_MSBS_XDWE# 13 35 SD/MS/XD_DAT2 41
SD_CMD XD_D2
14 SD_GND1 XD_D3 36 SD/MS/XD_DAT3 41
15 SD_VCC XD_D4 37 XD_DAT4 41
SD/MMC/MSCLK_XDRE# 16 38
SD_CLK XD_D5 XD_DAT5 41
17 SD_GND2 XD_D6 39 XD_DAT6 41
18 NC1 XD_D7 40 XD_DAT7 41
SD/MMC/MS/XD_DAT0 19 41
SD/XD_DAT1 SD_DAT0 XD_VCC
20 42
SD/MMCCD#_XDCD0# SD_DAT1 NC2 SDWP#/XDRB#
21 SD_CD_SW SD_WP_SW 43
22 44
SD_CD_COM SD_WP_COM
C4202 C4203 45 46 C4204
0.1UF/16V 0.1UF/16V NP_NC1 NP_NC2 0.1UF/16V
47 48
GND1 GND2
49 50
NP_NC3 NP_NC4
CARD_READER_44P

A A

Title : CB_4in1 CardReader


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 42 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

21 USB_PP4

21 USB_PN4
D
D4301
NewCard Header D

R2.0-13 1 6 J4301
1 GND1
R1.1-04 USB_PN4 2 29
USB_PP4 USB_D- GND5
R2.0-13 CP_USB#
3 USB_D+ NP_NC1 27
4 CPUSB#
2 5 44 LPC_FRAME#_DBCARD 5 RESERVED1
6 RESERVED2
44 SMB_CLK_R 7 SMBCLK
44 SMB_DAT_R 8 SMBDATA
+1.5VS_NW 9 +1.5V_1
3 4 10 +1.5V_2
44 WAKE#_R 11 WAKE#
+3V_NW 12 +3.3VAUX
IP4220CZ6 PE_RST# 13 PERST#
+3VS_NW 14 +3.3V_1
R1.1-04 15 +3.3V_2
44 CLKREQ#_R 16 CLKREQ#
44 CP_PE#_R 17 CPPE#
29 CLK_PCIE_NEWCARD# 18 REFCLK-
29 CLK_PCIE_NEWCARD 19 REFCLK+
20 GND2
21 PCIE_RXN3_SB 21 PERn0
21 PCIE_RXP3_SB 22
U4301 PERp0
23 GND3
30,57,91,92 SUSB_EC# 1 STBY# OC# 19 NEWCARD_OC# 21,22 21 PCIE_RXN_NEWCARD 24 PETn0 NP_NC2 28
20 SHDN# 1.5VOUT_1 11 +1.5VS_NW 21 PCIE_RXP_NEWCARD 25 PETp0 GND6 30
44 PE_RST# R4301 2 1 1KOhm 8 13 26
PERST# 1.5VOUT_2 GND4
C C
EXPRESS_CARD_26P
+3VS 2 3.3VIN_1 AUXOUT 15 +3V_NW
4 3.3VIN_2

+1.5VS 14 1.5VIN_1 3.3VOUT_1 3 +3VS_NW


12 1.5VIN_2 3.3VOUT_2 5

+3V 17 AUXIN CPPE# 10 CP_PE# 44


9 CP_USB#
CPUSB# NWCLK_EN
11,21,30,33,38,51,53,58,62,66,70 BUF_PLT_RST# 6 SYSRST# RCLKEN 18
7 GND1
21 GND2 NC 16

R5538D001

CLK_NEWCARD_REQ# 29,44

3
D
Q4301
2N7002
NWCLK_EN 11 @
G
NewCard Ejecter
2 S
J4302 @
P_GND1 1
P_GND2 2

CARD_EJECTOR_2P

B B

3.0V~3.6V
+3VS +3VS_NW Ave= 1000mA
Max= 1300 mA

C4301 C4302 C4303 C4304


10UF/10V 0.1UF/16V 10UF/10V 0.1UF/16V

1.35V~1.65V
+1.5VS +1.5VS_NW Ave= 500 mA
Max= 650 mA

C4305 C4306 C4307 C4308


10UF/10V 0.1UF/16V 10UF/10V 0.1UF/16V

3.0V~3.6V
+3V +3V_NW Ave= 200mA
A
Max= 275 mA A

C4309 C4310
1UF/10V 0.1UF/16V

Title : CB_NewCard
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 43 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

LPC Debug Port


D D

+3VS
J4401
1 1 SIDE2 14
20,30,62 LPC_AD0 2 2
3 3
20,30,62 LPC_AD1 4 4
5 5
20,30,62 LPC_AD2 6 6
7 7
20,30,62 LPC_AD3 8 8
9 9
20,30,62 LPC_FRAME# 10 10
11 11
29 CLK_DEBUG 12 12 SIDE1 13

FPC_CON_12P
Bottom Contact

C C

For NewCard Debug Card

U4401
29 CLK_DBGPCI2 3 A0 C0 2 CP_PE#_R 43
20,30,62 LPC_AD0 7 6 CLKREQ#_R 43 CP_PE# @ 0Ohm 2 1 R4405 CP_PE#_R
A1 C1 CLK_NEWCARD_REQ# @ CLKREQ#_R
20,30,62 LPC_AD1 11 A2 C2 10 WAKE#_R 43 3 0Ohm 4 RN4401B
20,30,62 LPC_AD2 17 16 SMB_CLK_R 43 PCIE_WAKE# @ 1 2 RN4401A WAKE#_R
A3 C3 0Ohm
20,30,62 LPC_AD3 21 20 SMB_DAT_R 43 SMB_DAT_S @ 3 4 RN4402B SMB_DAT_R
A4 C4 0Ohm
SMB_CLK_S @ 1 2 RN4402A SMB_CLK_R
0Ohm
43 CP_PE# 4 B0 D0 5
29,43 CLK_NEWCARD_REQ# 8 B1 D1 9 R2.0-14
22,33,53 PCIE_WAKE# 14 B2 D2 15
7,8,22,29,38 SMB_CLK_S 18 B3 D3 19
7,8,22,29,38 SMB_DAT_S 22 B4 D4 23
+5V

1 BE# VCC 24
PE_DEBUGEN# 13 12
BX GND C4401
B SN74CBT3383PWR 0.1UF/16V B

+3VS

R4404
100KOhm
+3VS
U4402
PE_DEBUGEN# 1 5
OE# VCC
20,30,62 LPC_FRAME# 2 A
C4402 D4401 R4402 3 3 4 LPC_FRAME#_DBCARD 43
2200PF/50V 1SS355 47KOhm C Q4401 GND Y
1 2 1 2 1 2 1 B PMBS3904 74LVC1G125GV
43 PE_RST#
E
R4401 C4403 R4403 2
10KOhm 0.1UF/16V 47KOhm
@
A A

Title : BUG_LPC Debug


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 44 of 95
5 4 3 2 1
5 4 3 2 1

Main Board
+3V +12VS

+3VS

RN4501B RN4501C +3VS


100KOhm 100KOhm

+3VSLCD +3VS_LCD R4502 R4503 +3VS_LCD


Q4502 10KOhm 10KOhm J4501
D 1 6 L4501 D
2 D 5 80Ohm/100Mhz 1 2
S 4 1 2
3 1 2 70 EDID_CLK 3 3 4 4
G 70 EDID_DATA 5 6
SI3456BDV 5 6
7 7 8 8
Q4501A Q4501B C4501 C4502 C4503 C4504 C4505 R4501 70 LVDS_U0N 9 10 LVDS_L0N 70
UM6K1N UM6K1N 0.1UF/25V 0.1UF/16V 10UF/10V 1UF/10V 0.1UF/16V 330Ohm 9 10
70 L_VDDEN 2 5 70 LVDS_U0P 11 11 12 12 LVDS_L0P 70
@ 13 14
13 14
70 LVDS_U1N 15 15 16 16 LVDS_L1N 70
70 LVDS_U1P 17 17 18 18 LVDS_L1P 70
19 19 20 20
RN4501A 3
D 70 LVDS_U2N 21 22 LVDS_L2N 70
100KOhm Q4503 21 22
70 LVDS_U2P 23 23 24 24 LVDS_L2P 70
2N7002 25 26
25 26
11 70 LVDS_UCLKN 27 27 28 28 LVDS_LCLKN 70
G 70 LVDS_UCLKP 29 30 LVDS_LCLKP 70
2 S 29 30

R1.1-20 BTOB_CON_30P
R1.1-20
R1.1-19

Reserved for 3G
EDID_CLK LVDS_LCLKN LVDS_UCLKN
7 RN4501D
100KOhm8
C4506 C4507 C4508
C C
10PF/50V 10PF/50V 10PF/50V
@ @ @

EDID_DATA LVDS_LCLKP LVDS_UCLKP

R1.1-19 +3VS_LCD AC_BAT_SYS_INV

L4503
80Ohm/100Mhz
R1.1-34 1 2 AC_BAT_INV
R4504
D4501 10KOhm C4509
BAT54AW 22UF/25V
30,56 LID_SW# 1 @ L4502
3 J4502 80Ohm/100Mhz +5V
30 LCD_BACKOFF# 2 1 2 +5V_USB25 1 2 +5V_USB25_F F4501 2 1 1.5A/6V
1 2
2 1
3G Request BL_EN
3
5
3 4 4
6 R4505 2 1 4.7KOhm
70 LCD_BACKEN 5 6 USB_CON25_OC# 21
30 LCD_BL_PWM 7 8 USB_PN2 21 R1.1-04 R4506 2 1 10KOhm
RB751V-40 7 8
9 9 10 10 USB_PP2 21
D4502 11 12
11 12
B 38 UNI_MIC_P 13 13 14 14 B
38 UNI_MIC_N 15 16 USB_P5-
15 16 USB_P5+
38 OMNI_MIC_P 17 17 18 18 Camera
38 OMNI_MIC_N 19 19 20 20
21 SIDE1 SIDE2 22 R2.0-15
WTOB_CON_20P USB_P5- RNX4501A 2 1 USB_PN5 21
0Ohm

LX4501
90Ohm/100Mhz
@
Reserved for EMI
USB_P5+ RNX4501B 4 3 USB_PP5 21
0Ohm
UNI_MIC_P UNI_MIC_N OMNI_MIC_P OMNI_MIC_N

D4504 D4505 D4506 D4507 D4503


0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF
@ @ @ @ USB_PP2 1 6 USB_PN2

+5V
2 5

A A
USB_P5- 3 4 USB_P5+

IP4220CZ6

R1.1-04
R2.0-15
Title : CRT_LCD Panel
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 45 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

LX4601
120Ohm/100Mhz
70 CRT_RED 1 2 CRT_R_CON

R4601 C4601 C4602


D 150Ohm D4601 22PF/25V 22PF/25V D
BAV99

+3VS

LX4602
120Ohm/100Mhz
70 CRT_GREEN 1 2 CRT_G_CON

R4602 C4603 C4604


150Ohm D4602 22PF/25V 22PF/25V
BAV99

+3VS

LX4603
120Ohm/100Mhz
70 CRT_BLUE 1 2 CRT_B_CON

R4603 C4605 C4606


150Ohm D4603 22PF/25V 22PF/25V
BAV99

C C
+3VS

Q4601A RX4601
UM6K1N 0Ohm
70 CRT_HSYNC 1 6 HSYNC 1 2 HSYNC_CON
J4601

C4607
D4604 22PF/25V 6
BAV99 @ CRT_R_CON 1 11
+12VS 7
CRT_G_CON 2 12 DDC_DATA_CON
+3VS 8
CRT_B_CON 3 13 HSYNC_CON
RX4602 9
0Ohm 4 14 VSYNC_CON
70 CRT_VSYNC 4 3 VSYNC 1 2 VSYNC_CON 10
5 15 DDC_CLK_CON
UM6K1N
Q4601B C4608
D4605 22PF/25V
BAV99 @
D_SUB_15P3R
+3VS

Q4602A JP4601
B UM6K1N SHORT_PIN B
70 CRT_DDC_DATA 1 6 DDC_DATA 1 2 DDC_DATA_CON

R2.0-16 C4609
22PF/25V
@

+3VS

JP4602
SHORT_PIN
70 CRT_DDC_CLK 4 3 DDC_CLK 1 2 DDC_CLK_CON

UM6K1N R2.0-16
Q4602B C4610
22PF/25V
@

D4606
1SS355
1 2 1 RN4601A DDC_DATA
+5VS 4.7KOhm2
3 RN4601B DDC_CLK
4.7KOhm4
5 RN4601C CRT_DDC_DATA
4.7KOhm6
7 RN4601D CRT_DDC_CLK
A +3VS 4.7KOhm8 A

Title : CRT_D-Sub
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 46 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

LX4701
120Ohm/100Mhz
C 70 TV_Y 1 2 C

R4701
150Ohm D4701 R1.1-21
BAV99 C4701 C4702
15PF/50V 15PF/50V

+3VS
J4701
P_GND2 9
R1.1-21 TV_Y_CON 3 3
1 1
LX4702 7
120Ohm/100Mhz 7
5 5
70 TV_CVBS 1 2 TV_CVBS_CON 6 6
2 2
TV_C_CON 4
R4702 4
8
150Ohm D4702 P_GND1
BAV99 C4703
R1.1-21 C4704
15PF/50V 15PF/50V

+3VS

LX4703
120Ohm/100Mhz
70 TV_C 1 2
B B

R4703
150Ohm D4703 R1.1-21
BAV99 C4705 C4706
15PF/50V 15PF/50V

+3VS

A A

Title : TV_TV-Out
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 47 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

R1.1-22
J4801
70 HDMI_TXP2 1 1 P_GND2 21
2 2 P_GND4 23
70 HDMI_TXN2 3 3
70 HDMI_TXP1 4 4
5 5
70 HDMI_TXN1 6 6
70 HDMI_TXP0 7 7
8 8
70 HDMI_TXN0 9 9
+5VS
R1.1-22 70 HDMI_CLKP 10 10
11 11
70 HDMI_CLKN 12 12
13
D4801 13
14 14
SS0520 HDMI_SCL 15
F4801 HDMI_SDA 15
16 16
0.35A/6V 17
+5VS_F +5VS_HDMI 17
2 1 18 18 P_GND3 22
70 HDMI_HPD 1 2 19 19 P_GND1 20

R4803 HDMI_CON_19P
1KOhm
D4802 R4804
BAV99 10KOhm

B B
+3VS
N/A

+3VS

JP4801 36 HDMI_JD
SHORT_PIN
70 HDMI_DDC_CLK 1 6 HDMI_DDCCLK 1 2 HDMI_SCL D
3 Q4802
2N7002
UM6K1N C4801
Q4801A R4801
R2.0-18 22PF/25V 11 HDMI_HPD
4.7KOhm @ G
S 2

D4803
BAT54AW

+5VS_HDMI
1 R2.0-17
3
2
R1.1-34
+3VS
R4802
4.7KOhm
JP4802
SHORT_PIN
70 HDMI_DDC_DATA 4 3 HDMI_DDCDATA 1 2 HDMI_SDA
A A
UM6K1N R2.0-18 C4802
Q4801B 22PF/25V
@

Title : CRT_HDMI
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 48 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : TV_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 49 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

CPU Thermal Sensor


+3VSTHM_CPU +3VS

R5001 2 1 221Ohm
U5001 1% CPU_THRM_DA
30,70 SMB1_CLK 8 SCLK VCC 1
30,70 SMB1_DAT 7 2 CPU_THRM_DA 3 C5002
SDA DXP 1000PF/50V
6 ALERT# DXN 3 CPU_THRM_DC 3
5 4 OS_OC#
GND OVERT# CPU_THRM_DC
MAX6657MSA C5001
0.1UF/16V

C C

B
PWM Fan +3VS B

+3VS +5VS +5VS

RN5001A
10KOhm

RN5001B RN5001C C5005 D5001


10KOhm 10KOhm 10UF/16V SS0540
@
OS_OC#
Q5001
2N7002 R2.0-19 R1.1-33 J5001
4 4 SIDE2 6
30 FAN_PWM 2 3 3
3
2 2
30 FAN0_TACH 1 5
1 SIDE1
C5003 C5004 WtoB_CON_4P
100PF/50V 100PF/50V
@ @

A A

7 RN5001D
10KOhm 8

Title : FAN_Fan & Sensor


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 50 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

+5VS

D 20 IDE_PDD[15:0] D

J5101
1 1 2 2
3 3 4 4
11,21,30,33,38,43,53,58,62,66,70 BUF_PLT_RST# R5103 1 2 33Ohm IDE_RST# 5 6 IDE_PDD8
IDE_PDD7 5 6 IDE_PDD9
7 7 8 8
IDE_PDD6 9 10 IDE_PDD10
IDE_PDD5 9 10 IDE_PDD11
11 11 12 12
IDE_PDD4 13 14 IDE_PDD12
IDE_PDD3 13 14 IDE_PDD13
15 15 16 16
IDE_PDD2 17 18 IDE_PDD14
IDE_PDD1 17 18 IDE_PDD15
19 19 20 20
IDE_PDD0 21 22 IDE_PDDREQ 20
21 22
23 23 24 24 IDE_PDIOR# 20
20 IDE_PDIOW# 25 25 26 26
20,22 IDE_PIORDY 27 27 28 28 IDE_PDDACK# 20
20,22 INT_IRQ14 29 29 30 30
20 IDE_PDA1 31 32 IDE_PDIAG
31 32
20 IDE_PDA0 33 33 34 34 IDE_PDA2 20
+5VS 35 36
20 IDE_PDCS1# 35 36 IDE_PDCS3# 20
56 IDE_PDASP# 37 37 38 38
39 39 40 40
R5101 1 2 10KOhm @ IDE_PDIAG 41 42
R5102 IDE_CSEL 41 42
2 1 0Ohm 43 43 44 44
45 46
IDE_CSEL 45 46
47 47 48 48 +
49 50 CE5101
49 50 47UF/6.3V
BtoB_CON_50P
C C

B B

J5102
25 1 1 2 CX5101 3900PF/25V SATA_TXP0 20
NP_NC3 1 SATA_TXP0_C
2 2
23 3 SATA_TXN0_C 1 2 CX5102 3900PF/25V SATA_TXN0 20
NP_NC1 3
4 4
5 SATA_RXN0_C 1 2 CX5103 3900PF/25V SATA_RXN0 20
5 SATA_RXP0_C
6 6
7 7 1 2 CX5104 3900PF/25V SATA_RXP0 20

8 8 +3VS
9 9
10 C5101 C5102
10 0.1UF/16V 10UF/10V
11
11 @ @
12 12
13
13
14 14
15 15
16 +5VS
16
17
17
18 18 +
19 C5103 CE5102
19 0.01UF/16V 47UF/6.3V
24 20
NP_NC2 20 @
21 21
26 22
NP_NC4 22
SATA_CON_22P
A A

R1.1-27

Title : XDD_HDD & ODD


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 51 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : USB_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 52 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

+3VS
Max: 1000 mA

+
C5301 C5302 CE5301
0.1UF/16V 10UF/10V 100U/6.3V
@

J5301
1 2 +1.5VS Max: 500 mA
22,33,44 PCIE_WAKE# WAKE# 3.3V_1
61 BT_DATA 3 Reserved1 GND7 4
61 BT_CHCLK 5 Reserved2 1.5V_1 6
7 CLKREQ# UIM_PWR 8
9 10 C5303 C5304 C5305
GND1 UIM_DATA 0.1UF/16V 0.1UF/16V 10UF/10V
29 CLK_PCIE_WLAN# 11 REFCLK- UIM_CLK 12
29 CLK_PCIE_WLAN 13 REFCLK+ UIM_RESET 14
15 16
GND2 UIM_VPP

17 Reserved/UIM_C8 GND8 18
19 20 WLAN_ON
Reserved/UIM_C4W_DISABLE#
C
21 GND3 PERST# 22 BUF_PLT_RST# 11,21,30,33,38,43,51,58,62,66,70 C
21 PCIE_RXN6_SB 23 PERn0 +3.3Vaux 24
21 PCIE_RXP6_SB 25 PERp0 GND9 26
27 GND4 1.5V_2 28
+3V
29 GND5 SMB_CLK 30 Max: 5 mA
21 PCIE_RXN_WLAN 31 PETn0 SMB_DATA 32
21 PCIE_RXP_WLAN 33 PETp0 GND10 34
35 GND6 USB_D- 36
37 38 C5306
Reserved3 USB_D+ 0.1UF/16V
39 Reserved4 GND11 40
41 Reserved5 LED_WWAN# 42
43 Reserved6 LED_WLAN# 44
45 Reserved7 LED_WPAN# 46
47 Reserved8 1.5V_3 48
49 Reserved9 GND12 50
51 Reserved10 3.3V_2 52

53 56
GND13 NP_NC2
54 GND14 NP_NC1 55

MINI_PCI_LATCH_52P

WLAN_ON

Q5301A Q5301B
UM6K1N UM6K1N
B 30,56,61,67 RFON_SW# 2 5 WLAN_ON# 22 B

H5301 H5302
W5M-1A W5M-1A

A A

Title : PCI_WLAN
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Tuesday, September 04, 2007 Sheet 53 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : BAR_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 54 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : SIO_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 55 of 95
5 4 3 2 1
5 4 3 2 1

Power LED Main Board


R5606
1KOhm
PWR_LED_ON# 1 2 PWR_LED1#_R
+3VA

R5611
10KOhm
R1.1-23 R5612
D R2.0-20 33Ohm SW5601 D
J5601 1 2 4 1
30,53,61,67 RFON_SW#
GND2 22 5 COM COM
2
1 C5603 6 3
HOT_KEY1# 1 0.1UF/10V
2 2
HOT_KEY2# 3 SLIDE_SWITCH_6P
HOT_KEY3# 3
4 4
HOT_KEY4#
Cap Lock LED 5
6
5
+3VA 6
LID# 7
POWER_SW# 7
8 8
R1.1-23 PWR_LED_ON# 9 9
R5605
R2.0-20 PWR_LED1#_R
+5V 10 10
11 11
1KOhm +5VS 12
CAP_LED#_R CAP_LED#_R 12
1 2 13 13
NUM_LED#_R 14
XDD_LED#_R 14
15 15
Q5602B E-MAIL_LED# 16
UM6K1N TP_LED# 16
30 CAP_LED 5 17 17
+3VS 18
19
18 Power LED
30 ALS_DA 19 +5V
20 20
GND1 21 PWR_LED# 63
FPC_20P
R5618 R5619
10KOhm 1KOhm
Num Lock LED
PWR_LED_ON#
C C

R5604 Q5606A Q5606B


1KOhm 30 PWR_LED_UP# 2 UM6K1N 5 UM6K1N
1 2 NUM_LED#_R

Q5602A
30 NUM_LED 2 UM6K1N

+3VA Charger LED


+5VA
+3VS +3VS RN5601A
HDD & ODD LED 30 MARATHON# 1
3
10KOhm 2
RN5601B
CHG_LED# 63
30 DISTP# 10KOhm 4
5 RN5601C
30 COLOREN# 10KOhm 6
7 RN5601D R5613 R5614
30 INSTANT_ON# 10KOhm 8
R5601 R5602 10KOhm 1KOhm
10KOhm 10KOhm
R5603 2 CN5601A
1 0.1UF/25V 1 2 RN5602A HOT_KEY1#
33Ohm
R1.1-34 1KOhm 4 CN5601B
3 0.1UF/25V 3 4 RN5602B HOT_KEY2#
33Ohm
1 2 XDD_LED#_R 6 CN5601C
5 0.1UF/25V 1 2 RN5603A HOT_KEY3#
33Ohm
D5601 8 CN5601D
7 0.1UF/25V 3 4 RN5603B HOT_KEY4#
33Ohm
BAT54AW Q5603A Q5603B
20 SATA_LED# 1 Q5601A Q5601B 30 CHG_LED_UP# 2 UM6K1N 5 UM6K1N
3 2 UM6K1N 5 UM6K1N
51 IDE_PDASP# 2
B B
+3VA

+5V R5607
E-Mail LED 10KOhm
WLAN LED
RF_LED# 63
R5620 1 RN5604A POWER_SW#
30 PWR_SW# 33Ohm 2
10KOhm
C5601 R5616
R5617 0.1UF/10V 1KOhm
1KOhm
1 2 E-MAIL_LED#

Q5608A Q5608B
22 EMAIL_LED# 2 UM6K1N 5 UM6K1N Q5605A Q5605B
+3VA 2 UM6K1N UM6K1N 5
22 WLAN_LED_ON BT_LED_ON 22

R1.1-03 R5609 3
D
10KOhm Q5610
2N7002
Touch-pad Lock LED 30 3G_LED_ON 11 @
3 RN5604B LID# G
30,45 LID_SW# 33Ohm 4 2 S
C5602
R5615 0.1UF/10V
A A
1KOhm
1 2 TP_LED# R1.1-24
3
D
Q5604
2N7002
30 TP_LED 11
G
2 S
Title : LED_Indicator
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
R1.1-08 Custom M50S/X55S 2.0
Date: Tuesday, September 04, 2007 Sheet 56 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D
+5VS +3VS +1.8VS +1.5VS +1.25VS +VCCP +0.9VS

R5703 R5704 R5705 R5706 R5707 R5708 R5709


+3VA 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm

R5701 +5VS_DISCHRG +3VS_DISCHRG +1.8VS_DISCHRG +1.5VS_DISCHRG +1.25VS_DISCHRG +VCCP_DISCHRG +0.9VS_DISCHRG


100KOhm

Q5701B Q5702A Q5702B Q5703A Q5703B Q5704A Q5704B


5 UM6K1N 2 UM6K1N 5 UM6K1N 2 UM6K1N 5 UM6K1N 2 UM6K1N 5 UM6K1N

Q5701A
UM6K1N
30,43,91,92 SUSB_EC# 2

C C

B B
+5V +3V +1.8V

R5710 R5711 R5712


+3VA 330Ohm 330Ohm 330Ohm

R5702 +5V_DISCHRG +3V_DISCHRG +1.8V_DISCHRG


100KOhm

Q5705B Q5706A Q5706B


5 UM6K1N 2 UM6K1N 5 UM6K1N

Q5705A
UM6K1N
30,91 SUSC_EC# 2

A A

Title : DSG_Discharge
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 57 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

+3VS
Max: 50 mA

C5801 C5802
0.1UF/16V 1UF/10V

J5801
1 2 +1.5VS Max: 200 mA
WAKE# 3.3V_1
3 Reserved1 GND7 4
5 Reserved2 1.5V_1 6
7 CLKREQ# UIM_PWR 8
9 10 C5803 C5804 C5805
GND1 UIM_DATA 0.1UF/16V 0.1UF/16V 10UF/10V
29 CLK_PCIE_ROBSON# 11 REFCLK- UIM_CLK 12
29 CLK_PCIE_ROBSON 13 REFCLK+ UIM_RESET 14
15 16
GND2 UIM_VPP

17 Reserved/UIM_C8 GND8 18
19 Reserved/UIM_C4W_DISABLE# 20
C
21 GND3 PERST# 22 BUF_PLT_RST# 11,21,30,33,38,43,51,53,62,66,70 C
21 PCIE_RXN4_SB 23 PERn0 +3.3Vaux 24
21 PCIE_RXP4_SB 25 PERp0 GND9 26
27 GND4 1.5V_2 28
29 GND5 SMB_CLK 30
21 PCIE_RXN_ROBSON 31 PETn0 SMB_DATA 32
21 PCIE_RXP_ROBSON 33 PETp0 GND10 34
35 GND6 USB_D- 36
37 Reserved3 USB_D+ 38
39 Reserved4 GND11 40
41 Reserved5 LED_WWAN# 42
43 Reserved6 LED_WLAN# 44
45 Reserved7 LED_WPAN# 46
47 Reserved8 1.5V_3 48
49 Reserved9 GND12 50
51 Reserved10 3.3V_2 52

53 56
GND13 NP_NC2
54 GND14 NP_NC1 55

MINI_PCI_LATCH_52P

B B

H5801
W5M-1A

A A

Title : ROB_Robson
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 58 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : DJ_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 59 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

DC Jack
D D

+V_DCJACK A/D_DOCK_IN

1 T6001
1 T6002
1 T6003 R2.0-21
J6001 1 T6004
3 NP_NC L6006 1 2 80Ohm/100Mhz
4 P_GND 1vcc L6001 1 2 80Ohm/100Mhz
5 P_GND
6 P_GND 2GND
7 P_GND
C6001 D6001 C6002 C6003 C6004
DC_PWR_JACK_2P 0.1UF/25V SS0540 10UF/25V 1UF/25V 0.1UF/25V
DC_GND @

L6007 1 2 80Ohm/100Mhz
L6005 1 2 80Ohm/100Mhz
1 T6005
1 T6006 R2.0-21
1 T6007
1 T6008

DC_GND

C C

Battery Connector

BAT_CON

1 T6009
B 1 T6010 B
J6002 1 T6011
11 1 T6012
P_GND2

9 9
8 8
7 7
6 6
5 L6002 1 2 120Ohm/100Mhz SMB0_CLK 30
5 L6003
4 4 1 2 120Ohm/100Mhz SMB0_DAT 30
3 L6004 1 2 120Ohm/100Mhz TS1# 88,90
3
2 2
1 C6005 C6006 C6007 C6008
1 0.1UF/25V 100PF/50V 100PF/50V 100PF/50V D6002 D6003 D6004
10 181K 181K 181K
P_GND1 @
BATT_CON_9P
1 T6013
R1.1-27 1 T6014
1 T6015
1 T6016

A A

Title : DC_DC & BAT Conn.


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 60 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

+3V

C6101
0.1UF/16V
J6101

11 SIDE1
1 1
21 USB_PP6 2 2
21 USB_PN6 3 3
4 4
53 BT_CHCLK 5 5
BT_ON 6 6
53 BT_DATA 7 7
8 8
9 9
22 BT_DET# 10 10
12
SIDE2

WTOB_CON_10P

C R1.1-25 C

+3V

R6101
10KOhm

BT_ON

Q6101A Q6101B
UM6K1N UM6K1N
30,53,56,67 RFON_SW# 2 5 BT_ON# 22

B B

A A

Title : BT_Bluetooth
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 61 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

+3V +3VS

J6201
29 CLK_TPMPCI 1 1 2 2
20,30,44 LPC_FRAME# 3 3 4 4 SUSCLK 22
11,21,30,33,38,43,51,53,58,66,70 BUF_PLT_RST# 5 5 6 6
20,30,44 LPC_AD3 7 7 8 8 LPC_AD2 20,30,44
9 9 10 10 LPC_AD1 20,30,44
20,30,44 LPC_AD0 11 11 12 12
13 13 14 14
15 15 16 16 INT_SERIRQ# 22,30,40
17 18 PM_CLKRUN# 22,30,40
17 18
22 PM_SUS_SAT# 19 19 20 20

BTOB_20P
C6201 C6202
0.1UF/16V 0.1UF/16V
C C
@ @

H6201
L4E-1A

B B

A A

Title : TPM_TPM 1.2


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 62 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

J6301
+3VS 1 1
21 USB_PP8 2 2 SIDE1 13
21 USB_PN8 3
3
4 4
31 RIGHT 5 5
31 LEFT 6 6
+5V 7 7
C 56 PWR_LED# 8 8 C
+5VA 9 9
R1.1-24 56 RF_LED# 10 10
+5VS 11 11 SIDE2 14
56 CHG_LED# 12 12
WTOB_CON_12P

B B

A A

Title : FP_Fingerprint Conn.


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 63 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

+3V
Max: 1200 mA
L6401
80Ohm/100Mhz
2 1

D +3VS D
L6402 @
80Ohm/100Mhz
+3V_TUN 2 1

+
C6401 C6402 CE6401
0.1UF/16V 10UF/10V 100U/6.3V

+1.5VS
Max: 375 mA
J6401
1 2 R6406
WAKE# 3.3V_1 0Ohm @
3 Reserved1 GND7 4
5 6 +1.5VS_TUN 2 1
Reserved2 1.5V_1
7 CLKREQ# UIM_PWR 8
9 10 C6403 C6404 C6405
GND1 UIM_DATA 0.1UF/16V 0.1UF/16V 10UF/10V
11 REFCLK- UIM_CLK 12
13 14 @ @ @
REFCLK+ UIM_RESET
15 GND2 UIM_VPP 16

AVIN_S_C 17 18
AVIN_S_Y Reserved/UIM_C8 GND8
19 Reserved/UIM_C4W_DISABLE# 20
21 GND3 PERST# 22
23 24
PERn0 +3.3Vaux
25 PERp0 GND9 26
27 GND4 1.5V_2 28
29 GND5 SMB_CLK 30
31 PETn0 SMB_DATA 32
C
33 PETp0 GND10 34 C
35 GND6 USB_D- 36 USB_PN9 21
37 Reserved3 USB_D+ 38 USB_PP9 21
39 Reserved4 GND11 40
41 42 AVIN_AUD_R
Reserved5 LED_WWAN#
43 Reserved6 LED_WLAN# 44
45 46 AVIN_AUD_L
Reserved7 LED_WPAN#
47 Reserved8 1.5V_3 48
49 Reserved9 GND12 50
AVIN_CVBS 51 52
Reserved10 3.3V_2

53 GND13 NP_NC2 56
54 GND14 NP_NC1 55

MINI_PCI_LATCH_52P

H6401 H6402
W5M-1A W5M-1A

B B

J6402
10 AVIN_S_C_CON R6401 2 1 0Ohm AVIN_S_C
10
13 P_GND1 9 9
11 8 J6403
NP_NC1 8 AVIN_S_Y_CON R6402
7 2 1 0Ohm AVIN_S_Y
7
6 6 2 GND1 GND4 5
5 AVIN_CVBS_CON R6403 2 1 0Ohm AVIN_CVBS 3 4
5 GND2 GND3
4
4 AVIN_AUD_L_CON
12 NP_NC2 3 3 R6404 2 1 0Ohm AVIN_AUD_L
14 2 MCX_JACK_5P
P_GND2 2 AVIN_AUD_R_CON
1 1 R6405 2 1 0Ohm AVIN_AUD_R

PCMCIA_10P C6406 C6407 C6408 C6409 C6410


10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V
@ @ @ @ @

A A

Title : TUN_TV Tuner


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Tuesday, September 04, 2007 Sheet 64 of 95
5 4 3 2 1
5 4 3 2 1

Main Board
Screw Hole A
+5V R1.1-09
L6501 H6501 H6502
80Ohm/100Mhz H6520
+5V_USB01 2 1 +5V_USB01_F F6501 2 1 2A/8V U5F-M-EXPREE 1 1
NP_NC NP_NC
R1.1-30 2 GND1 GND4 5 2 GND1 GND4 5
J6501 R1.1-17 3 4 3 4
+3VS R6501 GND2 GND3 GND2 GND3
1 1 2 1 4.7KOhm USB_CON01_OC# 21
21 2 R6502 2 1 10KOhm
SIDE2 2
3 3
D 4 USB_PN0 21 RT394x315CBD118N RT394x315CBD118N D
4
5 5 USB_PP0 21
6 R1.1-28 H6503 H6504
6
7 7 USB_PN1 21 R1.1-09
8 8 USB_PP1 21 1 NP_NC 1 NP_NC
9 9 2 GND1 GND4 5 2 GND1 GND4 5
R1.1-27 10 HP2_JD 36 HP1_JD 1 2 CN6501A @ 3 4 3 4
10 100PF/50V GND2 GND3 GND2 GND3
11 HP2_R_CON 37 HP2_JD 3 4 CN6501B @
11 100PF/50V
12 L6502 HP2_R_CON 5 6 CN6501C @
12 HP2_L_CON 37 100PF/50V
13 SPDIF_JD 36 R1.1-17 120Ohm/100Mhz HP2_L_CON 7 8 CN6501D @
13 100PF/50V
14 1 2 SPDIF1_OUT 36 RT394x315CBD118N RT394x315CBD118N
14 EXT_MIC
15 HP1_JD 36 2 CN6502A @
1 100PF/50V
15 EXT_MIC_JD
16 HP1_R_CON 37 4 CN6502B @
3 100PF/50V H6514
16 C6501 HP1_L_CON
17 17 HP1_L_CON 37 6 CN6502C @
5 100PF/50V
18 EXT_MIC_JD 36 100PF/50V HP1_R_CON 8 CN6502D @
7 100PF/50V 1
18 NP_NC
22 SIDE1 19 19 EXT_MIC 36 2 GND1 GND4 5
20 20 3 GND2 GND3 4

WTOB_CON_20P GND_AUDIO GND_AUDIO

RT394x315CBD118N
R1.1-28
R1.1-28

GND_AUDIO
Screw Hole B
D6501
R1.1-09 H6505 H6506 H6507
1 CT268B158D138 1 CT268B158D138 1 CT268B158D138
USB_PN0 6 1 USB_PP0

C +5V_USB01 C
H6508 H6509 H6510
1 CT268B158D138 1 CT268B158D138 1 CT268B158D138
5 2

USB_PN1 4 3 USB_PP1 Screw Hole C


H6511 H6512
IP4220CZ6
1 NP_NC 1 NP_NC
2 GND1 GND4 5 2 GND1 GND4 5
3 GND2 GND3 4 3 GND2 GND3 4

RT315x335CBD118N RT315x335CBD118N

Screw Hole F Screw Hole H


H6513 H6515

1 NP_NC 1 NP_NC
2 GND1 GND4 5 2 GND1 GND4 5
3 GND2 GND3 4 3 GND2 GND3 4

B B
CR561X220D110N CRT256X305D120N

Screw Hole I Screw Hole J


H6516 H6517

1 NP_NC 1 NP_NC1GND5 6
2 GND1 GND4 5 2 NP_NC2GND4 5
3 GND2 GND3 4 3 GND2 GND3 4

CRT234X256D110N 2DRILL_D102N_D87N

Screw Hole K Screw Hole L


H6518 H6519

1 1
NP_NC NP_NC
2 GND1 GND4 5 2 GND1 GND4 5
3 4 3 4
GND2 GND3 GND2 GND3

RT394x325BD110N S394X293D110N
A A

Title : ME_Conn & Screw Holes


ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 65 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D +1.8VS_ESATA +3VS D

C6601 C6602
10UF/10V 0.1UF/16V C6611 C6612 C6613
1UF/10V 1UF/10V 1UF/10V

U6601

C6603 C6604 C6605 C6606


10UF/10V 1UF/10V 1UF/10V 0.1UF/16V CX6603 1 2 0.01UF/16V ESATA_TXP_C
37 24 ESATA_TXP
ZGPIO3 ASTXP ESATA_TXN CX6604
38 DG18_3 ASTXN 23 1 2 0.01UF/16V ESATA_TXN_C
39 XTEST ASG18 22
40 YHDLEDn ASV18 21
41 20 ESATA_RXN CX6605 1 2 0.01UF/16V ESATA_RXN_C
C6607 C6608 C6609 C6610 DV18_3 ASRXN ESATA_RXP
42 DG18_2 ASRXP 19
10UF/10V 10UF/10V 0.1UF/16V 0.1UF/16V 43 18 CX6606 1 2 0.01UF/16V ESATA_RXP_C
DG33_2 ASREXT
44 DV33_2 ASG33 17
45 XSMBCLK ASV33 16
46 15 X2_ESATA
ZSMBDAT ASXOUT X1_ESATA R6601
11,21,30,33,38,43,51,53,58,62,70 BUF_PLT_RST# 47 XRSTn ASXIN 14 1 2 10MOhm
48 DG18_1 NC1 13
X6601 1 2 25Mhz

R6602
12KOhm C6614 C6615
JMB360_LGCZ0B 1% 27PF/50V 27PF/50V
C C

29 CLK_PCIE_ESATA#
29 CLK_PCIE_ESATA R6603
21 PCIE_RXP_ESATA 12KOhm
21 PCIE_RXN_ESATA 1%
2 1 CX6601 0.1UF/10V PCIE_TXN_ESATA
21 PCIE_RXN5_SB
21 PCIE_RXP5_SB 2 1 CX6602 0.1UF/10V PCIE_TXP_ESATA

ZGPIO : Clock Type of PCI Express


0 = 25MHz Oscillator (D) +1.8VS L6602 @ +1.8VS_ESATA
1 = 100MHz from PCI Express Finger 80Ohm/100Mhz
1 2

+3VS U6602 R6606


ZGPI1 : Clock Source of SATA II 21 USB_PP3
6.2KOhm
0 = from Internal Clock Source (D) 3 4 1%
IN OUT
1 = from ASXIN & ASXOUT 2 GND
1 SHDN# SET 5

C6617
ZGPI2 : Interface to Debug Registers 10UF/10V G913CF R6607
B 21 USB_PN3 11.8KOHM B
0 = SMBus I/F (D) 1%
1 = Reserved D6601 R2.0-13
3 4

ZGPI2 : SMBus ID Address +5V


0 = 8'h44 (D)
1 = 8'h4A 2 5

1 6

IP4220CZ6

+5V F6601 L6601


1.5A/6V 80Ohm/100Mhz J6601
1 2 +5V_USB3_F 1 2 +5V_USB3 1 12
USB_PN3 VBUS NP_NC1
2 13
USB_PP3 D- NP_NC2
+ 3 D+
R6604 CE6601 C6616 4
4.7KOhm 47UF/6.3V 0.1UF/16V GND0

5
ESATA_TXP_C GND1
21 USB_ESATA_OC# 6 A+
ESATA_TXN_C 7 14
A A- P_GND1 A
8 15
R6605 ESATA_RXN_C GND2 P_GND2
9 B- P_GND3 16
10KOhm ESATA_RXP_C 10 17
B+ P_GND4
11 GND3
SATA_11P

Title : ESA_JMB360
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 66 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D
3G Request D

L6701 @ +3VS
Max: 2750 mA
70Ohm/100Mhz
+3VS_WWAN 1 2

J6701 @
36 3G_MIC_P 1 2 R6702
3G_MIC_N WAKE# 3.3V_1 10KOhm
3 Reserved1 GND7 4
36 3G_SPK_P 5 6 @
Reserved2 1.5V_1 SIM_PWR
36 3G_SPK_N 7 CLKREQ# UIM_PWR 8
C6701 R6701 9 10 SIM_DATA
1000PF/50V 56Ohm GND1 UIM_DATA SIM_CLK
11 REFCLK- UIM_CLK 12
@ @ 13 14 SIM_RST
REFCLK+ UIM_RESET
15 GND2 UIM_VPP 16

17 Reserved/UIM_C8 GND8 18
19 20 3G_ON
Reserved/UIM_C4W_DISABLE#
21 GND3 PERST# 22
23 PERn0 +3.3Vaux 24
25 PERp0 GND9 26
27 GND4 1.5V_2 28
29 GND5 SMB_CLK 30
31 PETn0 SMB_DATA 32
33 34
PETp0 GND10
35 GND6 USB_D- 36 USB_PN7 21 3G_MIC_JD 36
37 Reserved3 USB_D+ 38 USB_PP7 21
+3VS_WWAN 39 40 3
D
Reserved4 GND11 Q6702
41 Reserved5 LED_WWAN# 42
C6702 C6703 C6704 43 44 2N7002
C
0.1UF/16V 0.1UF/16V 0.1UF/16V Reserved6 LED_WLAN# C
45 Reserved7 LED_WPAN# 46 11 @
@ @ @ 47 48 G
Reserved8 1.5V_3 2 S
49 Reserved9 GND12 50
51 Reserved10 3.3V_2 52

+ +
C6705 C6706 C6707 53 56 CE6701 CE6702
30PF/50V 30PF/50V 30PF/50V GND13 NP_NC2 100U/6.3V 100U/6.3V
54 GND14 NP_NC1 55
@ @ @ @ @
MINI_PCI_LATCH_52P

3G_ON
Q6701A Q6701B
UM6K1N UM6K1N
@ @
30,53,56,61 RFON_SW# 2 5 3G_ON# 30

H6701 @ H6702 @
B A40M20-64AS A40M20-64AS B

J6702 @
SIM_PWR 0Ohm 1 2 R6703 @ SIM_PWR_CON 1 10
VCC GND3
2 GND1
SIM_RST 0Ohm 1 2 R6704 @ SIM_RST_CON 3 RST
4 VPP
SIM_CLK 0Ohm 1 2 R6706 @ SIM_CLK_CON 5
SIM_DATA 0Ohm R6707 @ SIM_DATA_CON CLK
1 2 6 I/O
7
CARD_DETECT_SWITCH
8 CARD_DETECT_COM. GND2 9
C6708 C6709 C6711 C6712
0.1UF/16V 10PF/50V 10PF/50V 10PF/50V SIM_CON_8P
@ @ @ @

R1.1-16
A A

Title : WAN_WWAN
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 67 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

R1.1-26

B B

A A

Title : OTH_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 68 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : OTH_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 69 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

PCIENB_RXN[15:0] 12
PCIENB_RXP[15:0] 12
PCIEG_RXN[15:0] 12
PCIEG_RXP[15:0] 12

J7001A J7001B
28 121 PCIEG_RXP0 AC_BAT_SYS 1 31
DVI_A_TX0 PEX_TX0 PCIEG_RXN0 PWR_SRC1 GND1
30 DVI_A_TX0# PEX_TX0# 123 3 PWR_SRC2 GND2 32
D 34 122 PCIENB_RXP0 5 37 D
DVI_A_TX1 PEX_RX0 PCIENB_RXN0 PWR_SRC3 GND3
36 DVI_A_TX1# PEX_RX0# 124 7 PWR_SRC4 GND4 38
40 DVI_A_TX2 9 PWR_SRC5 GND5 43
42 127 PCIEG_RXP1 11 44
DVI_A_TX2# PEX_TX1 PCIEG_RXN1 PWR_SRC6 GND6
PEX_TX1# 129 13 PWR_SRC7 GND7 55
PCIENB_RXP1
46
DVI PEX_RX1 128
130 PCIENB_RXN1
15 PWR_SRC8 GND8 56
59
DVI_A_CLK PEX_RX1# GND9
48 DVI_A_CLK# GND10 63
133 PCIEG_RXP2 67
PEX_TX2 PCIEG_RXN2 GND11
50 DVI_A_HPD PEX_TX2# 135 +1.5VS 2 1V8RUN_1 GND12 70
49 134 PCIENB_RXP2 4 73
48 HDMI_HPD DVI_B_HPD/GND PEX_RX2 1V8RUN_2 GND13
136 PCIENB_RXN2 6 74
PEX_RX2# 1V8RUN_3 GND14
8 1V8RUN_4 GND15 78
66 139 PCIEG_RXP3 10 79
DDCB_CLK PEX_TX3 PCIEG_RXN3 1V8RUN_5 GND16
68 DDCB_DAT PEX_TX3# 141 12 1V8RUN_6 GND17 82
46 CRT_DDC_CLK 58 140 PCIENB_RXP3 14 85
DDCA_CLK PEX_RX3 PCIENB_RXN3 1V8RUN_7 GND18
46 CRT_DDC_DATA 60 DDCA_DAT PEX_RX3# 142 GND19 88
GND20 91
145 PCIEG_RXP4 94
PEX_TX4 PCIEG_RXN4 GND21
CRT PEX_TX4# 147
PCIENB_RXP4 GND22 97
PEX_RX4 146 +3VS 17 3V3RUN_1 GND23 100
12 CRT_BLUE_GM @ 0Ohm 2 1 R7001 CRT_BLUE 46 CRT_BLUE 65 148 PCIENB_RXN4 19 103
@ 0Ohm R7002 CRT_RED VGA_BLU PEX_RX4# 3V3RUN_2 GND24
12 CRT_RED_GM 2 1 46 CRT_RED 57 VGA_RED 21 3V3RUN_3 GND25 106
@ 0Ohm R7003 CRT_GREEN PCIEG_RXP5
12 CRT_GREEN_GM
@ 3
2 1
4 RN7001B CRT_HSYNC
46 CRT_GREEN 61
69
VGA_GRN VGA PEX PEX_TX5 151
153 PCIEG_RXN5 GND26 112
113
12 CRT_HSYNC_GM 0Ohm 46 CRT_HSYNC VGA_HSYNC PEX_TX5# GND27
12 CRT_VSYNC_GM @ 1 2 RN7001A CRT_VSYNC 46 CRT_VSYNC 71 152 PCIENB_RXP5 119
0Ohm VGA_VSYNC PEX_RX5 GND28
12 CRT_DDC_CLK_GM @ 3 4 RN7002B CRT_DDC_CLK 154 PCIENB_RXN5 18 120
0Ohm PEX_RX5# 5VRUN GND29
12 CRT_DDC_DATA_GM @ 1 2 RN7002A CRT_DDC_DATA 16 125
0Ohm 2V5RUN GND30
157 PCIEG_RXP6 126
PEX_TX6 PCIEG_RXN6 GND31
45 L_VDDEN 99 LVDS_PPEN PEX_TX6# 159 GND32 131
45 LCD_BACKEN 101 158 PCIENB_RXP6 132
C LVDS_BLEN PEX_RX6 PCIENB_RXN6 GND33 C
LVDS 114 LVDS_BL_BRGHT PEX_RX6# 160 +5V 20 RSVD1 GND34 137
22 RSVD2 GND35 138
@ 0Ohm 2 1 R7004 L_VDDEN 86 163 PCIEG_RXP7 23 143
12 L_VDDEN_GM 45 LVDS_L0P LVDS_UTX0 PEX_TX7 +12VS RSVD3 GND36
12 LCD_BACKEN_GM @ 0Ohm 2 1 R7005 LCD_BACKEN 45 LVDS_L0N 84 165 PCIEG_RXN7 48 HDMI_DDC_CLK 52 144
@ RN7003A LVDS_U0P LVDS_UTX0# PEX_TX7# PCIENB_RXP7 RSVD4 GND37
12 LVDS_U0P_GM 1 0Ohm 2 45 LVDS_L1P 92 LVDS_UTX1 PEX_RX7 164 48 HDMI_DDC_DATA 54 RSVD5 GND38 149
12 LVDS_U0N_GM @ 3 4 RN7003B LVDS_U0N 45 LVDS_L1N 90 166 PCIENB_RXN7 29 CLK_GFX_SSC 51 150
0Ohm LVDS_UTX1# PEX_RX7# RSVD6 GND39
12 LVDS_U1P_GM @ 1 2 RN7004A LVDS_U1P 45 LVDS_L2P 98 29 CLK_GFX_NOSSC 53 155
0Ohm LVDS_UTX2 AC/BATT# GND40
12 LVDS_U1N_GM @ 3 4 RN7004B LVDS_U1N 45 LVDS_L2N 96 169 PCIEG_RXP8 156
0Ohm LVDS_UTX2# PEX_TX8 GND41
12 LVDS_U2P_GM @ 1 2 RN7005A LVDS_U2P 108 171 PCIEG_RXN8 161
0Ohm LVDS_UTX3 PEX_TX8# GND42
@ 3 4 RN7005B LVDS_U2N 110 170 PCIENB_RXP8 25 162
12 LVDS_U2N_GM 0Ohm LVDS_UTX3# PEX_RX8 +1.8VS GND66 GND43
12 LVDS_UCLKP_GM @ 3 4 RN7006B LVDS_UCLKP 172 PCIENB_RXN8 81,82,83,84,91,93 SUSB#_PWR 217 167
0Ohm PEX_RX8# GND65 GND44
12 LVDS_UCLKN_GM @ 1 2 RN7006A LVDS_UCLKN 45 LVDS_LCLKP 102 218 168
0Ohm LVDS_UCLK GND64 GND45
@ 1 2 RN7007A LVDS_L0P 104 175 PCIEG_RXP9 220 173
12 LVDS_L0P_GM 0Ohm 45 LVDS_LCLKN LVDS_UCLK# PEX_TX9 GND63 GND46
12 LVDS_L0N_GM @ 3 4 RN7007B LVDS_L0N 177 PCIEG_RXN9 219 174
0Ohm PEX_TX9# GND62 GND47
12 LVDS_L1P_GM @ 1 2 RN7008A LVDS_L1P 45 LVDS_U0P 87 176 PCIENB_RXP9 R1.1-21 216 179
0Ohm LVDS_LTX0 PEX_RX9 GND61 GND48
@ RN7008B LVDS_L1N PCIENB_RXN9
12 LVDS_L1N_GM
@
3
1
0Ohm 4
2 RN7009A LVDS_L2P
45 LVDS_U0N 89
93
LVDS_LTX0# LVDS PEX_RX9# 178 215
210
GND60 GND49 180
185
12 LVDS_L2P_GM 0Ohm 45 LVDS_U1P LVDS_LTX1 GND59 GND50
12 LVDS_L2N_GM @ 3 4 RN7009B LVDS_L2N 45 LVDS_U1N 95 181 PCIEG_RXP10 209 186
0Ohm LVDS_LTX1# PEX_TX10 GND58 GND51
12 LVDS_LCLKP_GM @ 3 4 RN7010B LVDS_LCLKP 45 LVDS_U2P 83 183 PCIEG_RXN10 204 191
0Ohm LVDS_LTX2 PEX_TX10# GND57 GND52
12 LVDS_LCLKN_GM @ 1 2 RN7010A LVDS_LCLKN 45 LVDS_U2N 81 182 PCIENB_RXP10 203 192
0Ohm LVDS_LTX2# PEX_RX10 GND56 GND53
12 EDID_CLK_GM @ 3 4 RN7011B EDID_CLK 105 184 PCIENB_RXN10 198 197
0Ohm LVDS_LTX3 PEX_RX10# GND55 GND54
12 EDID_DATA_GM @ 1 2 RN7011A EDID_DATA 107
0Ohm LVDS_LTX3#
187 PCIEG_RXP11 MXM_230P
PEX_TX11 PCIEG_RXN11
45 LVDS_UCLKP 77 LVDS_LCLK PEX_TX11# 189
45 LVDS_UCLKN 75 188 PCIENB_RXP11
LVDS_LCLK# PEX_RX11 PCIENB_RXN11
TV PEX_RX11# 190

@ 0Ohm TV_Y
R1.1-20 PCIEG_RXP12
12 TV_Y_GM 2 1 R7006 PEX_TX12 193
12 TV_C_GM @ 0Ohm 2 1 R7007 TV_C 195 PCIEG_RXN12
@ 0Ohm TV_CVBS PEX_TX12# PCIENB_RXP12
12 TV_CVBS_GM 2 1 R7008 +0.9VS 222 IGP_UTX0 PEX_RX12 194
B 224 196 PCIENB_RXN12 B
IGP_UTX0# PEX_RX12#
36 SPDIF2_OUT 228 IGP_UTX1
230 199 PCIEG_RXP13
IGP_UTX1# PEX_TX13 PCIEG_RXN13
221 IGP_UTX2 IGP PEX_TX13# 201
PCIENB_RXP13
965PM: Un-mount R7001~R7008 223 IGP_UTX2# PEX_RX13 200
PCIENB_RXN13
202
Un-mount RN7001~RN7011 227
PEX_RX13#
IGP_UCLK PCIEG_RXP14
Mount J7001, H7001~H7004 229 IGP_UCLK# PEX_TX14 205
PCIEG_RXN14
PEX_TX14# 207
965GM: Mount R7001~R7008 48 HDMI_TXP0 27 206 PCIENB_RXP14
IGP_LTX0/DVI_B_TX0 PEX_RX14 PCIENB_RXN14
Mount RN7001~RN7011 48 HDMI_TXN0 29 IGP_LTX0#/DVI_B_TX0# PEX_RX14# 208
48 HDMI_TXP1 33 IGP_LTX1/DVI_B_TX1
Un-mount J7001, H7001~H7004 48 HDMI_TXN1 35 IGP_LTX1#/DVI_B_TX1# PEX_TX15 211 PCIEG_RXP15
39 213 PCIEG_RXN15
48 HDMI_TXP2 IGP_LTX2/DVI_B_TX2 PEX_TX15#
48 HDMI_TXN2 41 212 PCIENB_RXP15
IGP_LTX2#/DVI_B_TX2# PEX_RX15 PCIENB_RXN15
PEX_RX15# 214
48 HDMI_CLKP 45 IGP_LCLK/DVI_B_CLK
48 HDMI_CLKN 47 116
IGP_LCLK#/DVI_B_CLK# CLK_REQ#
PEX_RST# 118 BUF_PLT_RST# 11,21,30,33,38,43,51,53,58,62,66

TV-OUT PEX_REFCLK 115


117
CLK_PCIE_PEG 29
PEX_REFCLK# CLK_PCIE_PEG# 29
47 TV_Y 72
TV_Y/HDTV_Y/TV_CVBS
MXM Heatsink Stand-Off 47 TV_C 76
80
TV_C/HDTV_Pr
24
47 TV_CVBS TV_CVBS/HDTV_Pb THERM# NV_OVERT# 30
PRSNT1#
225 R1.1-17
H7001 H7002 H7003 H7004 226 R2.0-17
CT217B67D47 CT217B67D47 U5F-M-EXPREE U5F-M-EXPREE PRSNT2#
RUNPWROK 26 PWR_OK_VGA 92
SMBUS
45 EDID_CLK 62
64
DDCC_CLK OTHER NP_NC1 231
232
A 45 EDID_DATA DDCC_DAT NP_NC2 A
233
GND_1
30,50 SMB1_CLK 109 SMB_CLK GND_2 234
30,50 SMB1_DAT 111
SMB_DAT
MXM_230P

Title : VGA_MXM
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 70 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : VGA_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 71 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : VGA_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 72 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : VGA_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 73 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : VGA_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 74 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : VGA_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 75 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : VGA_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 76 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : VGA_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 77 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : VGA_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 78 of 95
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : VGA_****
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 79 of 95
5 4 3 2 1
5 4 3 2 1

TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T
T8037 T8039 T8034 T8038 T8043 T8042 T8040
+1.05VO

1 2 R8023 AC_BAT_SYS
4 VR_VID0
R8037 47KOhm r0402_h16 @ 0Ohm @
1 2 CPU_VRON 1 2 PMON AC_BAT_SYS
4 VR_VID1
R8021 47KOhm r0402_h16 @
4 VR_VID2 1
R8018
2
47KOhm r0402_h16 @
R2.0-23
4 VR_VID3 1 2
R8011 47KOhm r0402_h16 @ + +
4 VR_VID4 1 2
R8003 47KOhm r0402_h16 @
D 4 VR_VID5 1 2 D D D
R8033 47KOhm r0402_h16 @
4 VR_VID6 1 2
R8006 47KOhm r0402_h16 @ 4 4
G S G S
93 CPU_VRON_PWR

30 CPU_VRON 2 R8039 1 100KOhm PCPU_GND1


@ Q8007 Q8000
11,22 PM_DPRSLPVR 1 R8028 2 499Ohm 1% SI4392DY SI4392DY

3,11,20 H_DPRSTP# 1 R8017 2 0Ohm r0402_h16 4/4 add CE8003 CE8005 (44A)
TPC28T L8001 close to +VCORE
TPC28T T8016 0.36UH
30,32,92 VRM_PWRGD 4/4 deleted by EE T8044 Irat=32A Q8000 Q8007
1 2
3 PM_PSI#
+3VS
@
PWR_MON=17.5 * VCCSENSE * (Vdroop -Vo) D D @ 1%
R8010 1%
30 PWR_MON C8020 R8045 10KOhm + +
1UF/6.3V 4 4 3.65KOhm 1%
MLCC/+/-20% G S G S 1%

R8019
C8012 0Ohm 2 1
0.1UF/25V r0402_h16
MLCC/+/-10% PCPU_GND1 C8001
R8024 0.22UF/10V
C8019 4.22KOhm MLCC/+/-10%
C C
0.015uF/50V @ R8001
MLCC/+/-10% 0Ohm U8000 for current
R8042 R8044 r0402_h16 ISL6262ACRZ-T 1 2 2 1
147KOhm 4.99KOhm balence
1% 1% R8012 C8026 AC_BAT_SYS
Close to Phase 1 R8007 2.7Ohm 0.22UF/25V
Low_side MOSFET 20KOhm MLCC/+/-5%
@ VR_PWRGD 1 36 c0805_h37
R8000 PSI# PGOOD BOOT1
2 PSI# UGATE1 35
499Ohm PMON Q8004 Q8003
1% @
3
4
PMON PHASE1 34
33 SI4392DY SI4392DY + +
CE8001 CE8002
RBIAS PGND1
+3VS 1 2 5 VR_TT# LGATE1 32
PVCC
D D close to Q8003
6 31 1 2 +5VS
7
NTC
SOFT
PVCC
LGATE2 30 Q8004
VCC_PRM 2 1 8 29 R8049 4 4
OCSET PGND2 1Ohm G S G S
9 VW PHASE2 28
R8031 10 27
13.7KOhm COMP UGATE2 PCPU_GND2
2 1 11 26
1% FB BOOT2
12 FB2 NC 25
2 1 C8013 TPC28T L8000
220PF/50V T8014 0.36UH
C8028 MLCC/+/-5% C8024 Irat=32A
0.1UF/25V C8004 R8015 R8056 R8009 R8046 4.7UF/6.3V 1 2 2 1 1 2
MLCC/+/-10% 470PF/50V 255Ohm 0Ohm 1KOhm 1KOhm MLCC/+/-10%
@ MLCC/+/-10% 1% r0402_h161% 1% R8041 C8002
2 1 @ 2.7Ohm 0.22UF/25V
MLCC/+/-5% @
TPC28T R8027 2 1 ISEN1 c0805_h37 R8029 + +
T8041 97.6KOhm
D D
10KOhm R8030 R8058
1% R8016 C8011 ISEN2 1% 1Ohm 10KOhm
B 0Ohm 1000PF/50V R8026 1% 1% B
4 VCCSENSE 1 r0402_h16
2 MLCC/+/-10% R8002 4 4 3.65KOhm 2 1 @
10Ohm G S G S 1%
R8014 r0805_h24 C8008
100Ohm 1 2 +5VS 0.22UF/10V
+VCORE 1 @ 2 MLCC/+/-10%
C8003
TPC28T 2.2UF/6.3V
T8036 MLCC/+80%-20% PCPU_GND2

4 VSSSENSE 1 2 R8008 for current


10Ohm
R8022 r0805_h24 balence
0Ohm 1 2 AC_BAT_SYS
r0402_h16 R8032
100Ohm
@ R8036 for C8005
0.1UF/25V
load line MLCC/+/-10% TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T
T8005 T8030 T8006 T8004 T8009 T8001 T8019 T8011 T8025 T8015 T8028 T8012 T8026 T8007 T8017 T8027
2 1
C8000 Close to Pin 18
C8017 0.33UF/16V +VCORE
180PF/50V R8036 MLCC/+80%-20%
MLCC/+/-5% 3.65KOhm
1%
R8020 1%
VCC_PRM 1 1KOhm 2 TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T
T8008 T8024 T8010 T8032 T8003 T8013 T8018 T8022 T8020 T8023 T8029 T8031 T8000 T8002 T8021 T8033
VCC_PRM R8013
11KOhm
A A
1 1% 2
R8038
2.61KOhm
1 2 1 1% 2

VSUM R8043
10KOhm

C8021 & C8018 for transient


3%
Close to Phase 1 Title : POWER_VCORE
response Inductor L8001 ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 80 of 95
5 4 3 2 1
5 4 3 2 1

20mil

AC_BAT_SYS

1 2 AC_BAT_SYS

R8118
0Ohm +
C8126 r0805_h24
6800PF/50V
70,82,83,84,91,93 SUSB#_PWR MLCC/+/-10%
D R8134 D
49.9KOhm Q8100
1% R8123 SI4800BDY
330Ohm
1% (5.068A)
R8126
0Ohm
1 2 TPC28T
+5VO
T8122
C8118 R8119 L8100 @
1500PF/50V 1.8KOhm 3.8UH JP8104
AC_BAT_SYS MLCC/+/-10% 1%
(5.069A)
2 1 2 1 +5VSUS
C8112 2 1
1 2 1 2
R8131 0.1UF/50V Irat=6A 1MM_OPEN_5MIL (0.001A)
10KOhm MLCC/+/-10%
1% C8123 U8101 D8100
1 2 4700PF/50V 1 30 1 2 Q8101 FS1J4TP
MLCC/+/-10% INV1 VBST1 SI4800BDY @
2 COMP1 OUT1_U 29 + +
1 2 3 28
SSTRT1 LL1
4 SKIP# OUT1_D 27
5 VO1_VDDQ OUTGND1 26
6 DDR# TRIP1 25 1 2
7 24 R8135 17.4KOhm 1% @
T8121 GND VIN
1 8 REF_X TRIP2 23 1 2
TPC28T 9 22 R8125 17.4KOhm 1% @+5VAO AC_BAT_SYS
ENBL 10
ENBL1 VREG5
21
+5VAO
ENBL2 REG5_IN +5VO
11 VO2 OUTGND2 20
30,92 SUS_PWRGD 12 19 R8129 +
PGOOD OUT2_D 0Ohm
1 2 13 18
@ SSTRT2 LL2
2 1 1 2 14 COMP2 OUT2_U 17 2 1
C8122 15 16 1 2
C
0.01UF/50V C8127 R8136 INV2 VBST2 Q8103 C

MLCC/+/-10% 3300PF/50V 2.7KOhm TPS51020 C8104 SI4800BDY


MLCC/+/-10% 1% 0.1UF/50V (9.298A)
F=450KHz MLCC/+/-10%
3/16 change +3VO
Vref=0.85V C8121 TPC28T
1 2 4.7UH/16V T8102
MLCC/+80-20% L8101 @
R8128 3.8UH JP8103
10KOhm
(10.307A)
2 1 2 2 1 1 +3VSUS
1%
R8127 Irat=6A 1MM_OPEN_5MIL
330Ohm (1.009A)
1% 5/7 change Q8102
R8124 SI4894DY
30.1KOhm PN D8102 + +
1% FS1J4TP 3/16 change
@
C8124
6800PF/50V
MLCC/+/-10% @

20mil
+3VAO TPC28TTPC28TTPC28TTPC28T TPC28TTPC28TTPC28T TPC28TTPC28TTPC28T
B T8134 T8132 T8133 T8125 T8123 T8128 T8127 TPC28TTPC28TTPC28TTPC28T T8117 T8107 T8109 B
+5VAO T8110 T8103 T8114 T8100
+5VSUS +3VSUS +3VO
U8102 +5VO
1 VIN
VOUT 5 +3VAO
2 TPC28TTPC28TTPC28TTPC28T
GND T8136 T8135 T8129 T8131 TPC28TTPC28TTPC28TTPC28T
FB 4 1 2 (0.15A) TPC28TTPC28TTPC28T T8104 T8108 T8116 T8113 TPC28TTPC28TTPC28T
3 SD# R8121 T8130 T8126 T8124 T8112 T8119 T8101
SI9183DT 174KOhm C8120
R8130 1% 4.7UF/6.3V
C8119 100KOhm MLCC/+/-10%
1UF/16V Vref=1.215V r0402_h16
MLCC/+/-20% 1%

VSUS_ON
TPC28T TPC28T
T8118 @ T8106
JP8100
+5VAO 1 1 2 2 +5VA (0.15A)
+12VSUS TPC28T 1MM_OPEN_5MIL
T8120 D8103
2 1 ENBL
AC_BAT_SYS 92 FORCE_OFF#
TPC28T TPC28T
T8105 @ T8115
C8117
+12VSUS RB751V-40 JP8101
0.1UF/25V Imax=10mA 1 2 5 1 2 (0.15A)
MLCC/+80%-20% U8100
+5VAO +3VAO 1 2 +3VA
1 2 1 5 R8114 R8116 Q8105B 1MM_OPEN_5MIL
A IN OUT 845KOhm 100KOhm UM6K1N
A

2 1% r0402
GND C8111
3 4 1UF/25V 30,93 VSUS_ON 2 Q8105A
EN NC or ADJ MLCC/+80%-20% UM6K1N
MIC5235YM5
R8104

ENBL
FB=1.24V 95.3KOhm
1%
Title : POWER_SYSTEM
ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 81 of 95
5 4 3 2 1
5 4 3 2 1

AC_BAT_SYS

+5VO + 4/4 change


+1.05VO
TPC28T R8217 Q8201 Q8205
SI4800BDY T8209 R8209 D8202 10Ohm SI4392DY SI4392DY JP8205 @
D D D D
Q8203 4.7Ohm RB717F @ 1 2
1 2
+
3MM_OPEN_5MIL
3/16 change 4
G S
4
G S
JP8203 @
3/22 change 1 1 2 2

SI4894DY R8206 TPC28T 3MM_OPEN_5MIL


C8213 4.7UF/6.3V 0Ohm T8216 L8201
Q8204 MLCC/+/-20% 1UH JP8202 @
@ 1 2
3/14 add 1 2
(17.743A)
1 2
D8204 1 2 +VCCP
FS1J4TP Q8202 Q8206 Irat=18A 3MM_OPEN_5MIL (17.743A)
JP8208 @ +1.5VO U8200 SI4336DY_T1_E3 SI4336DY_T1_E3 JP8206 @
1 2 (7.988A) 28 1 D @ D 1 1 2 2
1 2 VCC GND
(5.983A) 3MM_OPEN_5MIL
27 LGATE2 LGATE1 2 + +
L8200 26 3 3MM_OPEN_5MIL
PGND2 PGND1 JP8207 @
+1.5VS 1 2 25 4 4 4
JP8209 @ PHASE2 PHASE1 G S G S @
24 UGATE2 UGATE1 5 1 1 2 2
1 2 1.8UH R8205 23 6 R8201 D8201
1 2 Irat=9.5A BOOT2 BOOT1 FS1J4TP 3MM_OPEN_5MIL
+ + 1 2 22 ISEN2 ISEN1 7 1 2
3MM_OPEN_5MIL C8202 R8211 0Ohm @ 21 8 2.61KOhm
0.1UF/25V 2.74KOhm EN2 EN1
2 1 20 VOUT2 VOUT1 9
MLCC/+/-10% 1 2 19 10
R8215 VSEN2 VSEN1
18 11
6.65KOhm 1% OCSET2 OCSET1
3/16 change and 17
16
SOFT2 SOFT1 12
13
PG2/REF DDR
delete +1.5VSUS 15 PG1 VIN 14
1 2 2 1
C8208 0.01UF/50V
C C
MLCC/+/-10% ISL6227CAZ_T C8200 R8204 18.7KOhm R8212
0.1UF/50V 1% 0Ohm
MLCC/+/-10% 1 2 @
R8203 VREF = 0.9V
9.76KOhm
1% C8209 0.01UF/50V
2 1

MLCC/+/-10%

R8216
92 1.05V_1.5V_PWRGD 0Ohm
R8213
110KOhm
1%

TPC28T TPC28T TPC28T TPC28T


T8225 T8223 T8218 T8220

+1.5VS
D8200
1SS355
2 1

TPC28T TPC28T TPC28T TPC28T


R8210 T8219 T8204 T8202 T8208
B 10KOhm B
70,81,83,84,91,93 SUSB#_PWR 2 1

+VCCP
C8203
3/16 delete +1.5VSUS 0.1UF/25V
and change control MLCC/+/-10%

signal to SUSB
TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
T8210 T8221 T8213 T8224 T8214 T8222 T8206 T8201

+1.5VO +1.05VO

3/16 change TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
T8203 T8217 T8215 T8200 T8212 T8207 T8205 T8211

D8203 @
1SS355
2 1

R8208
70,81,83,84,91,93 SUSB#_PWR SUSB#_PWR 2 1
A A

10KOhm TPC28T TPC28T TPC28T TPC28T


T8232 T8231 T8230 T8233
C8204
0.22UF/25V
MLCC/+/-10%
@
Title : POWER_I/O_1.5VS & 1.05VS
ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 82 of 95
5 4 3 2 1
5 4 3 2 1

+5VO

D D
R8330
10Ohm

R8328 R8320
3/14 change
0Ohm 0Ohm
SUSB#_PWR 1 2 2 @ 1 AC_BAT_SYS (0.272A)
Q8300
SI4392DY +1.8VO
+
D
5/7 change PN JP8304 @
D8301 1 2
1SS355 1 2
4
2 1 D8302 G S 3MM_OPEN_5MIL
RB751V-40

JP8302 @
91,93 SUSC#_PWR 1 2 3/16 change 1 2
R8317 C8302 1 2
100KOhm 0.047UF/16V TPC28T 3MM_OPEN_5MIL
1% MLCC/+/-10% T8326 (10.032A) (9.76A)
C8301 JP8301 @
R8324 1 2 1 2 1 2 1 2
0Ohm @ 1 2 +1.8V
R8323 R8312 0.1UF/50V Q8301 L8300 3MM_OPEN_5MIL
0Ohm 0Ohm MLCC/+/-10% SI4336DY_T1_E3D 1.8UH
R8319 R8326 2 @ 1 1 21 Irat=9.5A
C
0Ohm 560KOhm TON DL C
REF=2V 2 OVP/UVP BST 20
+1.8VO 1 @ 2 2 1% 1 3 19 4
REF U8300 LX G S D8303
4 ILIM DH 18
For foldback 5 POK1
MAX8632ETI
VIN 17 FS1J4TP + +
current limit 6 16 @ @
C8317 POK2 OUT
7 STBY# FB 15
0.22UF/10V C8320
MLCC/+/-10% 1UF/25V
MLCC/+/-10%
F=300KHz
92 DDR_PWRGD
R8329
+-18mA 10Ohm
9 0.9V_VTT_REF 2 1

D8300 FB=0.7V
1SS355 1 2
70,81,82,84,91,93 SUSB#_PWR 2 1 C8318
0.1UF/25V R8318
MLCC/+/-10% R8325 15.8KOhm
1 2 10KOhm 1% @
1% @ 2 1
R8305 C8315
22KOhm 0.033UF/16V C8316
1% MLCC/+/-10% 4700PF/50V @
MLCC/+/-10%

(40mil) (40mil)
B B
+0.9VO

JP8300
+0.9VS 1 1 2 2

(1A) 1MM_OPEN_5MIL N/A C8312 C8311 C8308 C8305 C8322


0.1UF/25V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% MLCC/+/-10%

TPC28T TPC28T TPC28T TPC28T


TPC28T TPC28T TPC28T TPC28T T8309 T8310 T8311 T8312
TPC28T TPC28T TPC28T TPC28T T8305 T8306 T8307 T8308
T8301 T8302 T8303 T8304

+1.8VO
+0.9VS
+0.9VO

TPC28T TPC28T TPC28T TPC28T


TPC28T TPC28T TPC28T TPC28T T8320 T8321 T8322 T8323
TPC28T TPC28T TPC28T TPC28T T8317 T8300 T8318 T8319
T8313 T8314 T8325 T8316

+1.8V
A A

Title : POWER_I/O_DDR & VTT


ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 83 of 95
5 4 3 2 1
5 4 3 2 1

+1.25VS 3/16 EE modify to daughter,so add this part


JP8404 @ (2.005A)
1 2
+1.25VO T8405 1 2 +1.5VO
TPC28T 3MM_OPEN_5MIL +1.25VS

(2.005A) (2.005A) R8406


Q8408
D JP8402 @ +12VSUS 2 1 D
1 2 +1.25VO 1 S D 8
+1.25VS 1 2
2 7 10Ohm
3MM_OPEN_5MIL 3 6 C8406 1UF/25V
4 G 5 1 2
c0805_h57
SI4800BDY U8401
+ 1 8 +5VO
VOUT1 VCC
2 VIN1- VOUT2 7
3 VIN1+ VIN2- 6
T8407 4 5
TPC28T GND VIN2+

LM358ADR PCIE_OK 92
3 Q8405
D
R8415 2N7002
R8409 1 2 +2.5VREF
+5VAO 1 2 11
100KOhm G
100KOhm 3 2 S
C Q8406
Q8407A 1 B
D8400 UM6K1N R8410 PMBS3904
1SS355 2 C8407 100KOhm E
2 1 22NF/50V 1% C8410 2
70,81,82,83,91,93 SUSB#_PWR
0.1UF/25V
Q8407B MLCC/+/-10%
R8405 @
1 2 5 UM6K1N
C
100KOhm
3/22 change C

C8409
@ 0.1UF/25V

B
3/16 delete +2.5VSUS B

A A

Title : POWER_I/O_+1.25VS
ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 84 of 95
5 4 3 2 1
5 4 3 2 1

D D

C C

3/14 EE modify to daughter,so delete this page

B B

A A

Title : N/A

ASUSTeK COMPUTER INC. NB Engineer: Gary Lin


Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 85 of 95
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : N/A
ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 86 of 95
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : N/A
ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 87 of 95
5 4 3 2 1
5 4 3 2 1

T8816
TPC28T JP8804 SHORT_PIN
1 1 2 CSSP
T8814 L8803
POWER PATH & BAT_LEARN TPC28T JP8800 SHORT_PIN 2 1
1 1 2 CSSN
150Ohm/100Mhz
Irat=5A l1812_h67

T8804 T8815 T8817 T8812 T8803 T8813 T8810 T8802 T8809 BAT TPC28T TPC28T TPC28T TPC28T
60,90 A/D_DOCK_IN 8 1 1 8 T8800 T8808 T8801 T8807
TPC28T TPC28T TPC28T TPC28T R8802 TPC28T TPC28T TPC28T TPC28T TPC28T L8801
A/D_DOCK_IN 7 2 2 7 1 2 AC_BAT_SYS 2 1
BAT_CON
6 3 3 6 10mOhm 150Ohm/100Mhz
90W->10m Ohm Irat=5A l1812_h67
5 4 4 5 65W->20m Ohm
D
Q8801 Q8807
4/17 DELETE BAT_S D

TPC8107 TPC8107 WITHOUT SHUTDOWN


C8817
0.01UF/50V FUNCTION
90 WATT 1 2 MLCC/+/-10%

R8823 Q8800 TPC8107


6.8KOhm 1 8 BAT
R8822 1% JP8805
18KOhm 2 7 SHORT_PIN
1% AC_BAT_SYS 1 2 AC_BAT_SYS_INV
3 6

4 5 AC_BAT_SYS_INV to Inverter connect,


Power trace =60mil(min),
CSSP Put JP8805 close to Q8800
CSSN

TPC28T
T8818
AC_IN Threshold 2.048Vmax A/D_DOCK_IN
> 17.44V active
AC_BAT_SYS
Adapter Iin(max) = [0.075V/Rsense(ADin)]*[VCLS/VREF]
Rsense(ADin)=0.010ohm 3/16 change
VCLS=2.5341V
=> Iin(max)=4.5A
=> Constant Power = 19 * 4.5 = 85.5W C8806
=> R5710=20K,R5715=30K 1UF/25V +
MLCC/+80%-20%
Charge Current Ichg = [0.075V/Rsense(CHG)]*[VICTL/3.6V] TPC28T TPC28T
Rsense(CHG)=0.025 ohm T8806 T8819
C VICTL= 3V => Ichg = 2.5A MAX8725_LDO C
VICTL= 1.68V => Ichg = 1.4A TPC28T
A/D_DOCK_IN A/D_DOCK_IN T8811
Vbatt = Cell * { Vref +[ (VCTL- 1.8V) / 9.52 ] } CHG_GND MAX8725_LDO
VCTL= 1.588V
=> Vbatt = 4.2V C8816 Q8802
R8817 1UF/25V
Mode pin : Vmode > 2.8V (trie to LDO pin) ----> 4 Cells R8812 D8802 100KOhm MLCC/+/-10% R8800 SI9435BDY
2.0 > Vmode > 1.6V (floating) ----> 3 Cells 100KOhm 1SS355 1 2 33Ohm
0.8 > Vmode (trie to GND) ----> Learning mode 1% MAX8725_REF C8812
LDO : 5.4V 1UF/25V R8803
MLCC/+80%-20% 25mOHM
VICTL< 0.8V or DCIN < 7V -->Charger Disable REF : 4.2235V 1 21 1 2 L8802 r1508 1%
DCIN DLOV
2 LDO DLO 20 1 2 1 2 BAT
3 ACIN PGND 19
Precgarge current=150mA MAX8725_REF 4 18 10UH 3/16 change colayout
REF CSIP Irat=4.4A
5 GND/PKPRES# CSIN 17
6 16 Q8803
R8818 ACOK BATT SI4800BDY
7 15
13.3KOhm MODE GND1
1% R8805 R8809 R8813 D8801 +
20KOhm 40.2KOhm 33.2KOhm U8800 FS1J4TP
1% 1% 1% MAX8725ETI

CHG_CCS

1.588V
CHG_GND
0.188V 2.991V

2.5341V

3/6 change for AD_IINP C8815 4/4 deleted by EE


0.047UF/50V
3S2P/3S3P only 4/4 MLCC/+/-10%
deleted 1%
R8819 R8806 R8801
30KOhm 97.6KOhm 20KOhm TPC28T
B B
1% 1% 1% 0306 +5VSUS
T8820

+2.5VREF

90W->30K Ohm PKPRES#


65W->137K Ohm PWRLIMIT# 3,30
R8824 U8801
Q8805A 107KOhm LMV321IDBVR
UM6K1N C8807 1% D8804 Q8808B
2 1UF/10V AD_IINP 1 V+ 1SS355 UM6K1N
30 PRECHG +
MLCC/+80%-20% 4 2 1 5
3 -
V-
Q8805B C8821
UM6K1N 0.1UF/25V 1 2
30 CHG_EN# 5 4/4 deleted 0.1UF/25V R8825 R8826
C8820 143KOhm 560KOhm
R8804 1% 1% @ 47UF/6.3V
10KOhm C8818
MAX8725_LDO 1 2 C8819 MLCC/+/-20%
0.1UF/25V
AC_APR_UC

MAX8725_LDO
R8810
100KOhm
PKPRES#
1%
R8814
100KOhm
Q8806B 1%
UM6K1N Q8804A
5 UM6K1N
2

A A
Q8806A Q8804B
UM6K1N UM6K1N
30 BAT_LEARN 2 60,90 TS1# 5
C8802
0.22UF/10V
MLCC/+/-10%

R8821
470KOhm
Title : POWER_CHARGER
ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
C
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 88 of 95
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : N/A
ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 89 of 95
5 4 3 2 1
5 4 3 2 1

BATTERY IN DETECT +5VO +5VAO ADAPTER IN DETECT


TPC28T
T9002

BAT1_IN_OC# 22,30

Master Battery: BAT1_IN_OC#


D Second Battery: BAT2_IN_OC# A/D_DOCK_IN D

R9002
100KOhm TPC28T
R9001 r0402 T9003
100KOhm Q9000B R9004
r0402 5 22,30 AC_IN_OC# 243KOhm
UM6K1N 1%
3
C
B 1
Q9000A
2 UM6K1N Q9001 E
60,88 TS1#
PMBS3904 2 R9003 C9002
10.2KOhm 0.1UF/25V
1% MLCC/+80%-20%

C9003
1000PF/50V
Master Battery: TS1# MLCC/+/-10%

Second Battery: TS2#

C C

+2.5VREF

B B

+5VO

TPC28T
T9000

R9000
TPC28T 1KOhm
T9001
+2.5VREF

U9001
MM1431ANRE
3 @
C9000 U9000 C9001 3 4
1UF/10V LM4040BIM3 1UF/10V CATHODE REFERENCE
2 SUB
MLCC/+/-20% MLCC/+/-20% 1 5
NC ANODE
5/7 change PN 5/7 change PN

A A

U9000 & U9001 colay

Title : POWER_DETECT
ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 90 of 95
5 4 3 2 1
5 4 3 2 1

SUSB#_PWR POWER
SUSC#_PWR POWER

TPC28T TPC28T TPC28T TPC28T


3/16 delete +1.5VS from load switch T9111 T9133 T9126 T9108

+3VO +3V
D DRAIN_1 Q9103 FDW2501NZ_NL
(3.95A) D
DRAIN_2
1 8 C9106 3/16 change
SOURCE_1 SOURCE_3 0.1UF/25V
2 7 MLCC/+/-10%
3 6
SOURCE_2 SOURCE_4 R9109 0Ohm
4 5 2 1
GATE_1 GATE_2

TPC28T TPC28T
T9117 T9132
3/14 delete +VRAM TPC28T TPC28T
T9124 T9113
+5VO
DRAIN_1
1
DRAIN_2
8
+5V (2A)
SOURCE_1 SOURCE_3 R9110 0Ohm
2 7 2 1
3 6 C9113
SOURCE_2 SOURCE_4 0.1UF/25V
4 5 C9105 MLCC/+/-10%
GATE_1 GATE_2 0.033UF/16V
Q9101 FDW2501NZ_NL MLCC/+/-10% R9106
TPC28T 22KOhm TPC28T
T9120 1% T9112
TPC28T TPC28T UMC4N
T9104 T9118 Q9108
DRAIN_1 FDW2501NZ_NL DRAIN_2 TPC28T TPC28T +12VSUS
+12V (0.01A)
1 8 T9109 T9114 TPC28T
C +3VO C
T9119
SOURCE_1 SOURCE_3 3/14 add
2
3
7
6
(5.348A)
+3VS
SUSC#_PWR
C9102
SOURCE_2
4
SOURCE_4
5 0.1UF/25V
3/16 change
GATE_1 GATE_2 R9108 0Ohm MLCC/+/-10%
2 1
TPC28T TPC28T Q9107
T9105 T9115 C9104
0.1UF/25V
Q9106 MLCC/+/-10% TPC28T TPC28T
DRAIN_1 DRAIN_2
+5VO 1 FDW2501NZ_NL 8 T9101 T9127
SOURCE_1 SOURCE_3
2
3
7
6
+5VS (3.068A)
SOURCE_2 SOURCE_4 C9107
4 5 0.1UF/25V
GATE_1 GATE_2 R9107 0Ohm MLCC/+/-10%
2 1

C9109
0.033UF/16V
3/16 delete +1.5V
TPC28T MLCC/+/-10% R9112 TPC28T
T9128 47KOhm T9102
UMC4N 1%

+12VSUS
TPC28T
+12VS (0.01A)
T9129

B SUSB#_PWR R9102 B
100KOhm
1%

Q9105
TPC28T TPC28T TPC28T TPC28T
4/12 rename
T9141 T9142 T9140 T9130 TPC28T
T9131 R9105
1KOhm
+1.8VO +1.8VS (0.272A) 1 2
30,43,57,92 SUSB_EC#
TPC28T
T9135
Q9109
SI3456BDV 70,81,82,83,84,93 SUSB#_PWR
C9108
0.1UF/25V
MLCC/+/-10%
R9113 0Ohm TPC28T
2 1 T9121
R9104
1KOhm
30,57 SUSC_EC# 1 2
TPC28T
T9134

83,93 SUSC#_PWR

A A

Title : POWER_LOAD SWITCH


ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 91 of 95
5 4 3 2 1
5 4 3 2 1

D D

POWER GOOD DETECTER

+3VO +3VS
EC
SUSB_EC# ALL_SYSTEM_PWRGD 30
4/12 rename

30,43,57,91 SUSB_EC#

FORCE_OFF# 81

D9200 R9201
83 DDR_PWRGD 1 2 1SS355 560KOhm
C +3VO C
R9202
0Ohm
r0402_h16 U9200 Q9200B
30,81 SUS_PWRGD 2 1 1 A VCC 5 T9200 5
TPC28T UM6K1N
D9201 2 B
1SS355 UM6K1N
82 1.05V_1.5V_PWRGD 1 2 3 GND 4 2
R9203 Y Q9200A
0Ohm NC7SZ08P5X C9200
r0402_h16 4.7UF/6.3V
70 PWR_OK_VGA 1 2 MLCC/+/-10%
R9204
0Ohm
r0402_h16

84 PCIE_OK 1 2
R9208
0Ohm
r0402_h16

+3VS

R9207
100KOhm
r0402

B 30,32,80 VRM_PWRGD B

A A

Title : POWER_PROTECT
ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 92 of 95
5 4 3 2 1
5 4 3 2 1

AC_BAT_SYS_INV AC_BAT_SYS_INV 45,88

AC_BAT_SYS AC_BAT_SYS 70,80,81,82,83,88


D
BAT BAT 88
FOR POWER TEST D

BAT_CON BAT_CON 60,88

+2.5VREF +2.5VREF 84,88,90

+3VA +3VA 20,30,56,57,81 JP9300


+3VA 1 1 2 2 CPU_VRON_PWR 80
+5VAO +5VAO 81,84,90
SGL_JUMP
+5VO +5VO 81,82,83,84,90,91 @

+5VSUS +5VSUS 23,31,81,88 JP9301


1 2 SUSB#_PWR SUSB#_PWR 70,81,82,83,84,91
1 2
+5V +5V 15,44,45,56,57,63,65,66,70,91
SGL_JUMP
+5VS +5VS 22,23,31,36,37,46,48,50,51,56,57,63,80,91 @

+3VO +3VO 81,91,92


JP9302
+3VSUS +3VSUS 22,23,33,81 1 2 SUSC#_PWR SUSC#_PWR 83,91
1 2

+3V +3V 35,43,45,53,57,61,62,64,91 SGL_JUMP


@
+3VS +3VS 7,8,11,15,21,22,23,29,30,32,33,36,37,40,41,42,43,44,45,46,47,48,50,51,53,56,57,58,62,63,64,65,66,67,70,80,91,92

+5VA +5VA 56,63,81 JP9303


1 2 VSUS_ON VSUS_ON 30,81
C 1 2 C

+12VSUS +12VSUS 81,84,91 SGL_JUMP


@
+12V +12V 42,91

+12VS +12VS 37,45,46,70,91

+1.8VO +1.8VO 83,91

+1.8V +1.8V 7,8,9,11,14,15,57,83

+1.8VS +1.8VS 38,57,66,70,91

+0.9VS +0.9VS 9,57,70,83

+0.9VO +0.9VO 83

+1.05VO +1.05VO 80,82

+VCCP +VCCP 3,4,5,10,12,14,15,20,23,29,57,82

+1.5VO +1.5VO 82,84

+1.5VS +1.5VS 4,15,21,23,43,53,57,58,64,70,82


B B

+VCORE +VCORE 4,5,80

+1.25VS +1.25VS 11,15,23,57,84

A A

Title : POWER_SIGNAL
ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 93 of 95
5 4 3 2 1
5 4 3 2 1

UMC4N +12V (10mA)


SUSC#_PWR (SWITCH)
AC_BAT_SYS +12VSUS
D UMC4N +12VS (10mA) D

MIC5235 SUSB#_PWR (SWITCH)


VSUS_ON

+2.5VO
CM8562 +2.5VSUS (0.21A)

+3VSUS (0.489A)
SUSC#_PWR (4.15A)
PMN45EN +3V
+3VO SUSB#_PWR
FDW2501 +3VS (4.979A)

LM4040BIM
TPS51020 (Regulator) +2.5VREF (10mA)
+5VSUS (0.001A)
VSUS_ON
+5VO SUSC#_PWR
C FDW2501
+5V (2A) C

FORCE_OFF#
SUSB#_PWR
FDW2501 +5VS (4.068A)
+5VAO +5VA (0A)
+3VAO +3VA (0.15A)
SUS_PWRGD

SUSB#_PWR SI4800 +1.5VS (4.755A)


VSUS_ON +1.5VO
+1.5VSUS (0.51A)
+5VO ISL6227 +1.05VO
SUSB#_PWR +VCCP (9.781A)
1.05V_1.5V_PWRGD

B
SUSB#_PWR
SI2304BDS +1.5V (0.05A) B

SUSB#_PWR
FDW2501 +VRAM (4.81A)
+1.8VO
SUSC#_PWR +1.8V (9.5A)
+0.9VO +0.9VS (1A)
MAX8632
+5VO DDR_PWRGD SUSB#_PWR
PMN45EN +1.8VS (0.623A)
SUSB#_PWR

SUSB_PWR +VGA_VCORE_O
+VGA_VCORE (19.05A)
+1.25VO
MAX8743 +1.25VS (1.925A)
+5VO
SUSB#_PWR PWR_OK_VGA
+1.2VSP (1.748A)

A A

+5VS
ISL6262A +VCORE (44A)
CPU_VRON
VR_VID0~VR_VID6, H_DPRSTP#, VRM_PWRGD,CLK_EN#
MCH_OK, PM_DPRSLPVR,PM_PSI#,
VCCSENSE,VSSSENSE,STP_CPU#, Title : POWER_FLOWCHART
PWR_MON
ASUSTeK COMPUTER INC. NB Engineer: Gary Lin
Size Project Name Rev
Custom
M50S/X55S 1.0
Date: Monday, September 03, 2007 Sheet 94 of 95
5 4 3 2 1
5 4 3 2 1

I/O Board
USB Port 0
+5V_USB_IO
IOJ102
R1.1-17 IOJ101 +5V_USB_IO 1 8
+3VS_IO USB_PN0_IO 1 P_GND4
1 1 2 2 P_GND3 7
2 21 + USB_PP0_IO 3 6
2 SIDE2 IO_CE01 IO_C101 3 P_GND2
3 3 4 4 P_GND1 5
USB_PN0_IO 4 47UF/6.3V 0.1UF/16V
USB_PP0_IO 4 USB_CON_1X4P
D 5 5
D

USB_PN1_IO
6 6 GND_IO
2.0-24 GND_IO
7 7
USB_PP1_IO 8 GND_IO GND_IO
8
9 9
HP1_JD_IO 10
HP1_R_IO 10
11 11
HP1_L_IO 12
SPDIF_JD_IO 12
13 13
SPDIF1_OUT_IO 14
HP2_JD_IO 14
15 15
HP2_R_IO
HP2_L_IO
16
17
16 USB Port 1
MIC_JD_IO 17
18 18
MIC_IO 19 22
19 SIDE1 IOJ103
20 20 +5V_USB_IO 1 8
USB_PN1_IO 1 P_GND4
WTOB_CON_20P R1.1-31 + USB_PP1_IO
2 2 P_GND3 7
3 3 P_GND2 6
GND_IO GND_IO IO_CE02 IO_C102 4 5
47UF/6.3V 0.1UF/16V 4 P_GND1
USB_CON_1X4P

GND_IO
2.0-24 GND_IO
GND_IO GND_IO

C C
Headphone &
HP1_IN#_IO
S/PDIF Jack
R1.1-17 JACK_IN#_IO
IOJ104
6
HP1_R_IO IO_R105 1 2 0Ohm HP1_R_CON_IO 1
SPDIF_JD_IO HP1_L_IO IO_R106 1 2 0Ohm HP1_L_CON_IO 4
+5V_USB_IO +5V_USB_IO +3VS_IO +3VS_SPDIF_IO 5
3 IO_C103 IO_C104
D
IO_Q03 100PF/50V 100PF/50V 7
UMC4N 2N7002 @ @ 11
IO_R112 IO_R113 11 12
100KOhm 100KOhm G +3VS_SPDIF_IO
2 S A GND 9
IO_R107 1 2 0Ohm B VCC MS 10
HP1_JD_IO HP1_IN#_IO SPDIF1_OUT_IO IO_R108 1 2 0Ohm SPDIFOUT_IO C Vin
IO_Q01A IO_Q01B GND_IO
UM6K1N UM6K1N IO_C105 IO_C106 PHONE_JACK_8P
JACK_IN#_IO 0.1UF/16V 100PF/50V
2 5 @
IO_Q02

GND_IO GND_IO GND_IO

R1.1-17

B
Headphone Jack B

IOJ105
HP2_JD_IO 5
4 7
HP2_R_IO IO_R109 1 2 0Ohm HP2_R_CON_IO 3 R 8
6 9
HP2_L_IO IO_R110 1 2 0Ohm HP2_L_CON_IO 2 10
1 L
IO_C107 IO_C108 AUDIO JACK
100PF/50V 100PF/50V PHONE_JACK_6P
@ @
Left Screw Hole Right Screw Hole
IO_H1 IO_H2

1 6 1 6 GND_IO
NP_NC1GND5 NP_NC1GND5
2 NP_NC2GND4 5 2 NP_NC2GND4 5
3 4 3 4
GND2 GND3 GND2 GND3
MIC In Jack
GND_IO GND_IO GND_IO GND_IO
2DRILL_D110N_D85N DO85X104N_D110N IOJ106
MIC_JD_IO 5
4 7
3 R 8
6 9
MIC_IO IO_R111 1 2 0Ohm MIC_CON_IO 2 10
1 L
IO_C109 AUDIO JACK
100PF/50V PHONE_JACK_6P
@
A A

GND_IO

Title : USB & Audio Jack


ASUSTeK COMPUTER INC. NB1 Engineer: Wenchi_Shen
Size Project Name Rev
Custom M50S/X55S 2.0
Date: Monday, September 03, 2007 Sheet 95 of 96
5 4 3 2 1
5 4 3 2 1

Rev Date Description


Rev Date Description
11.For cost down, change CE3701~CE3704 to 47UF. And after EA test, these
R1.0 First Release! can pass Vista audio criteria. Page 37.

R1.1 ** Merge IO board into main board PCB. Page 95. 12.With EMI's confirmation, remove reserved 1394 common choke circuit.
01.Remove VR_VID[6:0] testing series 0 0hm. Page 4. Page 41.
Green
D Block 02.Change 6pcs +VCORE capacitors to No-Stuff for cost down. Page 5. 13.With EMI's confirmation, remove reserved NewCard USB common choke D

03.Change 3pcs +0.9VS capacitors to No-Stuff for cost down. Page 9. circuit. Page 43.

04.Change N1Sv USB port to follow N2Sv, and modify USB_OC#. Page 21,43,45. 14.Add NewCard debug card co-layout circuit. Page 44.
05.PM Request: Change Bluetooth LED tp E-Mail LED. Page 22,56. 15.EMI modification: change reserved common choke circuit from USB port
06.Follow Intel to change C2304 to 1uF/16V(XR). Page 23. to internal camera port. Page 45.

07.Follow R1E to change R2904 to 270ohm. Page 29. 16.With EMI's confirmation, replace RX4603, RX4604 with JP4601, JP4602.
08.Follow IT8752/8512 EC Common Hardware Pin Assignment v0.005, change Page 46.
GPE7 to INSTANT_ON# and GPG0 to PM_THERM#. Page 30. 17.HDMI jack detection modification. Page 48,70.
09.PM REquest: Remove USB port charger function. Page 30,65. 18.With EMI's confirmation, replace RX4809, RX4810 with JP4801, JP4802.
10.PM change WWAN LED to touch-pad lock LED. Page 30,56. Page 48.

11.Change IR to 36KHz to meet Vista remote control Min. range requirement. 19.Change PWM FAN capacitors to 10UF. Page 50.
Page 31. 20.Modify X55S power LED design. Page 56.
12.Remove testing 2nd CIR design. Page 31. 21.Modify DC_IN bead for 120W design. Page 60.
13.Change X3301 to 49S type for cost down. Page 33. 22.With EMI's confirmation, remove reserved e-SATA/USB combo port USB
14.LAN chip version change. Page 33. common choke circuit. Page 66.

C
15.Audio codec chip change version. Page 36. 23.Reserve R8023 for shortage issue of ISL6262A. Page 80. C

16.N1Sv/X55 will not supprot 3G function. Page 36,67. 24.QTR USB plug test failed, change USB connector. Page 95.
17.Add S/PDIF & HDMI jack detect by Realtek sugesstion. Page 36,65,70,95.
18.Modify audio de-pop circuit. Page 36,37.
19.Modify LVDS power sequence failed bug. Page 45.
20.Modify LCD abnormal display bug due to LVDS pair mismatch. Page 45,70.
21.Remove HDTV support function. Page 47,70.
22.Remove HDMI EMI filter design. Page 48.
23.X55 need two pwer LEDs. Page 56.
24.PM change WLAN LED to RF LED. Page 56,63.
25.Bluetooth pin define error. Page 61.
26.Remove co-layout sequence logic control circuit. Page 68.
27.ME change parts: J3401,J5102,J6002,J6501. Page 34,51,60,65.
28.EMI modification. Page 34,36,65.
29.Crystal accuracy fine-tune. Page
30.USB droop test fail. Page 65.
B B
31.Remove IO board USB common choke design. Page 95.
32.Speaker fine-tune. Page 37.
33.Cost down for 4-wire PWM fan. Page 50.
34.Cost down: Change RB717F to BAT54AW. Page 37,45,48,56.

R2.0 01.Change +1.25VS_MPLL, +1.25VS_PEGPLL & +1.8V_SM_CK PLL design. Page 15.
Pink 02.Add CMOS crack protection circuit. Page 22.
Block 03.Reserve C2337 (10UF/16V) for +5VREF_ICH. Page 23.
04.Change ICS9LPR363 version from D to E for SATA clock jitter improve.
Page 29.

05.With EMI's confirmation, replace R2901, R2905, R2906 with short-pad


JP2901, JP2902, JP2903. Page 29.

06.With EC's confirmation, change ITE8752 P/N to 06G042016011. Page 30.


07.With EMI's confirmation, replace R3001 with short-pad JP3002. Page 30.
08.With EMI RD's confirmation, remove reserved LAN common choke circuit.
Page 34.
A A

09.With EMI's confirmation, change R3612, R3614, R3615, R3616, R3622,


R3624, R3626 to short-pad JP3601~JP3607. And change R3611, R3613, R3623,
R3625 to No-Stuff. Page 36.

10.Post wave sounds abnormal when audio amplifier use GMT G1431. Change Title : Revision History
C3706 to 0.33UF to shorten audio amplifier start-up time. Page 37.
ASUSTeK COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom M50S/X55S 1.0
Date: Wednesday, September 05, 2007 Sheet 96 of 96
5 4 3 2 1

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