1
Modern Techniques to Study Voltage Regulator – DG
Interactions in Distribution Systems
Lj. A. Kojovic, Senior Member, IEEE∗
Abstract– This paper presents modern techniques to study
step voltage regulator (SVR) – distributed generation (DG)
interactions in distribution systems using electromagnetic
transient programs. Digital models represent physical
characteristics of both SVR and DG and the associated control
systems. These modeling techniques may effectively simulate
realistic aspects of SVR and DG real time operations.
Index Terms–Distributed Generation, Dispersed Generation, Step
Voltage Regulator, Computer Simulation, Matlab, Altia Design
I. INTRODUCTION
Distributed generation (DG) may improve the electric
distribution system reliability when properly integrated with
the existing grid. However, the addition of DG may
complicate protection coordination and voltage control. If not
properly handled, lower reliability and even a reduction in
power quality may result.
Criteria for DG integration into existing distribution grids has
been defined by Standards [1] which provide requirements
relevant to the performance, operation, testing, safety
considerations, and maintenance of DG interconnections.
However, Standards do not provide methods for determining
practicality, or whether the distribution system has
appropriate current and voltage ratings, and other relevant
characteristics to allow interconnection. Standards do not
prescribe methodologies for determining system limitations
or DG unit protection and operating requirements. To
optimize DG integration into a distribution system adequate
computer modeling techniques are needed.
This paper presents methodology to study DG and step
voltage regulator (SVR) operations for improved distribution
system voltage regulation. Section II discuses general
requirements for voltage regulation specified by IEEE
Standards. Section III describes modeling techniques for SVR
and different types of DG. Section IV presents the impact on
voltage profile depending on DG location in the distribution
system. Finally, Section V presents DG–SVR operation
coordination.
∗
Ljubomir A. Kojovic is with Cooper Power Systems, 11131 Adams Rd., Franksville, WI 53126 USA, e-mail: Ljubomir.Kojovic@CooperIndustries.com
978-1-4244-1904-3/08/$25.00 ©2008 IEEE
II. DG STANDARDS
IEEE Standard [1] specifies the requirements for
interconnecting distributed resources (DR) to electric power
systems (EPS) that shall be met at the point of common
coupling (PCC), although the devices used to meet these
requirements can be located elsewhere. Interconnected DR
shall not actively regulate the voltage at the PCC. The DR
shall not cause the Area EPS service voltage at other Local
EPSs to go outside the requirements of ANSI C84.1-1995,
Range A [2].
To minimize the impact on the system voltage, utilities prefer
DG to operate using the unity power factor control mode.
However, even if DG operates in unity power factor mode, it
can impact the system voltage. Traditionally, voltage
regulation practice has been based on radial power flow from
the substation to the load. Most SVRs are equipped with a
line drop compensation (LDC) feature to estimate line
voltage drop and regulate its output voltage to maintain
proper voltage at the load location. If DG is located
immediately downstream of a SVR, it may interfere with the
proper operation of the SVR. This occurs when the feeder is
heavily loaded and DG generates a significant fraction of the
load current. The SVR will sense relatively low load current,
causing the SVR to adjust its output voltage to lower
magnitude than needed to maintain adequate voltages at the
end of the feeder. The line voltage drop from the DG location
to the load center still reflects heavy loading, but the SVR
output voltage has not been increased because of the low load
current sensed by the SVR. As a result, low voltage
conditions may occur at the load center. DG can cause high
voltages in situations such as when connected at the feeder
end under light load conditions, or when connected to a
distribution transformer that serves several other residences
and introduces reverse power flow, counteracting the normal
voltage drop.
DG voltage regulation is referenced to the system voltage.
Since SVRs regulate the system voltage, adequate DG–SVR
operation coordination is important to maintain proper
voltages at the feeder and its load.
 2

III. MODELING TECHNIQUES
A. Step Voltage Regulators
Distribution step-type voltage regulators (SVR) are used to
maintain constant voltage for individual customers. SVRs
hold line voltage within predetermined limits and ensure
consumer voltage magnitudes specified by Standards [2]. The
SVR is an auto-transformer with many taps, usually designed
to regulate voltages in the range ±10%, in 32 steps, with 5/8
percent voltage change per step. Two types of SVR
constructions are defined by the C57.15 standard from the
Institute of Electrical and Electronic Engineers (IEEE): Type
"A" has the series winding located on the load-side, while
the Type "B" has the series winding located on the source-
side. The SVR short circuit impedance is small (less than 1%)
and in many short-circuit studies may be neglected.
Series
winding
neutral are required. SVRs regulate voltages independently in
each phase. Most distribution systems in the USA are of this
type.
Three-wire ungrounded or uni-grounded systems are common
outside of the USA. In these systems, loads are connected
phase-to-phase requiring SVRs to be connected in open or
closed delta arrangement. SVRs cannot regulate voltages
independently from each other like in four-wire, multi-
grounded systems. This means by regulating voltages in one
phase, voltages on one of the other phases will also change.
By regulating two phases ±10% with two open delta-
connected regulators, the third phase is also regulated ±10%.
By regulating all three phases ±10% with three closed delta
connected regulators, the voltage on all phases will change
±15% .
SVR
output
Vsource voltage
Vload
Feeder
CT R, X
Load

SW SVR Control

Step PT R, X LDC
Shunt
Voltage Algorithm
Source winding Load Regulator
Side Side

Figure 2 Step Voltage Regulator, Type A

Figure 1 Step Voltage Regulator – Type A

SVR models presented in this paper are developed using the

Some consumers can be far from the regulator location, and Matlab™, Simulink, and SimPowerSystems Toolbox. One
due to the line voltage drop, voltages at the load location can modeling approach is to use a two winding transformer
be below a specified minimum level. To maintain the voltage model element as shown in Figure 3. The SVR series winding
magnitude at the remote end within a specified maximum and taps were represented by changing the transformer ratio as an
minimum limit, the SVR estimates the line voltage drop and input parameter inside the transformer model element. The
regulates its load side voltage accordingly. This can SVR short circuit impedance is then self adjusted based on
effectively be performed by the line drop compensation the tap position.
(LDC) feature, which is an integral part of the voltage Shunt Series
regulator control (see Figure 2). To use LDC, the line current Source winding winding Load
Side
is measured by the voltage regulator’s internal current Side

transformer in conjunction with the measured load side

voltage. Based on this secondary current, the load side
Tap position
voltage and the line R and X parameters, the control derives adjusted inside
the line voltage drop, active and reactive components, and the SVR model

makes “decisions” to correct the voltage magnitude.

During reverse power flow, the LDC must have adequate
control algorithms to properly perform voltage corrections.
The reverse power flow may result from loop feed setups,
switching operations that reconfigure the feeder, or it may be
due to DG supplying power back to the substation. There are
several Reverse Power Flow modes of operation presently
available in modern SVR controls. The impact of DG varies
with each of them.
The SVR connection and number of units depends on the
distribution system design. In four-wire, multi-grounded
systems, three wye-connected regulators with a grounded
Figure 3 Matlab SVR Model
Another method to model the SVR is to use a multi-winding
power transformer model element. Circuit breaker model
elements perform switching of the SVR series winding taps.
This modeling technique is effective to simulate real time
SVR operation by implementing the SVR control model as
well as the LDC algorithms. The SVR’s bandwidth (low and
high voltage magnitudes) can be set to desired range and this
model will automatically run until the SVR tap is selected to
satisfy the set parameters.
 3

Test Case: Figure 4 shows a single-phase circuit diagram of a previous case. Figure 7 shows a snapshot of the model
distribution system consisting of a power system source display for 1.0 p.u. source voltage. This time the SVR raised
equivalent model, feeder, SVR located at the beginning of the the voltage and stopped at the highest tap (Tap 16) increasing
feeder, and load. Figure 5 shows Matlab model that also the voltage at the load to 0.98 p.u. Even though the set
includes the SVR tap position indicator and metering voltage/bandwidth was not reached, the load voltage is within
displays. The system voltage is 7200 V, bandwidth ±1.2 V the specifed standard limits. When the source voltage
based on 120 V (0.99 p.u. low and 1.01 p.u. high voltage increased to 1.04 p.u., the SVR tapped down to bring the load
magnitudes). voltage within the bandwidth. Figure 8 shows that the load
voltage is within the voltage limits most of the time. LDC
Power System SVR Feeder Load setting for VR and VX:
0.2 Ω j2 Ω
CTprimary 400
VR = R = 0.2 = 1.33
PTratio 7200
120
CTprimary 400
7200 V
VX = X =2 = 13.3
Figure 4 Voltage Regulation using SVR PTratio 7200
120
1833.23 1808.00 1.1
P [kW ] P [kW]
1576.27 Q [kvar ] 1348.88 Q [kvar]
p.f. p.f.
1.08
0.76 0.80
V [p.u.] V [p.u.]
1.00 0.93 1.06
I [A] I [A] Upper Voltage
336.00 336.00
1.04 Limit
Source
1.00 V_out Load
Voltage
1.02

Voltage [p.u.]
Feeder
v2
V 1 Bandwidth

0.98 SVR
Conn1 Output
0.96 Voltage Lower Voltage
Raise Lower Limit
Power System Tap 16 0.94
0 0 Load
Bandwidth 0 0 0.92 Voltage
High 1.01 0 0
Low 0 0 0.9
0.99 TAP_1 TAP_2 0
0 0 Time
TAP_4 Vn = 7.2 [ kV]
0 0 Figure 6 Computer Simulation of SVR Operation without LDC
0 0
Tap 2 0 0 1 TAP_0 2018.62 1989.94
P [kW] P [kW]
Neutral Tap 1736.91 Q [kvar ] 1484.62 Q [kvar]
p.f. p.f.
Figure 5 Computer Model from Figure 4 (LDC not Engaged) 0.76
V [p.u.]
0.80
V [p.u.]
1.00 0.98
I [A] I [A]
371.00 353.00

Without LDC (Disabled). In this case, the LDC feature was 1.05 V_out Load

NOT enabled so the SVR cannot estimate the voltage drop on v2

Feeder
V
the feeder and will regulate its output voltage according to
the set voltage value and bandwidth. To compare the SVR Conn1
voltage regulations with and without the LDC, simulations Raise Lower
presented here start with 1.0 p.u. source voltage magnitude, Power System Tap 16
16 0

then the source voltage has a step change to 1.04 p.u., and Bandwidth 0
0
0
0
then returns back to 1.0 p.u. High
Low
1.01
0.99 TAP_1
0 0
TAP_2
0 0
0 0
At 1.0 p.u. source voltage, the voltage at the load is 0.93 p.u. TAP_4 Vn = 7.2 [k V]
0 0

because of the voltage drop on the feeder. Without LDC the Tap 2 0 0 0 TAP_0
Neutral Tap
SVR will not increase its secondary voltage since the SVR Figure 7 Computer Model from Figure 4 (LDC Engaged)
load side voltage is within the bandwidth. When the source 1.1
SVR
voltage increased to 1.04 p.u., the SVR tapped down to bring 1.08 Output
its secondary voltage back within the bandwidth. When the 1.06
Voltage
Upper Voltage
source voltage decreased to 1.0 p.u., the SVR raised the 1.04 Limit
Source
voltage back within the bandwidth. Without LDC, the load Voltage
Voltage [p.u.]

1.02
voltage was below the lower voltage limit for most of the 1 Bandwidth
time. This demonstrates that the SVR without LDC cannot 0.98 Load
provide satisfactory voltage regulation. Figure 5 shows a 0.96
Voltage
Lower Voltage
snapshot of the model display for 1.0 p.u. source voltage. Limit
0.94

0.92
LDC Enabled. In this case, the LDC feature was enabled so
0.9
the SVR can estimate the voltage drop on the feeder and 0
Time
accordingly regulate its output voltage. The power system Figure 8 Computer Simulation of SVR Operation with LDC Engaged
conditions and setting parameters are the same as in the

B. Generators
Typically, the three types of generators used for DG are as
follows: induction (asynchronous) generators, synchronous
generators, and voltage-sourced converters.
Induction Generators are typically small because their
excitation is provided by an external source of reactive
power. Induction generators do not require synchronizing
with the grid and provide damping when operating with the
grid because of the slip speed, the difference in speed
between the rotor and stator magneto-motive force. The
natural slip is smaller in large induction generators, resulting
in a smaller damping effect and the impact on the grid
becomes similar to that of synchronous machines. Induction
generators are used in all fixed speed, grid-connected wind
turbines and in smaller hydro power plants. Induction
machines can generate real power, but require a source of
reactive power, which in some cases is provided by the utility
system. These generators can contribute fault current for only
a few cycles for faults on the utility system.
The induction machine model operates in either generating or
motoring mode. The electrical part of the machine is
represented by a fourth-order state-space model and the
mechanical part by a second-order system. All stator and
rotor quantities are in the q-d axis reference frame.
Synchronous Generators consist of a stator and rotor.
Armature winding is located on the stator, connected to the
grid. Excitation comes from a field winding located on the
rotor, fed from a DC source. In some designs, a permanent
magnet is used for excitation. In normal operation, the rotor
rotates synchronously with the magneto-motive force
developed by the stator with its relative angle, the load angle,
determined by the torque applied to the shaft. They can
generate both real and reactive power. They require a
synchronizing relay to be paralleled with the utility grid.
These generators can provide sustained fault current for faults
on the utility system.
The synchronous machine model represents the dynamics of
a three-phase round rotor or salient-pole synchronous
machine. The model simulates both generating and motoring
modes. The electrical part of the machine is represented by a
sixth-order state-space model. The model takes into account
the dynamics of the stator, field and damper windings. The
equivalent circuit of the model is represented in the rotor q-d
axis reference frame. The rotor is simulated as a salient-pole
or round (cylindrical) type.
Voltage-Sourced Converters. To simulate operation of
voltage-sourced converters (VSC) the Universal Bridge block
from the model library may be used. This block implements a
universal three-phase power converter that consists of up to
six power switches connected in a bridge configuration. The
types of power switch and converter configuration are
selectable from the dialog box. The Universal Bridge block
allows simulation of converters using both naturally
4
commutated (line-commutated) power electronic devices
(diodes or thyristors) and forced-commutated devices (GTO,
IGBT, MOSFET).
Controlled Voltage Source is a simplified modeling method
that can be used to effectively simulate DG operation without
representing the DG inertia and response time. Voltage
magnitude and phase angle can be independently controlled.
C. Visualization of Computer Simulations
To visualize the power system operation, virtual simulations
of real and reactive power flow control was developed based
on the Altia Design program. The Altia program overlays
Matlab and allows real time control of all programmed
components. Control of real and reactive power flow can be
performed by virtually pushing (clicking by mouse) the
control batons interfaced with Matlab. One baton may control
voltage source phase angle, to predominantly control the real
power flow. The second baton may control the generator
excitation to predominantly control the reactive power flow.
Load switching can be performed during simulations as well
as DG synchronization with the power system.
IV. DG LOCATIONS ON DISTRIBUTION SYSTEM
Figure 9 shows three DG locations on a radial feeder to
simulate the impact on the system voltage. No SVR is
considered at this time. The feeder power consumption (total,
real, and reactive power) is shown in Table 1 and Figure 10.
P, Q 1 2 3
Load
R X R X
DG DG DG
Figure 9 Radial Feeder with DG
Table 1 Feeder Power Consumption
P [MW] Q [Mvar] S [MVA] I [A]
3.6 2.9 4.6 462
Figure 10 shows the Matlab model of the power system from
Figure 9. To visualize real and reactive power flow and to
monitor voltage magnitudes at Locations 1, 2, and 3, the Altia
Design model was developed as shown in Figure 11 and
interfaced with Matlab.
Meters at three corners of Figure 11 monitor real and reactive
power coming from the system and/or DG, and real and
reactive power consumed by the load. Three meters in the
middle of Figure 11 show voltage magnitudes at Locations 1,
2, and 3. Two horizontal lines represent the lower and upper
voltage limits.
Test Case #1: Figure 10 and Figure 11 show a test case when
DG is spinning but does not deliver any power. Both real and
 5

reactive power comes from the system. Voltage at Location 3 1.1

due to voltage drop on the feeder is 0.94 p.u., which is below 1.08

the lower limit. 1.06 High Voltage Limit

1.04

Voltage [p.u.]
1.02
DG at Location 3
1
DG
at Loc
0.98 atio
n 2
0.96 Low Voltage Limit

0.94 DG a
t Lo
catio
n1
0.92

0.9
1 2 3
Feeder Location
Figure 12 Voltage Profile on the Feeder for Different DG Locations (DG
providing total real and reactive power)

Figure 10 Matlab Model of a Radial Feeder with DG

Figure 13 Model from Figure 10 Visualizing Real and Reactive Power Flow
(DG provides total power for the load)

Figure 11 Model from Figure 10 Visualizing Real and Reactive Power Flow
(DG spinning, does not deliver any power)

Test Case #2: Figure 12 shows a comparison for DG

connected at three different locations and providing total real
and reactive power for the load. The impact on the voltage
profile is similar to the application of power capacitors.

DG connected at the beginning of the feeder (Location 1) has

almost no impact on the voltage profile. System voltage at
the load is below the specified limit of 0.95 p.u. When DG
was connected at the feeder mid point (Location 2), voltage
was improved up to the DG location. From DG location to
the load, voltage drop on the feeder is the same as without Figure 14 Voltage Magnitudes and Phase Angle between the Power System and
DG
DG. When DG was connected at the feeder end near the load
(Location 3), voltage was improved on the entire feeder.

Figure 13 shows virtual simulations of a DG connected at the

feeder end near the load (Location 3). The Voltage Profile
Graph in the middle of Figure 13 shows that the voltage
profile is almost horizontal because no power comes from the
system. Figure 14 shows that in this case for a DG to provide
full power, phase angle between the system voltage and DG
need to be only 0.04 p.u. and DG excitation 1.03 p.u.
 6

V. DG – SVR OPERATION COORDINATION VI. CONCLUSIONS

DG – SVR operation coordination was simulated using the
same test case from Section IV, a radial feeder with DG
connected as shown in Figure 15. The SVR was located at the
beginning of the feeder. Initial assumption is that no DG is
connected to the feeder. To provide proper voltage at the
load, the LDC must be enabled so the SVR can estimate the
voltage drop on the feeder and additionally increase the
output voltage above the set voltage. Figure 16 shows the
SVR increased the system voltage to 1.04 p.u. to satisfy the
voltage requirements at the load. DG control of real power
delivery did not change. However, to deliver reactive power,
DG excitation voltage must be increased since the system
voltage regulated by the SVR is higher than in the previous
case. When DG operates at unity power factor the impact on
the voltage profile along the feeder is small as shown in
Figure 17.
P, Q 1 2
R
X R
SVR
DG DG
Figure 15 Model to Study DG – SVR Operation Coordination
1.1
1.08
1.06
High Voltage Limit
1.04
1.02
Voltage [p.u.]
When DG is interconnected to the distribution system, it can
impact the system voltage profiles and interact with step-type
voltage regulator (SVR) operation. The computer modeling
technique presented in this paper can effectively simulate the
SVR real time operation, representing in detail the SVR
control and line drop compensation algorithms. All types of
DG generators and controls methods can be modeled. DG–
SVR interactions and operation coordination can be studied
for different system conditions. Simulations can be enhanced
by visualizing operation and control of SVR and DG
components.
VII. REFERENCES
[1] “1547™ IEEE Standard for Interconnecting Distributed
Resources with Electric Power Systems”.
[2] ANSI C84.1-1995 “American National Standard for Electric
3
Power Systems and Equipment – Voltage Ratings (60 Hz)”.
Load
[3] Lj. A. Kojovic, “Modern Techniques for Distribution System
X
Analysis using Electromagnetic Transient Programs”, The 7th
International conference of Power Systems Transients, IPST
2007, Lyon, France, June 4-7, 2007.
[4] Lj. A. Kojovic, “The Impact of Dispersed Generation and
DG
Voltage Regulator Operations on Power Quality”, CIGRE
Symposium – Power Systems with dispersed generation, Athens,
Greece, April 13-16, 2005.
[5] Lj. A. Kojovic, “Modeling Techniques for Studying DG
Interconnections to Distribution Systems”, CIRED, Turin, Italy,
June 6-9, 2005.
DG at Location 3
[6] Lj. K Lj. A. Kojovic, “The Impact of Dispersed Generation and
DG
at Loc Voltage Regulator Operations on Power Quality”, CIGRE

atio
1
DG a
t Loca
n2
Symposium – Power Systems with dispersed generation, Athens,
SVR Regulated Voltage tion
to 1.04 p.u. No D
G
1
Greece, April 13-16, 2005.
0.98

0.96 Low Voltage Limit VIII. BIOGRAPHIES

0.94

0.92 Ljubomir A. Kojovic is a chief power systems engineer for Cooper

Power Systems at the Thomas A. Edison Technical Center. He has a
0.9
1 2
Feeder Location
3 Ph.D. in power systems with specialties that include protective
Figure 16 DG – SVR Operation Coordination (DG providing total real and relaying, distributed generation, testing, digital modeling, and
reactive power) systems analysis. He is an adjunct assistant professor at Michigan
1.1 Technological University, Senior Member of the IEEE Power
1.08
Engineering Society, member of the IEEE Power System Protection
Committee, and member of the International Council on Large
High Voltage Limit
1.06 Electric Systems – CIGRE. Dr Kojovic is a Technical Advisor for
1.04 the US National Committee at the Technical Committee TC-38
Instrument Transformers of the International Electrotechnical
1.02
Commission – IEC. He is a registered professional engineer in
Voltage [p.u.]

DG at
Locati
1 SVR Regulated Voltage
on 3 Wisconsin. He has earned eight U.S. patents and authored more than
to 1.04 p.u. No D
G 150 technical publications.
0.98

0.96 Low Voltage Limit

0.94

0.92

0.9
1 2 3
Feeder Location
Figure 17 DG – SVR Operation Coordination (DG providing total real and
NO reactive power, operates at unity power factor)