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CHAPTER 13
BRIDGE CONVERTERS
13.1 INTRODUCTION
The full-bridge push-pull converter requires four power transistors and extra drive
components. This tends to make it more expensive than the flyback or half-bridge
converter, and so it is normally reserved for higher-power applications.
The technique has a number of useful features; in particular, a single primary
winding is required on the main transformer, and this is driven to the full supply
voltage in both directions. This, together with full-wave output rectification,
provides an excellent utility factor for the transformer core and windings, and
highly efficient transformer designs are possible.
A second advantage is that the power switches operate under extremely well
defined conditions. The maximum stress voltage will not exceed the supply line
voltage under any conditions. Positive clamping by four energy recovery diodes
eliminates any voltage transients that normally would have been generated by the
leakage inductances.
To its disadvantage, four switching transistors are required, and since two
transistors operate in series, the effective saturated “on”-state power loss is
somewhat greater than in the two-transistor push-pull case. However, in high-
voltage off-line switching systems, these losses are acceptably small.
Finally, the topology provides flyback energy recovery via the four recovery
diodes without needing an energy recovery winding.
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BRIDGE CONVERTERS
FIG. 2.13.1 Full-bridge forward push-pull converter, showing inrush limiting circuit and input filter.
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BRIDGE CONVERTERS
particularly suitable for high-power applications and is more fully described in Part
1, Chap. 16.
During the “off” period, under steady-state conditions, a current will have been
established in L1, and the output rectifier diodes D5 and D6 will be acting as
flywheel diodes. Under the forcing action of L1, both diodes conduct an equal share
of the inductor current during this “off” period (except for a small magnetizing
current). Provided that balanced diodes are used, the voltage across the secondary
windings will be zero, and hence the primary voltage will also be zero (after a short
period of damped oscillatory conditions caused by the primary leakage inductance).
Typical collector voltage waveforms are shown in Fig. 2.13.2.
FIG. 2.13.2 Primary voltage and current waveforms for full-bridge converter.
2.106 PART 2
core flux swing in both push-pull and single-ended operation. The range is much
wider in the push-pull case, as the core will not restore to zero, even when all
transistors are turned off, because of the flywheel conduction of D5 and D6 as
follows.
Because D5 and D6 remain conducting during the “off” period, the voltage
across the secondary, and hence across all windings, is zero when the switching
transistors are turned off. As a result, the core will not restore to Br during the “off”
period but will be held at +B̂ or –B̂ . Hence, when the following diagonal pair of
input transistors are turned “on”, the full flux density range of 2B̂ (from –B̂ to +B̂)is
available for use, allowing the transformer to be designed for a lower number of
primary turns. The secondary voltage waveform is shown in Fig. 2.13.2.
This secondary diode clamping effect is lost when the load falls below the
magnetization current (as referred to the secondary). However, this would not
normally be a problem, as under these conditions the “on” pulse would be very
short and ⌬B small.
The design approach for the push-pull transformer is relatively straightforward. The
single primary winding is used for both half cycles of operation, providing extremely
good utility of core and windings.
To minimize magnetization currents, the maximum primary inductance
consistent with minimum turns is required. Consequently, a high-permeability
material will be selected, and the core will not be gapped. (A small core gap is
sometimes introduced if there is a chance of a DC current component in the
transformer, as the onset of saturation is more controllable with a core gap.)
2.108 PART 2
FIG. 2.13.3 Core selection chart for balanced push-pull operation, showing throughput
power as a function of frequency with core size as a parameter. (Courtesy of Mullard Ltd.)
FIG. 2.13.4 Core loss per gram of A16 ferrite as a function of fre-
quency, with peak flux density as a parameter. (Note: Graph is
plotted for peak flux density B̂; flux density sweep ⌬B is 2×B̂.)
(Courtesy of Mullard Ltd.)
Figure 2.13.5 shows, for a pair of EE55–55–21 cores in A16 ferrite at 40 kHz,
how the core, copper, and total losses change as the number of turns is changed and
the peak flux density is increased toward 200 mT. It will be seen that a minimum
total loss occurs near 70 mT. (For each turns example, optimum use of the core
window area and wire gauge is assumed.)
2.110 PART 2
FIG. 2.13.5 A16 ferrite core loss, copper loss, and total loss for a pair of EE55/55/21 cores,
when wound for optimum performance in a typical switchmode transformer. Loss is shown as
a function of the peak flux density. Note that the minimum total loss occurs when the trans-
former induction (turns) is optimized so that the core loss is 44% of the total loss.
In this example, the minimum loss (maximum efficiency) occurs when the core loss
is 44% of the total loss at 70 mT. However, the minimum loss condition has a relatively
wide base, and the choice of peak flux density for optimum efficiency is not critical in
the 50- to 100-mT range. The normal assumed optimum choice (where the copper and
core losses are equal) would be 80 mT, which is not very far from optimum.
For each design there is an optimal flux density swing, depending upon the
operating frequency, the core loss, the topology, and the winding utilization factors.
Figure 2.13.6a, b, and c shows the manufacturers’ peak and optimum flux
density recommendations for optimum transformer designs using the EE55–55–21
and other cores in forward and push-pull applications. From Fig. 2.13.6c (at 40
kHz), the manufacturer’s recommended peak flux density is 100 mT, which is not
far from optimum, and this higher value will be used in this example to reduce the
number of turns.
FIG. 2.13.6 (a) Magnetization curve for N27 ferrite material at 25°C and 100°C.
(Courtesy of Siemens AG.) (b), (c) Optimum peak flux density as a function of
frequency, with core size as a parameter. (Courtesy of Mullard Ltd.)
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BRIDGE CONVERTERS
2.112 PART 2
Note: The derivation of the DC voltage and ripple component is more fully covered
in Part 1, Chap. 6. Hence, at 90 V input, using the voltage doubler connection,
At 40 kHz,
Hence
When the bridge converter is operating at full conduction angle (maximum output),
the primary waveform tends to a square wave. Consequently, the rectified output
tends to DC, and the output voltage will be the secondary voltage less rectifier, choke,
and wiring losses.
Allowing 1 V for all losses, the transformer secondary voltage Vs will be 6 V.
Therefore, the turns for each half of the secondary winding will be
Note: The secondary is normalized to one turn and the primary to 37 turns, giving a
peak flux density slightly higher than 100 mT in this example.
The secondary voltage Vs used for this calculation is the voltage produced at the
minimum line input of 90 V. At this voltage the pulse width is at maximum. At
higher input voltages, the pulse width will be reduced by the control circuit to
maintain output voltage regulation.
To minimize the copper losses and leakage inductance, it is important to choose
the optimum gauge and shape of transformer wire and to arrange the makeup for
minimum leakage inductance between primary and secondary windings. A split-
layer winding technique will be used in this example.
The high-current secondary winding should use a copper strip spanning the full
width of the bobbin (less creepage distance). Suitable winding techniques and
methods of optimizing wire shapes and gauges are more fully covered in Part 3,
Chap. 4.
There will, inevitably, be some imbalance in the forward and reverse volt-seconds
conditions applied to the transformer. This may be caused by differences in storage
times in the transistors or by some imbalance in the forward voltage of the output
rectifier diodes. However it is caused, this imbalance results in the flux density in the
transformer core staircasing toward saturation with each cycle of operation.
Restoration of the core during the “off” period cannot occur, because during this
period the secondary is effectively short-circuited by the clamping action of diodes
D5 and D6, which will both be conducting, under the forcing action of L1 (provided
that the load is above the critical current value for L1).
When the core reaches saturation, there is a compensation effect, as the
transistors which are conducting the higher current on the saturating cycle will have
their storage times reduced, and so a measure of balance will be restored. However,
2.114 PART 2
a problem still exists for transient operation, and this is discussed in the following
section.
Assume that the power supply has been operating for a period under light loading
conditions, staircase saturation has occurred, and one pair of transistors is operating
near the saturated point. If a transient increase in load is now applied, the control
circuit will demand a rapid increase in pulse width to compensate for losses and to
increase the current flow in L1. The core will immediately saturate in one direction,
and one pair of transistors will take an excessive current, with possible catastrophic
results.
If the power transistors have independent fast-acting current limits, then the
“on” pulse will be terminated before excessive current can flow, and failure of the
power devices can be avoided. This is not an ideal solution, since the transient
response will now be degraded.
Alternatively, the slew rate of the control amplifier can be reduced so that the
increase in pulse width is, say, less than 0.2 µs on each cycle. Under these conditions,
the storage self-compensation effect of the power transistors will normally be able to
prevent excessive saturation. However, the transient response will be very much
degraded, once again. Nevertheless, these two techniques are commonly used.
A much better solution to the staircase saturation problem may be applied to the
push-pull bridge circuit shown in Fig. 2.13.1.
If two identical current transformers are fitted in the emitters of Q3 and Q4, the
peak values of the currents flowing in alternate pairs of transistors (and, therefore,
in the primary winding) can be compared alternately on each half cycle.
If any unbalance in the two currents is detected, it acts upon the ramp
comparator to adjust differentially the width of the drive pulses to the power
transistors. This can maintain the transformer’s average working flux density near
the center of the B/H characteristic, detecting any DC offset and adjusting the drive
pulses differentially to maintain balance.
It should be noted that this technique can work only if there is a DC path
through the transformer winding. A capacitor is sometimes fitted in series with the
primary winding to block any DC current; DC transformer saturation is thus
avoided. However, under unbalanced conditions this capacitor will take up a net
charge, and so alternate primary voltage pulses will not have the same voltage
amplitude. This results in a loss of efficiency and subharmonic ripple in the output
filter; further, maintaining balanced transformer currents and maintaining capacitor
charge are divergent requirements, leading to runaway condition. Therefore, this
DC blocking arrangement using a capacitor is not recommended.
The series capacitor Cx must not be fitted if the forced current balancing system is
used, as it will eliminate the detectable DC component, and the circuit will not be
able to operate. This is more fully explained in Part 3, Sec. 6.3.
If the transformer’s working point can be maintained close to its center point, full
advantage can be taken of the working flux density range, giving improved transient
capability without the possibility of transformer saturation and power device
failure.
When current-mode control is used for the primary pulse-width modulation, flux
balancing happens automatically, provided Cx is not fitted. See Part 3, Chap. 10.
13.8 PROBLEMS