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OUT
G577 24 1D8V_S3
16X16
IN
DCBATOUT
1D2V_S0
Side Port
DDRII
North Bridge (32MB) 12
CRT ATi M82ME-XT New Card SYSTEM DC/DC
PCIE x 1 & USB 2.0 x 1 24 40
DVI CONN PCIE X16
ATi RS780M TPS51125
(UMA) 17 DVI VRAMx4 GDDR2 HyperTransport LINK0 CPU I/F
256MB INPUTS OUTPUTS
DX10 IGP PCIE Mini-Card
HDMI CONN HDMI 48,49,50,51,52,53,54 LVDS/TVOUT/TMDS PCIE x 1 & USB 2.0 x 1 802.11a/b/g/n 5V_S5
17 24 DCBATOUT
(discrete) DISPLY PORT X2 3D3V_S5
C CRT CONN 16
CRT Side Port Memory C
CRT MUX
(discrete) 1 X 16 PCIE I/F SYSTEM DC/DC
1 X 4 PCIE I/F WITH SB 44
LVDS
LDO
LCD CONN 15 LVDS MUX 6 X 1 PCIE I/F 10,11,12,13
(discrete/UMA) PCIE x 1 RealTek 10/100/1000 INPUTS OUTPUTS
RTL8111C/8101E 25 RJ45 CONN
26 5V_S5 0D9V_S3
32 Winbond WPC773L
A
G1432Q 34,35
<Variant Name> A
LPC
SPI DEBUG Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
CONN 36 Taipei Hsien 221, Taiwan, R.O.C.
Title
Touch Int. Flash ROM System Block Diagram
Size Document Number Rev
Pad 36 KB36 2MB 35 A3
P1/P15 -1
Date: Wednesday, March 19, 2008 Sheet 1 of 56
5 4 3 2 1
5 4 3 2 1
1 USB1
PCI EXPRESS DESTINATION RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
2 USB2 CONFIGURATION STRAPS 1 = INSTALL 10K RESISTOR
Lane 0 NEW CARD X = DESIGN DEPENDANT
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, NA = NOT APPLICABLE
RSVD = ATI RESERVED
3 CAMERA THEY MUST NOT CONFLICT DURING RESET (DO NOT INSTALL)
Lane 1 WLAN
M8x M7x
STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS
4 NC
Lane 2 LAN BIF_MSI_DIS VIP1 MESSAGE SIGNAL INTERRUPT ENABLED NA 0
5 NEW CARD BIF_AUDIO_EN VIP3 ENABLE HD AUDIO (M7XM and M86M ONLY) Note:1 X X
Lane 3 CARD READER
2.0 &1394
BIF_64BAR_EN_A VIP5 64 BIT BARS DISABLED NA 0
C
Lane 5 NC BIF_AUDIO_EN GPIO8 ENABLE HD AUDIO X RSVD C
( M82M ONLY) Note:2
8 NC BIF_GEN2_EN_A GPIO5 Allows either PCIe 2.5GT/s or 5.0GT/s operation X 0
12 NC MEM_TYPE
ANY UNUSED
GPIO OR DVP MEMORY TYPE,MAKE AND SIZE INFO X X X X X X X X
1.1 THAT ARE NOT
CONFIG STRAPS
13 NC FOR EXAMPLE
DVPDATA20:23
IN THIS DESIGN
B 1394a B
A <Variant Name> A
NOTE 2: HDMI MUST ONLY BE ENABLED
ON SYSTEMS THAT ARE LEGALLY ENTITLED.
IT IS THE RESPONSIBILITY OF THE SYSTEM Wistron Corporation
DESIGNER TO ENSURE ENTITLEMENT 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Table of Content
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 2 of 56
5 4 3 2 1
5 4 3 2 1
SC
3D3V_S0 3D3V_CLK_VDD
R219
1 2
1
0R0603-PAD C488 C489 C493 C491 C495 C480 C473 C456 C458
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
2
3D3V_S0
R197
D 3D3V_CLK_VDD 1 2 3D3V_48MPWR_S0 D
SC4D7U6D3V3KX-GP
1
1
C452 C455
R218 2D2R3J-2-GP SC1U10V2KX-1GP
VDD_REF
DY
1 2
2
0R3-0-U-GP
1
3D3V_S0 C483 C476 3000mA.80ohm
SC10U10V5ZY-1GP
SC1U10V2KX-1GP
R455
1 2
2
0R3-0-U-GP
1D1V_S0 1D1V_CLK_VDDIO
R456
1
0R3-0-U-GP
2 SB
1
1
DY C767 C766 C494 C490 C457 C464 C472 SC33P50V2JN-3GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R206 C475
1 DY 2 1 2
2
2
3D3V_CLK_VDD
1
10MR2J-L-GP
U33 82.30005.951 X-14D31818M-44GP
1D1V_CLK_VDDIO X3
26 61 CLK_X1 C468
2
VDDATIG X1 CLK_X2
25 VDDATIG_IO X2 62 2 1
CL=20pF±0.2pF
48 SC27P50V2JN-2-GP
3D3V_S0 VDDCPU
47 VDDCPU_IO SMBCLK 2 SMBCLK0_SB 8,9,19
1:NORMAL 16
SMBDAT 3 SMBDAT0_SB 8,9,19
VDDSRC
1
C
0:POWER DOWN
R220
17 VDDSRC_IO CLK_PCIE_VGA_R RN29 C
10KR2J-3-GP
11 VDDSRC_IO ATIG0T 30
29 CLK_PCIE_VGA#_R
SB
ATIG0C CLK_NB_GFX_R
35 VDDSB_SRC ATIG1T 28 3 2 CLK_NB_GFX 11
34 27 CLK_NB_GFX#_R 4 1
2
CLK_PCIE_CARD_R SRC3C
28 CLK_PCIE_CARD 4 1 9 SRC4T 2 1
28 CLK_PCIE_CARD# SRN10J-7-GP 3 2 CLK_PCIE_CARD#_R 8 90D9R3F-GP R205
RN26 SRC4C
42 SRC6T/SATAT GNDSATA 43
41 SRC6C/SATAC GNDATIG 24
27M_SS_R
SC SC 27M_NS_R
6 SRC7T/27M_SS GNDDOT 7
B NB ALINK(100MHz) 5 SRC7C/27M_NS GNDHTT 52
B
2 3 CLK_NB_GPPSB_R GNDREF 60
46 3D3V_S0 FAE suggest
11 CLK_NB_GPPSB CLK_NB_GPPSB#_R GNDCPU
11 CLK_NB_GPPSB# 1 4 RN35 37 SB_SRC0T GND48 1
SRN22-3-GP
2 3 CLK_PCIE_SB_R
36
32
SB_SRC0C
10
CLK_NB_14M
18 CLK_PCIE_SB SB_SRC1T GNDSRC
1
RN32 CLK_PCIE_SB#_R
18 CLK_PCIE_SB# 1 4
SRN0J-6-GP
31 SB_SRC1C GNDSRC 18
R202 RS780M 1.1V=(90.9/(90.9+158))*3.3V
RN31 8K2R2J-3-GP DY R208
SB PCIE(100MHz) 2 3 CLK_NBHT_CLK_R 54
GNDSB_SRC 33
8K2R2J-3-GP
11 CLK_NBHT_CLK CLK_NBHT_CLK#_R HTT0T/66M
1 4 53 65
2
11 CLK_NBHT_CLK# SRN0J-6-GP HTT0C/66M GND
* default RTM880N-796-GRT-GP
1
SEL_SATA 1 100 MHz non-spreading differential SATA clock R203 R207
FS1 * R200 DY 33R2J-2-GP 8K2R2J-3-GP DY 8K2R2J-3-GP
0 100 MHz spreading differential SRC clock 27M_NS_R 1 2 27M_NS 49
27MHz non-spreading singled clock on pin 13 and 27M_SS_R 1 2 27M_SS 49
2
SEL_27 1 * 27MHz spread clock on pin 14
FS2 R199 DY 33R2J-2-GP
0 100MHz differential spreading SRC clock
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU / HT3.0
SSID = CPU
D D
1D2V_S0
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
1
1
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
C382 C394 C619 C365 C364 C629 C625
(1.2V)1.5A for VLDT
2
2
U60A
SKT-CPU638P-GP-U
62.10055.111
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU_HT_LINK I/F_(1/4)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 4 of 56
5 4 3 2 1
5 4 3 2 1
1
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
C413 C145 C421 C427 C154 C160 C196 C392 C402 C408 C149 C147 C376 C386 C180 C168 F14 D14
8 MEM_MA_DATA13 MA_DATA13 MB_DATA13 MEM_MB_DATA13 9
8 MEM_MA_DATA14 C17 MA_DATA14 MB_DATA14 C18 MEM_MB_DATA14 9
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
SC1000P50V3JN-GP
SC1000P50V3JN-GP
SC1000P50V3JN-GP
SC1000P50V3JN-GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
8 MEM_MA_DATA15 G17 D18 MEM_MB_DATA15 9
2
2
MA_DATA15 MB_DATA15
8 MEM_MA_DATA16 G18 MA_DATA16 MB_DATA16 D20 MEM_MB_DATA16 9
8 MEM_MA_DATA17 C19 MA_DATA17 MB_DATA17 A21 MEM_MB_DATA17 9
8 MEM_MA_DATA18 D22 MA_DATA18 MB_DATA18 D24 MEM_MB_DATA18 9
8 MEM_MA_DATA19 E20 MA_DATA19 MB_DATA19 C25 MEM_MB_DATA19 9
8 MEM_MA_DATA20 E18 MA_DATA20 MB_DATA20 B20 MEM_MB_DATA20 9
8 MEM_MA_DATA21 F18 MA_DATA21 MB_DATA21 C20 MEM_MB_DATA21 9
8 MEM_MA_DATA22 B22 MA_DATA22 MB_DATA22 B24 MEM_MB_DATA22 9
8 MEM_MA_DATA23 C23 MA_DATA23 MB_DATA23 C24 MEM_MB_DATA23 9
8 MEM_MA_DATA24 F20 MA_DATA24 MB_DATA24 E23 MEM_MB_DATA24 9
8 MEM_MA_DATA25 F22 MA_DATA25 MB_DATA25 E24 MEM_MB_DATA25 9
8 MEM_MA_DATA26 H24 MA_DATA26 MB_DATA26 G25 MEM_MB_DATA26 9
8 MEM_MA_DATA27 J19 MA_DATA27 MB_DATA27 G26 MEM_MB_DATA27 9
0D9V_S3 1D8V_S3 8 MEM_MA_DATA28 E21 MA_DATA28 MB_DATA28 C26 MEM_MB_DATA28 9
8 MEM_MA_DATA29 E22 MA_DATA29 MB_DATA29 D26 MEM_MB_DATA29 9
(0.9V)750mA for VTT 8 MEM_MA_DATA30 H20
H22
MA_DATA30 MB_DATA30 G23
G24
MEM_MB_DATA30 9
8 MEM_MA_DATA31 MA_DATA31 MB_DATA31 MEM_MB_DATA31 9
8 MEM_MA_DATA32 Y24 MA_DATA32 MB_DATA32 AA24 MEM_MB_DATA32 9
1
U60B AB24 AA23
8 MEM_MA_DATA33 MA_DATA33 MB_DATA33 MEM_MB_DATA33 9
1
C171 R121 AB22 AD24
8 MEM_MA_DATA34 MA_DATA34 MB_DATA34 MEM_MB_DATA34 9
D10 W10 SCD1U10V2KX-4GP 1KR3F-GP AA21 AE24
VTT1 8 MEM_MA_DATA35 MEM_MB_DATA35 9
C10 MEM:CMD/CTRL/CLK VTT5 AC10 W22
MA_DATA35 MB_DATA35
AA26
8 MEM_MA_DATA36 MEM_MB_DATA36 9
2
VTT2 VTT6 MA_DATA36 MB_DATA36
B10 AB10 8 MEM_MA_DATA37 W21 AA25 MEM_MB_DATA37 9
2
R347 VTT3 VTT7 MA_DATA37 MB_DATA37
AD10 VTT4 VTT8 AA10 8 MEM_MA_DATA38 Y22 MA_DATA38 MB_DATA38 AD26 MEM_MB_DATA38 9
C 1D8V_S3 39D2R2F-L-GP A10 AA22 AE25 C
VTT9 0D9V_S3_VREF 8 MEM_MA_DATA39 MA_DATA39 MB_DATA39 MEM_MB_DATA39 9
1 2 MEMZP AF10 Y20 AC22
MEMZP 8 MEM_MA_DATA40 MA_DATA40 MB_DATA40 MEM_MB_DATA40 9
1 2 MEMZN AE10 Y10 CPU_VTT_SUS_FB 1 TP4 AA20 AD22
MEMZN VTT_SENSE 8 MEM_MA_DATA41 MA_DATA41 MB_DATA41 MEM_MB_DATA41 9
R350 AA18 AE20
8 MEM_MA_DATA42 MA_DATA42 MB_DATA42 MEM_MB_DATA42 9
39D2R2F-L-GPTP14 1 MEM_RSVD_M1 H16 W17 AB18 AF20
RSVD_M1 MEMVREF 8 MEM_MA_DATA43 MA_DATA43 MB_DATA43 MEM_MB_DATA43 9
SC1000P50V3JN-GP
SCD1U10V2KX-4GP
8 MEM_MA_DATA44 AB21 MA_DATA44 MB_DATA44 AF24 MEM_MB_DATA44 9
1
1KR3F-GP
T19 B18 MEM_RSVD_M2 1 TP71 AD21 AF23
8 MEM_MA0_ODT0 MA0_ODT0 RSVD_M2 8 MEM_MA_DATA45 MA_DATA45 MB_DATA45 MEM_MB_DATA45 9
1
V22 C157 C148 R118 AD19 AC20
8 MEM_MA0_ODT1 MA0_ODT1 8 MEM_MA_DATA46 MA_DATA46 MB_DATA46 MEM_MB_DATA46 9
U21 MA1_ODT0 MB0_ODT0 W26 MEM_MB0_ODT0 9 8 MEM_MA_DATA47 Y18 MA_DATA47 MB_DATA47 AD20 MEM_MB_DATA47 9
V19 W23 MEM_MB0_ODT1 9 8 MEM_MA_DATA48 AD17 AD18 MEM_MB_DATA48 9
2
MA1_ODT1 MB0_ODT1 MA_DATA48 MB_DATA48
Y26 8 MEM_MA_DATA49 W16 AE18 MEM_MB_DATA49 9
2
MB1_ODT0 MA_DATA49 MB_DATA49
8 MEM_MA0_CS#0 T20 MA0_CS_L0 8 MEM_MA_DATA50 W14 MA_DATA50 MB_DATA50 AC14 MEM_MB_DATA50 9
8 MEM_MA0_CS#1 U19 MA0_CS_L1 MB0_CS_L0 V26 MEM_MB0_CS#0 9 8 MEM_MA_DATA51 Y14 MA_DATA51 MB_DATA51 AD14 MEM_MB_DATA51 9
U20 MA1_CS_L0 MB0_CS_L1 W25 MEM_MB0_CS#1 9 8 MEM_MA_DATA52 Y17 MA_DATA52 MB_DATA52 AF19 MEM_MB_DATA52 9
V20 MA1_CS_L1 MB1_CS_L0 U22 8 MEM_MA_DATA53 AB17 MA_DATA53 MB_DATA53 AC18 MEM_MB_DATA53 9
8 MEM_MA_DATA54 AB15 MA_DATA54 MB_DATA54 AF16 MEM_MB_DATA54 9
8 MEM_MA_CKE0 J22 MA_CKE0 MB_CKE0 J25 MEM_MB_CKE0 9 8 MEM_MA_DATA55 AD15 MA_DATA55 MB_DATA55 AF15 MEM_MB_DATA55 9
8 MEM_MA_CKE1 J20 MA_CKE1 MB_CKE1 H26 MEM_MB_CKE1 9 8 MEM_MA_DATA56 AB13 MA_DATA56 MB_DATA56 AF13 MEM_MB_DATA56 9
8 MEM_MA_DATA57 AD13 MA_DATA57 MB_DATA57 AC12 MEM_MB_DATA57 9
N19 MA_CLK_H5 MB_CLK_H5 P22 8 MEM_MA_DATA58 Y12 MA_DATA58 MB_DATA58 AB11 MEM_MB_DATA58 9
N20 MA_CLK_L5 MB_CLK_L5 R22 8 MEM_MA_DATA59 W11 MA_DATA59 MB_DATA59 Y11 MEM_MB_DATA59 9
8 MEM_MA_CLK0_P E16 MA_CLK_H1 MB_CLK_H1 A17 MEM_MB_CLK0_P 9 8 MEM_MA_DATA60 AB14 MA_DATA60 MB_DATA60 AE14 MEM_MB_DATA60 9
8 MEM_MA_CLK0_N F16 MA_CLK_L1 MB_CLK_L1 A18 MEM_MB_CLK0_N 9 8 MEM_MA_DATA61 AA14 MA_DATA61 MB_DATA61 AF14 MEM_MB_DATA61 9
8 MEM_MA_CLK1_P Y16 MA_CLK_H7 MB_CLK_H7 AF18 MEM_MB_CLK1_P 9 8 MEM_MA_DATA62 AB12 MA_DATA62 MB_DATA62 AF11 MEM_MB_DATA62 9
8 MEM_MA_CLK1_N AA16 MA_CLK_L7 MB_CLK_L7 AF17 MEM_MB_CLK1_N 9 8 MEM_MA_DATA63 AA12 MA_DATA63 MB_DATA63 AD11 MEM_MB_DATA63 9
P19 MA_CLK_H4 MB_CLK_H4 R26
P20 MA_CLK_L4 MB_CLK_L4 R25 8 MEM_MA_DM0 E12 MA_DM0 MB_DM0 A12 MEM_MB_DM0 9
8 MEM_MA_DM1 C15 MA_DM1 MB_DM1 B16 MEM_MB_DM1 9
8 MEM_MA_ADD0 N21 MA_ADD0 MB_ADD0 P24 MEM_MB_ADD0 9 8 MEM_MA_DM2 E19 MA_DM2 MB_DM2 A22 MEM_MB_DM2 9
B B
8 MEM_MA_ADD1 M20 MA_ADD1 MB_ADD1 N24 MEM_MB_ADD1 9 8 MEM_MA_DM3 F24 MA_DM3 MB_DM3 E25 MEM_MB_DM3 9
8 MEM_MA_ADD2 N22 MA_ADD2 MB_ADD2 P26 MEM_MB_ADD2 9 8 MEM_MA_DM4 AC24 MA_DM4 MB_DM4 AB26 MEM_MB_DM4 9
8 MEM_MA_ADD3 M19 MA_ADD3 MB_ADD3 N23 MEM_MB_ADD3 9 8 MEM_MA_DM5 Y19 MA_DM5 MB_DM5 AE22 MEM_MB_DM5 9
8 MEM_MA_ADD4 M22 MA_ADD4 MB_ADD4 N26 MEM_MB_ADD4 9 8 MEM_MA_DM6 AB16 MA_DM6 MB_DM6 AC16 MEM_MB_DM6 9
8 MEM_MA_ADD5 L20 MA_ADD5 MB_ADD5 L23 MEM_MB_ADD5 9 8 MEM_MA_DM7 Y13 MA_DM7 MB_DM7 AD12 MEM_MB_DM7 9
8 MEM_MA_ADD6 M24 MA_ADD6 MB_ADD6 N25 MEM_MB_ADD6 9
8 MEM_MA_ADD7 L21 MA_ADD7 MB_ADD7 L24 MEM_MB_ADD7 9 8 MEM_MA_DQS0_P G13 MA_DQS_H0 MB_DQS_H0 C12 MEM_MB_DQS0_P 9
8 MEM_MA_ADD8 L19 MA_ADD8 MB_ADD8 M26 MEM_MB_ADD8 9 8 MEM_MA_DQS0_N H13 MA_DQS_L0 MB_DQS_L0 B12 MEM_MB_DQS0_N 9
8 MEM_MA_ADD9 K22 MA_ADD9 MB_ADD9 K26 MEM_MB_ADD9 9 8 MEM_MA_DQS1_P G16 MA_DQS_H1 MB_DQS_H1 D16 MEM_MB_DQS1_P 9
8 MEM_MA_ADD10 R21 MA_ADD10 MB_ADD10 T26 MEM_MB_ADD10 9 8 MEM_MA_DQS1_N G15 MA_DQS_L1 MB_DQS_L1 C16 MEM_MB_DQS1_N 9
8 MEM_MA_ADD11 L22 MA_ADD11 MB_ADD11 L26 MEM_MB_ADD11 9 8 MEM_MA_DQS2_P C22 MA_DQS_H2 MB_DQS_H2 A24 MEM_MB_DQS2_P 9
8 MEM_MA_ADD12 K20 MA_ADD12 MB_ADD12 L25 MEM_MB_ADD12 9 8 MEM_MA_DQS2_N C21 MA_DQS_L2 MB_DQS_L2 A23 MEM_MB_DQS2_N 9
8 MEM_MA_ADD13 V24 MA_ADD13 MB_ADD13 W24 MEM_MB_ADD13 9 8 MEM_MA_DQS3_P G22 MA_DQS_H3 MB_DQS_H3 F26 MEM_MB_DQS3_P 9
8 MEM_MA_ADD14 K24 MA_ADD14 MB_ADD14 J23 MEM_MB_ADD14 9 8 MEM_MA_DQS3_N G21 MA_DQS_L3 MB_DQS_L3 E26 MEM_MB_DQS3_N 9
8 MEM_MA_ADD15 K19 MA_ADD15 MB_ADD15 J24 MEM_MB_ADD15 9 8 MEM_MA_DQS4_P AD23 MA_DQS_H4 MB_DQS_H4 AC25 MEM_MB_DQS4_P 9
8 MEM_MA_DQS4_N AC23 MA_DQS_L4 MB_DQS_L4 AC26 MEM_MB_DQS4_N 9
8 MEM_MA_BANK0 R20 MA_BANK0 MB_BANK0 R24 MEM_MB_BANK0 9 8 MEM_MA_DQS5_P AB19 MA_DQS_H5 MB_DQS_H5 AF21 MEM_MB_DQS5_P 9
8 MEM_MA_BANK1 R23 MA_BANK1 MB_BANK1 U26 MEM_MB_BANK1 9 8 MEM_MA_DQS5_N AB20 MA_DQS_L5 MB_DQS_L5 AF22 MEM_MB_DQS5_N 9
8 MEM_MA_BANK2 J21 MA_BANK2 MB_BANK2 J26 MEM_MB_BANK2 9 8 MEM_MA_DQS6_P Y15 MA_DQS_H6 MB_DQS_H6 AE16 MEM_MB_DQS6_P 9
8 MEM_MA_DQS6_N W15 MA_DQS_L6 MB_DQS_L6 AD16 MEM_MB_DQS6_N 9
8 MEM_MA_RAS# R19 MA_RAS_L MB_RAS_L U25 MEM_MB_RAS# 9 8 MEM_MA_DQS7_P W12 MA_DQS_H7 MB_DQS_H7 AF12 MEM_MB_DQS7_P 9
8 MEM_MA_CAS# T22 MA_CAS_L MB_CAS_L U24 MEM_MB_CAS# 9 8 MEM_MA_DQS7_N W13 MA_DQS_L7 MB_DQS_L7 AE12 MEM_MB_DQS7_N 9
8 MEM_MA_WE# T24 MA_WE_L MB_WE_L U23 MEM_MB_WE# 9
SKT-CPU638P-GP-U
SKT-CPU638P-GP-U
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU_DDR_(2/4)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 5 of 56
5 4 3 2 1
5 4 3 2 1
8
7
6
5
RN33 1D8V_S3
SRN300J-1-GP
+2.5V_RUN_VDDA LDT_PWROK
2D5V_S0 L25
1
2
3
4
BLM18PG330SN1D-GP
D 18 CPU_LDT_RST# 1 2 LDT_RST#_CPU 11 (2.5V)250mA for VDDA D
1
R439 0R2J-2-GP R349
1 2 sc
1
SC4D7U6D3V5KX-3GP
SCD22U6D3V2KX-1GP
SC3300P50V2KX-1GP
300R2J-4-GP
R342
LDT_PWROK R338
10KR2J-3-GP
18 CPU_PWRGD 1 2
300R2J-4-GP
R433 0R2J-2-GP C418 C362 C351
1 2 1D8V_S3
18 CPU_LDT_STOP# LDT_STP#_CPU 11
R437 0R2J-2-GP
2
1 2 CPU_LDT_REQ#_CPU
C616
2
11 CPU_LDT_REQ# R178 0R2J-2-GP
1
1 2
U60D R434 R435
Cloce To CPU 1KR2J-1-GP 1KR2J-1-GP
SCD1U10V2KX-4GP
1
F8 VDDA1 KEY1 M11
F9 W18
2
VDDA2 KEY2
CPU_CLK(200MHz) 1 2
1
R432
2
169R2F-GP CLKCPU_IN A9 A6
2
MMBT3904-7-F-GP
3 CPU_THERMTRIP#_L 19
3 CPU_CLK CLKIN_H SVC CPU_SVC 38
C7381 2SC3900P50V2KX-2GP CLKCPU#_IN A8 A4 R348 Q21
3 CPU_CLK# CLKIN_L SVD CPU_SVD 38
C739 SC3900P50V2KX-2GP 1 2 CPU_PROCHOT# 18
LDT_RST#_CPU B7
LDT_PWROK RESET_L 0R2J-2-GP
LDT_STP#_CPU
A7
F10
PWROK
AF6
CPU exceeds to 125℃
HDT_RST# 1 CPU_LDT_REQ#_CPU LDTSTOP_L THERMTRIP_L CPU_PROCHOT#_L
2 C6 LDTREQ_L PROCHOT_L AC7
1D8V_S3 R440 AA8 1 R340 2
MEMHOT_L 1D8V_S3
0R2J-2-GP CPU_SIC
For HDT DBG CPU_SID
AF4
AF5
SIC 300R2J-4-GP
CPU_ALERT# SID
若不用要ph near cpu 1D2V_S0 AE6 ALERT_L THERMDC W7
W8
H_THERMDC 23
THERMDA H_THERMDA 23
1
LDT_PWROK CPU_HTREF0
R352 R353
1
R1451
2
2 44D2R2F-GP CPU_HTREF1
R6
P6
HT_REF0 1DY 2
C151
The Processor has
HT_REF1
1
390R2J-1-GP 390R2J-1-GP R176 44D2R2F-GP SC100P50V2JN-3GP reached a preset
C C615 F6 W9 CPU_VDDIO_SUS_FB_H 1 TP7 C
38 CPU_VDD0_RUN_FB_H
SCD1U10V2KX-4GP
38 CPU_VDD0_RUN_FB_L E6
VDD0_FB_H VDDIO_FB_H
Y9 CPU_VDDIO_SUS_FB_L 1 TP5 maximum operating
2
2
VDD0_FB_L VDDIO_FB_L
CPU_SIC Y6 H6
temperature. 100℃
38 CPU_VDD1_RUN_FB_H VDD1_FB_H VDDNB_FB_H CPU_VDDNB_RUN_FB_H 38
1D8V_S3
38 CPU_VDD1_RUN_FB_L AB6 VDD1_FB_L VDDNB_FB_L G6 CPU_VDDNB_RUN_FB_L 38 I=Active HTC
CPU_DBRDY G10 DBRDY
O=FAN
CPU_TMS AA9 E10 CPU_DBREQ#
CPU_TCK TMS DBREQ_L
AC9 TCK LAYOUT: Route FBCLKOUT_H/L
2
R652 CPU_TRST# AD9 AE9 CPU_TDO
CPU_SID CPU_TEST21 R653 CPU_TDI TRST_L TDO
1 2
300R2J-4-GP
AF9 TDI differentially impedance 80
300R2J-4-GP TP53 CPU_TEST23 CPU_TEST28_H 1 TP11
Sideband temperature 1 AD7 TEST23 TEST28_H J7
H8 CPU_TEST28_L 1 TP12
1
TP15 CPU_TEST18 TEST28_L
1 H10 TEST18
R654 TP18 1 CPU_TEST19 G9 D7 CPU_TEST17 1 TP67
CPU_TEST24 TEST19 TEST17 CPU_TEST16 TP17
1 2 TEST16 E7 1
TP20 1 CPU_TEST25_H E9 F7 CPU_TEST15 1 TP19
300R2J-4-GP CPU_DBREQ# TP16 CPU_TEST25_L TEST25_H TEST15 CPU_TEST14 TP68
1 E8 C7 1
HDT Connectors
TEST25_L TEST14
TP3 1 CPU_TEST21 AB8 TEST21 TEST7 C3
TP57 1 CPU_TEST20 AF7 TEST20 TEST10 K8
1D8V_S3 TP55 1 CPU_TEST24 AE7 TEST24
TP52 1 CPU_TEST22 AE8 TEST22 TEST8 C4
TP2 1 CPU_TEST12 AC8 TEST12
TP56 1 CPU_TEST27 AF8 TEST27
C9 CPU_TEST29H 1 TP70
TEST29_H
1
RSVD2 RSVD9
B3 RSVD3 RSVD8 AA7
driver INT event to EC B5 RSVD4 RSVD7 D5
C1 C5 HDT1
CPU_ALERT# RSVD5 RSVD6
1 2
SKT-CPU638P-GP-U
DY
3 4
5 6
CPU_DBREQ# 7 8
CPU_DBRDY 9 10
CPU_TCK 11 12
5V_S5 3D3V_S0 CPU_TMS 13 14
CPU_TDI 15 16
CPU_TRST# 17 18
1
CPU_TDO 19 20
R447 R448 21 22
10KR2J-3-GP 10KR2J-3-GP 1D8V_S3 23 24
26
2
Max = 1.5V
Q28
FDV301N-NL-GP
A
LDT_PWROK H G L G <Variant Name> A
Q27
FDV301N-NL-GP
Wistron Corporation
S
Title
CPU_Control&Debug_(3/4)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 6 of 56
5 4 3 2 1
5 4 3 2 1
SSID = CPU
D D
U60F
AA4 VSS1 VSS66 J6
AA11 VSS2 VSS67 J8
+VCC_CORE0
AA13
AA15
VSS3 VSS68 J10
J12
36A for VDD0&VDD1 +VCC_CORE1
VSS4 VSS69 U60E
AA17
AA19
VSS5 VSS70 J14
J16
Bottom Side Decoupling Bottom Side Decoupling
VSS6 VSS71
AB2 VSS7 VSS72 J18 G4 VDD0_1 VDD1_1 P8
AB7 VSS8 VSS73 K2 H2 VDD0_2 VDD1_2 P10
AB9 VSS9 VSS74 K7 J9 VDD0_3 VDD1_3 R4
AB23 VSS10 VSS75 K9 J11 VDD0_4 VDD1_4 R7
AB25 K11 C306 C307 C270 C269 C315 C301 C345 J13 R9 C252 C163 C175 C235 C213 C212 C221
VSS11 VSS76 VDD0_5 VDD1_5
1
AC11 VSS12 VSS77 K13 J15 VDD0_6 VDD1_6 R11
AC13 VSS13 VSS78 K15 K6 VDD0_7 VDD1_7 T2
AC15 K17 K10 T6
2
VSS14 VSS79 VDD0_8 VDD1_8
AC17 VSS15 VSS80 L6 K12 VDD0_9 VDD1_9 T8
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD22U6D3V2KX-1GP
SCD01U50V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
AC19 VSS16 VSS81 L8 K14 VDD0_10 VDD1_10 T10
AC21 VSS17 VSS82 L10 L4 VDD0_11 VDD1_11 T12
AD6 VSS18 VSS83 L12 L7 VDD0_12 VDD1_12 T14
AD8 VSS19 VSS84 L14 L9 VDD0_13 VDD1_13 U7
C AD25 L16 L11 U9 C
VSS20 VSS85 VDD0_14 VDD1_14
AE11 VSS21 VSS86 L18 L13 VDD0_15 VDD1_15 U11
AE13 VSS22 VSS87 M7 L15 VDD0_16 VDD1_16 U13
AE15 VSS23 VSS88 M9 M2 VDD0_17 VDD1_17 U15
AE17 VSS24 VSS89 AC6 M6 VDD0_18 VDD1_18 V6
AE19 VSS25 VSS90 M17 M8 VDD0_19 VDD1_19 V8
AE21 VSS26 VSS91 N4 M10 VDD0_20 VDD1_20 V10
AE23 VSS27 VSS92 N8 N7 VDD0_21 VDD1_21 V12
B4 VSS28 VSS93 N10 N9 VDD0_22 VDD1_22 V14
CPU_VDDNB
B6
B8
VSS29 VSS94 N16
N18
(0.8~1.1V)3A for VDDNB N11 VDD0_23 VDD1_23 W4
Y2
VSS30 VSS95 VDD1_24
B9 VSS31 VSS96 P2 K16 VDDNB_1 VDD1_25 AC4
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1D8V_S3
B11
B13
VSS32 VSS97 P7
P9
M16
P16
VDDNB_2 VDD1_26 AD2 Place near to CPU
VSS33 VSS98 VDDNB_3
1
1
B15 P11 C277 C259 C241 T16 Y25
VSS34 VSS99 VDDNB_4 VDDIO27
B17 VSS35 VSS100 P17 V16 VDDNB_5 VDDIO26 V25
B19 R8 V23
2
2
VSS36 VSS101 VDDIO25 C217 C401 C340 C343 C236 C218 C232 C207 C230 C310 C320
B21 VSS37 VSS102 R10 H25 VDDIO1 VDDIO24 V21
B23 VSS38 VSS103 R16 J17 VDDIO2 VDDIO23 V18
1
B25 VSS39 VSS104 R18 K18 VDDIO3 VDDIO22 U17
D6 VSS40 VSS105 T7 K21 VDDIO4 VDDIO21 T25
D8 T9 K23 T23
2
VSS41 VSS106 VDDIO5 VDDIO20
D9 VSS42 VSS107 T11 K25 VDDIO6 VDDIO19 T21
SC180P50V2JN-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
D11 VSS43 VSS108 T13 L17 VDDIO7 VDDIO18 T18
D13 VSS44 VSS109 T15 M18 VDDIO8 VDDIO17 R17
D15
D17
VSS45 VSS110 T17
U4 1D8V_S3 (1.8V)2A for VDDIO M21
M23
VDDIO9 VDDIO16 P25
P23
VSS46 VSS111 VDDIO10 VDDIO15
D19 VSS47 VSS112 U6 Bottom Side Decoupling M25 VDDIO11 VDDIO14 P21
D21 VSS48 VSS113 U8 N17 VDDIO12 VDDIO13 P18
B B
D23 VSS49 VSS114 U10
D25 VSS50 VSS115 U12
E4 U14 SKT-CPU638P-GP-U
VSS51 VSS116 C272 C257 C411 C239 C273 C299
F2 VSS52 VSS117 U16
1
VSS55 VSS120
F17 VSS56 VSS121 V9
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU_Power_(4/4)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 7 of 56
5 4 3 2 1
5 4 3 2 1
A1
100 113
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
5 MEM_MA_ADD2 A2 CAS# MEM_MA_CAS# 5
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
99 SRN47J-4-GP
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
5 MEM_MA_ADD3 A3
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
98 110 RN15
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
E20
E21
E22
E23
E24
E25
E26
5 MEM_MA_ADD4 A4 CS0# MEM_MA0_CS#0 5
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F21
F22
F23
F24
F25
F26
G10
G11
G12
G13
G14
G15
G16
G17
G18
G21
G22
G23
G24
G25
G26
97 115 1 8
G1
G2
G3
G4
G5
G6
G9
5 MEM_MA_ADD5 A5 CS1# MEM_MA0_CS#1 5 MEM_MA_WE# 5
H1
H2
H3
H4
H5
H6
H7
H8
H9
H10
H11
H12
H13
H14
H15
H16
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
94 2 7
J1
J2
J3
J4
J5
J6
J7
J8
J9
J 10
J 11
J 12
J 13
J 14
J 15
J 16
J 17
J 18
J 19
J 20
J 21
J 22
J 23
J 24
J 25
J 26
D D
BGA638_50_26SQ_S1G2_OEM
5 MEM_MA_ADD6 A6 MEM_MA_ADD10 5
K1
K2
K3
K4
K5
K6
K7
K8
K9
K10
K11
K12
K13
K14
K15
K16
K17
K18
K19
K20
K21
K22
K23
K24
K25
K26
92 79 3 6
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
L26
5 MEM_MA_ADD7 A7 CKE0 MEM_MA_CKE0 5 MEM_MA_BANK0 5
M10
M11
M16
M17
M18
M19
M20
M21
M22
M23
M24
M25
M26
M1
M2
M3
M4
M5
M6
M7
M8
M9
93 80 4 5
N1
N2
N3
N4
N5
N6
N7
N8
N9
N10
N11
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
N26
5 MEM_MA_ADD8 A8 CKE1 MEM_MA_CKE1 5 MEM_MA_ADD1 5
B
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
91
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
5 MEM_MA_ADD9 A9
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
T21
T22
T23
T24
T25
T26
105 30 SRN47J-4-GP
U1
U2
U3
U4
U5
U6
U7
U8
U9
U10
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
5 MEM_MA_ADD10 A10/AP CK0 MEM_MA_CLK0_P 5
V1
V2
V3
V4
V5
V6
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
V18
V19
V20
V21
V22
V23
V24
V25
V26
RN23
W10
W11
W12
W13
W14
W15
W16
W17
W18
W21
W22
W23
W24
W25
W26
90 32
W1
W2
W3
W4
W5
W6
W7
W8
W9
5 MEM_MA_ADD11 A11 CK0# MEM_MA_CLK0_N 5
Y1
Y2
Y3
Y4
Y5
Y6
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
AA10
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA24
AA25
AA26
89 1 8
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
AA9
5 MEM_MA_ADD12 A12 MEM_MA_BANK2 5
AB10
AB11
AB12
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
AB25
AB26
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AC10
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AC26
116 164 2 7
AC1
AC2
AC3
AC4
AC5
AC6
AC7
AC8
AC9
5 MEM_MA_ADD13 A13 CK1 MEM_MA_CLK1_P 5 MEM_MA_ADD15 5
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AE10
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
86 166 3 6
AE2
AE3
AE4
AE5
AE6
AE7
AE8
AE9
5 MEM_MA_ADD14 A14 CK1# MEM_MA_CLK1_N 5 MEM_MA_CKE0 5
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AF23
AF24
AF4
AF5
AF6
AF7
AF8
AF9
84 TPAD60 TPAD60 4 5
5 MEM_MA_ADD15 A15 TP51 TP50 MEM_MA_ADD12 5
85 A16/BA2 DM0 10 MEM_MA_DM0 5
5 MEM_MA_BANK2 26 MEM_MA_DM1 5 SRN47J-4-GP
DM1
5 MEM_MA_BANK0 107 52 MEM_MA_DM2 5 RN11
BA0 DM2
5 MEM_MA_BANK1 106 BA1 DM3 67 MEM_MA_DM3 5 1 8 MEM_MA_BANK1 5
DM4 130 MEM_MA_DM4 5 2 7 MEM_MA0_CS#1 5
DM5 147 MEM_MA_DM5 5 3 6 MEM_MA_CAS# 5
5 MEM_MA_DATA0 5 DQ0 DM6 170 MEM_MA_DM6 5 4 5 MEM_MA0_ODT1 5
5 MEM_MA_DATA1 7 DQ1 DM7 185 MEM_MA_DM7 5
5 MEM_MA_DATA2 17 SRN47J-4-GP
DQ2
5 MEM_MA_DATA3 19 RN13
DQ3
5 MEM_MA_DATA4 4 DQ4 SDA 195 SMBDAT0_SB 3,9,19 1 8 MEM_MA0_CS#0 5
5 MEM_MA_DATA5 6 DQ5 SCL 197 SMBCLK0_SB 3,9,19 2 7 MEM_MA0_ODT0 5
5 MEM_MA_DATA6 14 DQ6 3 6 MEM_MA_RAS# 5
5 MEM_MA_DATA7 16 DQ7 VDDSPD 199 3D3V_S0 4 5 MEM_MA_ADD13 5
5 MEM_MA_DATA8 23 DQ8
1
25 198 DIMM1_SA0 1 2 C115 C119 SRN47J-4-GP
5 MEM_MA_DATA9 DQ9 SA0
35 200 DIMM1_SA1 R1071 210KR2J-3-GP SC2D2U6D3V3KX-GP SCD1U10V2KX-4GP RN19
5 MEM_MA_DATA10 DQ10 SA1
37 R104 10KR2J-3-GP 1 8
5 MEM_MA_DATA11
PARALLEL TERMINATION MEM_MA_ADD5 5
2
DQ11
20 50 2 7
5
5
MEM_MA_DATA12
MEM_MA_DATA13 22
36
DQ12
DQ13
NC#50
NC#69 69
83
(A0) 3
4
6
5
MEM_MA_ADD9
MEM_MA_ADD8
5
5
5 MEM_MA_DATA14 DQ14 NC#83 MEM_MA_ADD6 5
5 MEM_MA_DATA15 38 DQ15 NC#120 120
5 MEM_MA_DATA16 43 DQ16 NC#163/TEST 163 Put decap near power(0.9V) and pull-up resistor SRN47J-4-GP
45 1D8V_S3 RN17
5
5
5
5
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
55
57
44
46
DQ17
DQ18
DQ19
DQ20
REVERSE TYPE VDD
VDD
81
82
87 PLACE CLOSE TO PROCESSOR
1
2
3
4
8
7
6
5
MEM_MA_ADD7
MEM_MA_ADD3
MEM_MA_ADD0
5
5
5
5 MEM_MA_DATA21 DQ21 VDD MEM_MA_ADD2 5
5 MEM_MA_DATA22 56 DQ22 VDD 88 WITHIN 1.5 INCH
5 MEM_MA_DATA23 58 95 SRN47J-4-GP
DQ23 VDD
5 MEM_MA_DATA24 61 DQ24 VDD 96 Do not share the Term resistor between
C 63 103 MEM_MA_CLK0_P C
5 MEM_MA_DATA25
73
DQ25 VDD
104
the DDR addess and Control Signals.
5 MEM_MA_DATA26 DQ26 VDD
1
5 MEM_MA_DATA27 75 DQ27 VDD 111
62 112 C431
5 MEM_MA_DATA28 DQ28 VDD TP73 SC1D5P50V2CN-1GP
5 MEM_MA_DATA29 64 117
2
DQ29 VDD MEM_MA_CLK0_N
5 MEM_MA_DATA30 74 DQ30 VDD 118
5 MEM_MA_DATA31 76 DQ31
123 3 MEM_MA_CLK1_P
5 MEM_MA_DATA32 DQ32 VSS TPAD60
5 MEM_MA_DATA33 125 DQ33 VSS 8
1
5 MEM_MA_DATA34 135 DQ34 VSS 9
137 12 C142
5 MEM_MA_DATA35 DQ35 VSS SC1D5P50V2CN-1GP
5 MEM_MA_DATA36 124 15
2
DQ36 VSS MEM_MA_CLK1_N
126 18
5
5
5
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
134
136
DQ37
DQ38
DQ39
VSS
VSS
VSS
21
24
Decoupling Capacitor
5 MEM_MA_DATA40 141 DQ40 VSS 27
143 28
5
5
5
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
151
153
DQ41
DQ42
DQ43
VSS
VSS
VSS
33
34
1D8V_S3
Place these Caps near DM1
5 MEM_MA_DATA44 140 DQ44 VSS 39
5 MEM_MA_DATA45 142 DQ45 VSS 40 DY
5 MEM_MA_DATA46 152 DQ46 VSS 41
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SCD01U50V2KX-1GP
SC180P50V2JN-1GP
SCD01U50V2KX-1GP
SC180P50V2JN-1GP
5 MEM_MA_DATA47 154 DQ47 VSS 42
5 MEM_MA_DATA48 157 DQ48 VSS 47
1
159 48 C700 C158 C353 C377 C373 C734 C706 C735 C200
5 MEM_MA_DATA49 DQ49 VSS
5 MEM_MA_DATA50 173 DQ50 VSS 53
175 54 0D9V_S3 1D8V_S3
5 MEM_MA_DATA51
2
DQ51 VSS
5 MEM_MA_DATA52 158 59
DDR_VREF
DQ52 VSS
5 MEM_MA_DATA53 160 DQ53 VSS 60 1 DY2 1 2
174 65 C278 C731
5 MEM_MA_DATA54 DQ54 VSS
176 66 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
5 MEM_MA_DATA55 DQ55 VSS
5 MEM_MA_DATA56 179 DQ56 VSS 71 1 DY2
181 72 C228
5 MEM_MA_DATA57 DQ57 VSS 1D8V_S3
189 77 VREF_DDR_MEM SCD1U10V2KX-4GP
5 MEM_MA_DATA58 DQ58 VSS
5 MEM_MA_DATA59 191 DQ59 VSS 78 1 DY2 1 2
180 121 C193 C733
5 MEM_MA_DATA60 DQ60 VSS
182 122 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
5 MEM_MA_DATA61 DQ61 VSS
1
5 MEM_MA_DATA63 C450
DQ63 VSS
132 1KR2F-3-GP Place one cap close to every 2 pullup SCD1U10V2KX-4GP
VSS SCD1U10V2KX-4GP 0D9V_S3
B
5 MEM_MA_DQS0_N 11 DQS0# VSS 133 resistors terminated to +0.9V_DDR_VTT 1 DY2
C300 B
2
1
156 SCD1U10V2KX-4GP
2
VSS
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U16V2KX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U16V2KX-3GP
5 MEM_MA_DQS0_P 13 161 1 DY2 1 2
2
2
DQS1 VSS SCD1U10V2KX-4GP SCD1U10V2KX-4GP
5 MEM_MA_DQS2_P 51 DQS2 VSS 165
5 MEM_MA_DQS3_P 70 DQS3 VSS 168
5 MEM_MA_DQS4_P 131 DQS4 VSS 171
5
5
MEM_MA_DQS5_P
MEM_MA_DQS6_P
148
169
DQS5
DQS6
VSS
VSS
172
177 LAYOUT: Locate close to DIMM
5 MEM_MA_DQS7_P 188 DQS7 VSS 178
VSS 183
5 MEM_MA0_ODT0 114 OTD0 VSS 184
5 MEM_MA0_ODT1 119 OTD1 VSS 187
VSS 190 DY DY DY DY
VREF_DDR_MEM 1 VREF VSS 193
2 VSS VSS 196 TP54
1
1
SC2D2U6D3V3KX-GP
SCD1U16V2KX-3GP
DDR2-200P-22-GP-U2
HI 9.2mm
Place C2.2uF and 0.1uF < 62.10017.A61
500mils from DDR connector
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DDR_DIMM1
Size Document Number Rev
A2
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 8 of 56
5 4 3 2 1
5 4 3 2 1
SSID = MEMORY
DIMM1
D
5
5
5
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
97
94
A4
A5
A6
DQS4
DQS5
DQS6
148
169
MEM_MB_DQS4_P
MEM_MB_DQS5_P
MEM_MB_DQS6_P
5
5
5
PARALLEL TERMINATION 3
4
6
5
MEM_MB_ADD12 5
MEM_MB_ADD8 5
MEM_MB_BANK2 5 D
5 MEM_MB_ADD7 92 A7 DQS7 188 MEM_MB_DQS7_P 5
5 MEM_MB_ADD8 93 11 MEM_MB_DQS0_N 5 SRN47J-4-GP
A8 DQS0#
5 MEM_MB_ADD9 91 A9 DQS1# 29 MEM_MB_DQS1_N 5 Put decap near power(0.9V) and pull-up resistor RN16
5 MEM_MB_ADD10 105 A10/AP DQS2# 49 MEM_MB_DQS2_N 5 1 8 MEM_MB_BANK0 5
5 MEM_MB_ADD11 90 A11 DQS3# 68 MEM_MB_DQS3_N 5 2 7 MEM_MB_ADD1 5
5 MEM_MB_ADD12 89 A12 DQS4# 129 MEM_MB_DQS4_N 5 3 6 MEM_MB_ADD6 5
5 MEM_MB_ADD13 116 A13 DQS5# 146 MEM_MB_DQS5_N 5 4 5 MEM_MB_ADD5 5
5 MEM_MB_ADD14 86 A14 DQS6# 167 MEM_MB_DQS6_N 5
5 MEM_MB_ADD15 84 186 MEM_MB_DQS7_N 5 SRN47J-4-GP
A15 DQS7#
85 RN14
A16_BA2
5 MEM_MB_BANK2 Do not share the Term resistor between 1 8 MEM_MB_RAS# 5
10 2 7
107
DM0
26
MEM_MB_DM0 5 the DDR addess and Control Signals. 3 6
MEM_MB_ADD2 5
5 MEM_MB_BANK0 BA0 DM1 MEM_MB_DM1 5 MEM_MB_ADD0 5
5 MEM_MB_BANK1 106 BA1 DM2 52 MEM_MB_DM2 5 4 5 MEM_MB_ADD10 5
DM3 67 MEM_MB_DM3 5
5 MEM_MB_DATA0 5 130 MEM_MB_DM4 5 SRN47J-4-GP
DQ0 DM4
5 MEM_MB_DATA1 7 147 MEM_MB_DM5 5 RN22
DQ1 DM5
5 MEM_MB_DATA2 17 DQ2 DM6 170 MEM_MB_DM6 5 1 8 MEM_MB_CKE1 5
5 MEM_MB_DATA3 19 DQ3 DM7 185 MEM_MB_DM7 5 2 7 MEM_MB_CKE0 5
5 MEM_MB_DATA4 4 DQ4 3 6 MEM_MB_ADD14 5
5 MEM_MB_DATA5 6 DQ5 CK0 30 MEM_MB_CLK0_P 5 4 5 MEM_MB_ADD15 5
5 MEM_MB_DATA6 14 DQ6 CK0# 32 MEM_MB_CLK0_N 5
16 164 SRN47J-4-GP
5 MEM_MB_DATA7 DQ7 CK1 MEM_MB_CLK1_P 5
5 MEM_MB_DATA8 23 166 MEM_MB_CLK1_N 5 RN18
DQ8 CK1#
5 MEM_MB_DATA9 25 DQ9 1 8 MEM_MB_ADD11 5
35 198 DIMM2_SA0 1 2 2 7
5
5
MEM_MB_DATA10
MEM_MB_DATA11 37
20
DQ10
DQ11
SA0
SA1 200 DIMM2_SA1R1081
R105
210KR2J-3-GP
10KR2J-3-GP
3D3V_S0
(A2) 3
4
6
5
MEM_MB_ADD7 5
MEM_MB_ADD4 5
5 MEM_MB_DATA12 DQ12 MEM_MB_ADD3 5
5 MEM_MB_DATA13 22 DQ13 VDD_SPD 199 3D3V_S0
5 MEM_MB_DATA14 36 SRN47J-4-GP
DQ14
1
1D8V_S3
SC2D2U6D3V3KX-GP
38 C117 RN12
5 MEM_MB_DATA15 DQ15
43 81 C114 SCD1U10V2KX-4GP 1 8
5 MEM_MB_DATA16 DQ16 VDD MEM_MB0_CS#1 5
5 MEM_MB_DATA17 45 82 2 7 MEM_MB0_ODT1 5
2
DQ17 VDD
5 MEM_MB_DATA18 55 DQ18 VDD 87 3 6 MEM_MB_CAS# 5
5 MEM_MB_DATA19 57 DQ19 VDD 88 4 5 MEM_MB_WE# 5
5 MEM_MB_DATA20 44 DQ20 VDD 95
46 96 SRN47J-4-GP
REVERSE TYPE
5 MEM_MB_DATA21 DQ21 VDD
5 MEM_MB_DATA22 56 103 RN10
DQ22 VDD
5 MEM_MB_DATA23 58 DQ23 VDD 104 1 8 MEM_MB_ADD13 5
5 MEM_MB_DATA24 61 DQ24 VDD 111 2 7 MEM_MB0_ODT0 5
C
5 MEM_MB_DATA25 63 DQ25 VDD 112 3 6 MEM_MB0_CS#0 5
C
1
5 MEM_MB_DATA37 126 DQ37 VSS 24
134 27 C429
5 MEM_MB_DATA38 DQ38 VSS SC1D5P50V2CN-1GP
5 MEM_MB_DATA39 136 28
2
DQ39 VSS MEM_MB_CLK0_N
5 MEM_MB_DATA40 141 DQ40 VSS 33
5 MEM_MB_DATA41 143 DQ41 VSS 34
151 39 MEM_MB_CLK1_P
5 MEM_MB_DATA42 DQ42 VSS
5 MEM_MB_DATA43 153 DQ43 VSS 40
1
5 MEM_MB_DATA44 140 DQ44 VSS 41
142 42 C143
5 MEM_MB_DATA45 DQ45 VSS SC1D5P50V2CN-1GP
152 47
5 MEM_MB_DATA46
Decoupling Capacitor
2
DQ46 VSS MEM_MB_CLK1_N
5 MEM_MB_DATA47 154 DQ47 VSS 48
5 MEM_MB_DATA48 157 DQ48 VSS 53
5 MEM_MB_DATA49 159 DQ49 VSS 54
5 MEM_MB_DATA50 173 DQ50 VSS 59
175 60
5
5
5
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
158
160
DQ51
DQ52
DQ53
VSS
VSS
VSS
65
66 1D8V_S3 Place these Caps near DM2
5 MEM_MB_DATA54 174 DQ54 VSS 71
5 MEM_MB_DATA55 176 DQ55 VSS 72
1D8V_S3
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SCD01U50V2KX-1GP
SC180P50V2JN-1GP
SCD01U50V2KX-1GP
SC180P50V2JN-1GP
179 77 0D9V_S3
5 MEM_MB_DATA56 DQ56 VSS
5 MEM_MB_DATA57 181 DQ57 VSS 78
1
189 121 C692 C685 C675 C670 C663 C295 C274 C173 C253 1 DY2 1 2
5 MEM_MB_DATA58 DQ58 VSS
191 122 C327 C266
5 MEM_MB_DATA59 DQ59 VSS
180 127 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
5 MEM_MB_DATA60
2
DQ60 VSS
182 128 1 DY2
5 MEM_MB_DATA61
192
DQ61 VSS
132 C265 DY
5 MEM_MB_DATA62 DQ62 VSS
194 133 SCD1U10V2KX-4GP
5 MEM_MB_DATA63 DQ63 VSS
VSS 138 1 DY2 1 2
50 139 C220 C317
B NC#50 VSS SCD1U10V2KX-4GP SCD1U10V2KX-4GP B
69 NC#69 VSS 144
83 NC#83 VSS 145 1 DY2
120 149 C178
163
NC#120 VSS
150 DY Layout Note: SCD1U10V2KX-4GP
NC#163/TEST VSS
155 1 DY2
110
VSS
156 Place one cap close to every 2 pullup C422
5 MEM_MB0_CS#0 CS0# VSS
115 161 0D9V_S3 resistors terminated to +0.9V_DDR_VTT SCD1U10V2KX-4GP
5 MEM_MB0_CS#1 CS1# VSS
5 MEM_MB_CKE0 79 CKE0 VSS 162 1 DY2 1 2
80 165 C292 C318
5 MEM_MB_CKE1 CKE1 VSS
108 168 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
5 MEM_MB_RAS# RAS# VSS
5 MEM_MB_CAS# 113 CAS# VSS 171 1 DY2
109 172 C246
5 MEM_MB_WE# WE# VSS
177 SCD1U10V2KX-4GP
VSS C312 C280 C229 C195 C331 C282 C234 C198 C186 C214 C222 C243 C304 C283
3,8,19 SMBCLK0_SB 197 SCL VSS 178 1 1 DY2 1 2
1
3,8,19 SMBDAT0_SB 195 183 C205 C311
SDA VSS
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
184 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
VSS
5 MEM_MB0_ODT0 114 187
DY
2
2
ODT0 VSS
5 MEM_MB0_ODT1 119 ODT1 VSS 190
VSS 193
VREF_DDR_MEM 1 VREF VSS 196
DY
1
1
SC2D2U6D3V3KX-GP
SCD1U16V2KX-3GP
SKT-SODIMM200-38GP
DY DY
62.10017.E31
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DDR_DIMM2
Size Document Number Rev
A2
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 9 of 56
5 4 3 2 1
5 4 3 2 1
U61A
4 HT_CPU_NB_CAD_H0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_NB_CPU_CAD_H0 4
Y24 PART 1 OF 6 D25
SSID = N.B 4
4
4
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
V22
V23
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
E24
E25
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
4
4
4
4 HT_CPU_NB_CAD_H2 V25 HT_RXCAD2P HT_TXCAD2P F24 HT_NB_CPU_CAD_H2 4
4 HT_CPU_NB_CAD_L2 V24 HT_RXCAD2N HT_TXCAD2N F25 HT_NB_CPU_CAD_L2 4
4 HT_CPU_NB_CAD_H3 U24 HT_RXCAD3P HT_TXCAD3P F23 HT_NB_CPU_CAD_H3 4
4 HT_CPU_NB_CAD_L3 U25 HT_RXCAD3N HT_TXCAD3N F22 HT_NB_CPU_CAD_L3 4
4 HT_CPU_NB_CAD_H4 T25 HT_RXCAD4P HT_TXCAD4P H23 HT_NB_CPU_CAD_H4 4
4 HT_CPU_NB_CAD_L4 T24 HT_RXCAD4N HT_TXCAD4N H22 HT_NB_CPU_CAD_L4 4
Rx PCIE reversed
48
48
48
PCIE_MXM_NB_RX11P
PCIE_MXM_NB_RX11N
PCIE_MXM_NB_RX10P
G6
H5
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_TX4P
GFX_TX4N
GFX_TX5P
E1
F4
GFX_TX11N_C
GFX_TX10P_C
C717
C361
1
1
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
PCIE_NB_MXM_TX11P 48
PCIE_NB_MXM_TX11N 48
PCIE_NB_MXM_TX10P 48
Tx PCIE reversed
48 PCIE_MXM_NB_RX10N H6 F3 GFX_TX10N_C C350 1 2VGA SCD1U10V2KX-4GP
GFX_RX5N GFX_TX5N PCIE_NB_MXM_TX10N 48
48 PCIE_MXM_NB_RX9P J6 F1 GFX_TX9P_C C712 1 2VGA SCD1U10V2KX-4GP
GFX_RX6P GFX_TX6P PCIE_NB_MXM_TX9P 48
48 PCIE_MXM_NB_RX9N J5 F2 GFX_TX9N_C C715 1 2VGA SCD1U10V2KX-4GP
GFX_RX6N GFX_TX6N PCIE_NB_MXM_TX9N 48
48 PCIE_MXM_NB_RX8P J7 H4 GFX_TX8P_C C338 1 2VGA SCD1U10V2KX-4GP
GFX_RX7P GFX_TX7P PCIE_NB_MXM_TX8P 48
48 PCIE_MXM_NB_RX8N J8 H3 GFX_TX8N_C C328 1 2VGA SCD1U10V2KX-4GP
GFX_RX7N GFX_TX7N PCIE_NB_MXM_TX8N 48
48 PCIE_MXM_NB_RX7P L5 H1 GFX_TX7P_C C705 1 2VGA SCD1U10V2KX-4GP
GFX_RX8P GFX_TX8P PCIE_NB_MXM_TX7P 48
48 PCIE_MXM_NB_RX7N L6 H2 GFX_TX7N_C C708 1 2VGA SCD1U10V2KX-4GP
GFX_RX8N GFX_TX8N PCIE_NB_MXM_TX7N 48
48 PCIE_MXM_NB_RX6P M8 J2 GFX_TX6P_C C704 1 2VGA SCD1U10V2KX-4GP
B GFX_RX9P GFX_TX9P PCIE_NB_MXM_TX6P 48 B
48 PCIE_MXM_NB_RX6N L8 J1 GFX_TX6N_C C702 1 2VGA SCD1U10V2KX-4GP
GFX_RX9N GFX_TX9N PCIE_NB_MXM_TX6N 48
PCIE I/F GFX
3D3V_S0
3D3V_S0 +3.3V_RUN_AVDD
L21 STRAP_DEBUG_BUS_GPIO_ENABLE
SSID = N.B 1 2
2
Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC)
1
BLM18PG330SN1D-GP C363 R182 R181 0 : Enable 1 : Disable
33ohm 3A SC2D2U6D3V3KX-GP 3KR2F-GP 3KR2F-GP
*
DY
2
RS780: Enables Side port memory ( RS780 use HSYNC)
1
NB_CRT_VSYNC
1D8V_S0 NB_CRT_HSYNC
6 LDT_RST#_CPU 1
R438
DY 2
0R2J-2-GP R180
*0 : Enable 1 : Disable
SC2D2U6D3V3KX-GP
1
1 2 SYSREST# 1 2 +1.8V_RUN_AVDDDI
18,27,34,37 PLTRST#
D R442 0R2J-2-GP R429 R428 D
C410
0R3-0-U-GP 3KR2F-GP DY 3KR2F-GP SUS_STAT#
Selects Loading of STRAPS From EEPROM
*10 :: I2C
Bypass the loading of EEPROM straps and use Hardware Default Values
2
1D8V_S0 1D8V_S0 +1.8V_RUN_AVDDQ
R177 Master can load strap values from EEPROM if connected,
or use default values if not connected
SCD1U10V2KX-4GP
1 2
2
BLM18BB221SN1D-GP
C316
R430 U61C
300R2J-4-GP C393 F12 A22
AVDD1 TXOUT_L0P NB_TXAOUT0+ 14
SC2D2U6D3V3KX-GP E12 PART 3 OF 6 B22 NB_TXAOUT0- 14
2
AVDD2 TXOUT_L0N
close NB within 1000 mil F14 A21 NB_TXAOUT1+ 14
1
AVDDDI TXOUT_L1P
G15 AVSSDI TXOUT_L1N B21 NB_TXAOUT1- 14
H15 AVDDQ TXOUT_L2P B20 NB_TXAOUT2+ 14
DY NB_PWRGD H14 A20
AVSSQ TXOUT_L2N NB_TXAOUT2- 14
TXOUT_L3P A19
3D3V_S0 E17 B19
C_Pr TXOUT_L3N
F17 Y
SC F15 B18
CRT/TVOUT
COMP_Pb TXOUT_U0P NB_TXBOUT0+ 14
TXOUT_U0N A18 NB_TXBOUT0- 14
1
4K7R2F-GP
1
4K7R2F-GP BLM15AG221SN-GP D14
1 PLLVDD18 C730
B12 PLLVSS VDDLT18_1 A15
C398 B15 +1.8V_RUN_VDDLT18 SC2D2U6D3V3KX-GP
R185
2
2
VDDLT18_2
LVTM
SC2D2U6D3V3KX-GP +1.8V_VDDA18HTPLL H17 A14
2
VDDA18HTPLL VDDLT33_1
PLL PWR
1 2 NB_ALLOW_LDTSTOP B14
18 ALLOW_LDTSTOP VDDLT33_2
D7 VDDA18PCIEPLL1
1
1
1 2 37 NB_PWRGD A10 POWERGOOD VSSLT4 C18
BLM15AG221SN-GP NB_LDT_STOP# C10 C20 C723 C722
2
LDTSTOP# VSSLT5
1
2
C732 SCD1U10V2KX-4GP ALLOW_LDTSTOP VSSLT6
VSSLT7 C22
CLOCKs PM
SC2D2U6D3V3KX-GP C25
3 CLK_NBHT_CLK
2
HT_REFCLKP
3 CLK_NBHT_CLK# C24 HT_REFCLKN
1D1V_S0 1KR2F-3-GP
R165 E11
3,55 CLK_NB_14M REFCLK_P/OSCIN
NB_REFCLK_N
15mil width
ENABLE External CLK GEN 1 2
1 2
F11 REFCLK_N LVDS_DIGON E9
F7
NB_LVDS_DIGON 15
LVDS_BLON PANEL_BKEN 34
1D8V_S0 R172 T2 G12
+1.8V_VDDA18HTPLL 3 CLK_NB_GFX GFX_REFCLKP LVDS_ENA_BL
1KR2F-3-GP
L18
3 CLK_NB_GFX# T1 GFX_REFCLKN R174 1 21K27R2F-L-GP
SB
DY
1 2 3 CLK_NBGPP_CLK U1 GPP_REFCLKP
B BLM15AG221SN-GP R169 1 B
3 CLK_NBGPP_CLK# U2 GPP_REFCLKN DY 21K27R2F-L-GP
1
C305
C294 SCD1U10V2KX-4GP V4 R167 1 DY 2100KR2J-1-GP
3 CLK_NB_GPPSB GPPSB_REFCLKP
SC2D2U6D3V3KX-GP V3
3 CLK_NB_GPPSB#
2
GPPSB_REFCLKN
15 NB_LCD_DDCLK B9 I2C_CLK
15 NB_LCD_DDCDAT
1 R426 2 0R2J-2-GP
A9
B8
I2C_DATA MIS. TMDS_HPD D9
D10
NB_HDMI_HPD 17
18 DP_AUX0N DDC_CLK0/AUX0P DDC_DATA0/AUX0N HPD DVI_A_HPD 17
VGA DVI_DDCLK
A8 DDC_DATA0/AUX0N DDC_CLK0/AUX0P SUS_STAT#_R R173 1
16 DVI_DDCLK B7 DDC_CLK1/AUX1P SUS_STAT# D12 2 0R2J-2-GP SUS_STAT# 19
DVI_DDCDAT
SB 16 DVI_DDCDAT A7 DDC_DATA1/AUX1N NB_THERMDP 23
1
R425 AE8 C936 pull up
STRP_DATA THERMALDIODE_P
3D3V_S0 1 2 B10 AD8
GPIO MODE 10KR2J-3-GP STRP_DATA THERMALDIODE_N SC470P50V2KX-3GP form SB
2
NB_RESERVED G11 NB_THERMDN 23
TP10 1 RESERVED TESTMODE D13 TESTMODE_NB
STRP_DATA 0 R427
15mil width *1 SB
1
1D8V_S0 1 2 RS780_AUX_CAL C8
+1.8V_VDDA18PCIEPLL AUX_CAL R424
VCC_NB 1.0V 1.1V
L20 150R2F-1-GP RS780M-GP-U1 1K8R2F-GP
1 2
BLM18BB221SN1D-GP
2
1
C348
C359 SCD1U10V2KX-4GP
SC2D2U6D3V3KX-GP
2
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-RS780M_LVDS&CRT_(2/4)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 11 of 56
5 4 3 2 1
5 4 3 2 1
U61D
PAR 4 OF 6 MEM_COMP_P and MEM_COMP_N trace
MEM_A0 AB12 AA18 MEM_DQ0
SSID = N.B MEM_A1
MEM_A2
AE16
V11
MEM_A0
MEM_A1
MEM_A2
MEM_DQ0/DVO_VSYNC
MEM_DQ1/DVO_HSYNC
MEM_DQ2/DVO_DE
AA20
AA19
MEM_DQ1
MEM_DQ2
width >=10mils and 10mils spacing from
other Signals in X,Y,Z directions
MEM_A3 AE15 Y19 MEM_DQ3
MEM_A4 MEM_A3 MEM_DQ3/DVO_D0 MEM_DQ4
AA12 MEM_A4 MEM_DQ4 V17
MEM_A5 AB16 AA17 MEM_DQ5 1D8V_S0
MEM_A5 MEM_DQ5/DVO_D1 L8
MEM_A6 AB14 AA15 MEM_DQ6 15mil width
MEM_A7 MEM_A6 MEM_DQ6/DVO_D2 MEM_DQ7
AD14 MEM_A7 MEM_DQ7/DVO_D4 Y15 1 2
MEM_A8 AD13 AC20 MEM_DQ8
MEM_A9 MEM_A8 MEM_DQ8/DVO_D3 MEM_DQ9 BLM15AG221SN-GP
AD15 MEM_A9 MEM_DQ9/DVO_D5 AD19
1
SBD_MEM/DVO_I/F
D 1D8V_S0 +1.8V_MEM_VDDQ MEM_A10 AC16 AE22 MEM_DQ10 D
L5 MEM_A10 MEM_DQ10/DVO_D6
220 ohm @ 100MHz,2A MEM_A11 AE13 AC18 MEM_DQ11 C153
MEM_A12 MEM_A11 MEM_DQ11/DVO_D7 MEM_DQ12 SC2D2U6D3V3KX-GP
1 2 AC14 AB20
2
MEM_A12 MEM_DQ12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BLM21PG221SN-1GP TP8 1MEM_A13 Y14 AD22 MEM_DQ13
MEM_A13 MEM_DQ13/DVO_D9 MEM_DQ14
MEM_DQ14/DVO_D10 AC22
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C102 C140 C141 MEM_BA0 AD16 AD21 MEM_DQ15 1D1V_S0
MEM_BA0 MEM_DQ15/DVO_D11 L15
1
C105 C106 MEM_BA1 AE17 15mil width
MEM_BA2 MEM_BA1 MEM_DQS0P
AD17 MEM_BA2 MEM_DQS0P/DVO_IDCKP Y17 1 2
W18 MEM_DQS0N
2
MEM_DQS0N/DVO_IDCKN
SC22U6D3V5MX-2GP
RAS# W12 AD20 MEM_DQS1P BLM15AG221SN-GP
MEM_RAS# MEM_DQS1P
SC2D2U6D3V3KX-GP
CAS# Y12 AE21 MEM_DQS1N
WE# MEM_CAS# MEM_DQS1N
AD18 MEM_WE#
1
CS# AB13 W17 MEM_DM0 C187 C182
CKE MEM_CS# MEM_DM0 MEM_DM1 SCD1U10V2KX-4GP
AB18 MEM_CKE MEM_DM1/DVO_D8 AE19
ODT V14
2
MEM_ODT +1.8V_IOPLLVDD18
IOPLLVDD18 AE23
MEM_CLKP V15 AE24 +1.1V_IOPLLVDD
+1.8V_MEM_VDDQ 40D2R2F-GP MEM_CLKN MEM_CKP IOPLLVDD
W14 MEM_CKN
R120 AD23
MEM_COMPP IOPLLVSS
1 2 AE12 MEM_COMPP
1 2 MEM_COMPN AD12 AE18 MEM_VREF_NB +1.8V_MEM_VDDQ
MEM_COMPN MEM_VREF
SCD1U10V2KX-4GPSCD1U10V2KX-4GP
R360 RS780M-GP-U1
40D2R2F-GP
1
R119 C152
1KR2F-3-GP
2
2
C C
SC
1
U21
1
MEM_BA0 L2 B9 MEM_DQ15 R122
MEM_BA1 BA0 DQ15 MEM_DQ14 1KR2F-3-GP C188
L3 BA1 DQ14 B1
D9 MEM_DQ13
2
MEM_A12 DQ13 MEM_DQ12
R2 D1
2
MEM_A11 A12 DQ12 MEM_DQ11
P7 A11 DQ11 D3
MEM_A10 M2 D7 MEM_DQ10
MEM_A9 A10/AP DQ10 MEM_DQ9
P3 A9 DQ9 C2
MEM_A8 P8 C8 MEM_DQ8
MEM_A7 A8 DQ8 MEM_DQ7
P2 A7 DQ7 F9
MEM_A6 N7 F1 MEM_DQ6
MEM_A5 A6 DQ6 MEM_DQ5
N3 A5 DQ5 H9
MEM_A4 N8 H1 MEM_DQ4
MEM_A3 A4 DQ4 MEM_DQ3
N2 A3 DQ3 H3
MEM_A2 M7 H7 MEM_DQ2
MEM_A1 A2 DQ2 MEM_DQ1
M3 A1 DQ1 G2
MEM_A0 M8 G8 MEM_DQ0
R116 A0 DQ0
ATI DY DY
1 2 100R2F-L1-GP-U
MEM_CLKN K8 A9 +1.8V_MEM_VDDQ
MEM_CLKP CK VDDQ1
J8 CK VDDQ2 C1
VDDQ3 C3
CKE K2 C7
CKE VDDQ4
VDDQ5 C9
VDDQ6 E9
VDDQ7 G1
CS# L8 G3
B CS VDDQ8 B
VDDQ9 G7
WE# K3 G9
WE VDDQ10
1
RAS# K7 A1
RAS VDD1 L4
VDD2 E1
CAS# L7 J9 BLM18AG601SN-3GP
CAS VDD3
MEM_DM0 VDD4 M9 600 ohm @ 100MHz,200mA
F3 LDM VDD5 R1
MEM_DM1 B3
2
UDM VDDL_VRAM
VDDL J1
+1.8V_MEM_VDDQ
C103
MEM_DQS0P F7 SC1U6D3V3KX-1GP
2
MEM_DQS0N LDQS
E8 LDQS VSSQ1 A7
VSSQ2 B2
1
VSSQ3 B8
1
R93 D2
C100 1KR2F-3-GP MEM_DQS1P VSSQ4
B7 UDQS VSSQ5 D8
SCD1U10V2KX-4GP MEM_DQS1N A8 E7
2
UDQS VSSQ6
F2
2
VSSQ7
VSSQ8 F8
MEM_VREF_CHIP J2 H2
VREF VSSQ9
VSSQ10 H8
1
A2 NC#A2
1
C104 R100 E2 A3
SCD1U10V2KX-4GP 1KR2F-3-GP MEM_BA2 NC#E2 VSS1
L1 NC#L1 VSS2 E3
A R3 J3 <Variant Name> A
2
NC#R3 VSS3
R7 N1
2
NC#R7 VSS4
R8 NC#R8 VSS5 P9
Wistron Corporation
HYB18T512161B2F-25-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
72.18512.M0U
Title
ATi-RS780M_SidePort_(3/4)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 12 of 56
5 4 3 2 1
5 4 3 2 1
SSID = N.B
D D
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BLM21PG221SN-1GP C251 C250 C258 U61E 100mil Width G22 D5
VSSAHT4 VSSAPCIE4
1
1
220 ohm @ 100MHz,2A C276 J17 A6 +1.1V_RUN_VDDPCIE 1 2 G24 E4
VDDHT_1 VDDPCIE_1 VSSAHT5 VSSAPCIE5
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
K16 PART 5/6 B6 C385 C238 BLM21PG221SN-1GP G25 G1
VDDHT_2 VDDPCIE_2 VSSAHT6 VSSAPCIE6
1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
L16 C6 C374 C384 C381 H19 G2
2
2
VDDHT_3 VDDPCIE_3 VSSAHT7 VSSAPCIE7
M16 VDDHT_4 VDDPCIE_4 D6 J22 VSSAHT8 VSSAPCIE8 G4
P16 E6 L17 H7
2
VDDHT_5 VDDPCIE_5 VSSAHT9 VSSAPCIE9
R16 VDDHT_6 VDDPCIE_6 F6 220 ohm @ 100MHz, 2A L22 VSSAHT10 VSSAPCIE10 J4
T16 VDDHT_7 VDDPCIE_7 G7 L24 VSSAHT11 VSSAPCIE11 R7
VDDPCIE_8 H8 L25 VSSAHT12 VSSAPCIE12 L1
1D1V_S0 H18 J9 M20 L2
VDDHTRX_1 VDDPCIE_9 VSSAHT13 VSSAPCIE13
L19 0.45A per ANT Rev1.1, Page3 G19 VDDHTRX_2 VDDPCIE_10 K9 N22 VSSAHT14 VSSAPCIE14 L4
F20 VDDHTRX_3 VDDPCIE_11 M9 P20 VSSAHT15 VSSAPCIE15 L7
1 2 +1.1V_RUN_VDDHTRX E21 L9 R19 M6
VDDHTRX_4 VDDPCIE_12 VSSAHT16 VSSAPCIE16
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BLM21PG221SN-1GP C375 C323 C324 D22 P9 7A per ANT Rev1.1, Page3 R22 N4
VDDHTRX_5 VDDPCIE_13 VSSAHT17 VSSAPCIE17
1
GROUND
AC23 VDDHTTX_3 VDDC_1 K12 W22 VSSAHT23 VSSAPCIE23 U4
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AB22 J14 C255 C752 C367 C303 C754 C291 C183 W24 V8
VDDHTTX_4 VDDC_2 VSSAHT24 VSSAPCIE24
1
FOR version A12 AA21 U16 C275 C249 W25 V6
VDDHTTX_5 VDDC_3 VSSAHT25 VSSAPCIE25
Y20 VDDHTTX_6 VDDC_4 J11 Y21 VSSAHT26 VSSAPCIE26 W1
1D2V_S0 W19 K15 AD25 W2
2
L12 VDDHTTX_7 VDDC_5 VSSAHT27 VSSAPCIE27
V18 VDDHTTX_8 VDDC_6 M12 VSSAPCIE28 W4
POWER
1 2 +1.2V_RUN_VDDHTTX U17 L14 L12 W7
VDDHTTX_9 VDDC_7 VSS11 VSSAPCIE29
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
C164 C177 H9 T15 BLM21PG221SN-1GP W11
VDDA18PCIE_7 VDDC_19 VSS23
1
220 ohm @ 100MHz,2A T10 U12 C208 C169 C162 C156 C150 W15
VDDA18PCIE_8 VDDC_20 VSS24
R10 T14 220 ohm @ 100MHz, 2A AC12 AE14
2
2
VDDA18PCIE_10 VDDC_22 VSS26 VSS2
AA9 VDDA18PCIE_11 Y18 VSS27 VSS3 G8
AB9 VDDA18PCIE_12 VDD_MEM1 AE10 AB11 VSS28 VSS4 E14
AD9 VDDA18PCIE_13 VDD_MEM2 AA11 AB15 VSS29 VSS5 E15
B B
AE9 VDDA18PCIE_14 VDD_MEM3 Y11 AB17 VSS30 VSS6 J15
1D8V_S0 U10 VDDA18PCIE_15 VDD_MEM4 AD10 DY AB19 VSS31 VSS7 J12
15mil width VDD_MEM5 AB10
3D3V_S0
AE20 VSS32 VSS8 K14
F9 VDD18_1 VDD_MEM6 AC10 AB21 VSS33 VSS9 M11
SC1U6D3V2KX-GP
R175
2
0R0603-PAD
1
SCD1U10V2KX-4GP
SC
2
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-RS780M_PWR&GD_(4/4)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 13 of 56
5 4 3 2 1
5 4 3 2 1
1D8V_S0
1
C138 C137 C98 5V_S0
VGA VGA VGA
SC VGA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
2
U10 SCD1U10V2KX-4GP
PE_GPIO2 R90 1 2 0R0402-PAD
1 IN 16 C99
1 2
VCC
D 11 NB_CRT_RED 2 S1A EN# 15 D
U14 3 S2A 14 NB_CRT_BLUE 11
49 GPU_CRT_RED S1D
13
18
20
30
40
42
16 CRT_RED 4 DA S2D 13 GPU_CRT_BLUE 49
5
8
11 NB_CRT_GREEN 5 S1B DD 12 CRT_BLUE 16
6 S2B 11
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
49 GPU_CRT_GREEN S1C
16 CRT_GREEN 7 DB S2C 10
15 TXACLK- 2 A0 B1_0 38 NB_TXACLK- 11 8 GND DC 9
B1_1 37 NB_TXACLK+ 11
15 TXACLK+ 3 36 NB_TXAOUT0- 11 PI5V330SQE-GP
A1 B1_2
B1_3 35 NB_TXAOUT0+ 11 VGA
15 TXAOUT0- 6 A2 B1_4 29 NB_TXAOUT1- 11
B1_5 28 NB_TXAOUT1+ 11
15 TXAOUT0+ 7 A3 B1_6 27 NB_TXAOUT2- 11
B1_7 26 NB_TXAOUT2+ 11
15 TXAOUT1- 11 A4 NB_CRT_RED R84 1 2 0R2J-2-GP UMA CRT_RED
15 TXAOUT1+ 12 A5 B2_0 34 GPU_TXACLK- 49
33 GPU_TXACLK+ 49 NB_CRT_GREEN R82 1 2 0R2J-2-GP UMA CRT_GREEN
B2_1
15 TXAOUT2- 15 A6 B2_2 32 GPU_TXAOUT0- 49
31 GPU_TXAOUT0+ 49 NB_CRT_BLUE R92 1 2 0R2J-2-GP UMA CRT_BLUE
B2_3
15 TXAOUT2+ 16 A7 B2_4 25 GPU_TXAOUT1- 49
B2_5 24 GPU_TXAOUT1+ 49
R115 23 GPU_TXAOUT2- 49
PE_GPIO2 GPIO_SEL_R B2_6 SRN0J-6-GP
2 1 9 22 GPU_TXAOUT2+ 49 RN2 UMA
SEL B2_7 NB_TXACLK- TXACLK-
1 4
2
NB_TXACLK+ 2 3 TXACLK+
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
10KR2J-3-GP R114
VGA 10KR2J-3-GP SRN0J-6-GP RN3 UMA
VGA NB_TXAOUT0- 1 4 TXAOUT0-
1
4
10
14
17
19
21
39
41
C 43 PI2PCIE412-DZHE-GP NB_TXAOUT0+ 2 3 TXAOUT0+ C
1
1
NB_TXBOUT0- 1 4 TXBOUT0-
R675 NB_TXBOUT0+ 2 3 TXBOUT0+
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 4
2
2
PX_EN# NB_TXBOUT1+ 2 3 TXBOUT1+
D
NB_TXBOUT2+ TXBOUT2+
13
18
20
30
40
42
2 3
5
8
Q48
2N7002-11-GP
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B PX_EN 3D3V_S0 B
G VGA
15 TXBCLK- 2 A0 B1_0 38 NB_TXBCLK- 11
37 NB_TXBCLK+ 11
S
B1_1
15 TXBCLK+ 3 A1 B1_2 36 NB_TXBOUT0- 11
B1_3 35 NB_TXBOUT0+ 11 SB
1
15 TXBOUT0- 6 A2 B1_4 29 NB_TXBOUT1- 11
28 NB_TXBOUT1+ 11 R81
B1_5 2K2R2J-2-GP
15 TXBOUT0+ 7 A3 B1_6 27 NB_TXBOUT2- 11 VGA
B1_7 26 NB_TXBOUT2+ 11 SC
15 TXBOUT1- 11
2
A4
Q49 PE_GPIO2 16
15 TXBOUT1+ 12 A5 B2_0 34 GPU_TXBCLK- 49
33 2N7002-11-GP
B2_1 GPU_TXBCLK+ 49
15 TXBOUT2- 15 A6 B2_2 32 GPU_TXBOUT0- 49 VGA
B2_3 31 GPU_TXBOUT0+ 49 18 INT_VGA_TV_EN# D S
15 TXBOUT2+ 16 A7 B2_4 25 GPU_TXBOUT1- 49
B2_5 24 GPU_TXBOUT1+ 49
23 GPU_TXBOUT2- 49
G
GPIO_SEL_R B2_6
9 SEL B2_7 22 GPU_TXBOUT2+ 49
PX_EN# GPIO SEL :
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
D
H : SELECTION EXTERNAL GRAPHIC
Q4 L : SELECTION INTERNAL GRAPHIC
2N7002-11-GP
1
4
10
14
17
19
21
39
41
43
VGA_WSXGA
S
A <Variant Name> A
18 PE_GPIO2_NB
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
3D3V_S0
1
R96
4K7R2F-GP
LCD CONNECTOR
2
11 NB_LCD_DDCLK 1 R94 2 0R2J-2-GP
D D
3.3V_DELAY DCBATOUT
1
C78 C83
1
LCD1
VGA R91 SC10U25V6KX-1GP SCD1U25V3KX-GP
2
4K7R2F-GP 42
20 21 TXACLK- 14
19 22 TXACLK+ 14
G
2
18 23
Q5 CAMERA_EN 17 24 TXAOUT0- 14
2N7002-11-GP S D ID_CLK 5V_CAM_S0 16 25 TXAOUT0+ 14
49 GPU_EDID_CLK
VGA 15 26 TXAOUT1- 14
ID_CLK 14 27 TXAOUT1+ 14
1
C97 ID_DAT 13 28 TXAOUT2- 14
3D3V_S0 12 29 TXAOUT2+ 14
SCD1U16V2ZY-2GP 11 30
35 BRIGHTNESS
2
10 31 TXBCLK- 14
1
9 32 TXBCLK+ 14
R102 8 33
4K7R2F-GP 7 34 TXBOUT0- 14
19,55 USBP3- 6 35 TXBOUT0+ 14
19,55 USBP3+ 5 36 TXBOUT1- 14
2
1
41
1
C R103 3D3V_S0 C
1
4K7R2F-GP 10KR2F-2-GP EC7
20.F1047.040
2
SCD1U16V2ZY-2GP
G
2
2
Q6
49 GPU_EDID_DATA
2N7002-11-GP S D ID_DAT TOP VIEW
VGA
LCDVDD_S0 20 21
CAMERA POWER
1
C131 C128
R678
DY SC10U10V5KX-2GP SCD1U16V2ZY-2GP
2
1 2
U9
0R3-0-U-GP sc
5V_S0 5 IN#5
6 IN#6 GND 4
1
7 IN#7 EN 3 CAMERA_EN 34
C93 8 2 5V_CAM_S0 1 40
SCD1U16V2ZY-2GP IN#8 OUT
9 1
2
GND IN#1
1
B B
2
LCDVDD_S0
1
C110
SC1U10V2KX-1GP
2
U19
U18
3D3V_S0 5 IN#5 2 NB_LVDS_DIGON 11
6 IN#6 GND 4
1
C113 7 3 LCDVDD_ON 3
IN#7 EN
8 IN#8 OUT 2
SCD1U16V2ZY-2GP 9 1 1 GPU_LCDVDD_ON 49
2
GND IN#1
1
CH715FPT-GP
G5281RC1U-GP R99
74.05281.093 100KR2J-1-GP
2
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LCD CONN/CAMERA
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 15 of 56
5 4 3 2 1
5 4 3 2 1
CN2
16
Layout Note: NP1
6
Place these resistors close to the CRT-out connector SC 11
CRT_R
SB 7
1
L43
VGA CRT_DDCCLK 15
R307 R308 R311 5
1
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
C585 NP2
1
1
3D3V_S0 VGA 17
EC23 EC24 EC22 EC20 EC21 EC19 SCD01U50V2ZY-1GP
2
2
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
C C
2
2
VIDEO-15-84-GP-U
SB
1
R312 VGA
VGA 20KR2F-L-GP
20.20735.015 5V_CRT1_S0
SC PE_GPIO2#
2
D17
D
2
Q16
2N7002-11-GP CRT_R 3
14 PE_GPIO2 PE_GPIO2 G VGA
1
Hsync & Vsync level shift DY
S
SB SB BAV99-5-GP
3D3V_S0 5V_S0
D18
3D3V_S0 5V_CRT1_S0
2
UMA
1
4K7R2J-2-GP
SCD1U10V2KX-4GP
1
4K7R2J-2-GP
R302
SB 1
2
0R2J-2-GP
4K7R2J-2-GP
14
G
1
B U47A BAV99-5-GP B
11 DVI_DDCLK 2 UMA1 R296
2
2 VGA1 4K7R2J-2-GP 2
11 NB_CRT_DDCCLK
Q13
14
7
4
0R2J-2-GP 2N7002-11-GP S D CRT_DDCCLK CRT_B 3
49 GPU_CRT_DDCCLK CRT_DDCCLK 17
VGA VGA
49 GPU_CRT_VSYNC 5 6 2 R294 1 1
U47B
DY
SSAHCT125PWR-GP 0R2J-2-GP BAV99-5-GP
7
SB SB
3D3V_S0 RN36
2 3 JVGA_VS JVGA_VS 17
3D3V_S0 5V_CRT1_S0 HSYNC_5 1 4 JVGA_HS
5V_S0 JVGA_HS 17
R306
UMA SRN33J-5-GP-U
PE_GPIO2 2 1
1
4K7R2J-2-GP
SB
1
4K7R2J-2-GP
R303
0R2J-2-GP
4K7R2J-2-GP
14
10
SB
G
2 UMA1 U47C
11 DVI_DDCDAT R297
2
13
7
0R2J-2-GP 2N7002-11-GP S D CRT_DDCDATA
49 GPU_CRT_DDCDATA CRT_DDCDATA 17
VGA Wistron Corporation
49 GPU_CRT_HSYNC 12 11 2 R298 1
VGA 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
U47D Taipei Hsien 221, Taiwan, R.O.C.
SSAHCT125PWR-GP 0R2J-2-GP
7
Title
CRT CONN
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 16 of 56
5 4 3 2 1
5 4 3 2 1
SC
1 2 TMDS_PL
R290 UMA 499R2F-2-GP
1 2
1
R288 UMA 499R2F-2-GP 1 2
EC86 EC87 EC88 EC89 EC90 EC91 EC92 EC93 1 2 R286 UMA 499R2F-2-GP
R291 499R2F-2-GP
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
SC3D3P50V2CN-GP
UMA 1 2
DVI_TXAOUT0+ 2
DVI_TXAOUT0- 2
2
DY DY DY DY DY DY DY DY 1 2 R287 UMA 499R2F-2-GP
R289 499R2F-2-GP
DVI_TXAOUT1+
DVI_TXAOUT2+
UMA
DVI_TXAOUT1-
DVI_TXAOUT2-
DVI_TXACLK+
DVI_TXACLK-
1 2
R283 UMA 499R2F-2-GP
D 1 2 D
R284 UMA 499R2F-2-GP
SC
CN3
25
3D3V_S0 5V_HDMI1_S0
3D3V_S0 10 DVI_TXAOUT0- 17 NP1
10 DVI_TXAOUT1- 9 1 DVI_TXAOUT2- 10
DVI_A_HPD_R 1 2 DVI_A_HPD 11 10 DVI_TXAOUT0+ 18 2 DVI_TXAOUT2+ 10
R272 R275 R276 R292 20KR2J-L2-GP 10 DVI_TXAOUT1+ 10
1
1
R274 UMA 19 3
1
4K7R2J-2-GP
4K7R2J-2-GP
2K2R2J-2-GP
11
R282
2K2R2J-2-GP
SB 20 4
12
VGA UMA 5V_S0 5V_DVI1_S0 5V_DVI_S0 21 5
2
2
VGA RB521S-30-2-GP 13
2
UMAD15 F2 POLYSW-1A6V-3-GP
100KR2J-1-GP
3 4 22 6 CRT_DDCCLK 16
VGA VGA A K 1 2 14
S G D
D G S
2 5 HDMI_CLK11 10 DVI_TXACLK+ 23 7
49 HDMI_DDCCLK CRT_DDCDATA 16
1
C586 UMA 15
1 6 HDMI_DAT11 10 DVI_TXACLK- 24 8 JVGA_VS 16
49 HDMI_DDCDATA
DVI_A_HPD_R 16
2
UMA 16 CRT_B C3 C1 CRT_R 16
C5 C6
Q10 2N7002DW-7F-GP 16 JVGA_HS C4 NP2
SCD01U16V2KX-3GP C2 CRT_G 16
VGA
26
C FOX-CONN24-3R-5GP C
1 2 20.20759.024
R267 VGA 499R2F-2-GP
1 2 5V_S0 UMA
R266 VGA 499R2F-2-GP
1 2 TMDS_PL
R265 VGA 499R2F-2-GP
D
1 2
R264 VGA 499R2F-2-GP Q11
2N7002-11-GP
1 2 G
R263 VGA 499R2F-2-GP
1
S
1 2
R269 VGA 499R2F-2-GP R285
100KR2J-1-GP
1 2
2
R268 VGA 499R2F-2-GP
1 2
R270 VGA 499R2F-2-GP SC
5V_S0 5V_HDMI1_S0 5V_HDMI_S0
RB521S-30-2-GP HDMI1
VGA
DY D36 F3 POLYSW-1A6V-3-GP
49 HDMI_TXD2 A K 1 2 18 15 HDMI_CLK11
+5V_POWER SCL
1
B HDMI_DAT11 B
SDA 16
C945 VGA
49 HDMI_TXD2# R677 HDMI_TXD0 7
2
HDMI_TXD0# TMDS_DATA0+ HDMI_CEC TP39
49 HDMI_TXD1 VGA 1 2 9 TMDS_DATA0- CEC 13 1
0R3-0-U-GP HDMI_TXD1 4 17
HDMI_TXD1# TMDS_DATA1+ DDC/CEC_GROUNG HDMI_DET_K
49
49
HDMI_TXD1#
HDMI_TXD0 SCD01U16V2KX-3GP VGA HDMI_TXD2
6
1
TMDS_DATA1- HOT_PLUG_DETECT 19
R262
R293 200KR2F-L-GP
22KR2F-GP
VGA
VGA VGA
C
Q12
SB B
2
VGA D21
CH3904PT-GP
A VGA <Variant Name> A
E
CH751H-40PT
11 NB_HDMI_HPD R301 1 2 0R2J-2-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
PCI CLKS
1 2 ALINK_NBRX_C_SBTX_P0 V23 P1 PCI_CLK2_R R529 1 2 22R2J-2-GP
10 ALINK_NBRX_SBTX_P0 PCIE_TX0P PCICLK2 CLK_PCI_5035 22
C815 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N0 V22 P2 PCI_CLK3_R R538 1 2 22R2J-2-GP
10 ALINK_NBRX_SBTX_N0 PCIE_TX0N PCICLK3 CLK_PCI_5028 22
C819 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_P1 V24 T4 PCI_CLK4_R R553 1 2 22R2J-2-GP
10 ALINK_NBRX_SBTX_P1 PCIE_TX1P PCICLK4 PCI_CLK4 22
C812 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N1 V25 T3 PCI_CLK5_R R550 1 2 22R2J-2-GP
10 ALINK_NBRX_SBTX_N1 PCIE_TX1N PCICLK5/GPIO41 PCI_CLK5 22
C816 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_P2 U25
10 ALINK_NBRX_SBTX_P2 PCIE_TX2P
C807 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N2 U24
10 ALINK_NBRX_SBTX_N2 PCIE_TX2N TP77
C811 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_P3
D 10 ALINK_NBRX_SBTX_P3
C803
1
1
2
2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N3
T23
T22
PCIE_TX3P
N1 1
POWER EXPRESS SUPPORT D
10 ALINK_NBRX_SBTX_N3 PCIE_TX3N PCIRST#
C806 SCD1U10V2KX-4GP
1
SC10U6D3V5KX-1GP
BLM21PG221SN-1GP R7
AD12
1
1
SC1U6D3V2KX-GP
AD15
Y7 D30
2
AD16
AD17 W8 24,25,28,36,37 PLTRST_SYS# 1 2
AD18 V9
Y8 CH751H-40PT
AD19
AD20 AA8 DY
Y4 D29
AD21 PE_GPIO0
AD22 Y3 1 2 MXM_RST# 48
AD23 Y2 PCI_AD23 22
2
AA2 PCI_AD24 22 CH751H-40PT
C AD24 R579 C
AD25 AB4 PCI_AD25 22
3 CLK_PCIE_SB N25 PCIE_RCLKP/NB_LNK_CLKP AD26 AA1 PCI_AD26 22 DY 2K2R2F-GP
3 CLK_PCIE_SB# N24 PCIE_RCLKN/NB_LNK_CLKN AD27 AB3 PCI_AD27 22
AB2 PCI_AD28 22
1
AD28 3D3V_S0
K23 NB_DISP_CLKP AD29 AC1 PCI_AD29 22
K22 NB_DISP_CLKN AD30 AC2 PCI_AD30 22
PCI INTERFACE
AD31 AD1
1
M24 NB_HT_CLKP CBE0# W2
M25 U7 VGA R567
NB_HT_CLKN CBE1# 4K7R2F-GP
CBE2# AA7
P17 CPU_HT_CLKP CBE3# Y1
3D3V_S0 VGA
M18 AA6 D26
2
CPU_HT_CLKN FRAME#
M23
DEVSEL# W5
AA5
SC 11 DP_AUX0N 1 2
SLT_GFX_CLKP IRDY#
M22 Y5 CH751H-40PT
SLT_GFX_CLKN TRDY#
PAR U6 DY VGA
1
J19 W6 D27
GPP_CLK0P STOP# R676 PX_EN
J18 GPP_CLK0N PERR# W4 14 PX_EN 1 2 PE_GPIO2_NB 14
V7 8K2R2J-3-GP
SERR#
2
L20 AC3 CH751H-40PT
GPP_CLK1P REQ0# 3D3V_S0 R563
L19 AD4
2
GPP_CLK1N REQ1#
REQ2# AB7 DY 2K2R2F-GP
M19 GPP_CLK2P REQ3#/GPIO70 AE6 INT_VGA_TV_EN# 14
1
CLOCK GENERATOR
M20 AB6 VGA
1
GPP_CLK2N REQ4#/GPIO71 R576
GNT0# AD2
N22 GPP_CLK3P GNT1# AE4 VGA 0R2J-2-GP
R575
8K2R2J-3-GP
P22 GPP_CLK3N GNT2# AD5
1 DY 2 AC6 1 2 PE_GPIO1 43,47
2
R467 20MR3-GP GNT3#/GPIO72 3D3V_S0
L18 25M_48M_66M_OSC GNT4#/GPIO73 AE5
B B
TP31 CLKRUN# AD6 PM_CLKRUN# 34
2 1 32K_X1 V5
LOCK#
1
1 J21 25M_X1
C779 AD3 R241 R235
SC12P50V2JN-3GP INTE#/GPIO33 10KR2J-3-GP DY IRQ_SERIRQ
TPAD28 INTF#/GPIO34 AC4 1 2
AE2 PX_EN 0R2J-2-GP 8K2R2J-3-GP
INTG#/GPIO35
3
2
R465 25M_X2 INTH#/GPIO36 R569VGA
20MR3-GP
SC
G22 LPCCLK0_R R483 1 2 22R2J-2-GP
LPCCLK0 LPCCLK0 22,34,55 3D3V_AUX_S5
E22 LPCCLK1_R R484 1 2 33R2J-2-GP LPCCLK1 22,36,55
2
LPCCLK1
A3 H24 LPC_LAD0 34,36
2
X7 X1 LAD0
LAD1 H23 LPC_LAD1 34,36
RTC XTAL
1
X-32D768KHZ-38GPU 0R0402-PAD +COIN_CELL
SC R461 LAD2 J25
J24
LPC_LAD2 34,36
R489
LAD3 LPC_LAD3 34,36
LPC
2
SC12P50V2JN-3GP R485 LDRQ1#/GNT5#/GPIO68 SB700_GPIO65 +3.3V_ALW_2_R
BMREQ#/REQ5#/GPIO65 AD7 1 2 DY 1
1 2 SERIRQ V15 IRQ_SERIRQ 34
300R2J-4-GP 3 1
11 ALLOW_LDTSTOP F23 49K9R2F-L-GP +RTC_CELL 2
ALLOW_LDTSTP RTCCLK 22,23
6 CPU_PROCHOT# F24 C3 R496 2 3
PROCHOT# RTCCLK INTRUDER_ALERT#
6 CPU_PWRGD F22 LDT_PG INTRUDER_ALERT# C2 1 2
+VBAT_IN
CPU
1
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
C787 C788 510R2J-1-GP 0R2J-2-GP ETY-CON3-4-GP
A SB700-1-GP-U <Variant Name> A
2
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-SB700_PCIE&PCI_(1/5)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 18 of 56
5 4 3 2 1
5 4 3 2 1
3D3V_S0
1 2 SUS_STAT#
R505 4K7R2F-GP U67D
1 DY 2 SHUTDOWN#/GPIO5
R236 10KR2J-3-GP Part 4 of 5
1 2 SB_TO_EC_PWRGD KBC,LAN INT PH E1
SB700
R238 10KR2J-3-GP PCI_PME#/GEVENT4# CLK48_USB
INT PH E2 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC C8 CLK48_USB 3
1 2 SMBCLK0_SB 1SB700_SLPS2 H7 R488
R242 2K2R2F-GP TP29 SLP_S2/GPM9# USB_PCOMP 1 10R2F-L-GP
SMBDAT0_SB
SC 23,24,34,37,42 PM_SLP_S3# F5 SLP_S3# USB_RCOMP G8
R225
2
CLK48_USB_R2
USB MISC
1 2 KBC INT PH 24,34,41,44 PM_SLP_S5# G1 SLP_S5# 1
DY 2 1 DY2
USB 1.1
SB_TEST2 GA20IN/GEVENT0# USB_FSD12P signals in X, Y, Z directions.
1 DY 2 INT PH 34 KBRCIN# W15 KBRST#/GEVENT1# USB_FSD12N E8
R226 2K2R2F-GP INT PH 34 ECSCI#_KBC_R K4
SB_TEST1 ECSMI#_KBC LPC_PME#/GEVENT3#
1 DY 2K2R2F-GP
2 INT PH K24 LPC_SMI#/EXTEVNT1# USB_HSD11P H11
R224 F1 J10
S3_STATE/GEVENT5# USB_HSD11N
J2 SYS_RESET#/GPM7#
DY ECSCI#_KBC_R
24,25,28 SB_PCIE_WAKE# H6 WAKE#/GEVENT8# USB_HSD10P E11
1 2 INT PH F2 BLINK/GPM6# USB_HSD10N F11
R504 10KR2J-3-GP R227 1 2 0R2J-2-GP SMB_ALERT# J6
6 CPU_THERMTRIP#_L SMBALERT#/THRMTRIP#/GEVENT2#
1 DY 2 SB_PCIE_WAKE# 37 SB_TO_EC_PWRGD SB_TO_EC_PWRGD W14 A11
R500 10KR2J-3-GP NB_PWRGD USB_HSD9P
USB_HSD9N B11
1 DY 2 SMB_ALERT# INT PH RSMRST#_SB1 2 SB_RSMRST#_R D3
R228 10KR2J-3-GP R487 RSMRST#
USB_HSD8P C10
SMBCLK1_SB
1
R507
2
2K2R2F-GP
SC 0R0402-PAD USB_HSD8N D10
USB 2.0
3,8,9 SMBCLK0_SB AA18 SCL0/GPOC0# USB_HSD5N D12 USBP5- 24
3,8,9 SMBDAT0_SB W18 SDA0/GPOC1#
24,25 SMBCLK1_SB K1 SCL1/GPOC2# USB_HSD4P B12 USBP4+ 1 TP99
C
24,25 SMBDAT1_SB K2 SDA1/GPOC3# USB_HSD4N A12 USBP4- 1 TP98
----->BT SB C
1D8V_S0
GPIO
AA20 DDC1_SCL/GPIO9
Y18 DDC1_SDA/GPIO8 USB_HSD3P G12 USBP3+ 15,55
SHUTDOWN#/GPIO5
C1
Y19
LLB#/GPIO66 USB_HSD3N G14 USBP3- 15,55 ----->CAMERA
R581 SHUTDOWN#/GPIO5
DY SB_TO_EC_PWRGD
G5 DDR3_RST#/GEVENT7# USB_HSD2P H14 USBP2+ 29
1 2 USB_HSD2N H15 USBP2- 29
300R2J-4-GP A13
USB_OC#1_2
USB_HSD1P USBP1+ 29
USB_HSD1N B13 USBP1- 29
OC INT PH
34 ECSWI#_SB B9
B8
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N A14 USBP0- 29 USB_OC#0
USB_OC5#/IR_TX0/GPM5#
28 CR_CPPE# A8 USB_OC4#/IR_RX0/GPM4# IMC_GPIO8 A18
USB OC
TP22 1 A9 B18
TP25 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
SB TP28
1 E5 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 F21
Close to SB700R513 1 F8 USB_OC1#/GPM1# SCL2/IMC_GPIO11 D21
31,55 SB_AZ_CODEC_BITCLK 1 2 33R2J-2-GP
24 CPPE# E4 USB_OC0#/GPM0# SDA2/IMC_GPIO12 F19
TP24 1 E20
R512 SB_AZ_BITCLK SCL3_LV/IMC_GPIO13
31 SB_AZ_CODEC_SDOUT 1 2 33R2J-2-GP M1 AZ_BITCLK SDA3_LV/IMC_GPIO14 E21
SB_AZ_SDOUT M2 E19
SB_AZ_CODEC_SDIN0 AZ_SDOUT IMC_PWM1/IMC_GPIO15
31 SB_AZ_CODEC_SDIN0 J7 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 D19 SB_GPO16 22
J8 AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 E18 SB_GPO17 22
HD AUDIO
L8 AZ_SDIN2/GPIO44
M3 AZ_SDIN3/GPIO46 IMC_GPIO18 G20
R232 2 33R2J-2-GP SB_AZ_SYNC
31 SB_AZ_CODEC_SYNC 1
SB_AZ_RST#
L6
M4
AZ_SYNC IMC_GPIO19 G21
D25
Strap Pin / define to use LPC or SPI ROM
R521 AZ_RST# IMC_GPIO20
1 2 33R2J-2-GP L5 D24
INTEGRATED uC
B 31 SB_AZ_CODEC_RST# AZ_DOCK_RST#/GPM8# IMC_GPIO21 B
IMC_GPIO22 C25
IMC_GPIO23 C24
SB_AZ_RST# 22 IMC_GPIO24 B25
IMC_GPIO25 C23
TO STRAPS
2
IMC_GPIO26 B24
R587 B23
IMC_GPIO27
10KR2J-3-GP IMC_GPIO28 A23
1D8V_S0 C22
DY IMC_GPIO29
A22
1
IMC_GPIO30
10KR2J-3-GP
SC IMC_GPIO31 B22 1 DY 2
1
INTEGRATED uC
IMC_GPIO1 IMC_GPIO35 RSMRST#_SB
H21 A20 1 2
2
1
0R2J-2-GP D22 A19
DY IMC_GPIO4 IMC_GPIO39 C484
DY E24 IMC_GPIO5 IMC_GPIO40 D18 DY SC2D2U6D3V3KX-GP
E25 C18
2
IMC_GPIO6 IMC_GPIO41
D23 IMC_GPIO7
SB700-1-GP-U
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-SB700_USB&GPIO_(2/5)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 19 of 56
5 4 3 2 1
5 4 3 2 1
U67B
SCD01U50V2KX-1GP
R583
30 SATA_TX0+_R C859 1 2 SATA_TX0+ 1 0R2J-2-GP
2 SATA_TX0+_TT AD9
SB700 AA24
SATA_TX0P IDE_IORDY PIDE_IORDY 27
30 SATA_TX0-_R C860 1 2 SATA_TX0- 1 2 SATA_TX0-_TT AE9 SATA_TX0N Part 2 of 5 IDE_IRQ AA25 PIDE_IRQ14 27
SATA HDD SCD01U50V2KX-1GP
SCD01U50V2KX-1GP R584 0R2J-2-GP Y22
IDE_A0 PIDE_A0 27
30 SATA_RX0- C845 1 2 SATA_RX0-_R AB10 AB23
SATA_RX0N IDE_A1 PIDE_A1 27
D 30 SATA_RX0+ C846 1 2 SATA_RX0+_R AC10 Y23 D
SATA_RX0P IDE_A2 PIDE_A2 27
SCD01U50V2KX-1GP SCD01U50V2KX-1GP AB24
IDE_DACK# PIDE_DACK# 27
30 SATA_TX1+_R C852 1 2 SATA_TX1+ AE10 SATA_TX1P IDE_DRQ AD25 PIDE_DREQ 27
30 SATA_TX1-_R C853 1 2 SATA_TX1- AD10 AC25
SATA_TX1N IDE_IOR# PIDE_IOR# 27
SATA ODD SCD01U50V2KX-1GP
SCD01U50V2KX-1GP AC24
IDE_IOW# PIDE_IOW# 27
30 SATA_RX1- C848 1 2 SATA_RX1-_R AD11 SATA_RX1N IDE_CS1# Y25 PIDE_CS#0 27
30 SATA_RX1+ C847 1 2 SATA_RX1+_R AE11 SATA_RX1P IDE_CS3# Y24 PIDE_CS#1 27
SCD01U50V2KX-1GP
AB12 AD24 PIDE_D0
SATA_TX2P IDE_D0/GPIO15 PIDE_D1
AC12 SATA_TX2N IDE_D1/GPIO16 AD23
AE22 PIDE_D2
ATA 66/100/133
IDE_D2/GPIO17 PIDE_D3
AE12 SATA_RX2N IDE_D3/GPIO18 AC22
AD12 AD21 PIDE_D4
SC4700P50V2KX-1GP R585 SATA_RX2P IDE_D4/GPIO19 PIDE_D5
IDE_D5/GPIO20 AE20
29 SATA_TX3+_R C861 1 2SATA_TX3+ 1 0R2J-2-GP
2 SATA_TX3+_TT AD13 SATA_TX3P IDE_D6/GPIO21 AB20 PIDE_D6
SERIAL ATA
29 SATA_TX3-_R C862 1 2SATA_TX3- 1 2 SATA_TX3-_TT AE13 SATA_TX3N IDE_D7/GPIO22 AD19 PIDE_D7
ESATA SC4700P50V2KX-1GP SC4700P50V2KX-1GP R586 0R2J-2-GP AE19 PIDE_D8
C844 SATA_RX3-_R IDE_D8/GPIO23 PIDE_D9
29 SATA_RX3- 1 2 AB14 SATA_RX3N IDE_D9/GPIO24 AC20
29 SATA_RX3+ C843 1 2 SATA_RX3+_R AC14 AD20 PIDE_D10
SATA_RX3P IDE_D10/GPIO25 PIDE_D11
IDE_D11/GPIO26 AE21
SC4700P50V2KX-1GP AE14 AB22 PIDE_D12
SATA_TX4P IDE_D12/GPIO27 PIDE_D13
AD14 SATA_TX4N IDE_D13/GPIO28 AD22
AE23 PIDE_D14
IDE_D14/GPIO29 PIDE_D15
AD15 SATA_RX4N IDE_D15/GPIO30 AC23
AE15 SATA_RX4P
AB16 SATA_TX5P
C561 AC16
SC12P50V2JN-3GP SATA_TX5N
C 2 1
ATI 10M AE16
SPI_DI/GPIO12 G6
D2 C
1KR2F-3-GP SATA_RX5N SPI_DO/GPIO11
AD16 SATA_RX5P SPI_CLK/GPIO47 D1
1
R230 F4
SPI_HOLD#/GPIO31
SPI ROM
X4 R245 1 2 SATA_CAL V12 SATA_CAL SPI_CS#/GPIO32 F3
XTAL-25MHZ-96GP 1MR2F-GP
SATA_X1 Y12 U15
2
SATA_X1 LAN_RST#/GPIO13
J1
2
SATA PWR
FANIN1/GPIO51 P8
1 2 W12 XTLVDD_SATA FANIN2/GPIO52 R8
20mil Width BLM15AG221SN-GP C952 1mA
1
SC2D2U6D3V3KX-GP C554
SC TEMP_COMM C6
B6
SCD1U10V2KX-4GP TEMPIN0/GPIO61
A6
2
TEMPIN1/GPIO62
A5
HW MONITOR
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64 B5 TALERT# 23 Local Frame Buffer Strapping List
Copy from Becks.
VIN0/GPIO53 A4
3D3V_S0 +3.3V_XTLVDD_SATA VIN1/GPIO54 B4
C4
LFB_ID2 LFB_ID1 LFB_ID0
VIN2/GPIO55
L37 VIN3/GPIO56 D4
D5 LFB_ID0
(GPIO 59) (GPIO 58) (GPIO 57)
VIN4/GPIO57 LFB_ID1
20mil Width
1 2
BLM15AG221SN-GP C953 VIN5/GPIO58 D6
LFB_ID2
Hynix 0 0 0
SC VIN6/GPIO59 A7
1
B C548 B
B7 Qimonda 0 0 1
SC1U6D3V2KX-GP SCD1U10V2KX-4GP VIN7/GPIO60
+3.3V_AVDD_HWM
L29
+3.3V_ALW_R * Samsung 0 1 0
2
5mA AVDD F6 1 2
SC2D2U6D3V3KX-GP
SCD1U10V2KX-4GP
G7 C499 BLM15AG221SN-GP
AVSS
1
C496
SB700-1-GP-U
2
LFB_ID0 to LFB_ID2 got internal PU to S5.
3D3V_S5
R464 1
DY
Layout connect to Cap then GND 2 10KR2J-3-GP
R463 1 SAM 2 10KR2J-3-GP
R462 1 2 10KR2J-3-GP
LFB_ID0 R470
QIM 10KR2J-3-GP
LFB_ID1 R471
1 SAM2 10KR2J-3-GP
1 QIM 2
LFB_ID2 R472 1 2 10KR2J-3-GP
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-SB700_SATA-IDE_(3/5)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 20 of 56
5 4 3 2 1
5 4 3 2 1
U67C +1.2V_RUN_VDD
SSID = S.B L9 VDDQ_1
SB700
VDD_1 L15
U67E
SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M9 VDDQ_2 Part 3 of 5 VDD_2 M12 SB700 Part 5 of 5
1
T15 604mA M14 C531 C535 C526 C543 C542 220 ohm @ 100MHz, 2A A2
3D3V_S0 VDDQ_3 VDD_3 VSS_1
U9 VDDQ_4
71mA VDD_4 N13 VSS_2 A25
CORE S0
U16 P12 B1
2
ST220U6D3VDM-15GP VDDQ_5 VDD_5 VSS_3
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
PCI/GPIO I/O
U17 VDDQ_6 VDD_6 P14 A12 VSS_4 D7
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 V8 VDDQ_7 VDD_7 R11 T10 AVSS_SATA_1 VSS_5 F20
1
TC12 C547 C841 C556 C544 C550 C534 W7 R15 1D2V_S0 U10 G19
VDDQ_8 VDD_8 L34 AVSS_SATA_2 VSS_6
DY Y6 VDDQ_9 VDD_9 T16 U11 AVSS_SATA_3 VSS_7 H8
AA4 1 2 U12 K9
2
2
VDDQ_10 BLM21PG221SN-1GP AVSS_SATA_4 VSS_8
D AB5 VDDQ_11 V11 AVSS_SATA_5 VSS_9 K11 D
AB21 VDDQ_12 V14 AVSS_SATA_6 VSS_10 K16
W9 AVSS_SATA_7 VSS_11 L4
Y9 AVSS_SATA_8 VSS_12 L7
1D8V_S0 +1.2V_RUN_CKVDD 1D2V_S0
Use Flash I/O:+1.8V / IDE:+3.3V L36 Y11 AVSS_SATA_9 VSS_13 L10
Y14 AVSS_SATA_10 VSS_14 L11
SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
AA21 VDD33_18_2 CKVDD_1.2V_2 L22 AA9 AVSS_SATA_12 VSS_16 L14
1
1
IDE/FLSH I/O
CLKGEN I/O
C829 C555 C552 C831 C570 AA22 L24 C516 C510 C532 C533 BLM15AG221SN-GP AB9 L16
VDD33_18_3 CKVDD_1.2V_3 AVSS_SATA_13 VSS_17
SC2D2U6D3V3KX-GP
AE25 L25 C507 AB11 M6
VDD33_18_4 CKVDD_1.2V_4 AVSS_SATA_14 VSS_18
AB13 M10
2
2
AVSS_SATA_15 VSS_19
SC10U10V5KX-2GP
71mA 286mA AB15 AVSS_SATA_16 VSS_20 M11
AB17 AVSS_SATA_17 VSS_21 M13
AC8 AVSS_SATA_18 VSS_22 M15
AD8 AVSS_SATA_19 VSS_23 N4
AE8 AVSS_SATA_20 VSS_24 N12
N14
1D2V_S0 +1.2V_PCIE_VDDR POWER VSS_25
VSS_26 P6
L35 50mil Width +3.3V_ALW_R VSS_27 P9
VSS_28 P10
SC22U6D3V5MX-2GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BLM21PG221SN-1GP P19 B15 P13
PCIE_VDDR_2 AVSS_USB_2 VSS_30
1
1
C537 C802 C530 C527 C540 C541 P20 16mA C14 P15
A-LINK I/O
PCIE_VDDR_3 AVSS_USB_3 VSS_31
220 ohm 2A P21 PCIE_VDDR_4 S5_3.3V_1 A17 D8 AVSS_USB_4 VSS_32 R1
R22 A24 D9 R2
2
2
PCIE_VDDR_5 S5_3.3V_2 AVSS_USB_5 VSS_33
R24 PCIE_VDDR_6 S5_3.3V_3 B17 D11 AVSS_USB_6 VSS_34 R4
R25 J4 D13 R9
3.3V_S5 I/O
PCIE_VDDR_7 S5_3.3V_4 AVSS_USB_7 VSS_35
GROUND
S5_3.3V_5 J5 D14 AVSS_USB_8 VSS_36 R10
844mA L1 +1.2V_ALW_SUS_R 1D2V_S5 D15 R12
C S5_3.3V_6 L31 AVSS_USB_9 VSS_37 C
1D2V_S0 +1.2V_AVDD_SATA S5_3.3V_7 L2 20mil Width E15 AVSS_USB_10 VSS_38 R14
SC1U6D3V2KX-GP
SC22U6D3V5MX-2GP
L39 50mil Width 1 2 F12 AVSS_USB_11 VSS_39 T11
SCD1U10V2KX-4GP
BLM15AG221SN-GP F14 T12
AVSS_USB_12 VSS_40
1
1 2 AA14 C509 C515 C502 220 ohm @ 100MHz, 300mA G9 T14
BLM21PG221SN-1GP AVDD_SATA_1 AVSS_USB_13 VSS_41
AB18 AVDD_SATA_4 H9 AVSS_USB_14 VSS_42 U4
SC22U6D3V5MX-2GP
2
AVDD_SATA_2
SATA I/O
AVSS_USB_15 VSS_43
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
CORE S5
50mil Width C560 C557 C553 C551 C559 AC18 G4 J11 Y21
AVDD_SATA_5 S5_1.2V_2 AVSS_USB_17 VSS_45
AD17 AVDD_SATA_6 J12 AVSS_USB_18 VSS_46 AB1
AE17 1D2V_S5 J14 AB19
2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC22U6D3V5MX-2GP
367mA USB_PHY_1.2V_1 A10 K10 AVSS_USB_21 VSS_49 AE1
USB_PHY_1.2V_2 B10 K12 AVSS_USB_22 VSS_50 AE24
1
C487 C497 C474 K14 AVSS_USB_23
Use Plane Shape for +3.3V_AVDD_USB 113mA K15 AVSS_USB_24
P23
2
PCIE_CK_VSS_9
PCIE_CK_VSS_10 R16
3D3V_S5 +3.3V_AVDD_USB AVDDTX:330mA 5V_S0 R19
L63 PCIE_CK_VSS_11
AVDDRT:209mA 4mA R244 T17
+5V_VREF1 PCIE_CK_VSS_12
1 2 A16 AVDDTX_0 V5_VREF AE7 2 1 PCIE_CK_VSS_13 U18
BLM21PG221SN-1GP B16 H18 U20
AVDDTX_1 PCIE_CK_VSS_1 PCIE_CK_VSS_14
SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
+3.3V_ALW_R 3D3V_S0
SC1U10V3KX-3GP
C786 C486 C498 C503 C500 C504 C505 D17 44mA K17 +1.2V_AVDDCK L28 K25 V21
AVDDTX_4 AVDDCK_1.2V PCIE_CK_VSS_4 PCIE_CK_VSS_17
1
PLL
U45
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
2
AVDDRX_1 1D8V_S0 PCIE_CK_VSS_7 PCIE_CK_VSS_20
F18 AVDDRX_2
16mA BLM15AG221SN-GP 3 P16 PCIE_CK_VSS_8 PCIE_CK_VSS_21 W25
SCD1U10V2KX-4GP
SC2D2U6D3V3KX-GP
G15 AVDDRX_3
1
B C501 C492 B
G17 AVDDRX_4 1 F9 AVSSC AVSSCK L17
G18 AVDDRX_5
CH715FPT-GP
2
SB700-1-GP-U
SB700-1-GP-U
3D3V_S0 +3.3V_AVDDCK
L33
1 2
3D3V_S5 +3.3V_ALW_R
SC
1
BLM15AG221SN-GP C517
R511
50mil Width SC2D2U6D3V3KX-GP
1 2 20mil Width
2
0R0805-PAD
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC22U6D3V5MX-2GP
C529 C798 C523 C485
1
C783 1D2V_S0 +1.2V_AVDDCK
L32
1 2
1
BLM15AG221SN-GP C518
SC2D2U6D3V3KX-GP
20mil Width
2
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-SB700_POWER&GND_(4/5)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 21 of 56
5 4 3 2 1
5 4 3 2 1
SSID = S.B
REQUIRED STRAPS
D
3D3V_S0
+3.3V_ALW_R
DEBUG STRAPS D
1 R549
1 R552
1 R473
1 R474
1 R514
1 R499
1 R214
1 R215
1 R543
1 R234
1 R231
NEED?
DY DY DY DY DY DY DY DY DY DY
2
2
2K2R2F-GP
2K2R2F-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
CLK_PCI_5035 18
CLK_PCI_5028 18
CLK_PCI_DEBUG 18 PCI_CLK5? ATI
LPCCLK0 18,34,55 TP79
LPCCLK1 18,36,55 1 PCI_AD23 18
TP80 1
RTCCLK 18,23 TP87 PCI_AD24 18
SB_AZ_RST# 19 1 PCI_AD25 18
SB_GPO16 19 TP81 1
C TP84 PCI_AD26 18 C
SB_GPO17 19 LPC? 1 PCI_AD27 18
PCI_CLK4 18 TP89 1
TP85 PCI_AD28 18
PCI_CLK5 18 1 PCI_AD29 18
TP86 1 PCI_AD30 18
1 R240
1 R558
1 R481
1 R482
1 R515
1 R222
1 R477
1 R476
1 R237
1 R536
1 R527
DY DY DY DY DY
2
2
2K2R2F-GP
2K2R2F-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-SB700_STRAPPING_(5/5)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 22 of 56
5 4 3 2 1
5 4 3 2 1
5V_S0 FAN1_VCC
5V_S0
K
1
1
C95 C94 C146 FAN1_VCC FAN1
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SC2200P50V2KX-2GP
D6 R117 4
1
C76 C75 RB751V-40-2-GP 1
2
SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP 10KR2J-3-GP
2
2
FAN1_FG1 3
5
1
D C628 D
ACES-CON3-GP-U1
SC1KP50V2KX-1GP
2
FAN1_VCC
U8
R89
5V_S0 1 2 5V_G792_S0 6 1
VCC FAN1 FAN1_FG1 G792_DXP2
5V_S0 20 DVCC FG1 4
14 G792_32K
C
100R2F-L1-GP-U CLK
1
C92 16 SMBD_G792
SDA
1
SCD1U16V2ZY-2GP
Setting T8 as 6 H_THERMDA 7 18 SMBC_G792 C621 C622 B Q22
R88 G792_DXP2 DXP1 SCL MMBT3904-3-GP
9 19 DY
2
100 Degree G792_DXP3 DXP2 NC#19 SC2200P50V2KX-2GP SC470P50V2KX-3GP
11
E
4K99R2F-L-GP DXP3
5 G792_DXN2
2
G792_ALERT# DGND
V_DEGREE 15
HW_THRM_SHDN# 13 ALERT# DGND 17 UMA R79
=(((Degree-72)*0.02)+0.34)*VCC V_DEGREE 3 THERM# CPU SENSOR SB G7 1 2 NB_THERMDP 11
THERM_SET SGND1 8 H_THERMDC 6
2 10 G792_DXN2 G792_DXP3 2 1 0R2J-2-GP
1 RESET# SGND2 VGA_G792_P 49
12 G792_DXN3
SGND3
1
R85 C96 DY
1
C69 C74
DXP1:108 Degree 49K9R2F-L-GP G792SFUF-GP SC2200P50V2KX-2GP VGA SENSOR
2
2
2
SC2200P50V2KX-2GP SC470P50V2KX-3GP
DXP2:H/W Setting G6
2
2
74.00792.A79 G8 G13 H_THERMDA
C DXP3:88 Degree G792_DXN3 2 1 VGA_G792_N 49
C
1
1 2 NB_THERMDN 11
73.07S08.AAG to 2nd source UMA
0R2J-2-GP
3D3V_S0
U17 5V_S5
1 PM_SLP_S3# U4
B
5 VCC
2 19,24,34,37,42 PM_SLP_S3# PM_SLP_S3# 1 5 R71
A A VCC 10R2J-2-GP
4 Y 18,22 RTCCLK 2 B
3 3 4 1 2 G792_32K
GND 3D3V_S5 GND Y
1
74LVC1G08GW-1-GP
NC7SZ08P5-GP R66
73.7SZ08.AAH 100KR2J-1-GP
R95
2
37 PWROK 1 2 G792_RESET#
2
R72
4K7R2F-GP DY 10KR2J-3-GP
1
R97
1
10KR2J-3-GP R86
100KR2J-1-GP R74
DY 20 TALERT# 1 2 G792_ALERT#
2
0R2J-2-GP
DY
B
SMBUS 3D3V_AUX_S5 3D3V_S0
B
3D3V_S0
8
7
6
5
3D3V_S0
RN1
SRN4K7J-10-GP
1
D3
R77 2N7002DW-1-GP
1
2
3
4
10KR2J-3-GP 84.27002.D3F
KBC_SCL2 3 4 SMBC_G792
34 KBC_SCL2
2
G
3D3V_AUX_S5 2 5
D S HW_THRM_SHDN# 1 6
Q3
2N7002-11-GP SMBD_G792
KBC_SDA2
34 KBC_SDA2
3
1
EC_RST# 35
R68 BAT54PT-GP
D2 3D3V_AUX_S5
10KR2J-3-GP
A U5 <Variant Name> A
2
1 B
VCC 5
34 S5_ENABLE 2 A
Y 4 PWR_S5_EN 40
Wistron Corporation
1
SCD1U16V2ZY-2GP Title
NEWCARD Connector
WLAN Connector Newcard Frame
SKT2
1 2
CARDBUS2P-15-GP
Newcard Head
21.H0146.001
NEWCARD1
D WLAN1 D
53 28
NP1 NP2
TP95 1MINI_WAKE# 1 2 3D3V_S0 3D3V_NEW_S0 26
10 PCIE_NBTX_C_NEWRX_P0 25
TP100 1 BT_BUSY 3 4 24
10 PCIE_NBTX_C_NEWRX_N0
1
TP101 1 WIFI_BUSY 5 6 1D5V_S0 C538 C539 23
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
TP96 1MINI_REQ# 7 8 10 PCIE_NBRX_NEWTX_P0 22
9 10 10 PCIE_NBRX_NEWTX_N0 21
2
3 CLK_PCIE_WLAN# 11 12 20
3 CLK_PCIE_WLAN 13 14 3 CLK_PCIE_NEW 19
15 16 3 CLK_PCIE_NEW# 18
19 CPPE# CPPE# 17
TP32 1CONN_CLKREQ# 16
34 E51_RxD E51_RxD 17 18 15
E51_TxD 19 20 RF_ON RF_ON 34 14
34 E51_TxD
21 22 PLT_RST1#_WLAN 1 R248 2PLTRST_SYS# PERST# 13
10 PCIE_NBRX_WLANTX_N1 23 24 0R3-0-U-GP 1 R250 2 3D3V_S5 0R2J-2-GP 12
3D3V_NEW_S5
2
25 26 0R3-0-U-GP 1 R251 2 3D3V_S0 19,25,28 SB_PCIE_WAKE# 11
10 PCIE_NBRX_WLANTX_P1
27 28 DY 1D5V_S0 R249 10
29 30 SMBCLK1_SB 10KR2J-3-GP 9
1
10 PCIE_NBTX_C_WLANRX_N1 31 32 SMBDAT1_SB C521 8
19,25 SMBDAT1_SB
10 PCIE_NBTX_C_WLANRX_P1 33 34 19,25 SMBCLK1_SB 7
1
35 36 USBP7- 19 SCD1U16V2ZY-2GP 1CONN_TP2 6
TP23
2
37 38 USBP7+ 19 TP21 1CONN_TP3 5
39 40 CPUSB# 4
41 42 LED_WWAN# 1 19 USBP5+ 3
TP93
43 44 LED_WLAN# 1 19 USBP5- 2
LED_WPAN# TP92
45 46 1 TP94 1D5V_NEW_S0
C 47 48 1 C
1D5V_S0
49 50 NP1
1
5V_AUX_S5 51 52 3D3V_S0 3D3V_S0 1D5V_S0 3D3V_S5 C508 C506 27
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
NP2
54 CARDBUS26P-7GP
2
62.10024.861
1
SKT-MINI52P-23-GP C927 C898 C894 C577 C576
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
62.10043.601
2
Place them Near to Chip
1D5V_S0
1
C796
SCD1U16V2ZY-2GP
2
3D3V_NEW_S0 1D5V_NEW_S0
1
C821 C797
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2
B B
3D3V_S5
3D3V_S0
1
C804
1
C820 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP U68
12
11
17
15
2
2
3
2
3_3VIN
3_3VOUT
1_5VIN
1_5VOUT
AUXIN
AUXOUT
3D3V_NEW_S5
18,25,28,36,37 PLTRST_SYS# 1 2PLT_RST1#_577 6 SYSRST# 3_3VIN 4 3D3V_S0
1
R531 0R2J-2-GP CPPE# 10 5 3D3V_NEW_S0 C795
CPUSB# CPPE# 3_3VOUT SCD1U16V2ZY-2GP
9 CPUSB# 1_5VOUT 13 1D5V_NEW_S0
PERST# 8 14 1D5V_S0
2
PERST# 1_5VIN
19,34,41,44 PM_SLP_S5# 20 SHDN# NC#16 16
RCLKEN
STBY#
GND
GND
OC#
1
18
19
21
7
G577BR91U-GP
19,23,34,37,42 PM_SLP_S3#
TP78 1 NEWCARD_OC#
A <Variant Name> A
R43
AVDD33
20 mils
They are for U49 AVDD33
pin-2 and 59
1 2
1
G3 0R0603-PAD C39 C14
1 2 L2
3D3V_S5 3D3V_LAN_S5
FCM1608K-121-1GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2
8102E 71.08102.003 60 ~ 100 mils GAP-CLOSE-PWR
60 ~ 100 mils
2
D VDD33 D
1
C53 DY C9 C13 C46 C57 C7
VDD33
SC22U6D3V5MX-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
Power domain chart
1
C66
SCD1U16V2ZY-2GP
LAN_EECS 1 8 3.3V 3.3V
S VCC AVDD33
1
LAN_EESK 2 7 EEPROM LED OPTION USE '01' The trace length between L39 and
LAN_EEDI C DU
3 6 8111C pin1 must be within 200mil.
LAN_EEDO D ORG (DEFINED IN SPEC) 1.8V 1.2V
4 5 AVDD18
2
Q GND
=> LED0 : ACT
=> LED1 : LINK C471,C472,C473, and C474 as close
M93C46-WMN6TP-GP EVDD18 1.8V 1.2V CTRL18
(BOTH 10/100 AND GIGA CHIP) as possible to RTL8111C
1
8101E REMOVE 82.30020.791 RTL8111B Need Need 8101E/8102E C4 C10 C11 C12
C24
2
1
1
8111B REMOVE 1 2 C1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
8111C STUFF 8111CR13 2 1 The trace width from VDD33 R3
2
1
SCD1U16V2ZY-2GP
0R2J-2-GP 0R3-0-U-GP C3
to pin63 should>40mils
2
RTL8111C N/A N/A C5
SC22U6D3V5MX-2GP
SC15P50V2JN-2-GP DY
2
2
SC22U6D3V5MX-2GP
8111C/8102E 2.49K 64.24915.6DL ACT_LED# 26,55 Only For 8101E
8101E 2K 64.20015.6DL LINK100 26,55 RTL8101E N/A N/A
LINK1G 26,55
1
pin-22 and 28
SCD1U10V2KX-5GP
2K49R2F-GP
SC1U6D3V2KX-GP
ACT_LED#
2
DVDD15
DVDD15
DVDD15
20 mils
AVDD33
LINK100
LAN_X2
LAN_X1
LINK1G
VDD33
EVDD18
GVDD
1 2
L3
C469 close L39 200mil. FCM1608K-121-1GP
1
C32 C25
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
2
1
U1
8111B STUFF CAP Only For 8111C R1
OGPIO
GND
RSET
VDDSR
ENSR
CKTAL2
CKTAL1
IGPIO
AVDD33
AVDD12
LED0
LED1
LED2
LED3
VDD33
DVDD12
DVDD12
8111C
2
Power plan for pin1 CTRL18 1 48 LAN_EESK
AVDD33 SROUT12 EESK LAN_EEDI
2 AVDD33 EEDI/AUX 47
B MDIP0 VDD33 CTRL15 B
26 MDIP0 3 MDIP0 VDD33 46
MDIN0 4 45 LAN_EEDO 3D3V_S0
26 MDIN0 FB12 MDIN0 EEDO LAN_EECS
5 FB12 EECS 44 They are for U49 DVDD15
MDIP1 6 43 DVDD15 pin-15,21,32,33,38,41,43,49,52 and 58
26 MDIP1 MDIP1 DVDD12
1
MDIN1 7 42
26 MDIN1 MDIN1 NC#42 R6
AVDD18 R48 2DVDD15 R50 Only For 8101E 8101E/8102E
MDIP2
8
9
AVDD12 NC#41 41
40
1
0R3-0-U-GP 8101E 1KR2J-1-GP 1 2
40 mils DVDD15 C42
26 MDIP2 MDIN2 MDIP2 NC#40
26 MDIN2 10 MDIN2 NC#39 39
AVDD18 11 38 DVDD15 0R3-0-U-GP
2
AVDD12 DVDD12
1
MDIP3 12 37 VDD33 8101E/8102E C8 C20 C40 C41 C38 C48 C47 C51 C50 C49 C43
26 MDIP3 MDIP3 VDD33
1
MDIN3 13 36 ISOLATE# C19
26 MDIN3 MDIN3 ISOLATE#
SC22U6D3V5MX-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
AVDD18 14 35 DY
2
AVDD12 NC#35
1
SC22U6D3V5MX-2GP
DVDD15 15 34
2
VDD33 NC#15 NC#34 DVDD15/CLKREQB R51
16 33
LANWAKE#
REFCLK_N
VDD33 CLKREQB
REFCLK_P
DVDD12
PERST#
EVDD12
EVDD12
EGND
HSON
EGND
HSOP
HSIN
HSIP
R5 1 2 SMBCLK_SB_R
19,24 SMBCLK1_SB
0R2J-2-GPDY DVDD15/CLKREQB 1 R46 2 0R2J-2-GP DVDD15
R11 1 SMBDAT_SB_R CTRL15/VDD33 1 R9 2 0R2J-2-GP CTRL15
DVDD15
DVDD15
2
EVDD18
EVDD18
AGND
0R5J-6-GP
SCD1U16V2ZY-2GP
10 PCIE_NBTX_C_LANRX_N2
K
1
MDIN2 6 7 RJ45_5 9
25 MDIN2 TD- TX- 4.pairs must be equal lengths.
8101E/8102E LINK1G A1
2
1
MCT3 9 8111C 8101E/8102E RJ45_1 1
2
MCT4 CT RJ45_7 0R2J-2-GP
10 CT RX+ 12 1 2R280 7.Must not cross ground moat,except C582
TCT1 3 11 RJ45_8 SCD1U16V3KX-3GP RJ45_2 2
RJ-45 moat.
2
CT RX- RJ45_3
DY 3
1
RJ45_4 4
1
SCD01U16V2KX-3GP
R279 RJ45_8 8
2
XF2 CONN_PWR_2 B1
MDIP0 MDIP1
1
MDIP0 5 8 RJ45_1 25,55 ACT_LED# B2
25 MDIP0 MDIN0 TD+ TX+ RJ45_2 MDIN0 MDIN1 C581
25 MDIN0 6 TD- TX- 7 10
SCD1U16V3KX-3GP
2
1 MDIP1 MDIP1 25 DY RJ45-135-GP-U
RD+ MDIN1
4 CT RD- 2 MDIN1 25 8101E 8101E
1
MCT1 9 22.10277.061
MCT2 CT RJ45_3 R320 R319 R318 R317
10 CT RX+ 12
3 11 RJ45_6 8101E 8101E
CT RX-
49D9R2F-GP
49D9R2F-GP
49D9R2F-GP
49D9R2F-GP
C C
2
1
SCD01U16V2KX-3GP
1
C592 C595
10/100/1000Mbps Lan Transformer 8101E 8101E
SCD01U50V2ZY-1GP
SCD01U50V2ZY-1GP
2
2
PIN09 : GREEN
PIN11 : ORANGE
PIN13 : YELLOW
RN37
MCT4 1 8
MCT3 2 7 LAN_TERMINAL 1 2
MCT2 3 6 GIGA no need it at all , 10/100 keep
MCT1 4 5 C589 SC1KP3KV8KX-GP
SRN75J-1-GP
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LAN Connector
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 26 of 56
5 4 3 2 1
5 4 3 2 1
HYPER FLASH
20 PIDE_D[0..15]
SB DELETE Bluetooth
D D
SC DY HYPERFLASH FUNCTION
HYPER1
41
NP1 1D8V_S0
20 PIDE_CS#1 1
R629 21 PIDE_CS#0 20
20 PIDE_A2 1 20R2J-2-GP 2
20 PIDE_IRQ14 DY 3 22 PIDE_A0 20
20 PIDE_DACK# 4 23
5 24 PIDE_A1 20
1
25 PIDE_IORDY 20
1
C883 C884 C885 C575
SCD1U16V2ZY-2GP
20 PIDE_IOR# 6
2
7 26 DY
SC10U10V5ZY-1GP
2
20 PIDE_DREQ 8 27 PIDE_IOW# 20
PIDE_D15 9 28 PIDE_D0 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
PIDE_D14 10 29 PIDE_D1
11 30 PIDE_D2
PIDE_D13 12 31 DY DY DY
PIDE_D12 13 32 PIDE_D3
14 33 PIDE_D4
PIDE_D11 15 34
PIDE_D10 16 35 PIDE_D5
17 36 PIDE_D6
PIDE_D9 18 37
PIDE_D8 19 38 PIDE_D7
C 20 39 HYPER_RST# C
40
NP2
42
1D8V_S0
CARDBUS-SKT102-GP-U
1
20.I0070.001
R608
10KR2J-3-GP
DY
2
SB DY
D14
1 2 HYPER_RST#
11,18,34,37 PLTRST#
CH751H-40PT
D13
1 DY 2
19 IDE_RST#
CH751H-40PT
B B
DY
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HYPER FLASH/BT
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 27 of 56
5 4 3 2 1
5 4 3 2 1
0R3-0-U-GP R449
2 1 Place L28, L29 close to SK1
3D3V_S0 DY
POWER TRACE >40 MIL
R252 SC C573
1
SCD33U10V3KX-3GP
1 2 TAV33 CLOSE TO CHIP R254 R253
C924 SK1
1
0R0603-PAD SKT-1394-4P-30-GP
2
1
1
SC10U10V5KX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
56R2F-1-GP 56R2F-1-GP L59
C920 C910 C578 6
2
TPBIAS0 GND
5
2
TPA0P DLW21HN900SQ2LGP TPA0+ GND
4 TPA0+
TPA0N JMB380 TPA0- 3
TPB0P R444 TPB0+ TPA0-
2 1 2 TPB0+
D TPB0N 0R3-0-U-GP TPB0- 1 D
TPB0-
DY
4
R247 R256
1
1D8V_S0 DVDD18 5K11R2F-L1-GP 56R2F-1-GP 22.10218.U71
PUT UP ALL
R630 POWER TRACE >40 MIL L57 R446
2 1
L66 2 APVDD COMPONENT ON 0R3-0-U-GP
1 2
0R3-0-U-GP C922
1
BLM15BB121SN-GP C934 C931 C932
2 1 2 1 JMB380
0 OHM IF CHIP DY
1
SCD1U10V2KX-4GP
DY C930 DLW21HN900SQ2LGP
1
IS JMB385
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U10V5KX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C923 JMB380
C579 C574
2
SC1KP50V2JN-2GP
R255
2
2
2 1 2 1
4
56R2F-1-GP
SC220P50V2KX-3GP
2 1
0R3-0-U-GP R431
DY
Q44
DY
1 AO3403-GP
3D3V_CARD
R259
12KR2J-L-GP
3D3V_S0 S
D
20mil Trace
D
JMB380
G
R631
2
C 1KR2-N5 C
SC
G
DY R621
TPBIAS0
MDIO10
MDIO11
MDIO12
2
TREXT
TPA0N
TPB0N
MDIO8
MDIO9
TPA0P
TPB0P
TAV33
CR1_PCTLN 1 2
JMB380,JMB385 COLAY MODEL C906 C565
0R0805-PAD
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U10V5KX-2GP
C921
36
35
34
33
32
31
30
29
28
27
26
25
2
For SD/MS Card Power
36
35
34
33
32
31
30
29
28
27
26
25
R620
DVDD18 37 37 24 24 1 2
XIN 38 23 MDIO13
XOUT 38 23 MDIO14
39 39 22 22 402KR2F-GP
MDIO7 40 21
MDIO6 40 21
MDIO5
41 41 20 20 3D3V_S0 SB R642 DY 0R2J-2-GP
42 42 19 19
MDIO4 43 18 DVDD18 1 2
43 18 SB_PCIE_WAKE# 19,24,25
44 17 CR1_PCTLN D35
3D3V_S0
MDIO3 45
44
45
17
16 16 CR1_CD0N 2 1 CR_WAKE# 20
SB
MDIO2 46 15 CR1_CD1N CARD1
MDIO1 46 15
47 14 CH751H-40PT
MDIO0 47 14 10KR2J-3-GP
48 48 13 13
49 1 2 3D3V_S0 3D3V_CARD 14 25 MDIO0
49 R637 MS_VCC SD_DAT0 MDIO1
SD_DAT1 29
23 10 MDIO2
10
11
12
G
SD_VCC SD_DAT2
1
2
3
4
5
6
7
8
9
1
PAD-49P-GP 33
1
2
3
4
5
6
7
8
9
10
11
12
XD_VCC
SCD1U10V2KX-4GP
CR_CPPE#_R S D 12 MDIO4
B CR_CPPE# 19 SD_CMD B
24 MDIO5_R
2
Q47 MDIO13 SD_CLK MDIO6
1 35
APVDD
APVDD
MDIO4 6 20 MDIO1
3 CLK_PCIE_CARD XD_WE MS_DATA1
R632 MDIO6 MDIO2
PCIE_NBTX_C_CARDRX_N3 10 SC xD_CD
7
34
XD_WP MS_DATA2 18
16 MDIO3
PCIE_NBTX_C_CARDRX_P3 10 XD_CD_SW MS_DATA3
8K2R2F-1-GP
3D3V_S0 CR1_CD0N CR1_CD0N MDIO0 8 15 MDIO5_R
2
1
4K7R2F-GP
1 R636 2 CR1_CD0N MDIO3 27
DY EC83 DY EC82 MDIO8 XD_D3
28 XD_D4
4K7R2F-GP R640 2 CR1_CD1N MDIO9
SC220P50V2JN-3GP
SC10P50V2JN-4GP
1 30
2
MDIO10 XD_D5
31 XD_D6 4IN1_GND 13
R634 1 10KR2J-3-GP
2 MDIO7 MDIO11 32 22
R258 XD_D7 4IN1_GND
1 2 XIN R257
1 21MR2F-GP XOUT 3D3V_CARD NP1 37
3D3V_S0 NP1 GROUND
NP2 NP2 GROUND 38
10KR2J-3-GP JMB380 10KR2J-3-GP
JMB385 X5 1 2R633 MDIO6
10KR2J-3-GP CARD-PUSH-36P-3-GP
1 2 1 2R622 MDIO13 20.I0080.001
MDIO5 1 R261 MDIO5_R CR1_CD1N CR1_CD1N
X-24D576MHZ-44GP
SB 22R2J-2-GP
2
1
1
C571 200KR2J-L1-GP U84
SC15P50V2JN-2-GP SC15P50V2JN-2-GP R619 2 1 MDIO12 2 CR1_CD0N DY EC84 DY EC85
2
SC10P50V2JN-4GP
200KR2J-L1-GP
SC220P50V2JN-3GP
JMB380 Wistron Corporation
2
2
R260 2 1 MDIO14 xD_CD 3
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
1394/CARD READER
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 28 of 56
5 4 3 2 1
5 4 3 2 1
5V_USB1_S3
R398
400uS rise time 1 2
0R2J-2-GP
Supply 2~1.5A C626
1
100 mil SCD1U16V2ZY-2GP
100 mil 100 mil
2
5V_S5 5V_USB1_S3
U24 TR1
19 USBP0-
2
D 3 8 SCD1U16V2KX-3GP USBP0-_RR D
IN#3 OUT#8
2 IN#2 OUT#7 7
1
6 C130 C134 DY DLW21HN900SQ2LGP
OUT#6 19 USBP0+
C136 USBP0+_RR
5 SC47U6D3V6MX-1GP
2
USB_PWR_EN# OC#
34 USB_PWR_EN# 4 EN/EN# GND 1
3
G545A2P8U-GP SC10U25V6KX-1GP USB1
1
C617 16 R407
5V_S5 1 2
SC1U16V3ZY-GP 1
2
0R2J-2-GP
2
C641 2
400uS rise time 3
4
1
Supply 1.5~1.1A 5
6
SC10U25V6KX-1GP 50 mil 5V_S5 U58 5V_USB2_S3 50 mil 7
SC1KP50V2KX-1GP
8
SC10U25V6KX-1GP
1 GND OUT#8 8 9
U27
DY
2 IN#2 OUT#7 7 19 USBP1+ 10
2
3 6 C667 C676 19 USBP1- 11
USB_PWR_EN# IN#3 NC#6 USBP0-_RR USBP0+_RR
4 EN/EN# OC# 5 12 3 I/O2 I/O1 2
5V_S5 19 USBP2+ 13 5V_USB2_S3
1
19 USBP2- 14 4 VREF GND 1
G545B2P8U-GP 15
2
C144
1
C655 17 PJSR05-GP
1
C SC1U16V3ZY-GP C
2
SC10U25V6KX-1GP ACES-CON15-GP
1D8V_S0
20.K0228.015
1D8V_S0
2
R662 R660
10KR2J-3-GP 10KR2J-3-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY DY
1
1
DY C946 EQA EQB
SC4D7U10V5ZY-3GP
2
2
R663 R664 5V_USB2_S3
DY 10KR2J-3-GP 10KR2J-3-GP
DY DY USB2
1
DY U85
8 10
DY NP1
2 1 EQA 1A 1
VDD EQA EQB SATA_RX3+_RBB
6 VDD EQB 10 2
11 USBP0-_RR 2A 3 SATA_RX3-_RBB
VDD
15 VDD 4
19 8 SATA_RX3- 20 USBP0+_RR 3A 5 SATA_TX3-_RBB
B C944 SC4700P50V2KX-1GP VDD BO- SATA_TX3+_RBB B
BO+ 7 SATA_RX3+ 20 6
4A 7
1
SATA_TX3-_RBB 1 2 SATA_TX3-_RB 17 13 SATA_RX3-_RB 1 2 SATA_RX3-_RBB
SATA_TX3+_RBB AO- BI-
C942 1 2 SATA_TX3+_RB 18 AO+ BI+ 14 C943 SC4700P50V2KX-1GP TC6 NP2
SC4700P50V2KX-1GP SATA_RX3+_RB C941 1 2 SATA_RX3+_RBB 9 11
2
20 SATA_TX3-_R 4 SC4700P50V2KX-1GP ST100U10VDM-5GP
AI- SKT-SATA+USB11P-2-GP
20 SATA_TX3+_R 3 AI+ GND 5
GND 9
GND 12 22.10218.Z71
20 EN GND 16
sc
R665 10KR2J-3-GP
1D8V_S0 2 1 PI2EQX3211BHE-GP
DY DY R671
SATA_TX3+_RB SATA_RX3+_RB 2 1 SATA_RX3+
1
0R2J-2-GP
R667 R672
470R2J-2-GP SATA_RX3-_RB 2 1 SATA_RX3-
0R2J-2-GP
SATA_TX3-_RB
2
R673
DY SATA_TX3+_RB 2 1 SATA_TX3+_R
0R2J-2-GP
R674
SATA_TX3-_RB 2 1 SATA_TX3-_R
0R2J-2-GP
A
put close to connector <Variant Name> A
Wistron Corporation
put at the U85 bottom 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
USB/ESATA CONN
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 29 of 56
5 4 3 2 1
5 4 3 2 1
D D
SATA1
8
SATA2
S1 NP1
23 20 SATA_TX1+_R S2
NP1 20 SATA_TX1-_R S3
1 S4
20 SATA_RX1- S5
20 SATA_TX0+_R 2 20 SATA_RX1+ S6
20 SATA_TX0-_R 3 S7
4 5V_S0
20 SATA_RX0- 5 P1
20 SATA_RX0+ 6 TP75 P2
Close to HDD 7
1 ODD_MD
P3
P4
3D3V_S0 8 P5
9 P6 NP2
K
TPAD28
1
1
C564 C563 10 9
11 D23 C780 TC17
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
SC22U6D3V5MX-2GP SCD1U16V2ZY-2GP SKT-SATA7P+6P-14-GP-U1
SSM24PT-GP
12
2
2
13 DY
14
A
15
5V_S0 16
1
17
K
18 R479
1
D12 C566 19
10KR2J-3-GP
C SR24-GP 20 C
DY SC10U10V5ZY-1GP 21
2
2
22
A
NP2
24
TYCO-CON22-GP-U
20.80392.022
3
4
1
SC1U10V2KX-1GP
1
C901 C902
SCD1U16V2ZY-2GP
TPAD2 ACES-CON5-2GP-U
2
B B
7
2
1
2
1
10 5 SLIENT_BTN# 34 PWR_BUTTON
4 DVD_BTN# 34
1 3 VGA_NET_BTN# 34
2 2 PWR1 R62
34 WLANONLED# 3 1 3 1 2 KBC_PWRBTN# 34
34 PWR_LED# 4 1
34 BAT_LED# 5 6 5 470R2J-2-GP
1
3D3V_S5 6 C65
34 BATLOW_LED#
7 2 4
8 LAUNCH1 SCD1U16V2ZY-2GP
2
SC1U10V2KX-1GP SW-TACT-91-GP
1
ACES-CON8-2-GP
2
20.F0714.008
SC LED1
3D3V_S5 1 R40 2 PWR_LED#1 A K PWRBTN_LED# 34
330R2F-GP LED-W-12-GP
1
SC1000P50V3JN-GP
SC1000P50V3JN-GP
SC1000P50V3JN-GP
SC1000P50V3JN-GP
A <Variant Name> A
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HDD/CDROM/LED/LAUNCH
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 30 of 56
5 4 3 2 1
A B C D E
5V_S0
U69
1 5 5V_AUDIO_S0
SHDN# SET
2 GND
1
4 C801 3 4 4
IN OUT
1
C818 1C808
2
C875 R594 C863 G923-475T1UF-GP
SCD1U16V2KX-3GP
1 2 MCP_SPKR_R 1 2 AUD_BEEP 1 2AUD_PC_BEEP 2
2
19 SB_SPKR SB_AZ_CODEC_RST# 19
1
SC1U16V3ZY-GP 47KR2J-2-GP R591 C866 SCD1U16V2KX-3GP SC10U25V6KX-1GP SC10U6D3V5KX-2GP
SB_AZ_CODEC_SYNC 19
1
4K7R2J-2-GP
C876 R598
KBC_BEEP_R SB_AZ_CODEC_BITCLK 19,55
1 2 1 2
2
35 KBC_BEEP SC100P50V2JN-3GP
1
SC1U16V3ZY-GP 47KR2J-2-GP
DY DY C851
AUD_VAUX 2 1 SC22P50V2JN-4GP
5V_AUDIO_S0
2
5V_AUDIO_S0 10KR2J-3-GP R573
SCD1U16V2KX-3GP
1
C867 C865 C828
AUD_CEN_OUT 1 TP83 TPAD30
CLOSE TO CODEC
2
2
SCD1U16V2KX-3GP
SC10U25V6KX-1GP
LOUR_JD#_R
39K2R2F-L-GP
LOUR_JD#
Fortemedia GND
1 2 LOUR_JD# 32,33
3D3V_S0 R568
R655
ADI NC
SCD1U16V2KX-3GP 1 2 ARRAY_DETC 32
3 39K2R2F-L-GP 3
1
25
38
12
11
10
33
44
43
34
13
1
9
6
U70
DVDD-IO
LFE/PORT-G-R
DVDD
AVDD1
AVDD2
PCBEEP
RESET#
SYNC
BCLK
NC#33
CENTER/PORT-G-L
SENSE_B
SENSE_A
32 LINE_IN_L 1 2 LINEIN_L
C872 SC4D7U6D3V3KX-GP
32 LINE_IN_R 1 2 LINEIN_R 23 5
C873 SC4D7U6D3V3KX-GP LINE1-L/PORT-C-L SDATA-OUT R582 SB_AZ_CODEC_SDOUT 19
24 LINE1-R/PORT-C-R SDATA-IN 8 1 2 33R2J-2-GP SB_AZ_CODEC_SDIN0 19
32 HP_OUT_L 14 LINE2-L/PORT-E-L
32 HP_OUT_R 15 LINE2-R/PORT-E-R
48 SPDIF 1 R554 2 SPDIF_CN 33
MICIN_L SPDIFO EAPD#_662 0R0603-PAD
33 MIC_IN_L 1 2 29 LINE1-VREFO SPDIFI/EAPD 47 1 TP103 TPAD30
1
C869 SC4D7U6D3V3KX-GP 31
MICIN_R LINE2-VREFO C830 C823
33 MIC_IN_R 1 2
C871 SC4D7U6D3V3KX-GP SC470P50V2KX-3GP
UMA_MIC 45
2
SIDE-L/PORT-H-L
UMA_MIC INT_MIC_L
21 MIC1-L/PORT-B-L SIDE-R/PORT-H-R 46 DY DY
32 MIC_INT_L 1 R599 2 1 C870
2 22 MIC1-R/PORT-B-R
1KR2F-3-GP SC1U16V3KX-2GP 16 SC470P50V2KX-3GP
2 MIC2-L/PORT-F-L 2
32 MIC_INT_R 1 R600 2 1 2C868 INT_MIC_R 17 MIC2-R/PORT-F-R SURR-L/PORT-A-L 39
1KR2F-3-GP SC1U16V3KX-2GP 41
SURR-R/PORT-A-R
UMA_MIC
UMA_MIC
MIC1VREFO_R 32 MIC1-VREFO-R
2
MIC1VREFO_L 28 MIC1-VREFO-L
R601 1 MIC2VREFO 30 35
GPIO1/DMIC-DATA
2K2R2J-2-GP
MICINT_L 1
MICINT_R 1
CD-GND
AVSS1
AVSS2
JDREF
DVSS
DVSS
VREF
CD-R
CD-L
ALC888-GR-GP
26
42
4
7
27
40
37
2
3
18
20
19
2
D33
D32 71.00888.00G
1N4148W-7-F-GP 1N4148W-7-F-GP
UMA_MIC UMA_MIC 1
R574
2
0R2J-2-GP
DMIC_DATAIN 32
1
DIS_MIC
1 2 D_MIC_CLKOUT 32,55
R570 0R2J-2-GP
CODECVREF AUD_JDEF
1
DIS_MIC <Variant Name> 1
1
2
C857 R555
Wistron Corporation
SCD1U16V2KX-3GP
C855 20KR2F-L-GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC1U16V3ZY-GP
1
5VA_OP_S0
1
SPK1 4
R469 4
10KR2J-3-GP SPKR_R- 2
5V_S0 5VA_OP_S0 SPKR_L- 2
SPKR_R+ 1
2
SPKR_L+ 1
1 R510 2 SCD1U16V2KX-3GP SCD1U16V2KX-3GP AMP_SHUTDOWN G1412_SHDN# 3
1
3
1
SC4D7U25V5KX-GP
SC10U10V5KX-2GP
0R0805-PAD C793 C791 C785 EC61 EC59 ETY-CON2-10-GP
MLVG0402220NV05BP-GP
MLVG0402220NV05BP-GP
C794 EC2 EC1 ETY-CON2-10-GP 20.F0984.002
SC
MLVG0402220NV05BP-GP
MLVG0402220NV05BP-GP
4 Q29 20.F0984.002 4
2
2N7002-11-GP
G 1 R466 2
SC
AMP_SD# 35
2
SC
2
0R0402-PAD
1
G1432_VOL
TPAD30 TP76
10KR2J-3-GP
R468
U66
20
15
13
2
4
5
VOL
LVDD
RVDD
SHUTDOWN
IN1#/IN2
C778 R475 R503 C789
31 AUD_LOL 1 2SOUND_L2 1 2 SOUND_L_OP1 1 LIN1 RIN1 18 SOUND_R_OP1 2 1 SOUND_R2 1 2 AUD_LOR 31
10KR3F-L-GP 2 17 10KR3F-L-GP
SC1U16V3ZY-GP SPKR_L+ LIN2 RIN2 SPKR_R+
1 R486 2 24 LOUT+ ROUT+ 19 2 R502 1 SC1U16V3ZY-GP CN1
10KR3F-L-GP SPKR_L- 7 12 SPKR_R- 10KR3F-L-GP 12
C781 LOUT- ROUT- C790 1
L_BYPASS 3D3V_S0
1 2 DY LBYPASS 3 1 2 DY D_MIC_DATAIN
6 NC#6 2
SC1U16V3ZY-GP 8 16 R_BYPASS SC1U16V3ZY-GP D_MIC_CLKOUT 3
5VA_OP_S0 NC#8 RBYPBASS
23 NC#23 TPAD30 TP40 4
TPAD30 TP41 1 2 5
1
GND/HS
GND/HS
GND/HS
GND/HS
C792 C782 R323 0R0402-PAD 6
TPAD30 TP42
1
MUTE
7
GND
GND
31,55 D_MIC_CLKOUT
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
R490 31 DMIC_DATAIN 1 2 D_MIC_DATAIN 8
SCD1U16V2KX-3GP
10KR2J-3-GP R325 10R2J-2-GP 9
2
MLVG0402220NV09BP-GP
MLVG0402220NV09BP-GP
10
DIS_MIC
11
9
10
21
22
14
25
1
3 G1432Q5U-GP C596 11 3
2
KBC_MUTE JST-CON10-12-GP
2
LINE In EU1 EU2
DIS_MIC
1
D
Q30
2N7002-11-GP 1 R602 2
31 LINE_IN_L LINE_IN_CN_L 33
34 KBC_MUTE# G 1KR2F-3-GP
1
1
10KR2J-3-GP R603 C878 C877
R498
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2
2
G1412_VSS
1
C887
3D3V_S0 3VA_S0_AU U78 SC2D2U10V3KX-1GP CN4
2
3VA_S0_AU 5
1 R611 2 SCD1U16V2KX-3GP 8 2 LINE_OUT_L U77 1
PVDD OUTL
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
0R0603-PAD 3 4 LINE_OUT_R
NVDD OUTR
1
C895
9 1 G5930TBU-GP ACES-CON4-7-GP-U
NC#9 PGND
C891
2
SCD1U16V2KX-3GP
G1412RC1U-GP 1 2 UMA_MIC
SC4D7U16V5ZY-GP
1
R618
DY
2
0R2J-2-GP
SPDIF_PWR 33
1
C899
HP_L 1 2 LINE_OUT_L R615 U80
SC47P50V2JN-3GP 10KR2J-3-GP
5 IN OUT 1
C903 R617 R614 2
2
HP_OUT_C_L 1 G5240_EN 4 GND
31 HP_OUT_L 1 2 2 1 2 1 R616 2 LINE_OUT_CN_L 33 EN NC#3 3
10KR3F-L-GP 10KR3F-L-GP
1
SC4D7U6D3V3KX-GP 39R3F-GP <Variant Name> 1
G5240B1T1U-GP
D
C880 R606 R607
HP_OUT_C_R 1 1 R605 Q43
31 HP_OUT_R 1
10KR3F-L-GP
2 2 1
10KR3F-L-GP
2 2 LINE_OUT_CN_R 33
2N7002-11-GP Wistron Corporation
1
1
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC4D7U6D3V3KX-GP 39R3F-GP C900 C879 G 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
31,33 LOUR_JD# Taipei Hsien 221, Taiwan, R.O.C.
C882
HP_R 1 2 LINE_OUT_R
2
SC47P50V2JN-3GP Title
CLOAE TO CODEC
AUDIO AMP/Speaker
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 32 of 56
A B C D E
5 4 3 2 1
LINE IN MIC IN
LINEIN_JD# LINE_IN_CN_R LINE_IN_CN_L LOUR_JD# LINE_OUT_CN_L
LIN1
1
1
2 LINE_IN_CN_L LINE_IN_CN_L 32 MIC1
D 6 1 C913 C912 C911 C904 C905 D
3 LINE_IN_CN_R LINE_IN_CN_R 32 2 MIC_IN_L_L SC1KP50V2JN-2GP SC1KP50V2JN-2GP SC1KP50V2JN-2GP SC1KP50V2JN-2GP SC1KP50V2JN-2GP
2
4
LINEIN_JD
6
MIC_IN_R_R
DY DY DY DY DY
5 LINEIN_JD# 31 3
NP1 4
NP2 5 MICIN_JD# MICIN_JD# 31
NP1
PHONE-JK241-GP-U NP2
PHONE-JK241-GP-U
1
C907
SC1KP50V2JN-2GP C919 C908 C918
2
DY SC1KP50V2JN-2GP SC1KP50V2JN-2GP SC1KP50V2JN-2GP
2
DY DY DY
1
6
1 LINE_OUT_CN_R LINE_OUT_CN_R 32 C916 C914
4 LINE_OUT_CN_L LINE_OUT_CN_L 32 SC1KP50V2JN-2GP SC1KP50V2JN-2GP
METAL
2
7 LOUR_JD# LOUR_JD# 31,32
5
MIC1VREFO_R MIC1VREFO_L
LED
DY DY
A
DRIVE SPDIF_PWR
B SPDIF_PWR 32
1
IC C SPDIF_CN SPDIF_CN 31
TX R626 R624
NP1 2K2R2J-2-GP 2K2R2J-2-GP
NP2
2
PHONE-JK287-GP 31 MIC_IN_R 1 R625 2 MIC_IN_R_R
1KR2F-3-GP
31 MIC_IN_L 1 2 MIC_IN_L_L
1KR2F-3-GP
R623
1
C915 C917
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2
ANALOG/GIGITAL GROUND SEPARATE
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
AUDIO CONN/SUBWOOFER
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 33 of 56
5 4 3 2 1
5 4 3 2 1
3D3V_AUX_S5
1 R417 2 3D3V_AUX_S5_KBC
SC
0R3-0-U-GP
1
C170 C668 C645 C697 C662
SC10U10V5ZY-1GP
3D3V_AUX_S5_KBC 3D3V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
3D3V_AUX_S5_KBC
SCD1U16V2ZY-2GP
1
1
EC62 C683 BOAR VERSION
1
SRN4K7J-10-GP
C691
SCD1U16V2ZY-2GP
PCB_VER0 PCB_VER1
8
7
6
5
D D
2
RN41 SC10U10V5ZY-1GP SA 0 0
1
DY SB 1 0
R414 R411
PD 0 1 100KR2J-1-GP 100KR2J-1-GP
1
2
3
4
C301,C295 colse to Pin VDD L53
2
KBC_AVCC 1 2
BAT_SCL BLM11P600S
BAT_SDA DY
SCD1U16V2ZY-2GP
SC1U16V3ZY-GP
1
C696
C711
PCB_VER0
2
3D3V_S0 PCB_VER1
1
11,18,27,37 PLTRST# 1 2PLT_RST1#_1
R386 100R2J-2-GP R413 R412
3D3V_S0 100KR2J-1-GP 100KR2J-1-GP
47 BAT_IN#
SC27P50V2JN-2-GP
1
C684
102
115
80
19
46
76
88
2
4
U26A
GPIO41
VDD
AVCC
VCC
VCC
VCC
VCC
VCC
10KR2J-3-GP 1 R393 2 E51_RxD DY
DY
30 BATLOW_LED# 124 GPIO10/LPCPD# VREF 104
10KR2J-3-GP 1 R394 2 E51_TxD 7
C LRESET# C
DY 18,22,55 LPCCLK0 2
3
LCLK A/D GPI90/AD0 97
98
AD_IA 46
18,36 LPC_LFRAME# LFRAME# GPI91/AD1
18,36 LPC_LAD0 126 LAD0 GPI92/AD2 99
2
GPIO11/CLKRUN#
C688 19 KBRCIN# 122 KBRST#
19 KA20GATE 121 101 PCB_VER0
GA20 GPI94/DA0 3D3V_AUX_S5_KBC
1 2PCLK_KBC_RC ECSCI#_KBC 29 ECSCI#/GPIO54 GPI95/DA1 105 PCB_VER1
ATI_BL_ON 9
ECSWI#_KBC 123 GPIO65/SMI# D/A GPI96/DA2 106
AC_IN# 2 R392
DY GPIO67/PWUREQ# GPI97/DA3 107 1
10KR2J-3-GP
FOR KBC DEBUG DY
KBC_SDA2
THERMAL-----> 23 KBC_SDA2
KBC_SCL2
68 GPIO74/SDA2 GPIO01/TB2 64 PM_SLP_S3# 19,23,24,37,42
5V_AUX_S5 23 KBC_SCL2 67 GPIO73/SCL2 SMB GPIO03/AD6 95 KBC_PWRBTN# 30
46,47 BAT_SDA 69 GPIO22/SDA1 GPIO06 93 AC_IN# 46 btn,lid,ac
BATTERY-----> 46,47 BAT_SCL 70 GPIO17/SCL1 GPIO07/AD7 94
119
LID_CLOSE# 36
TPAD28 TP97 GPIO23/SCL3
1 GPIO24 6
TPAD28 TP6 1 109 CAMERA_EN 15 KBC for AMD
GPIO30
NUM LED DY 81 GPIO66/G_PWM SP GPIO31/SDA3 120
65 3D3V_AUX_S5_KBC
GPIO32/D_PWM PWR_LED# 30
GPIO33/H_PWM 66
GPIO40/F_PWM 16
TP102 1 BLUETOOTH_EN 84 17 AD_OFF 47
GPIO77/SPI_DI GPIO42/TCK
1
B
83 GPIO76/SPI_DO/SHBM SPI GPIO43/TMS 20 RSMRST#_KBC 19
R372 B
WLAN BTN DY 82
91
GPIO75/SPI_CLK GPIO GPIO44/TDI 21
22
PM_SLP_S5# 19,24,41,44
10KR2J-3-GP
30 WLANONLED# GPIO81 GPIO45/E_PWM BAT_LED# 30
2
GPIO46/TRST# 23
R377 24
2
GPIO47/SCL4
4K7R2J-2-GP GPIO50/TDO 25 KBC_MUTE# 32
E51_TxD 111 26 DVD_BTN# 30
24 E51_TxD E51_RxD 113 GPO83/SOUT_CR/BADDR1 GPIO51/TA3
27 BLON_OUT 15
1
1
23 S5_ENABLE 15 GPIO36/TB3 GPO82/TRIS# 110 USB_PWR_EN# 29
3D3V_S0 R395 R390
SER/IR 100KR2J-1-GP
DY
R404 2 KA20GATE
DY DY 100KR2J-1-GP
1
10KR2J-3-GP VCORF 44
2
S5_ENABLE VCORF KBC_MATRIX1
2 R379 1
1
10KR2J-3-GP KBC_MATRIX0
AGND
GND
GND
GND
GND
GND
GND
1
C644
2
5
18
45
78
89
116 WPC775L-0DG-GP-U
2
D10 71.00775.00G SC
6 1 ECSCI#_KBC
19 ECSCI#_KBC_R
A <Variant Name> A
5 2 U59
11 PANEL_BKEN 2
Wistron Corporation
4 3 ECSWI#_KBC 3 ATI_BL_ON 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
19 ECSWI#_SB
1
Taipei Hsien 221, Taiwan, R.O.C.
49 GPU_BL_ON 1 R385
10KR2J-3-GP Title
ECSMI#_KBC ? SDM03MT40A-7-F-GP CH715FPT-GP
KBC_WPC775 / BIOS
2
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 34 of 56
5 4 3 2 1
5 4 3 2 1
D D
KROW[1..8] 36,55
KCOL[1..18] 36,55
1
1
C202 C203
SC15P50V2JN-2-GP SC15P50V2JN-2-GP
1KBC_XO_R2
2
X2
RESO-32D768KHZ-GP
4
2 R365 1 10KR2J-3-GP
2 1
82.10026.021 DY
3
U26B
33KR2J-3-GP
R137
R138
1 2 KBC_XI 77 53 KCOL1 1 TP48 TPAD28
2
1
C KCOL10 C
CHARGE 46 CHG_ON# 31 GPIO56/TA1 KBSOUT9 41
SC1U10V3KX-3GP
32 40 KCOL11
31 KBC_BEEP CHG_I_PRE_SEL GPIO15/A_PWM KBSOUT10 KCOL12
CHARGE 1 118 39
2
GPIO21/B_PWM KBSOUT11 KCOL13
15 BRIGHTNESS TP13 62 GPIO13/C_PWM KBSOUT12/GPIO64 38 Q9
37 KCOL14 23 EC_RST# B
KBSOUT13/GPIO63 KCOL15
KBSOUT14/GPIO62 36
35 KCOL16 MMBT3906-3-GP
C
MODEL_1 KBSOUT15/GPIO61/XOR_OUT KCOL17 TP60 TPAD28
13 GPIO12/PSDAT3 GPIO60/KBSOUT16 34 1
MODEL_0 12 33 KCOL18 1 TP58 TPAD28
3D3V_AUX_S5_KBC GPIO25/PSCLK3 GPIO57/KBSOUT17
11 GPIO27/PSDAT2
10 GPIO26/PSCLK2
36 TPDATA TPDATA 71 54 KROW1
TPCLK GPIO35/PSDAT1 KBSIN0 KROW2
36 TPCLK 72 PS/2
GPIO37/PSCLK1 KBSIN1 55
56 KROW3
KBSIN2 KROW4
KBSIN3 57
1
58 KROW5
R381 R374 SPIDI KBSIN4 KROW6
86 F_SDI KBSIN5 59
10KR2J-3-GP 10KR2J-3-GP SPIDO 87 60 KROW7
SPICS# F_SDO KBSIN6 KROW8
DY DY SPICLK
90
92
F_CS0# FIU KBSIN7 61
2
F_SCK
85 ECRST#
MODEL_0 VCC_POR#
MODEL_1
SB WPC775L-0DG-GP-U
B B
1
VGA DY
SCD1U16V2ZY-2GP
2
EC68
5
6
7
8
DY
2
3D3V_AUX_S5_KBC
SRN10KJ-6-GP
RN43 KBC SKT FOR DEBUG
4
3
2
1
SKT1
SPI_HOLD# ER3 SPICS# 1 8 SPI_VCC
0R3-0-U-GP
SPIDI_R 2 7 SPI_HOLD#
U29 SPI_WP# 3 6 SPICLK_R
2
4 5 SPIDO_R
SPICS# 1 8 SPI_VCC
SPIDI SPIDI_R CS# VCC SPI_HOLD# SKT-SPI8P-GP-U
1 2 2 DO HOLD# 7
ER4 SPI_WP# 3 6 SPICLK_R ER1 1 2 150R2J-L1-GP-U SPICLK
150R2J-L1-GP-U WP# CLK SPIDO_R ER2 SPIDO
4 5 1 2 150R2J-L1-GP-U
MODEL (KBC internal pull high)
GND DIO DY
DY
1
SC47P50V2JN-3GP
EC69
MODEL_0 MODEL_1 W25X16VSSIG-GP DY
1
P15 0 1
2M Bits
SC4D7P50V2CN-1GP
SC47P50V2JN-3GP
A <Variant Name> A
2
S13 1 0
P1 1 1 SPI FLASH ROM
PUT CLOSE TO KBC Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SPI_WP# Title
34 SPI_WP#
KBC_WPC775 / BIOS(2/2)
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 35 of 56
5 4 3 2 1
5 4 3 2 1
5V_S0
KROW[1..8] 35,55
5V_S0
KCOL[1..18] 35,55
1
C710 C714
D SCD1U16V2ZY-2GP SC1U10V2KX-1GP D
4
3
2
KB1
SC 1 26
RN42 TPAD1
27 SRN10KJ-5-GP 13
1
1 KCOL4
1
2
2
2 KCOL5 35 TPDATA 3
3 KCOL7 35 TPCLK 4
4 KROW8 5
5 KROW7 6
6 KROW6 RIGHT# 7
1
7 KROW5 EC64 EC63 8
8 KROW4 SC33P50V2JN-3GP SC33P50V2JN-3GP 9
9 KROW3 10
2
10 KROW2 11
11 KROW1 LEFT# 12
12 KCOL2 14
13 KCOL3
14 KCOL6
15 KCOL8 ACES-CON12-4-GP-U 20.K0228.012
16 KCOL9
17 KCOL10 12 1
18 KCOL11
19 KCOL13
20 KCOL14
21 KCOL15
22 KCOL16
C 23 KCOL1 C
24 KCOL12
25 KCOL17 1
26 KCOL18 1 TP47
TP49
28
ACES-CON26-6GP
20.K0320.026
15'' TOUCHPAD BUTTON SWITCH
5V_S0 5V_S0
1
R610 R609
10KR2J-3-GP 10KR2J-3-GP
GOLDEN FINGER FOR DEBUG BOARD DY DY
2
SW1 SW2
1 3 LEFT# 1 3 RIGHT#
5 5
B 5V_S0 5V_S0 B
U25 2 4 2 4
A1 B1
TOP VIEW SW-TACT-91-GP SW-TACT-91-GP
PLTRST_SYS# A1 B1 PLTRST_SYS# 62.40009.561 62.40009.561
18,24,25,28,37 PLTRST_SYS# A2 A2 B2 B2
18,34 LPC_LFRAME# LPC_LFRAME# A3 B3 LPC_LFRAME#
A3 B3
A4 A4 B4 B4
18,22,55 LPCCLK1 A5 B5 LPCCLK1
3D3V_S0 A5 B5
A6 A6 B6 B6 A15 (B1)
1 R370 2 0R2J-2-GP A7 A7 B7 B7
A8 B8 A14 (B2)
18,34 LPC_LAD3 A9
A10
A8
A9
B8
B9 B9
B10
LPC_LAD3 18,34 COVER SWITCH 3D3V_AUX_S5
18,34 LPC_LAD2 A10 B10 LPC_LAD2 18,34
....
A11 B11
....
1
3D3V_S0 A15 B15 LID1
A15 B15 3D3V_S0
A1 (B15) 1 R643
VDD
FOX-GF30 2 10KR2J-3-GP
VSS
ZZ.GF030.XXX
2
OUTPUT 3 LID_CLOSE# 34
1
EM-6781-T30-GP C580
(BOTTOM VIEW)
1
74.06781.07B
C935 SCD22U16V3KX-2-GP
2
3D3V_S0 SCD1U10V2KX-4GP
2
A <Variant Name> A
1
SCD1U16V2ZY-2GP
DY DY DY
SC10U10V5ZY-1GP Wistron Corporation
2
Title
KEYBOARD/TPAD/DEBUG/LID
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 36 of 56
5 4 3 2 1
5 4 3 2 1
3D3V_S0
SB
1
3D3V_S0
R541
10KR2J-3-GP
3D3V_S5
NB_SB POWERGOOD CIRCUIT
2
R592
1
10KR2J-3-GP VCORE_EN 38,41,50
3D3V_S5 R551
D 10KR2J-3-GP D
D
2
2D5V_S0
SB_PWRGD 19
1
3D3V_S0 Q39
2
R580 2N7002-F-GP
10KR2J-3-GP G
1
1
Q42 R560
S
R589 2N7002-F-GP 10KR2J-3-GP
D
10KR2J-3-GP G
Q40
2
2N7002-F-GP
S
2D5V_PWRGD G
D
Q41
S
2
2N7002-F-GP
G R590
R572 0R2J-2-GP
SDM03MT40A-7-F-GP D31
S
1 2
1
0R2J-2-GP
19,23,24,34,42 PM_SLP_S3# 1 6 SB
1
2 5 C836
41,47 1D8V_S3_PG
SCD1U10V2KX-4GP
ATI 1.8V PULL HIGH 1D8V_S3
41 1D2V_PWRGD 3 4
C C
1
D28
R595
U86 DY 4K7R2F-GP
42 1D1V_PWRGD 1 6 1 A VCC 5
R588
2
2 B
2 5 1 2 EC_NB_PWRGD_R
38 VGATE_PWRGD 19 SB_TO_EC_PWRGD
3 4 NB_PWRGD
GND Y NB_PWRGD 11
1
4K7R2F-GP C937
1
3 4 C874
23 PWROK
SNLVC1G08DCKRG4-GP SCD1U10V2KX-4GP
2
SCD01U16V2KX-3GP
Ati:0~30n sec
2
SDM03MT40A-7-F-GP 1 2
R593 0R2J-2-GP DY
DY
Run Power
5V_S0 5V_S5
C892
DY APEC 9.2A
U76
B DCBATOUT Q46 S D B
1 2 1 8
TP0610K-T1-GP RUN_POWER_ON 2 S D 7 DESIGN 5.3A
SCD1U25V3KX-GP 3 S D 6
2 Z_12V G D
S
1 2 3 1 2 4 5
D
2
SCD1U25V3KX-GP
0R0402-PAD 84.04468.037
1
3D3V_S0
SCD1U25V3KX-GP
RLZ12B-1-GP DY
2
1
G
2 1 Z_12V_G3 3D3V_S5
2
1
1
R638 1 S D 8 SCD1U10V2KX-4GP 1 5
3D3V_runpwr 2
100KR2J-1-GP S D A VCC
2 7
3 S D 6 DESIGN 6A 11,18,27,34 PLTRST# 2 B
Z_12V_D4 1 2 4 G D 5
2
84.04468.037
U82 DY SNLVC1G08DCKRG4-GP
1
4 3 2N7002DW-1-GP
D
1D8V_S0 1D8V_S3
DY Q45 5 2 U65
2N7002-11-GP 1 S D 8
G Z_12V_D3 6 1 2 S D 7
R460 S D
3 6
1 2 4 G D 5
A <Variant Name> A
S
0R2J-2-GP AO4468-GP
84.27002.D3F 84.04468.037
PM_SLP_S3# 19,23,24,34,42 Wistron Corporation
2
SCD1U25V3KX-GP
C769
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DY APEC 9.2A Taipei Hsien 221, Taiwan, R.O.C.
1
RUNPOWER
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 37 of 56
5 4 3 2 1
5 4 3 2 1
C36
1 2
DCBATOUT DCBATOUT_6265
R24 SC33P50V2JN C33 SC180P50V2JN-1GP G65
5V_S0 1 2 1 2 1 2
ST15U25VDM-3-GP
C26 44K2R2F-1-GP G66
1
SC1U16V3KX-2GP C31 SC1KP50V2KX-1GP 1 2
DY
2
GAP-CLOSE-PWR
2
C37 G68
1 2 1 2
D GNDA_VCORE D
SCD1U10V2KX-4GP GAP-CLOSE-PWR
CPU_VDDNB G69
DCBATOUT_6265 1 R28 2 1 R38 2 GNDA_VCORE 1 2
22KR2F-GP 20071122
2
2R3J-GP C28 GAP-CLOSE-PWR
SCD1U50V3KX-GP R330 G70
1
10R2F-L-GP TC14 DY 1 2
2
ST15U25VDM-3-GP GAP-CLOSE-PWR
2
GNDA_VCORE 1 R331 2 0R2J-2-GP CPU_VDDNB_RUN_FB_H 6 G71
3D3V_S0 5V_S0 3D3V_S0 1 2
1 R52 2 PHASE_NB PHASE_NB 39
GAP-CLOSE-PWR
6265_OCSET_NB
11K5R2F-GP G72
1
LGATE_NB LGATE_NB 39 1 2
6265_COMP_NB
R14 DY R10 PHASE_NB
6265_VSEN_NB
GAP-CLOSE-PWR
6265_FSET_NB
0R2J-2-GP 0R2J-2-GP
6265_FB_NB
UGATE_NB
6265_VCC
2 UGATE_NB 39
6265_VIN
1
1
10KR2F-2-GP 10KR2F-2-GP
DY
2
6265_OFS/VFIXEN
R19 DY R327
2
49
48
47
46
45
44
43
42
41
40
39
38
37
2
GND
VIN
VCC
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
1
C U2 C
GNDA_VCORE
SC 1 36 BOOT_NB
OFS/VFIXEN BOOT_NB BOOT_NB 39
2 35 BOOT0
37 VGATE_PWRGD PGOOD BOOT0
1 2 3 34 UGATE0
6 CPU_PWRGD_SVID_REG PWROK UGATE0
R668 0R0402-PAD 1 2 6265_SVD 4 33 PHASE0
6 CPU_SVD SVD PHASE0
R18 1 0R0402-PAD
2 6265_SVC 5 32 5V_S0 UGATE0 39
6 CPU_SVC SVC PGND0
R17 1 0R0402-PAD
2 6265_ENABLE 6 31 LGATE0 PHASE0 39
37,41,50 VCORE_EN ENABLE LGATE0
1 2 R16 1 2 2K2R2J-2-GP6265_RBIAS 7 RBIAS PVCC 30 BOOT0 39
SC2D2U10V3KX-1GP
R29 93K1R2F-L-GP 6265_OCSET 8 29 LGATE1 LGATE0 39
OCSET LGATE1
1
6265_VDIFF0
2/27 SC R23 23K7R2F-GP
6265_FB0
9
10
VDIFF0 PGND1 28
27 PHASE1 C61
6265_COMP0 FB0 PHASE1 UGATE1
11 26 UGATE1 39
2
GNDA_VCORE 6265_VW0 COMP0 UGATE1 BOOT1
12 VW0 BOOT1 25 PHASE1 39
BOOT1 39
COMP1
VDIFF1
VSEN0
VSEN1
LGATE1 39
RTN0
RTN1
G67
ISN0
ISN1
ISP0
VW1
ISP1
FB1
1 2
6265_ENABLE
GAP-CLOSE-PWR ISL6265HRTZ-T-1-GP
13
14
15
16
17
18
19
20
21
22
23
24
74.06265.A73
GNDA_VCORE 6265_COMP1
6265_VDIFF1
SC
6265_VSEN0
6265_VSEN1
6265_VW1
6265_FB1
6265_RTN0
6265_RTN1
ISP0 ISN1
1
+VCC_CORE1
Close to
1
B B
CPU socket
1
R41
1
ISP1 39
2
ISN1 39
6 CPU_VDD0_RUN_FB_H 1 2
R34 1 0R0402-PAD
2
6 CPU_VDD0_RUN_FB_L
R36 0R0402-PAD
6 CPU_VDD1_RUN_FB_L 1 2
R39 1 0R0402-PAD
2
6 CPU_VDD1_RUN_FB_H
R45 0R0402-PAD
1
Close to
2
CPU socket
DY
6265_FB0_C C27 SC180P50V2JN-1GP 6265_FB1_C C52 SC180P50V2JN-1GP
R22 1 2 DY R42 C45 1 2
249R2F-GP C23 C21 249R2F-GP C44
A 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 <Variant Name> A
DCBATOUT_6265
5
6
7
8
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
H/S: SI7326DN/30mOhm/ 4.5Vgs/ 84.07326.037
D
D
D
D
U53
POWERPAK-8P-GP
L/S: SI7326DN/30mOhm/ 4.5Vgs/ 84.07326.037 +VCC_CORE0
2
Design Current: 12.6A
Peak current: 18A
G
S
S
S
D OCP_min:24A D
SI7686
4
3
2
1
84.07686.037 +VCC_CORE0
L47
UGATE0
38 UGATE0
PHASE0
1/14 1 2
38 PHASE0
IND-D36UH-9-GP
1
5
6
7
8
5
6
7
8
BOOT0 1 R57 BOOT0_R 1 R670
38 BOOT0 2 2 20071204
D
D
D
D
D
D
D
D
1R3J-L1-GP U54 U55 0R2J-2-GP
20071108
1
POWERPAK-8P-GP
POWERPAK-8P-GP
C63
SCD22U10V3KX-2GP TC15 TC16 TC2
2
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
1
G
S
S
S
G
S
S
S
SI4634DY R25
4
3
2
1
4
3
2
1
SI4634DY 16K2R3F-GP
84.04634.037
LGATE0 84.04634.037
38 LGATE0
2
1 R32 2
4K02R2F-GP
C29
DCBATOUT_6265 1 2
SCD1U16V3KX-3GP
R335
1 DY 2 1 DY 2
C C602 C600 C605 C
GAP-CLOSE-PWR-3-GP
ISP0
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
R26 NTC-10K-9-GP
10R2F-L-GP
5
6
7
8
1
38 ISP0 ISP0_R G4
2
U51
D
D
D
D
SI4800BDY-T1
Id=7A
2
Qg=8.7~13nC
Rdson=23~30mohm
G
S
S
S
38 ISN0
4
3
2
1
UGATE_NB
38 UGATE_NB PHASE_NB 38 CPU_VDDNB Iomax=3A
L46 OCP>6A
38 BOOT_NB BOOT_NB 1 2 PHASE_NB 1 2
IND-4D7UH-120-GP
C56
1
SCD22U10V3KX-2GP C611 TC13
5
6
7
8
1
SCD1U10V2KX-4GP SE220U2VDM-12GP
U52 DY
D
D
D
D
2
SI4800BDY-T1
2
Id=7A
Qg=8.7~13nC DCBATOUT_6265
G
S
S
S
Rdson=23~30mohm
4
3
2
1
B B
38 LGATE_NB LGATE_NB
C79 C81 C606 C607
5
6
7
8
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
+VCC_CORE1
D
D
D
D
U56
Design Current: 12.6A
POWERPAK-8P-GP
2
Peak current: 18A
OCP_min:24A
G
S
S
S
SI7686 20071108
4
3
2
1
84.07686.037 +VCC_CORE1
L48
38 UGATE1 UGATE1
38 PHASE1 PHASE1 1 2
20071204
1
IND-D36UH-9-GP
R58
1/14
5
6
7
8
5
6
7
8
1
D
D
D
D
D
D
D
D
POWERPAK-8P-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SCD22U10V3KX-2GP SE330U2VDM-L-GP
2
1 R59 2
4K02R2F-GP
G
S
S
S
G
S
S
S
4
3
2
1
GAP-CLOSE-PWR-3-GP
10R2F-L-GP
ISP1
1
G5 Taipei Hsien 221, Taiwan, R.O.C.
38 ISP1
ISP1_R
Title
1/14
ISL6265HR_CPU_Core/VDDNB_2/2
2 Size Document Number Rev
A3
ISN1 P1/P15 SA
38 ISN1
Date: Wednesday, March 19, 2008 Sheet 39 of 56
5 4 3 2 1
5 4 3 2 1
DCBATOUT DCBATOUT_51125
G78 3D3V_PWR 3D3V_S5
1 2
G86 1/14 1/14
GAP-CLOSE-PWR 1 2 5V_AUX_S5
G79
1 2 GAP-CLOSE-PWR 51125_ENTIP2 51125_ENTIP1 5V_AUX_S5 5V_PWR 5V_S5
1
1 G87 G94
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
GAP-CLOSE-PWR 1 2 R493 C817 1 2
1
TC11 G80 100KR2J-1-GP C545
1
ST15U25VDM-1-GP GAP-CLOSE-PWR DY R233 R492 GAP-CLOSE-PWR
DY 1 2
D
2
2
D GAP-CLOSE-PWR 1 2 169KR2F-1-GP 1 2 D
2
G81 G
2
1 2 GAP-CLOSE-PWR G GAP-CLOSE-PWR
G89 G96
S
GAP-CLOSE-PWR 1 2 1 2
S
G82 Q34 Q33
D
1 2 GAP-CLOSE-PWR Q32 2N7002-11-GP 2N7002-11-GP GAP-CLOSE-PWR
G90 2N7002-11-GP Q31 G97
GAP-CLOSE-PWR 1 2 G 2N7002-11-GP 1 2
23 PWR_S5_EN
G83 G PWR_S5_EN 23
1 2 GAP-CLOSE-PWR GAP-CLOSE-PWR
S
G91 G98
S
GAP-CLOSE-PWR 1 2 1 2
G84
1 2 GAP-CLOSE-PWR 200711212 GAP-CLOSE-PWR
G92 G99
GAP-CLOSE-PWR 1 2 1 2
GAP-CLOSE-PWR GAP-CLOSE-PWR
G100
1 2
DCBATOUT_51125
C838 C842
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
DY
1
C864 C849 C854
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
C C
DY
2
D D
2
8
7
6
5
5
6
7
8
Iomax=6A Id=7A
D
D
D
D
D
D
D
D
OCP>12A Qg=8.7~13nC
16
SI4800BDY-T1 SI4800BDY-T1
Rdson=23~30mohm U44 Qg=8.7~13nC
Cyntec 7*7*3 Rdson=23~30mohm
VIN
DCR=30mohm, Irating=6A SCD1U25V3KX-GP Cyntec 7*7*3
Iomax=6A
S
S
S
G
G
S
S
S
Isat=13.5A C833 C822
G S OCP>12A
1
2
3
4
4
3
2
1
51125_VBST2 9 51125_VBST1 DCR=30mohm, Irating=6A
S G 2 1 VBST2 VBST1 22 1 2
Isat=13.5A
3D3V_PWR SCD1U25V3KX-GP 51125_DRVH2 10 21 51125_DRVH1 5V_PWR
L40 DRVH2 DRVH1 L41
1 2 51125_LL2 11 20 51125_LL1 1 2
IND-3D3UH-57GP LL2 LL1 IND-3D3UH-57GP
51125_DRVL2 51125_DRVL1 U72
D 12 DRVL2 DRVL1 19
1
SI4812BDY-T1-E3-GP
C568 TC18 U73
D
8
7
6
5
5
6
7
8
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
SCD1U10V2KX-4GP
ST220U6D3VDM-20GP
SC
SCD1U10V2KX-4GP
C569
D
D
D
D
51125_VO2 51125_VO1
D
D
D
D
7 24 SC
2
VO2 VO1
1
G85 TC19
SI4812BDY-T1-E3-GP
51125_FB2 51125_FB1
ST220U6D3VDM-20GP
5 VFB2 VFB1 2
2
1
G93
2
1 2 51125_EN 13 23 51125_PGOOD
S
S
S
G
G
S
S
S
R562 820KR2F-GP EN0 PGOOD
G S
1
2
3
4
4
3
2
1
51125_ENTIP2 6 51125_ENTIP1
S G 1
2
C810 51125_TONSEL 4 25
TONSEL GND
Id=7.7A
1
Id=7.7A
2
Qg=8.5~13nC
1
1
51125_SKIPSEL Rdson=16.5~21mohm 0R2J-2-GP DY
100KR2J-1-GP
DYR530 Rdson=16.5~21mohm R535
VREG3
VREG5
TPAD28
1
R540 0R2J-2-GP R547 30KR2F-GP
DY 1/14
1 2
1
2
C805 SCD1U16V2KX-3GP C809 DY
2
3D3V_AUX_S5_5_51125 8
17
DYSC18P50V2JN-1-GP SC18P50V2JN-1-GP
2
3D3V_AUX_S5 5V_AUX_S5
G76
2
5V_AUX_S5_51125
G75
1
1 2 1 2
1
R532
SC GAP-CLOSE-PWR GAP-CLOSE-PWR-3-GP R524
10KR2F-2-GP 51125_VREF 2 R537 1 20KR2F-L-GP
0R0402-PAD Close to VFB Pin (pin2)
2
2
3D3V_AUX_S5 2 1
0R2J-2-GP R528
DY
1
SC10U10V5KX-2GP
C826 C834
SC10U10V5KX-2GP
51125_VREF 2 1
2
0R2J-2-GP R564
A <Variant Name> A
Close to VFB Pin (pin5)
3D3V_AUX_S5
0R2J-2-GP
2
DY 1
R566
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
0R2J-2-GP
2
DY 1
R565
Title
TPS51125_5V/3D3V
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 40 of 56
5 4 3 2 1
5 4 3 2 1
DCBATOUT_51124
DCBATOUT DCBATOUT_51124 1D8V_PWR 1D8V_S3
G39
G55 1 2
1 2 C525 C799 C513
1
SC GAP-CLOSE-PWR
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
GAP-CLOSE-PWR G40
G56 D 1 2
2
5
6
7
8
1 2
D
D
D
D
FDS8884-GP
U36 GAP-CLOSE-PWR
1
GAP-CLOSE-PWR G41
D TC10 G57 1 2 D
ST15U25VDM-1-GP
DY 1 2
2
GAP-CLOSE-PWR
G
S
S
S
GAP-CLOSE-PWR G42
G58 Id=7.5A G S Cyntec 10*10*4 1 2
4
3
2
1
1 2
Qg=4~5nC, DCR=3mohm, Irating=15A Iomax=12A GAP-CLOSE-PWR
GAP-CLOSE-PWR
G59
Rdson=26~30mohm Isat=40A OCP>18A G43
1 2
1 2 1D8V_PWR
L64
Vo(cal)=1.8046V GAP-CLOSE-PWR
GAP-CLOSE-PWR 1 2 G44
G60 3D3V_S5 1 2
1 2 COIL-1UH-33-GP
1
C813 C462 TC8 GAP-CLOSE-PWR
D
5
6
7
8
GAP-CLOSE-PWR DY G45
1
D
D
D
D
SC18P50V2JN-1-GP
U37
ST330U2D5VDM-9GP
1/14 1 2
2
1
SCD1U10V2KX-4GP
FDS6676AS-GP R525
R539 63K4R2F-1-GP GAP-CLOSE-PWR
R534 DY G46
2
5V_S5 10KR2J-3-GP 1 2
2
G
S
S
S
10KR2J-3-GP 51124_VFB1
1/14 GAP-CLOSE-PWR
G S
4
3
2
1
1
C949 SCD1U16V2KX-3GP
20071016 G47
R519 1 2
1
47KR2F-GP
R571 SANYO GAP-CLOSE-PWR
1
3D3R3J-L-GP1D2V_PWR G48
2
C837 1D8V_PWR 1D8V_S3_PG 37,47
Id=14.5A ESR=9mohm 1 2
C SC4D7U10V5KX-1GP 51124_VFB2 C
2
1D2V_PWRGD 37 Qg=25~35nC,
1
51124_VFB1 GAP-CLOSE-PWR
SCD1U16V2KX-3GP
Rdson=5.9~7.25mohm
1
SC1U10V3KX-3GP
C839 2
C950
24
2
U43
2
5
1
6
7
DY
2
2 1
DY
VFB1
VFB2
VO1
VO2
PGOOD1
PGOOD2
19,24,34,44 PM_SLP_S5#
R545 1KR2J-1-GP
1 BC1 51124_DRVH1
DY SCD47U6D3V2KX-GP
DRVH1 21
20 51124_LL1
2 51124_V5FILT LL1 51124_DRVL1
15 V5FILT DRVL1 19
16 V5IN DCBATOUT_51124
51124_EN1 23
SC
51124_EN2 EN1
8 EN2 C528 C800 C522
3 GND
2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
25 10 51124_DRVH2
GND DRVH2 51124_LL2
13 PGND2 LL2 11
TONSEL
37,38,50 VCORE_EN R546 2 1 1KR2J-1-GP 18 12 51124_DRVL2
VBST1
VBST2
1
PGND1 DRVL2
5
6
7
8
TRIP1
TRIP2
D
D
D
D
U41
TPS51124RGER-GPU1 SI4800BDY-T1
1D2V Iomax=5A
17
14
22
9
4
1 BC2 74.51124.073 OCP>10A
51124_TRIP1 Id=5A Cyntec 6*6*3
DY SCD47U6D3V2KX-GP
51124_TRIP2 1D2V_PWR 1D2V_S0
51124_TONSEL
G
S
S
S
Qg=8.7~13nC, DCR=14mohm, Irating=9A
1
G49
4
3
2
1
1
1 2
2
1
SC18P50V2JN-1-GP
IND-1D5UH-23-GP C774 TC9
1
R526 DY GAP-CLOSE-PWR
17K8R2F-GP
SE220U2D5VDM-6GP
SCD1U10V2KX-4GP
C827 G51
DY
2
2
5
6
7
8
51124_LL1 2 1 51124_VBST1 1 2
2
DY R533
D
D
D
D
2
SCD1U16V2KX-3GP DY R548 0R2J-2-GP U40 51124_VFB2 GAP-CLOSE-PWR
G52
1
C825 10KR2J-3-GP SI4800BDY-T1 1 2
1
G
S
S
S
SCD1U16V2KX-3GP Qg=8.7~13nC, G53
4
3
2
1
Rdson=23~30mohm SANYO Fujitsu 1 2
2
51124_V5FILT
ESR=15mohm ESR=15mohm GAP-CLOSE-PWR
G54
1 2
GAP-CLOSE-PWR
Title
TPS51124_1D8V/1D2V
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 41 of 56
5 4 3 2 1
5 4 3 2 1
1D1V_PWR 1D1V_S0
G29
1 2
GAP-CLOSE-PWR
DCBATOUT_51117 DCBATOUT G30
G61 1 2
1 2
GAP-CLOSE-PWR
D C519 C536 C524 GAP-CLOSE-PWR G31 D
G62 1 2
1
SCD1U50V3KX-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR G32
2
G63 1 2
1 2
GAP-CLOSE-PWR
5
6
7
8
GAP-CLOSE-PWR G33
D
D
D
D
FDS8884-GP
U38 G64 1 2
1 2
GAP-CLOSE-PWR
5V_S5 Id=7.5A Cyntec 10*10*4 GAP-CLOSE-PWR G34
1 2
Qg=4~5nC, DCR=4.2mohm, Irating=16A
G
S
S
S
Rdson=26~30mohm Isat=33A GAP-CLOSE-PWR
4
3
2
1
G35
1
1D1V_PWR
R209 L27
1D1V Iomax=9A 1 2
300R3F-GP Vo(cal)=1.1060V
1 2 OCP>18A GAP-CLOSE-PWR
1
SC18P50V2JN-1-GP
1
SC1U10V2KX-1GP 1 2
2
1
C477
C459
51117A_V5FILT
SCD1U10V2KX-4GP
R211
2
5
6
7
8
C512 15KR2F-GP TC7 GAP-CLOSE-PWR
DY
1
D
D
D
D
5V_S5 2 1 U39 SE330U2D5VDM-LGP G37
2
C478 FDS8880-NL-GP DY 1 2
2
SC1U10V2KX-1GP SCD1U25V3KX-GP 51117A_VFB
A
SANYO GAP-CLOSE-PWR
1
D11 Id=10A G38
G
S
S
S
C B0530WS-7-F-GP U35
51117A_DRVH Qg=9~13nC,
R210
31K6R2F-GP
ESR=15mohm 1 2 C
4 13
4
3
2
1
V5FILT DRVH
10 Rdson=12~15mohm GAP-CLOSE-PWR
K
V5DRV 51117A_LL
12
2
51117A_VBST LL
14 VBST
51117A_VFB 51117A_DRVL
R212 0R2J-2-GP
5 VFB DRVL 9
3
20071024
VOUT 1D1V_PWR
51117A_EN_PSV
19,23,24,34,37 PM_SLP_S3# 1 2 1 EN_PSV PGOOD 6
3D3V_S5 1/14
1 R217 2 51117A_TON 2 TON GND 7 20071016
249KR2F-GP 51117A_TRIP 11 8
TRIP PGND 1
Vout=0.75*(R1+R2)/R2
1
TPS51117PWR-GP R213
R223 200KR2J-L1-GP
20KR2F-L-GP
2
2
1D1V_PWRGD 37
151117A_EN_PSV
B B
DY C481
2
SCD1U10V2KX-4GP
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
TPS51117_1D1V
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 42 of 56
5 4 3 2 1
5 4 3 2 1
G U COR WR G U COR
G
SC G C O WR
DC OU DC OU G
G
D D
G C O WR
C C C G C O WR G
VGA VGA G
CD U
C
G C O WR
U
G C O WR G
G
VGA G C O WR
G C O WR G
G
U G
D G G C O WR
Id=7.5A Cyntec 10*10*4 G C O WR G
Qg=4~5nC, DCR=3mohm, Irating=15A 1D2V Iomax=11A
VGA Rdson=26~30mohm Isat=40A OCP>20A G
G
C O WR
G U COR WR
R
R G Vo(cal)=1.2033V G C O WR
1/14
G
C CO UH G G
C U G VGA DY VGA
N
C
R DY
G
C C G C O WR
C
U U D DM G G
VGA C D G
C U G R G CD U G
C
C Id=14.5A G C O WR C
VGA SANYO
CD U
D G
W G VGA U VGA Qg=25~35nC, ESR=15mohm
DR H Rdson=5.9~7.25mohm
DR H
1/14 G C O WR
DR
VGA DR
DR
OU G U COR WR
G N R R R
N GOOD D R G R G
DY DY
G
R ON
R G R ON GND 20071016
R GND Vout=0.75*(R1+R2)/R2 VGA
VGA 20071123
R
VGA WR G R
R VGA R G
R G
DY DY
D
VGA Q
D
C N G Q
VGA DY N G
G COR WRGD R C NG WRCN RR
1/14 R G
G
G WRCN RR
C
C NG
DY
B B
WRCN
R
CD U
VGA 0 1 0.9V 0.9057V R G
WRCN RR
DY R
WRCN
CD U
DY
G
G
DY C DY
G
C
C
DY
A N m A
W s ron Corpora on
H W R H
H w ROC
TPS51117_GPU_Core
D m N m R
P1 P15 SA
D W M
5 4 3 2 1
5 4 3 2 1
1D5V_S0
G957 Iomax=1A 1D5V_S0
G102
1 2
1
C933 GAP-CLOSE-PWR
G101
D SC10U10V5KX-2GP 1 2 D
2
U83 GAP-CLOSE-PWR
3 3D3V_S0
VOUT
GND 2
VIN 1
1
C928
G957T65UF-GP SC1U10V3KX-4GP
74.95765.03C
2
20071108
1D2V_S5
Iomax=400mA
3D3V_S5 1D2V_S5
20071108
C C
1
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC1U10V3KX-4GP U34
DY DY
IN
GND
OUT
2
G9161-120U65U-GP
74.09161.E3C
Place near to SB700
B 1D8V_S3
20071108 2D5V_S0 B
Iomax=1A
5V_S5 OCP>2A
Iomax=0.3A
1
C463
C467 2D5V/300mA
SC10U10V5KX-2GP DY SCD1U10V2KX-4GP 2D5V_S0
2
C460 G27
SC1U10V3KX-4GP 1 2 U28
G25
2
GAP-CLOSE-PWR 2 1 2
VOUT
G26 3 VIN
1
U32 1 2 1 GAP-CLOSE-PWR
GND
2
C412 C414
10 1 GAP-CLOSE-PWR SC4D7U6D3V5KX-3GP
2
9026_S5 VIN VDDQSNS G28 SCD1U10V2KX-4GP G9131-25T73UF-GP
19,24,34,41 PM_SLP_S5# 2 1 9 2
1
R198 0R2J-2-GP S5 VLDOIN 74.09131.A31
8 GND VTT 3 1 2
2 1 9026_S3 7 4
R194 0R2J-2-GP S3 PGND GAP-CLOSE-PWR
DDR_VREF_S3 6 VTTREF VTTSNS 5 20071108
GND
1
SC1U10V3KX-4GP
1
11
20071122
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
0D9V&2D5V&1D25V&1D5V
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 44 of 56
5 4 3 2 1
5 4 3 2 1
CPU_CORE
Intersil ISL6265 Charger Max8725
Adapter
VID Setting Output Signal Input Signal Output Signal
CPU_SVD MAX8725_VCTL
SVD VGATE_PWRGD BATT_SENSE Input Signal Output Signal
CPU_SVC PGOOD ICTL BATT AD_OFF AD_IN
SVC (I) (O)
D CHARGE_ON1# AC_IN# D
PKPRES ACOK
Input Signal
VCORE_EN Input Power Output Power
PGD_IN Output Power
AD_JK AD+
Input Power Output Power VCC(I) VCC(O)
VCC_CORE0
Voltage Sense PHASE0 AD+ BT+
CPU_VDD0_RUN_FB_H ACIN VOUT (O)
VSEN0
CPU_VDD1_RUN_FB_H VCC_CORE1
VSEN1 DCBATOUT
CPU_VDD0_RUN_FB_L PHASE1 VOUT (O)
RTN0
CPU_VDD1_RUN_FB_L CPU_VDDNB
RTN1
BOOT_NB
51125_ENTRIP2
ENTRIP2 Output Power 5V_S5 RT9026PFP TPS51117
5V(O) 0D9V_S3 1D1V_S0
3D3V_S5 Input Signal Output Signal Input Signal Output Signal
B
Input Power 3D3V(O) B
PM_SLP_S5# PM_SLP_S3# 1D1V_PWRGD
EN EN POK
3D3V_AUX_S5
DCBATOUT_51125 VREG3 0D9V_S3
VOUT (O)
VIN 5V_AUX_S5
Input Power Input Power Output Power
VREG5 5V_S5
1D8V_S3 VIN
VIN 1D1V_S0
VOUT (O)
DCBATOUT_51117
5V_S5 VIN VIN
G9161
1D2V_S5
Input Power Output Power
G957
1D5V_S0
3D3V_S5 1D2V_S5
VIN VOUT Input Power Output Power
<Variant Name>
A 1D5V_S0 A
3D3V_S0 VIN VOUT (O)
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5 4 3 2 1
5 4 3 2 1
AD+
U49
NEAR
8 D S 1
7 D S 2 DCBATOUT BT+
6 D S 3
1
D G
100KR2J-1-GP
5 4 U6
R315
AD+_TO_SYS 1 2 1 S D 8
P2003EVG-GP S D
R304
2 7
D01R2512F-4-GP AD+ 3 S D 6
10KR2F-2-GP
D D
2
2
4 G D 5
AD+_G_2
R324
P2003EVG-GP
2
AD+
10KR2F-2-GP
1
GAP-CLOSE-PWR
GAP-CLOSE-PWR
R314
1
1
2
AD+_G_1 D8 R332
1SS4000GPT-GP 470KR2J-2-GP
G1
G2
K
2
DC_IN_D
1
AD+
1
Q18 C109
SC DCBATOUT
SC1U25V5KX-1GP
2N7002DW-1-GP
2
SCD1U50V3KX-GP
6
1 BQ24745_CSSP
309KR3F-GP
2 2 1 1 2
1
R337 C107 C112 C954
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
CHG_AGND SCD1U50V3KX-GP SCD1U50V3KX-GP
C101
C108
C610
CHG_AGND
1
AC_OK
2
ICREF
5
6
7
8
BQ24745_DCIN 22 28
2
DCIN CSSP
D
D
D
D
FDS8884-GP
C C
BQ24745_ACIN 2 ACIN BQ24745_CSSN
CSSN 27 D9
U13
TP1 C116
SCD01U50V2KX-1GP
K A 1 2
G
S
S
S
R343 25 BQ24745_BST 1SS4000GPT-GP SC1U10V3KX-3GP
4
3
2
1
BOOT
1
R106
C118
0R2J-2-GP 21 BQ24745_VDDP
AC_OK VDDP
2 1BQ24745_ACOK 13 ACOK
1
C135
1
SC1U10V3KX-3GP 24 24745_HIGH_G
UGATE BT+
10 L45
2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
20 24745_LOW_G
LGATE
5
6
7
8
CHG_AGND
D
D
D
D
C608
C609
C86
C87
C88
C90
connect to KBC
GAP-CLOSE-PWR
GAP-CLOSE-PWR
2
1
FDS8884-GP
14 NC#14 PGND 19
CHG_AGND
U12
18
2
CSOP
G73
G74
C122
1
G
S
S
S
connect to KBC CHG_AGND 17
BQ24745_IINP CSON
1 2 8 2 1
4
3
2
1
34 AD_IA SC150P50V2JN-3GP VICM
R344
0R0402-PAD C129 4K7R2J-2-GP
BQ24745_FBO_RC SCD1U50V3KX-GP
1 2 R112 1 2BQ24745_FBO
B B
SC220P50V2KX-3GP
1 R111 2 6 FBO
200KR2F-L-GP BQ24745_EAI 5 16
EAI NC#16
1
BQ24745_EAO 4 EAO
C614
CE
2 1BQ24745_EAO_RC2 1 12 15 BATT_SENSE
GND
C124 BQ24745_CSIP
SC1U10V3KX-3GP
SCD1U25V2ZY-1GP
1 2 U22 BQ24745_CSIN
2
29
C612
C126 BQ24745RHDR-GP
1
SC56P50V2JN-2GP
2
3D3V_AUX_S5
CHG_AGND
1 2
1
AC_IN# R113
34 AC_IN#
1
3D3V_AUX_S5
100KR2J-1-GP
2
1
SC1U10V3KX-3GP
1
SCD1U10V2KX-4GP
A <Variant Name> A
2
Q8 R345
D
Q7
S
Title
CHARGER_BQ24745
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 46 of 56
5 4 3 2 1
5 4 3 2 1
DCIN1 AD_JK
U48
1 1 S D 8
D 2 S D 7 D
K
3 3 S D 6
1
C583 C584 D20 AD+_2 4 G D 5
2 SCD1U50V3ZY-GP SCD1U50V3ZY-GP P4SSMJ24PT-GP
4 P2003EVG-GP
1
5
A
6 R321 C588
1
NP1
200KR2J-L1-GP
SC1U50V5ZY-1-GP
DC-JACK135-GP
2
R2
E
22.10037.F31 AD_OFF#_JK B R1
C
1
PDTA124EU-1-GP
Q19 R322
Q20 100KR2J-1-GP 3D3V_AUX_S5
R1
3 OUT BATTERY CONNECTOR
34 AD_OFF 2
2
IN 1 GND 3D3V_AUX_S5
2
R2
DTC114EUA-1-GP D22 D5
BAV99PT-GP-U D7
SB DY DY DY
1
BAV99PT-GP-U BAT1
R334 8
100KR2J-1-GP 1
3
BAV99PT-GP-U RN40 2
2
1 4 BATA_SCL_1 3
34,46 BAT_SCL
C 2 3 BATA_SDA_1 4 C
34,46 BAT_SDA
34 BAT_IN# 5
SRN33J-5-GP-U 6
BT+ 7
9
EC57 EC58
1
SC10P50V2JN-4GP
SC10P50V2JN-4GP
DY DY ALP-CON7-GP
1
EC56 EC55 EC3 EC60 20.80907.007
2
SC1000P50V3JN-GP
SC1000P50V3JN-GP
SCD1U50V3ZY-GP SCD1U50V3ZY-GP
2
DY
G14
46 BATT_SENSE 1 2
1.1V_DELAY 1D1V_S0
R506 U23
200KR2F-L-GP VGA 1 S D 8
1
R109 2 S D 7
B VGA DY C125 3 S D 6
B
1
3D3V_AUX_S5 1 2 SCD1U25V3KX-GP
4 G D 5
2
0R2J-2-GP AO4468-GP
2
1
R517
D
2
2N7002-F-GP
1
G
1.8V_DELAY 1D8V_S3
U42
S
1 S D 8
D
1
VGA VGA R239 VGA DY 2 S D 7
R556
Q38 C546 3 S D 6
2N7002-F-GP 2 1 SCD1U25V3KX-GP
4 G D 5
2
18,43 PE_GPIO1 2 1 G
1
3D3V_AUX_S5 AO4468-GP
54K9R2F-L-GP C549
DY
S
54K9R2F-L-GP
1
SCD1U25V3ZY-1GP
VGA
2
2
VGA C824
SCD1U25V3ZY-1GP R518 VGA
D
2
54K9R2F-L-GP
VGA Q36
2N7002-F-GP
SB
1
G
S
<Variant Name>
D
A A
VGA Q37
2N7002-F-GP
37,41 1D8V_S3_PG G Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
S
Title
Size
AD_IN/ BTY SWITCH/GPURUN Rev
Document Number
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 47 of 56
5 4 3 2 1
5 4 3 2 1
D D
U62A
PART 1 OF 7
71.0M82M.00U
C210 VGA
SC100P50V2JN-3GP
1
VGA
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
M8XM_PCIE
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 48 of 56
5 4 3 2 1
5 4 3 2 1
3D3V_S0
SPI FLASH ROM U62B
SB
SCD1U16V2ZY-2GP
PART 2 OF 7
1
EC94 DY
5
6
7
8
DY 54 VIP_0 AM12 VIP_0 TXCAM_DPA0P AN9 HDMI_CLK#_R
SC AN10 HDMI_CLK_R
54 VIP_1 AL12
Placement: close GPU
2
3D3V_S0 VIP_1 TXCAP_DPA0N
SRN10KJ-6-GP 54 VIP_2 AJ12 VIP_2
54 VIP_3 AH12 VIP_3
VIP / I2C
TX0M_DPA1P AR10 HDMI_TXD0#_R
RN45 AP10 HDMI_TXD0_R
54 VIP_4 AM10 VIP_4 TX0P_DPA1N HDMI_CLK_R C640
VGA SCD1U10V2KX-4GP
54 VIP_5 AL10 1VGA2 HDMI_CLK 17
4
3
2
1
VIP_5
1
54 VIP_6 AJ10 VIP_6 TX1M_DPA2P AR11 HDMI_TXD1#_R HDMI_CLK#_R C639 1VGA2 SCD1U10V2KX-4GP
HDMI_CLK# 17
SPI_HOLD#V ER7 AH10 AP11 HDMI_TXD1_R HDMI_TXD0_R C638 1VGA2 SCD1U10V2KX-4GP
54 VIP_7 VIP_7 TX1P_DPA2N HDMI_TXD0 17
0R3-0-U-GP HDMI_TXD0#_R C637 1VGA2 SCD1U10V2KX-4GP
HDMI_TXD0# 17
54 VHAD0 AM9 VHAD_0 TX2M_DPA3P AR12 HDMI_TXD2#_R HDMI_TXD1_R C636 1VGA2 SCD1U10V2KX-4GP
HDMI_TXD1 17
U50 AL9 AP12 HDMI_TXD2_R HDMI_TXD1#_R C635 1VGA2 SCD1U10V2KX-4GP
HDMI_TXD1# 17
2
VHAD_1 TX2P_DPA3N HDMI_TXD2_R C634 SCD1U10V2KX-4GP
D 1VGA2 HDMI_TXD2 17 D
GPIO22 1 8 SPI_VCCV AJ9 AR14 HDMI_TXD2#_R C633 1 2 SCD1U10V2KX-4GP
S# VCC VPHCTL TXCBM_DPB0P HDMI_TXD2# 17
GPIO8 ER8 1 2 SPIDO_RV 2 7 SPI_HOLD#V DY AP14
SPI_WP#V Q HOLD# SPICLK_RV ER5 150R2F-1-GP SPICLK_V TXCBP_DPB0N
3 W# C 6 1 2 AL7 VPCLK0
150R2F-1-GP 4 5 SPIDI_RV ER6 1 2 GPIO9 AK7 AR15
VSS D VIPCLK TX3M_DPB1P
1
1
SC4D7P50V2CN-1GP
SC47P50V2JN-3GP EC95EC96 AM7
DY 54 PSYNC PSYNC
SC47P50V2JN-3GP
M25P10-AVMN6TP-GP DY AR16
2
TX4M_DPB2P
DY 54 DVALID AJ7 AP16
2
DVALID TX4P_DPB2N
DY AK6 AR17
SDA TX5M_DPB3P
3.3v? AM6 SCL TX5P_DPB3N AP17
VGA
1.8V_DELAY L13 2 1 BLM15BB121SN-GP AN8 AM14 L16 2 1 BLM15BB121SN-GP 1.8V_DELAY
DVPCNTL__MVP_0 DPA_PVDD C231 C248 C261
AP8 DVPCNTL__MVP_1 DPA_PVSS AL14 VGA
C165 AG1 VGA VGA VGA
U62F DVPCNTL_0
1
1
SCD1U10V2KX-4GP
SC10U10V5KX-2GP
SC1U10V2KX-1GP AH3 INTEGRATED AH17
DVPCNTL_1 DPB_PVDD
SC1U10V2KX-1GP
VGA PART 7 OF 7 AH2 DVPCNTL_2
TMDS/DP
DPB_PVSS AG17
AH1
2
2
DVPCLK
AJ26 LVDDR_1 AG7 AJ3 AN19
AH26 ControlVARY_BL AJ2
DVPDATA_0 DPB_VDDR_1
AN20 1.8v?
LVDDR_2 DVPDATA_1 MULTI_GFX DPB_VDDR_2 R359
DIGON AJ6 GPU_LCDVDD_ON 15 AJ1 DVPDATA_2 EXTERNAL DPA_VDDR_3 AP19
AK2 DVPDATA_3 TMDS DPA_VDDR_4 AR19 1 2 1.1V_DELAY
VGA AK27 AK1 C653 C643
L14 2 LVDDC_1 DVPDATA_4 0R3-0-U-GP
1.8V_DELAY 1 AL27 LVDDC_2 TXCLK_UP AK24 GPU_TXBCLK+ 14 AL3 DVPDATA_5 DPB_VSSR_1 AN18 VGA VGA VGA
BLM15BB121SN-GP AL24 AL2 AP18
TXCLK_UN GPU_TXBCLK- 14 DVPDATA_6 DPB_VSSR_2
1
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
AM24 LVSSR_1 TXOUT_U0P AN27 GPU_TXBOUT0+ 14 AL1 DVPDATA_7 DPB_VSSR_3 AR18
1
2
LVSSR_3 TXOUT_U1P DVPDATA_9 DPB_VSSR_6
VGA AN24 AR27 GPU_TXBOUT1- 14 AN2 AN15
2
2
AM26 LVSSR_12 TXOUT_L0P AN23 GPU_TXAOUT0+ 14 AP5 DVPDATA_18 NC_TPVSSC AG18
AJ22 AN22 AP6 AG6 R129
LVSSR_13 TXOUT_L0N GPU_TXAOUT0- 14 DVPDATA_19 HPD1 HDMI_HDP 17
C AJ24 LVSSR_14 TXOUT_L1P AP23 GPU_TXAOUT1+ 14 54 DVPDATA20 AR6 DVPDATA_20 10KR2J-3-GP C
AR23 AN7 PLACE OR RESISTORS CLOSE TO ASIC
TXOUT_L1N
AP24
GPU_TXAOUT1- 14 54 DVPDATA21
AP7
DVPDATA_21
AR31
VGA
GPU_TXAOUT2+ 14 54 DVPDATA22 GPU_CRT_RED 14
1
TXOUT_L2P DVPDATA_22 R VGA_RB R362 1
TXOUT_L2N AR24 GPU_TXAOUT2- 14 54 DVPDATA23 AR7 DVPDATA_23 RB AP31 VGA 2 0R0402-PAD
1.8V_DELAY L10 2 1 LPVDD AL22 AP25 R3611 2 150R2F-1-GP GPU_CRT_HSYNC
LPVDD TXOUT_L3P
AK22 LPVSS TXOUT_L3N AR25 54AG2 GPIO0 GPIO_0 G AR30 VGA GPU_CRT_GREEN 14
BLM15BB121SN-GP AF2 AP30 VGA_GB R356 1 VGA 2 0R0402-PAD
54 GPIO1 GPIO_1 GENERAL GB
VGA AF1 Close to VGA R3631 2 150R2F-1-GP
54 GPIO2 GPIO_2 PURPOSE
216-0707005-00-GP AE3 AR29 VGA
54 GPIO3 GPIO_3 I/O B GPU_CRT_BLUE 14
71.0M82M.00U AE2 AP29 VGA_BB R358 1 VGA 2 0R0402-PAD
54 GPIO4 GPIO_4 DAC1 BB
VGA AE1 R3571 2 150R2F-1-GP
54 GPIO5 GPIO_5 OPTIONAL STRAP TO GROUND
54AD3 GPIO6 GPIO_6 HSYNC AN29 GPU_CRT_HSYNC 16 VGA
AD2 AN30 FOR RB,GB,BB
34 GPU_BL_ON GPIO_7_BLON VSYNC GPU_CRT_VSYNC 16 SEE DAC1_RGB SHEET
54 GPIO8 AD1 GPIO_8_ROMSO
1
1
1 R157 2 AG4 GPIO_19_CTF R2B AL19 C620
43 PWRCNTL_1 AG3 GPIO_20_PWRCNTL_1 VGA VGA VGA
10KR2J-3-GP AD9 AM18 C650 C624
2
GPIO_21_BBEN G2
1
R355
SCD1U10V2KX-4GP
DY VGA_XIN1
54 GPIO22 AD8 GPIO_22_ROMCSB G2B AL18
1 R151
SC10U10V5KX-2GP
SC10U10V5KX-2GP
VGA VGA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3 27M_NS 1 2 3.3V_DELAY 2 AD7 GPIO_23_CLKREQB
10KR2J-3-GP VGA GPIO24 AB4 AM17
2
GPIO_24_JMODE B2
1
GEN_A COMP
AF7
2
GEN_B
AG5 GEN_C V2SYNC AL15
1
A2VDDQ
SCD1U16V2ZY-2GP
1
A2VSSQ AK21 VGA
1
VGA
1
2
DPLL_PVDD VDD2DI
VGA
SCD1U10V2KX-4GP
VGA VGA AP20 DPLL_PVSS VSS2DI AG22
249R2F-GP VGA C224 C245
2
1
L52 2 1 BLM15BB121SN-GP PCIE_PVDD AM35 AJ21 1 2 VGA VGA
2
2
L58 2 MPVDD DDC1DATA
1 BLM15BB121SN-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
GPU_CORE_S0 A14 MPVDD DDC1CLK AL29 GPU_EDID_CLK 15
VGA B15 PLL
VGA_XIN1 MPVSS CLOCKS DDC AJ15
VGA_XOUT1 VGA_XIN1 AR33 DP AUX DDC2DATA AH15
VGA_XOUT1 XTALIN DDC2CLK
VGA AP33 XTALOUT
1 2 DDC3DATA_DP3_AUXN AJ5 GPU_CRT_DDCDATA 16
R364 1MR2J-1-GP L9 2 1 BLM15BB121SN-GP DPLL_VDDC AG19 AJ4
1.1V_DELAY TP9 DPLL_VDDC DDC3CLK_DP3_AUXP GPU_CRT_DDCCLK 16
SB X6 VGA
1 2 1 AG21 TS_FDO DDC4DATA_DP4_AUXN AH14 HDMI_DDCDATA 17
VGA DDC4CLK_DP4_AUXP AG14 HDMI_DDCCLK 17
1
TPAD30 THERMAL
VGA
C618
XTAL-27MHZ-37-GP
C646
23 VGA_G792_N AK4 DMINUS
AM4 DPLUS
1
C226 216-0707005-00-GP
OPTIONAL XTAL SC2200P50V2KX-2GP IF DDC1,DDC2 USED ON M8x OR DDC1,DDC2,DDC3
71.0M82M.00U
2
DY USED ON M7x
23 VGA_G792_P
VGA DDC3,DDC4 ARE 5V TOLERANT ON M8x
C651 C632 C652 C659 C657 C664 C745 C741 C743 C185 C155 C184 C172 C161 C209
1
A A
VGA VGA VGA VGA VGA VGA VGA VGA VGA VGA VGA VGA VGA VGA VGA
2
2
SCD1U10V2KX-4GP
SC10U10V5KX-2GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SC10U10V5KX-2GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SC10U10V5KX-2GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SC10U10V5KX-2GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SC10U10V5KX-2GP
SC1U10V2KX-1GP
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
M8XM_IO
Size Document Number Rev
Custom
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 49 of 56
5 4 3 2 1
5 4 3 2 1
U62E
Part 6 of 7
P33 PCIE_VSS_1 VSS_66 P6
P34 PCIE_VSS_2 VSS_67 M9
P35 PCIE_VSS_3 VSS_68 M26
R27 PCIE_VSS_4 VSS_69 K28
R28 PCIE_VSS_5 VSS_70 M32
R29 PCIE_VSS_6 VSS_71 N14
R32 N17 U62D
PCIE_VSS_7 VSS_72
R33 PCIE_VSS_8 VSS_73 N19
1.8V_DELAY
VGA
U29 PCIE_VSS_9 VSS_74 N22 PART 5 OF 7
U32 N33 R125
PCIE_VSS_10 VSS_75 PCIE_VDDR
V29 PCIE_VSS_11 VSS_76 N3 D1 VDDR1_1 PCIE_VDDR_1 AR34 1 2 1.8V_DELAY
1
V32 R5 C736 C415 C737 C358 A8 AL33 0R3-0-U-GP
PCIE_VSS_12 VSS_77 VDDR1_2 PCIE_VDDR_2
1
PCI-Express GND
SC10U6D3V5MX-3GP
SC1U10V2KX-1GP
D C199 C192 C191 D
T33 PCIE_VSS_13 VSS_78 U8 VGA VGA VGA VGA A12 VDDR1_3 PCIE_VDDR_3 AM33
V34 P13 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP A16 AN33 VGA VGA
2
PCIE_VSS_14 VSS_79 VDDR1_4 PCIE_VDDR_4
SCD1U16V2ZY-2GP
V35 P15 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP A20 AN34
2
PCIE_VSS_15 VSS_80 VDDR1_5 PCIE_VDDR_5
W29 PCIE_VSS_16 VSS_81 P18 A24 VDDR1_6 PCIE_VDDR_6 AN35 VGA
W32 PCIE_VSS_17 VSS_82 P21 A28 VDDR1_7 PCIE_VDDR_7 AP34 VGA
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
Memory I/O
W33 P23 C366 C759 C407 C770 B1 AP35
PCIE_VSS_18 VSS_83 VDDR1_8 PCIE_VDDR_8 R153
AA29 PCIE_VSS_19 VSS_84 P26 VGA VGA VGA VGA H1 VDDR1_9
AA32 P29 H35 R26 PCIE_VDDC 1 2 1.1V_DELAY
2
PCIE_VSS_20 VSS_85 VDDR1_10 PCIE_VDDC_1 0R3-0-U-GP
AB29 PCIE_VSS_21 VSS_86 P30 L18 VDDR1_11 PCIE_VDDC_2 U26
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
AB32 R1 L19 V25 C302 C332 C284 C321
PCIE_VSS_22 VSS_87 VDDR1_12 PCIE_VDDC_3
SC10U6D3V5MX-3GP
Y33 PCIE_VSS_23 VSS_88 U5 L21 VDDR1_13 PCIE_VDDC_4 V26 VGA VGA VGA
SCD1U16V2ZY-2GP
AB34 P9 L22 W25
2
PCIE_VSS_24 VSS_89 VDDR1_14 PCIE_VDDC_5
AB35 PCIE_VSS_25 VSS_90 R10 M10 VDDR1_15 PCIE_VDDC_6 W26 VGA
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C390 C378 C380 C388
PCI-Express
AC33 PCIE_VSS_26 VSS_91 R14 M35 VDDR1_16 PCIE_VDDC_7 AA25
AD29 PCIE_VSS_27 VSS_92 R17 VGA VGA VGA VGA P10 VDDR1_17 PCIE_VDDC_8 AD26
AD32 R19 T1 AF26
2
PCIE_VSS_28 VSS_93 VDDR1_18 PCIE_VDDC_9
AF29 PCIE_VSS_29 VSS_94 R22 Y1 VDDR1_19 PCIE_VDDC_10 AA26
AF32 PCIE_VSS_30 VSS_95 V3 B35 VDDR1_20 PCIE_VDDC_11 AB25
AD33 PCIE_VSS_31 VSS_96 AK9 M1 VDDR1_21 PCIE_VDDC_12 AB26
AF34 U10 D35 GPU_CORE_S0
PCIE_VSS_32 VSS_97 VDDR1_22
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
AF35 U15 C740 C344 C387 C371 K10
PCIE_VSS_33 VSS_98 VDDR1_23
AG27 PCIE_VSS_34 VSS_99 U18 VGA VGA VGA VGA K12 VDDR1_24 VDDC_1 N13
AG29 U21 K24 N15
2
PCIE_VSS_35 VSS_100 VDDR1_25 VDDC_2
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
AG32 U23 K26 N18 C355 C313 C339 C286 C356
PCIE_VSS_36 VSS_101 VDDR1_26 VDDC_3
SC10U6D3V5MX-3GP
AG33 PCIE_VSS_37 VSS_102 V7 L14 VDDR1_27 VDDC_4 N21 VGA VGA VGA VGA VGA
AJ29 W8 L15 N23
2
PCIE_VSS_38 VSS_103 VDDR1_28 VDDC_5
AJ32 PCIE_VSS_39 VSS_104 V10 L17 VDDR1_29 VDDC_6 P14
AH33 PCIE_VSS_40 VSS_105 V14 VDDC_7 P17
I/O Internal
AL34 PCIE_VSS_41 VSS_106 V17 1.8V_DELAY AA11 VDD_CT_1 VDDC_8 P19
1
SC10U6D3V5MX-3GP
SC1U10V2KX-1GP
AL35 V19 AB11 P22 C293 C347
PCIE_VSS_42 VSS_107 VDD_CT_2 VDDC_9
AK32 PCIE_VSS_43 VSS_108 V22 AD10 VDD_CT_3 VDDC_10 V18 VGA VGA
V1 AF10 V21
2
VSS_109 VDD_CT_4 VDDC_11
A2
A34
VSS_1 VSS_110 AK12
V9 R11
P VDDC_12 V23
W14
C VSS_2 VSS_111 VDD_CT_5 VDDC_13 C
C3 VSS_3 VSS_112 W10 R25 VDD_CT_6 O VDDC_14 W17
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
Core
C5 W15 U11 W19 C333 C744 C322 C334 C370
VSS_4 VSS_113 VDD_CT_7 VDDC_15
W
SC10U6D3V5MX-3GP
A4 VSS_5 VSS_114 W18 U25 VDD_CT_8 VDDC_16 W22 VGA VGA VGA VGA VGA
C18 W21 AA15
2
VSS_6 VSS_115 ( 3.3V @ 50MA VDDR3)
E VDDC_17
A21 VSS_7 VSS_116 W23 AE14 VDDR3_1 VDDC_18 AA18
C23 AA6 AE15 AA21
VSS_8 VSS_117 VDDR3_2 R VDDC_19
1
SC10U6D3V5MX-3GP
SC1U10V2KX-1GP
C11 AA10 C289 C260 AF12 AA23 C360
VSS_9 VSS_118 VDDR3_3 VDDC_20
1
SC10U6D3V5MX-3GP
C13 VSS_10 VSS_119 AA14 VGA VGA AE17 VDDR3_4 VDDC_21 AB14
C14 AA17 AB17 VGA
2
VSS_11 VSS_120 VDDC_22
A18 AA19 AP2 AB19
2
VSS_12 VSS_121 VDDR4_1 VDDC_23
A11 VSS_13 VSS_122 AA22 AR2 VDDR4_2 VDDC_24 AB22
C26 VSS_14 VSS_123 AB8 VDDC_25 AC13
C33 VSS_15 VSS_124 AB10 AN1 VDDR5_1 VDDC_26 AC15
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
F35 AB13 1.8V_DELAY AP1 AC18 C335 C314
VSS_16 VSS_125 VDDR5_2 VDDC_27
R7 VSS_17 VSS_126 AB15 VDDC_28 AC21 VGA VGA
G10 AB18 A25 AC23
2
VSS_18 VSS_127 VDDRHA_1 VDDC_29
F15 VSS_19 VSS_128 AB21 A32 VDDRHA_2 VDDC_30 AE18
H17 VSS_20 VSS_129 AB23 VDDC_31 AE22
G21 VSS_21 VSS_130 AC14 B25 VSSRHA_1 VDDC_32 AE19
Memory I/O
D29 AC17 B32 AE21
Clock
VSS_22 VSS_131 VSSRHA_2 VDDC_33
A29 VSS_23 VSS_132 AC19 VDDC_34 R13
G1 VSS_24 VSS_133 AC22 B2 VDDRHB_1 VDDC_35 R15
F14 VSS_25 VSS_134 AF9 1.8V_DELAY L1 VDDRHB_2 VDDC_36 R18
J15 VSS_26 VSS_135 AD6 VDDC_37 R21
E19 VSS_27 VSS_136 AB5 C2 VSSRHB_1 VDDC_38 R23
E22 VSS_28 VSS_137 AD24 L2 VSSRHB_2 VDDC_39 U14
E24 VSS_29 VSS_138 W5 VGA R156 VDDC_40 U17
D7 VSS_30 VSS_139 AF6 1 2 W13 BBN_1 VDDC_41 U19
Back
G9 AF14 0R3-0-U-GP AA13 U22
Bias
VSS_31 VSS_140 BBN_2 VDDC_42
F26 VSS_32 VSS_141 AF21 VGA R164 VDDC_43 V15
G29 VSS_33 VSS_142 AF22 GPU_CORE_S0 1 2 U13 BBP_1 VDDC_44 W11 L22
1
1
D33 AK10 C329 C342 V13
VSS_34 VSS_143 BBP_2
SC10U6D3V5MX-3GP
M5 AF17 0R3-0-U-GP VGA M12 VGA_CORE_VDDCI 1 2
VSS_35 VSS_144 VDDCI_1
SCD1U16V2ZY-2GP
G4 AF18 VGA M24
2
2
VSS_36 VSS_145 VDDCI_2
1
B B
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
E10 AF19 P11 C391 C372 C357 C383 BLM15BB121SN-GP
VSS_37 VSS_146 VDDCI_3
SC10U6D3V5MX-3GP
E12 VSS_38 VSS_147 AA3 VDDCI_4 P25 VGA VGA VGA VGA VGA
F17 AG12
2
VSS_39 VSS_148 216-0707005-00-GP
G18 VSS_40 VSS_149 AJ14
G22 VSS_41 VSS_150 AH21 71.0M82M.00U
F30 VSS_42 VSS_151 D4
J35 VSS_43 VSS_152 AF15 VGA
J18 VSS_44 VSS_153 AG10
H19 VSS_45 VSS_154 AN6
J21 VSS_46 VSS_155 AK15 Q23
F7 AJ17 3.3V_DELAY
VSS_47 VSS_156 FDN304P-1-GP
J12 VSS_48 VSS_157 AJ18
J24 VSS_49 VSS_158 AJ19
J26 VSS_50 VSS_159 AF24 D S 3D3V_S0
K30 VSS_51 VSS_160 AN32
1
VSS_56 VSS_165
K15 VSS_57 VSS_166 V11 SC
1
K17 VSS_58
K18 R679 VGA_PWRGD_3
VSS_59 100KR2J-1-GP
K19 VSS_60 MECH_1 A35 MECH_1
1 TP72 TPAD30 DY
K21 AR1 MECH_2
1 TP63 TPAD30
D
VSS_61 MECH_2
K22 AR35 MECH_3
1 TP62 TPAD30 VGA
2
VGA R416
2
A 37,38,41 VCORE_EN 1 2 A
1
B Q26
CH3904PT-GP Title
M8XM_POWER
E
U62C
U62G
ODTA0 Part 3 of 7
52 ODTA0
ODTA1 Part 4 of 7
53 ODTA1 MDA0 MAA0
P27 DQA_0 MAA_0 C27
RASA0# MDA1 P28 B28 MAA1 H15 H2
52 RASA0# RASA1# MDA2 DQA_1 MAA_1 MAA2 DQB_0 MAB_0
53 RASA1# P31 DQA_2 MAA_2 B27 G14 DQB_1 MAB_1 H3
MDA3 P32 G26 MAA3 E14 J3
CASA0# MDA4 DQA_3 MAA_3 MAA4 DQB_2 MAB_2
D
52 CASA0# M27 DQA_4 MAA_4 F27 D14 DQB_3 MAB_3 J5 D
CASA1# MDA5 K29 E27 MAA5 H12 J4
53 CASA1# MDA6 DQA_5 MAA_5 MAA6 DQB_4 MAB_4
K31 DQA_6 MAA_6 D27 G12 DQB_5 MAB_5 J6
WEA0# MDA7 K32 J27 MAA7 F12 G5
52 WEA0# WEA1# MDA8 DQA_7 MAA_7 MAA8 DQB_6 MAB_6
53 WEA1# M33 DQA_8 MAA_8 E29 D10 DQB_7 MAB_7 J9
MDA9 M34 C30 MAA9 B13 F3
DQA_9 MAA_9 DQB_8 MAB_8
MEMORY INTERFACE B
CKEA0 MDA10 MAA10
MEMORY INTERFACE A
52 CKEA0 L34 DQA_10 MAA_10 E26 C12 DQB_9 MAB_9 F4
CKEA1 MDA11 L35 A27 MAA11 B12 J1
53 CKEA1 MDA12 DQA_11 MAA_11 A_A12 DQB_10 MAB_10
J33 DQA_12 MAA_A12 G27 B11 DQB_11 MAB_11 J2
CSA0_0# MDA13 J34 D26 C9 J7
52 CSA0_0# MDA14 DQA_13 MAA_BA2 A_BA0 DQB_12 MAB_A12
H33 DQA_14 MAA_BA0 C28 B9 DQB_13 MAB_BA2 F1
MDA15 H34 B29 A_BA1 A9 G2
CSA1_0# MDA16 DQA_15 MAA_BA1 DQB_14 MAB_BA0
53 CSA1_0# K27 DQA_16 B8 DQB_15 MAB_BA1 G3
MDA17 J29 M29 DQMA#0 J10
MDA18 DQA_17 DQMA_0# DQMA#1 DQB_16
J30 DQA_18 DQMA_1# K33 H10 DQB_17 DQMB_0# D12
MDA19 J31 G30 DQMA#2 F10 C10
CLKA0 MDA20 DQA_19 DQMA_2# DQMA#3 DQB_18 DQMB_1#
52 CLKA0 F29 DQA_20 DQMA_3# E33 D9 DQB_19 DQMB_2# E7
CLKA0# MDA21 F32 C22 DQMA#4 G7 C6
52 CLKA0# MDA22 DQA_21 DQMA_4# DQMA#5 DQB_20 DQMB_3#
D30 DQA_22 DQMA_5# H21 G6 DQB_21 DQMB_4# P3
CLKA1 MDA23 D32 C17 DQMA#6 F6 R4
53 CLKA1 CLKA1# MDA24 DQA_23 DQMA_6# DQMA#7 DQB_22 DQMB_5#
53 CLKA1# G33 DQA_24 DQMA_7# G17 D6 DQB_23 DQMB_6# W3
MDA25 G34 C8 V8
WDQSA[7..0] MDA26 DQA_25 RDQSA0 DQB_24 DQMB_7#
52,53 WDQSA[7..0] G35 DQA_26 QSA_0 M30 C7 DQB_25
MDA27 F34 K34 RDQSA1 B7 J14
RDQSA[7..0] MDA28 DQA_27 QSA_1 RDQSA2 DQB_26 QSB_0
52,53 RDQSA[7..0] D34 DQA_28 QSA_2 G31 A7 DQB_27 QSB_1 B10
MDA29 C34 E34 RDQSA3 B5 F9
DQMA#[7..0] MDA30 DQA_29 QSA_3 RDQSA4 DQB_28 QSB_2
52,53 DQMA#[7..0] C35 DQA_30 QSA_4 B22 A5 DQB_29 QSB_3 B6
MDA31 B34 F21 RDQSA5 C4 P2
MDA[63..0] MDA32 DQA_31 QSA_5 RDQSA6 DQB_30 QSB_4
52,53 MDA[63..0] C24 DQA_32 QSA_6 B17 B4 DQB_31 QSB_5 P8
read strobe
B24 DQA_33 QSA_7 D17 M3 DQB_32 QSB_6 W2
MAA[11..0] MDA34 B23 M2 V6
52,53 MAA[11..0] DQA_34 DQB_33 QSB_7
MDA35 A23 M31 WDQSA0 N2
MDA36 DQA_35 QSA_0B WDQSA1 DQB_34
C21 DQA_36 QSA_1B K35 N1 DQB_35 QSB_0B H14
A_BA0 MDA37 B21 G32 WDQSA2 R3 A10
52,53 A_BA0
write strobe
A_BA1 MDA38 DQA_37 QSA_2B WDQSA3 DQB_36 QSB_1B
52,53 A_BA1 C20 DQA_38 QSA_3B E35 R2 DQB_37 QSB_2B E9
MDA39 B20 A22 WDQSA4 T3 A6
A_A12 MDA40 DQA_39 QSA_4B WDQSA5 DQB_38 QSB_3B
52,53 A_A12 J22 DQA_40 QSA_5B E21 T2 DQB_39 QSB_4B P1
MDA41 H22 A17 WDQSA6 M8 P7
MDA42 DQA_41 QSA_6B WDQSA7 DQB_40 QSB_5B
F22 DQA_42 QSA_7B E17 M7 DQB_41 QSB_6B W1
PLACE MVREF DIVIDERS MDA43 D21 P5 V5
MDA44 DQA_43 ODTA0 DQB_42 QSB_7B
J19 DQA_44 ODTA0 C31 P4 DQB_43
AND CAPS CLOSE TO ASIC MDA45 G19 C25 ODTA1 R9 D2
MDA46 DQA_45 ODTA1 DQB_44 ODTB0
F19 DQA_46 R8 DQB_45 ODTB1 K5
1.8V_DELAY MDA47 D19 A33 CLKA0 R6
MDA48 DQA_47 CLKA0 CLKA1 DQB_46
C19 DQA_48 CLKA1 A26 U4 DQB_47 CLKB0 A3
VGA MDA49 B19 NOTE: FOR DUAL RANK CONNECTIONS U3 K1
DQA_49 DQB_48 CLKB1
1
MDA50 A19 B33 CLKA0# USE THE CSxxB_1 CHIP SELECT PINS U2
R423 MDA51 DQA_50 CLKA0# CLKA1# DQB_49
B18 DQA_51 CLKA1# B26 U1 DQB_50 CLKB0# B3
**100R2J-2-GP MDA52 C16 DQA_52 V2 DQB_51 CLKB1# K2
MDA53 B16 A31 RASA0# Y3
MDA54 DQA_53 RASA0# RASA1# DQB_52
C15 D24 Y2 D3
2
1
SCD01U50V2ZY-1GP
2
MVREFDA CKEA0 DQB_63 CSB1_1#
N35 B31 VGA
2
1
VGA VGA MVREFSB A13 K8
MVREFSB CKEB1
1
1
C29 WEA0# R187 ** C419
WEA0#
1
SCD01U50V2ZY-1GP
100R2J-2-GP ** R128 VGA 1KR2J-1-GP VGA_TEST_MCLK AA8 M6
2
TEST_MCLK WEB1#
SCD01U50V2ZY-1GP
VGA_TEST_YCLK AA7
2
2
VGA_MEMTEST TEST_YCLK
AA5 AA4 VGA_DRAM_RST
2
MEMTEST DRAM_RST
AH19 PLLTEST
216-0707005-00-GP 1.8V_DELAY
216-0707005-00-GP
R166
71.0M82M.00U VGA VGA 71.0M82M.00U
1
VGA VGA VGA VGA 1.8V_DELAY 1 2
1
** R443
100R2J-2-GP ** R161 R160 R162 4K7R2J-2-GP
DIVIDER RESISTORS DDR2 DDR3
4K7R2J-2-GP
4K7R2J-2-GP 240R2F-1-GP VGA
2
MVREF TO 1.8V 100R 40.2R
2
VGA VGA
1
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
M8XM_MEMORY
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 51 of 56
5 4 3 2 1
5 4 3 2 1
CLKA0
51 CLKA0
CLKA0#
51 CLKA0#
1
R192 R191
56R2J-4-GP 56R2J-4-GP RASA0#
51 RASA0#
VGA VGA
2
D CASA0# D
51 CASA0#
1
C453
WEA0#
51 WEA0#
U63 SC470P50V2KX-3GP U31
2
A_BA0 L2 B9 MDA4 VGA A_BA0 L2 B9 MDA26
A_BA1 BA0 DQ15 MDA0 A_BA1 BA0 DQ15 MDA28 CKEA0
L3 BA1 DQ14 B1 L3 BA1 DQ14 B1 51 CKEA0
D9 MDA5 D9 MDA27
A_A12 DQ13 MDA2 A_A12 DQ13 MDA31
R2 A12 DQ12 D1 R2 A12 DQ12 D1
MAA11 P7 D3 MDA3 MAA11 P7 D3 MDA30 CSA0_0#
A11 DQ11 A11 DQ11 51 CSA0_0#
MAA10 M2 D7 MDA6 MAA10 M2 D7 MDA25
MAA9 A10/AP DQ10 MDA1 MAA9 A10/AP DQ10 MDA29
P3 A9 DQ9 C2 P3 A9 DQ9 C2
MAA8 P8 C8 MDA7 MAA8 P8 C8 MDA24 ODTA0
A8 DQ8 A8 DQ8 51 ODTA0
MAA7 P2 F9 MDA23 MAA7 P2 F9 MDA11
MAA6 A7 DQ7 MDA16 MAA6 A7 DQ7 MDA14
N7 A6 DQ6 F1 N7 A6 DQ6 F1
MAA5 N3 H9 MDA20 MAA5 N3 H9 MDA8 WDQSA#[7..0]
A5 DQ5 A5 DQ5 51,53 WDQSA[7..0]
MAA4 N8 H1 MDA18 MAA4 N8 H1 MDA12
MAA3 A4 DQ4 MDA19 MAA3 A4 DQ4 MDA15 RDQSA[7..0]
N2 A3 DQ3 H3 N2 A3 DQ3 H3 51,53 RDQSA[7..0]
MAA2 M7 H7 MDA21 MAA2 M7 H7 MDA9
MAA1 A2 DQ2 MDA17 MAA1 A2 DQ2 MDA13 DQMA#[7..0]
M3 A1 DQ1 G2 M3 A1 DQ1 G2 51,53 DQMA#[7..0]
MAA0 M8 G8 MDA22 MAA0 M8 G8 MDA10
A0 DQ0 A0 DQ0 MDA[63..0]
51,53 MDA[63..0]
CLKA0# K8 A9 CLKA0# K8 A9 MAA[11..0]
CK VDDQ1 CK VDDQ1 51,53 MAA[11..0]
CLKA0 J8 C1 CLKA0 J8 C1
CK VDDQ2 CK VDDQ2
VDDQ3 C3 VDDQ3 C3
CKEA0 K2 C7 CKEA0 K2 C7 A_BA1
CKE VDDQ4 CKE VDDQ4 51,53 A_BA1
C9 C9 A_BA0
VDDQ5 VDDQ5 51,53 A_BA0
VDDQ6 E9 VDDQ6 E9
C G1 1.8V_DELAY G1 1.8V_DELAY A_A12 C
VDDQ7 VDDQ7 51,53 A_A12
CSA0_0# L8 G3 CSA0_0# L8 G3
CS VDDQ8 CS VDDQ8
VDDQ9 G7 VDDQ9 G7
WEA0# K3 G9 WEA0# K3 G9
WE VDDQ10 WE VDDQ10
RASA0# K7 A1 RASA0# K7 A1
RAS VDD1 RAS VDD1
VDD2 E1 VDD2 E1
CASA0# L7 J9 CASA0# L7 J9
CAS VDD3 L60 CAS VDD3 L26
VDD4 M9 VGA VDD4 M9 VGA
DQMA#2 F3 R1 1 2 DQMA#1 F3 R1 1 2
DQMA#0 LDM VDD5 BLM15BB121SN-GP DQMA#3 LDM VDD5 BLM15BB121SN-GP
B3 UDM B3 UDM
J1 VRAM_VDDL1 J1 VRAM_VDDL2
VDDL VDDL
VSSDL J7 VSSDL J7
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
ODTA0 K9 C750 C751 ODTA0 K9 C469 C470
ODT ODT
VGA VGA
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
RDQSA2 F7 VGA RDQSA1 F7 VGA
1.8V_DELAY WDQSA#2 LDQS 1.8V_DELAY WDQSA#1 LDQS
E8 LDQS VSSQ1 A7 E8 LDQS VSSQ1 A7
VSSQ2 B2 VSSQ2 B2
VSSQ3 B8 VSSQ3 B8
1
1
VSSQ4 D2 VSSQ4 D2
R450 RDQSA0 B7 D8 R453 RDQSA3 B7 D8
4K99R2F-L-GP WDQSA#0 UDQS VSSQ5 4K99R2F-L-GP WDQSA#3 UDQS VSSQ5
A8 UDQS VSSQ6 E7 A8 UDQS VSSQ6 E7
VGA VSSQ7 F2 VGA VSSQ7 F2
F8 F8
2
2
(SSTL-1.8) VREF = .5*VDDQ
VRAM_VREF1 VSSQ8 (SSTL-1.8) VREF = .5*VDDQ
VRAM_VREF2 VSSQ8
J2 VREF VSSQ9 H2 J2 VREF VSSQ9 H2
VSSQ10 H8 VSSQ10 H8
1
1
A2 NC#A2 A2 NC#A2
1
1
R451 C757 E2 A3 R452 C762 E2 A3
B 4K99R2F-L-GP NC#E2 VSS1 4K99R2F-L-GP NC#E2 VSS1 B
L1 NC#L1 VSS2 E3 L1 NC#L1 VSS2 E3
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VGA VGA R3 J3 VGA VGA R3 J3
2
2
NC#R3 VSS3 NC#R3 VSS3
R7 N1 R7 N1
2
HYB18T512161B2F-25-GP HYB18T512161B2F-25-GP
72.18512.M0U 72.18512.M0U
VGA VGA
1.8V_DELAY
1.8V_DELAY
1
1
SC1U10V2KX-1GP
C425 C426 C448 C747 C764 C756 C432 C439
1
1
SC1U10V2KX-1GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C424 C434 C423 C433 C430 C437 C428 C440 VGA VGA VGA
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD01U50V2ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VGA VGA VGA
2
2
SCD01U50V2ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CLKA1
51 CLKA1
CLKA1#
51 CLKA1#
1
R196 R195
56R2J-4-GP 56R2J-4-GP
VGA VGA RASA1#
51 RASA1#
2
D D
CASA1#
51 CASA1#
1
C449
2
A_BA0 L2 B9 MDA38 VGA A_BA0 L2 B9 MDA59
A_BA1 BA0 DQ15 MDA35 A_BA1 BA0 DQ15 MDA60
L3 BA1 DQ14 B1 L3 BA1 DQ14 B1
D9 MDA37 D9 MDA58 CKEA1
DQ13 DQ13 51 CKEA1
A_A12 R2 D1 MDA32 A_A12 R2 D1 MDA62
MAA11 A12 DQ12 MDA34 MAA11 A12 DQ12 MDA63
P7 A11 DQ11 D3 P7 A11 DQ11 D3
MAA10 M2 D7 MDA36 MAA10 M2 D7 MDA56 CSA1_0#
A10/AP DQ10 A10/AP DQ10 51 CSA1_0#
MAA9 P3 C2 MDA33 MAA9 P3 C2 MDA61
MAA8 A9 DQ9 MDA39 MAA8 A9 DQ9 MDA57
P8 A8 DQ8 C8 P8 A8 DQ8 C8
MAA7 P2 F9 MDA44 MAA7 P2 F9 MDA51 ODTA1
A7 DQ7 A7 DQ7 51 ODTA1
MAA6 N7 F1 MDA43 MAA6 N7 F1 MDA52
MAA5 A6 DQ6 MDA47 MAA5 A6 DQ6 MDA48 WDQSA#[7..0]
N3 A5 DQ5 H9 N3 A5 DQ5 H9 51,52 WDQSA[7..0]
MAA4 N8 H1 MDA40 MAA4 N8 H1 MDA53
MAA3 A4 DQ4 MDA41 MAA3 A4 DQ4 MDA54 RDQSA[7..0]
N2 A3 DQ3 H3 N2 A3 DQ3 H3 51,52 RDQSA[7..0]
MAA2 M7 H7 MDA46 MAA2 M7 H7 MDA49
MAA1 A2 DQ2 MDA42 MAA1 A2 DQ2 MDA55 DQMA#[7..0]
M3 A1 DQ1 G2 M3 A1 DQ1 G2 51,52 DQMA#[7..0]
MAA0 M8 G8 MDA45 MAA0 M8 G8 MDA50
A0 DQ0 A0 DQ0 MDA[63..0]
51,52 MDA[63..0]
CLKA1# K8 A9 CLKA1# K8 A9 MAA[11..0]
CK VDDQ1 CK VDDQ1 51,52 MAA[11..0]
CLKA1 J8 C1 CLKA1 J8 C1
CK VDDQ2 CK VDDQ2
VDDQ3 C3 VDDQ3 C3
CKEA1 K2 C7 CKEA1 K2 C7 A_BA1
CKE VDDQ4 CKE VDDQ4 51,52 A_BA1
C9 C9 A_BA0
VDDQ5 VDDQ5 51,52 A_BA0
VDDQ6 E9 VDDQ6 E9
C G1 1.8V_DELAY G1 1.8V_DELAY A_A12 C
VDDQ7 VDDQ7 51,52 A_A12
CSA1_0# L8 G3 CSA1_0# L8 G3
CS VDDQ8 CS VDDQ8
VDDQ9 G7 VDDQ9 G7
WEA1# K3 G9 WEA1# K3 G9
WE VDDQ10 WE VDDQ10
RASA1# K7 A1 RASA1# K7 A1
RAS VDD1 RAS VDD1
VDD2 E1 VDD2 E1
CASA1# L7 J9 CASA1# L7 J9
CAS VDD3 L62 CAS VDD3 L61
VDD4 M9 VGA VDD4 M9 VGA
DQMA#5 F3 R1 1 2 DQMA#6 F3 R1 1 2
DQMA#4 LDM VDD5 BLM15BB121SN-GP DQMA#7 LDM VDD5 BLM15BB121SN-GP
B3 UDM B3 UDM
J1 VRAM_VDDL3 J1 VRAM_VDDL4
VDDL VDDL
VSSDL J7 VSSDL J7
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
ODTA1 K9 C761 C755 ODTA1 K9 C763 C758
ODT ODT
VGA VGA
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
RDQSA5 F7 VGA RDQSA6 F7 VGA
1.8V_DELAY WDQSA5 LDQS 1.8V_DELAY WDQSA6 LDQS
E8 LDQS VSSQ1 A7 E8 LDQS VSSQ1 A7
VSSQ2 B2 VSSQ2 B2
VSSQ3 B8 VSSQ3 B8
1
1
VSSQ4 D2 VSSQ4 D2
R458 RDQSA4 B7 D8 R459 RDQSA7 B7 D8
4K99R2F-L-GP WDQSA4 UDQS VSSQ5 4K99R2F-L-GP WDQSA7 UDQS VSSQ5
A8 UDQS VSSQ6 E7 A8 UDQS VSSQ6 E7
VGA VSSQ7 F2 VGA VSSQ7 F2
F8 F8
2
2
(SSTL-1.8) VREF = .5*VDDQ
VRAM_VREF3 VSSQ8 (SSTL-1.8) VREF = .5*VDDQ
VRAM_VREF4 VSSQ8
J2 VREF VSSQ9 H2 J2 VREF VSSQ9 H2
VSSQ10 H8 VSSQ10 H8
1
1
A2 NC#A2 A2 NC#A2
1
1
R454 C768 E2 A3 R457 C765 E2 A3
B 4K99R2F-L-GP NC#E2 VSS1 4K99R2F-L-GP NC#E2 VSS1 B
L1 NC#L1 VSS2 E3 L1 NC#L1 VSS2 E3
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VGA VGA R3 J3 VGA VGA R3 J3
2
2
NC#R3 VSS3 NC#R3 VSS3
R7 N1 R7 N1
2
2
NC#R7 VSS4 NC#R7 VSS4
R8 NC#R8 VSS5 P9 R8 NC#R8 VSS5 P9
HYB18T512161B2F-25-GP HYB18T512161B2F-25-GP
72.18512.M0U 72.18512.M0U
VGA VGA
1.8V_DELAY
1.8V_DELAY
1
1
C420 C466 C465 C461 C435 C445 C416 C471
1
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC1U10V2KX-1GP
C772 C771 C746 C760 C773 C749 C748 C753 VGA VGA VGA
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC1U10V2KX-1GP
SCD01U50V2ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VGA VGA VGA
2
2
SCD01U50V2ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
RECOMMENDED SETTINGS
3.3V_DELAY 0= DO NOT INSTALL RESISTOR
CONFIGURATION STRAPS 1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
R375 10KR2J-3-GP
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, NA = NOT APPLICABLE
49 GPIO0 1 VGA 2 RSVD = ATI RESERVED
49 GPIO1
R382 1 VGA 2 10KR2J-3-GP THEY MUST NOT CONFLICT DURING RESET (DO NOT INSTALL)
R384 1 DY 2 10KR2J-3-GP
49 GPIO2
R378 1 DY 2 10KR2J-3-GP M8x M7x
49 GPIO3
R387 1 DY 2 10KR2J-3-GP STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS
49 GPIO4
R391 1 VGA 2 10KR2J-3-GP
49 GPIO5
R397 1 DY 2 10KR2J-3-GP
49 GPIO6
R399 1 VGA 2 10KR2J-3-GP BIF_MSI_DIS VIP1 MESSAGE SIGNAL INTERRUPT ENABLED NA 0 NOTE 1: HD AUDIO MUST ONLY BE ENABLED
49 GPIO8
R149 1 DY 2 10KR2J-3-GP
49 GPIO9
R406 10KR2J-3-GP BIF_AUDIO_EN VIP3 ENABLE HD AUDIO X X
ON SYSTEMS THAT ARE LEGALLY ENTITLED.
49 GPIO11 1 DY 2 (M7XM and M86M ONLY) Note:1 IT IS THE RESPONSIBILITY OF THE SYSTEM
R401 1 DY 2 10KR2J-3-GP
49 GPIO12
49 GPIO13
R402 1 VGA 2 10KR2J-3-GP BIF_64BAR_EN_A VIP5 64 BIT BARS DISABLED NA 0 DESIGNER TO ENSURE ENTITLEMENT
R150 1 DY 2 10KR2J-3-GP TX_PWRS_ENB GPIO0 PCIE FULL TX OUTPUT SWING X X
49 GPIO22
NOTE 2: HDMI MUST ONLY BE ENABLED
R132 1 DY 2 10KR2J-3-GP TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED X X
49 VIP_0
R131 10KR2J-3-GP
ON SYSTEMS THAT ARE LEGALLY ENTITLED.
49 VIP_1 1 DY 2
IT IS THE RESPONSIBILITY OF THE SYSTEM
R133 1 DY 2 10KR2J-3-GP BIF_DEBUG_ACCESS GPIO4 DEBUG SIGNALS MUXED OUT 0 0
49 VIP_2
49 VIP_3
R140 1 DY 2 10KR2J-3-GP DESIGNER TO ENSURE ENTITLEMENT
R130 1 DY 2 10KR2J-3-GP BIF_AUDIO_EN GPIO8 ENABLE HD AUDIO ( M82M ONLY) Note:2 X RSVD
49 VIP_4
R127 1 DY 2 10KR2J-3-GP
49 VIP_5
R146 1 DY 2 10KR2J-3-GP BIF_GEN2_EN_A GPIO5 Allows either PCIe 2.5GT/s or 5.0GT/s operation X 0
49 VIP_6
R142 1 DY 2 10KR2J-3-GP
49 VIP_7
C BIOS_ROM_EN GPIO_22_ROMCSB DISABLE EXTERNAL BIOS ROM NA X C
R366 1 DY 2 10KR2J-3-GP
49 VHAD0
R143 1 DY 2 10KR2J-3-GP ROMIDCFG(3:0) GPIO[13:11,9] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT XX X X X X X X
49 DVALID
R367 1 DY 2 10KR2J-3-GP
49 PSYNC
VIP_DEVICE_STRAP_ENA VSYNC IGNORE VIP DEVICE STRAPS O O
R368 1 VGA_Q400
2 10KR2J-3-GP
49 DVPDATA20
R373 1 VGA 2 10KR2J-3-GP ANY UNUSED
49 DVPDATA21
R371VGA
1 2 10KR2J-3-GP MEM_TYPE GPIO OR DVP MEMORY TYPE,MAKE AND SIZE INFO X X X X X X X X
49 DVPDATA22
R369DY
1 2 10KR2J-3-GP THAT ARE NOT
49 DVPDATA23
CONFIG STRAPS
Only populate the required straps, FOR EXAMPLE
see table and databook DVPDATA20:23
2
IN THIS DESIGN
VGA
DY
DY
VGA_Q500
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
1
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
DVPDATA20 1
DVPDATA21 1 HY5PS121621CFP-25 Hynix GPIO_28_TDO GENERICC GPIO21_BB_EN
DVPDATA22 1 72.51216.F0U
DVPDATA23 1
DVPDATA20 1
DVPDATA21 1 HYB18T512161B2F-25 Qimonda 400MHz
DVPDATA22 1 72.18512.M0U
DVPDATA23 0
A <Variant Name> A
H1 H9 H28 H2
HOLE HOLE HOLE HOLE
SPR1 SPR2 SPR3
SPRING-14 SPRING-14 SPRING-7
1
1
1
D D
H12 H10 H8 H14 H11 DY DY DY
HOLE HOLE HOLE HOLE HOLE
1
1
1 SC
1
SC
DCBATOUT DCBATOUT
SB
H24 H5 H26 H23 H25
HOLE HOLE HOLE HOLE HOLE GPU_CORE_S0 1D8V_S3 1D8V_S3 1D8V_S0 5V_S5
DCBATOUT DCBATOUT
1
C EC97 EC98 C
1
EC99 EC73 EC74 EC75 EC76 EC77 EC78
2
DY DY
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
2
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
H20 H15 H27 H19
HOLE HOLE HOLE HOLE
1
SC
Keyboard EMI Caps EC36 2 1 SC220P50V2JN-3GP KCOL18
SC22P50V2JN-4GP
SC10P50V2JN-4GP
SC100P50V2JN-3GP
2
DY
19,31 SB_AZ_CODEC_BITCLK 18,22,34 LPCCLK0 USBP3- 25,26 15,19ACT_LED# DCBATOUT DCBATOUT DCBATOUT DCBATOUT
25,26 LINK100
1D2V_S0 1D8V_S0
DCBATOUT_51117 DCBATOUT DCBATOUT DCBATOUT
DY
1
A DY DY DY <Variant Name> A
1
EC70
1
1
EC12 EC8 EC18 EC17 EC4 EC25 EC26 EC54 EC5 EC65 EC15 EC72 EC14 EC6
SC22P50V2JN-4GP
2
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY Wistron Corporation
2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY DY
2
2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DY DY DY
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
Taipei Hsien 221, Taiwan, R.O.C.
Title
EMI
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 55 of 56
5 4 3 2 1
5 4 3 2 1
NOTICE
1.VRAM and SIDE PORT GEOMETRY
2.digital array vendor
Change List
D GEOMETRY D
Common Part
1.RS780M_A13 U61 71.RS780.M12
2.SB700_A12 U67 71.SB700.M06
3.KBC U26 71.00773.00G
4.CLKGEN U33 71.09480.A03
5.SPDIF LOUT1 22.10270.031
6.MOSFET U53,U56 84.07686.037
7.MOSFET U11,U54,U55,U57 84.04634.037
8.H19,H20 34.4W601.001
9.U21 72.18512.M0U(QIMONDA)
10.card1 20.I0043.001
11.C861,C862,C941,C943 78.10324.2FL
C C
12.C843,C844,C942,C944 63.R0034.1DL
13.USB2 22.10218.Z71
14.U70 71.00888.E0G
15.U32 74.51100.079
16.TC13 79.22719.2BL
17.ER1 63.15134.1DL
18.Add EC66 78.4R774.1FL
19.L42,L43,L44 68.00226.081
For P15
B 1.M82ME_A11 U62 71.M82ME.M01 B
2.8111C U1 71.08111.E03
3.JMB380 U46 71.00380.003
4.R12 64.24915.6DL
5.VRAM U30,U31,U63,U64 72.18512.M0U(QIMONDA400)
For P1
1.8101E U1 71.08101.B0G
2.JMB385 U46 71.JM385.A0G
3. R247,R253,R254,R255,R256,R620,C574 63.R0034.1DL
4. C573 63.00000.00L
A
5.R12 64.20015.6DL <Variant Name> A
6. R307,R163 64.14005.6DL
7.R316 68.00084.C71 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
8.C590,C591,C593,C594 78.10234.1FL Taipei Hsien 221, Taiwan, R.O.C.
CHANGE LIST
Size Document Number Rev
A3
P1/P15 SA
Date: Wednesday, March 19, 2008 Sheet 56 of 56
5 4 3 2 1