Sir Syed CASE Institute of Technology, Islamabad

Digital System Design Lab

Experiment # 06: Implementation of Finite Impulse Response

(FIR) Filter using Fixed Point Arithmetic (Qn.m) and Stimulus
Writing for Exhaustive Testing

Name of Student: …………………………………………………….

Roll No.: …………………………………………………………………..

Date of Experiment: ………………………………………………….

Report submitted on: ………………………………………………..

Marks obtained: ………………………………………

Remarks: …………………………………………………

Instructor’s Signature:………….………………….

Semester VI- Spring 2020

Digital System Design Lab 1

 Experiment # 06
Implementation of Finite Impulse Response (FIR) Filter using Fixed
Point Arithmetic (Qn.m) and Stimulus Writing for Exhaustive Testing

Objectives
1. Gain familiarity with the number representation method i.e. fixed point and floating point.
2. Learn how to convert FIR filter coefficient from floating point representation into fixed point
representation.
3. Learn how to implement FIR filter using finite precision arithmetic.

Introduction
Digital signal processing can be separated into two categories - fixed point and floating point.
These designations refer to the format used to store and manipulate numeric representations
of data.

Floating Points Representation

With floating-point representation, the placement of the decimal point can ‘float’ relative to
the significant digits of the number.
A floating-point representation could in addition represent 1.234567, 123456.7,
0.00001234567, 1234567000000000 etc.
• Used where precision and dynamic range are important
• Most algorithms are developed in FP
• Ease of coding
• More Cost (Area, Speed, Power)

Fixed Point Representation

The term ‘fixed point’ refers to the corresponding manner in which numbers are represented,
with a fixed number of digits after, and sometimes before, the decimal point. For example, a
fixed-point representation with a uniform decimal point placement convention can represent
the numbers 123.45, 1234.56, 12345.67 etc.
• Place of decimal is fixed
• Simpler HW, low power, less silicon
• Converting FP simulation to Fixed-point simulation is time consuming

General Fixed Point Arithmetic

Using the discussion of integer arithmetic from the last section as a guide, we can extend the
fixed-point representation to arbitrary real (integer and fractional) numbers. We assume that a
given infinite-precision real number x is approximated by a binary number 𝑥̂ with the following
bit arrangement:
Where the sign bit ± is 0 for positive numbers and 1 for negative numbers, x represents either a
0 or a 1, and (.) represents the binary point. L entirely depends upon the range of integer and B
defines the precision of the fractional part. This representation is in fact 2’s complement format
for real numbers, as we will see. The total word length of the number 𝑥̂ is equal to L+B +1 bits.
We will prefer 2’s complement for representing fixed point number as almost all the current
processor implement signed arithmetic using this format.

Example-1
Number Represented in (Q4.4) Format = 8’b01110110
Real Number for Above Format= 4 + 2 + 1 + 0.25 + 0.125 = 7.375

In many A/D converters and processors, the real numbers are scaled so that the fixed point
representation is in the (−1, 1) range. This has the advantage that the multiplication of two
fractions is always a fraction and, as such, there is no overflow. Hence we will consider the
following representation:

Where A is a positive scaling factor.

Example-2
Represent the number 𝑥̂ = -10.4375 using fraction only arrangement.
Solution:
Choose A = 24 = 16 and B=9
𝑥̂ = -10.4375 = 16 (1.101001110)

Bit Growth in Fixed Point Arithmetic

From the discussion of number representations, it should be clear that a general infinite-
precision real number must be assigned to one of the finite representable numbers, given a
specific structure for the finite-length register (i.e., the arithmetic as well as the format). These
operations affect the accuracy as well as general characteristics of digital filters and DSP
operations. Bit growth is one of the most critical issues in fixed-point arithmetic. Multiplication
of an N-bit number with an M-bit number results in an (N+M)-bit number Multiplication of two
N1 and N2 bit numbers in Qn1.m1 and Qn2.m2 results in N1+N2 bit number. Q(n1+n2-
1).(m1+m2+1) for SxS and Q(n1+n2).(m1+m2) for the rest. Where as in addition results is
Qn.m= Q max(n1,n2).max(m1.m2). Usually, in practice, there are two different operations by
which this assignment is made to the nearest number or level:

3
1) Truncation operation
2) Rounding operation.

Truncation operation
In this operation, the number x is truncated beyond B significant bits (i.e., the rest of the bits
are eliminated) to obtain QT[x]. In MATLAB, to obtain a B-bit truncation, we have to first scale
the number x upward by 2B, then use the fix function on the scaled number, and finally scale
the result down by 2−B. Thus the MATLAB statement xhat = fix(x*2ˆB)/2ˆB; implements the
desired operation.

Example-3
= 8’b01110110 (Q4.4)
= 4 + 2 + 1 + 0.25 + 0.125 = 7.375
Truncate it to Q4.2 results
=6’b011101 = 7.25

Rounding operation
In this operation, the real number x is rounded to the nearest representable level, which we will
refer to as QR[x]. In MATLAB, to obtain a B-bit rounding approximation, we have to first scale
the number x up by 2B, then use the round function on the scaled number, and finally scale the
result down by 2−B. Thus the MATLAB statement xhat = round(x*2ˆB)/2ˆB; implements the
desired operation.

Example-4

Floating Point to Fixed Point Conversion

• Serialize the floating-point code to separate all atomic computations and assignments to
variables. Also Insert range directives to find maximum & minimum values after each serial
floating-point computation.
• Runs the serialized implementation with range directives for all set of possible inputs
• Convert all floating point variables to fixed point format using the maximum and minimum
values for each variable. The integer part for variable is defined as,

The fractional part requires detail analysis of signal to quantization noise analysis (SQNR).

4
 Figure-1: Floating Point to Fixed Point Conversion

MATLAB Implementation
Shift left m fractional bits to the integer part and truncate or round the results. In MATLAB, the
conversion is done as,
num_fixed = fix(num_float * 2m) or
num_fixed = round(num_float * 2m)
Also saturate the result if number is greater than the maximum positive number or less than
the minimum negative number.

Filters
Filtering is a class of signal processing, the defining feature of filters being the complete or
partial suppression of some aspect of the signal. Most often, this means removing some
frequencies and not others in order to suppress interfering signals and reduce background
noise.

Finite Impulse Response (FIR) Filter

In signal processing, a finite impulse response (FIR) filter is a filter whose impulse response (or
response to any finite length input) is of finite duration, because it settles to zero in finite time.
This is in contrast to infinite impulse response (IIR) filters, which may have internal feedback
and may continue to respond indefinitely (usually decaying).

5
When finite-precision representation is used in its implementation, there are three possible
considerations that affect the overall quality of its output. We have to
1. Quantize the filter coefficients {ak, bk} to obtain their finite word-length representations
{𝑎̂k, b̂k}.
2. Quantize the input sequence x(n) to obtain x̂(n).
3. Consider all internal arithmetic that must be converted to their next best representations.

The finite word-length arithmetic needed for processing these numbers is implemented using
two different approaches, depending on the ease of implementation and the accuracy as well
as dynamic range needed in processing. The fixed-point arithmetic is easy to implement but has
only a fixed dynamic range and accuracy (i.e., very large numbers or very small numbers). The
floating-point arithmetic, on the other hand, has a wide dynamic range and a variable accuracy
(relative to the magnitude of a number) but is more complicated to implement and analyze.
For a FIR filter of order N, each value of the output sequence is a weighted sum of the most
recent input values:

Figure-2: FIR Filter Realization

FIR Filter Design Procedure

The design of a digital filter is carried out in three steps:
• Specifications:
Before we can design a filter, we must have some specifications. These specifications are
determined by the applications.

6
 Figure-3: Filter Specification
• Approximations:
Once the specifications are defined, we use various concepts and mathematics that we studied
so far to come up with a filter description that approximates the given set of specifications. This
step is the topic of filter design.

• Implementation:
The product of the above step is a filter description in the form of a difference equation, a
system function H(z), or an impulse response h(n). From this description, we implement the
filter in hardware or through software on a computer.

Figure-4: Design Flow for Digital Filter

7
Design Techniques for FIR Filter
There are three design techniques for FIR filter design, namely
1) Window design,
2) Frequency Sampling Design
3) Optimal equiripple Design techniques for linear phase FIR filters. (Using Park McClellan
Algorithm with Remez Exchange Polynomial)

MATLAB Toolbox for SP (Signal Processing) Applications

The SP toolbox provides a function called fir1, which designs conventional low pass, high pass,
and other multiband FIR filters using the window technique. This function’s syntax has several
forms, including:
• h = fir1 (N, wc) designs an Nth-order (N = M − 1) low pass FIR filter and returns the impulse
response in vector h. By default this is a Hamming-window based, linear-phase design with a
normalized cutoff frequency in wc that is a number between 0 and 1, where 1 corresponds to π
rad/sample. If wc is a two-element vector, that is, wc = [wc1 wc2], then fir1 returns a band pass
filter with passband cutoffs wc1 and wc2. If wc is a multi-element (more than two) vector, then
fir1 returns a multiband filter with cutoffs given in wc.
• h = fir1(N,wc,’ftype’) specifies a filter type, where ’ftype’ is:
a. ’high’ for a high pass filter with cutoff frequency wn.
b. ’stop’ for a band stop filter, if wc = [wc1 wc2]. The stopband frequency range is specified by
this interval.
• h = fir1 (N,wc,’ftype’,window) or h = fir1 (N,wc,window) uses the vector window of length
N+1 obtained from one of the specified MATLAB window functions. The default window
function used is the Hamming window.

The SP toolbox provides a function called fir2, which combines the frequency-sampling
technique with the window technique to design arbitrary-shaped magnitude response FIR
filters. After computing the filter impulse response using the naive design method, fir2 then
applies a selected window to minimize ripples near the band-edge frequencies. This function’s
syntax also has several forms, including:
• h = fir2 (N,f,m) designs an Nth-order (N = M−1) lowpass FIR filter and returns the impulse
response in vector h. The desired magnitude response of the filter is supplied in vectors f and
m, which must be of the same length. The vector f contains normalized frequencies in the range
from 0 to 1, where 1 corresponds to π rad/sample. The first value of f must be 0 and the last
value 1. The vector m, contains the samples of the desired magnitude response at the values
specified in f. The desired frequency response is then interpolated onto a dense, evenly spaced
grid of length 512. Thus this syntax corresponds to the naïve design method.
• h = fir2 (N, f, m, window) uses the vector window of length N+1 obtained from one of the
specified MATLAB window functions. The default window function used is the Hamming
window.
• h = fir2 (N, f, m, npt) or h = fir2 (N, f, m, npt, window) specifies the number of points npt for
the grid onto which fir2 interpolates the frequency response. The default npt value is 512.

8
Lab Task:
You need to implement the given fir filter as shown in fig-3 in Verilog and write a test bench for
exhaustive testing. Follow the given guidelines properly to implement task successfully.

Figure-5: FIR Filter

The required parameters for the coefficients and input are given in table:

SIGNED

Table-1: Q-format for Filter Coefficients and Input

Procedure:
1) First of all, set the formats for each coefficient, input and output.
2) Perform the required arithmetic operations after conversions (floating to fixed point) on
page and fill table 2 with your calculated values.
3) Write a Verilog code and a appropriate test bench for the above filter accordingly.
4) Verify your simulations with the help of calculations performed.

Calculated Results:
Filter Parameters Floating Point Fixed Point
a 0.0625
b -0.375
c 2.5
x -8.0
a_r
b_r

9
 c_r
ab
y[n]
x -4.0
a_r
b_r
c_r
ab
y[n]
Table 2: Calculated Results

For Exhaustive testing:

• Use for loop to simulate values of input (x) from 0  -8.
• Generate a 100 MHz clock and set the sensitivity of the always block in UUT at positive edge
of the clock.
• In a for loop of test bench, instead of using a manual delay command, give delay until the
positive edge of clock is detected.
Syntax: instead of #10 use @(posedge clk);

Expected Results:

Figure-6: ISIM Waveforms

10
 Labs Rubrics
Experiment # 06
Implementation of Finite Impulse Response (FIR) Filter using Fixed
Point Arithmetic (Qn.m) and Stimulus Writing for Exhaustive Testing

Name of Student: …………………………………… Roll No: ………………

Lab #06: Marks distribution

ER1 ER3 ER7 ER9 RR1
Task

Lab #06: Marks obtained

ER1 ER3 ER7 ER9 RR1 Total
Task

Lab Evaluation Rubrics

# Qualities & Criteria 0 < Poor <=40 40< Satisfactory <= 70 70 < Good <= 90 90< Excellent <=100
No Tasks were Some tasks were Few tasks were left All tasks completed in
completed/ minimal completed. Could not to be completed. due time. All goals
ER1 Task Completion effort shown justify the reasons for Provided achieved.
uncompleted tasks acceptable
and goals. justification for the
uncompleted tasks
and goals.
ER3 Test Bench No test vectors applied/ Test vectors applied Test vectors applied Test vectors
minimal effort shown meeting some of the fulling most of the appropriately applied
requirements requirements

ER7 Code indentation, No indentation of code, Computationally Working code and Good structure,
optimization and no optimization and no complex routine with good indentation or optimized code and
descriptive variable descriptive variable improper indentation structure, but not good variable names
name names/ minimal effort and variable names optimized resulting and comments
shown in unnecessary
computations

11
ER9 Results and Plots Unable to produce any Inaccurate plots and Correct plots Good presentation of
plots or results /minimal results without any the correct plots with
efforts shown necessary proper labels,
identifying features captions & visibility
such as labels,
captions & visibility
Format/Layout & Follows poorly the Follows, for some Follows, for most Closely follows all the
Organization requirement related to part, all the part, all the requirements related
RR1 format and layout. The requirements related requirements to format and layout.
report is disorganized to to format and layout. related to format Written work is well
the extent that it The organization is and layout. The organized and easy to
prevents understanding unclear organization is understand
of he content generally good, but
some parts seem
out of place

12