Documente Academic
Documente Profesional
Documente Cultură
Jimmy Zhu
ABB Professor in Engineering
24 August 2004
Computer System
TLB CPU
SRAM L1 Cache
SRAM
SRAM L2 Cache Volatile Memory
DRAM
DRAM Main Memory
1
Static RAM (SRAM)
Cache Memory
Fast:
6-Transistor CMOS SRAM Access time: < 1 ns
= 10-9 second
Expensive:
$100 / MByte
Low Density:
>120 F2
D
Source Drain G
n+ p n+
Semiconductor S
MOSFET:
Metal-Oxide-semiconductor-FET
2
How a FET Works: Transistor On
http://www.pbs.org/transistor/science/info/transmodern.html
Active condition:
electron with charge –e
VGS > VT
i.e. Gate
VGG > VT G
VGG +++ + + + + +
Drain
iD
D n+ n+
G
S p D
RD Source
S V DD
n-channel FET
S V DD
No current
Zero Drain current.
3
A Modern CMOS Process
VDD
M2
Vin Vout
M1
gate-oxide
TiSi2 AlCu
SiO2
Tungsten
poly
p-well n-well SiO2
n+ p-epi p+
Dual-
Dual-Well Trench-
Trench-Isolated
p+ CMOS Process
Dynamic RAM
Main Computer Memory Q
State “1” V=
¾ Individual access time 60 ns C
++++ +++
¾ 10 F2 State “0” V =0
− − − − − − −
¾ $4 /MByte
¾ All “1”s need to be refreshed every 1 ms.
4
Rotational Latency
track
sector
Inexpensive: $0.001/1MByte
Rotational Latency
• Average latency: 3 – 6 ms
• Wait until desired sector passes
under head
• Worst case: a complete rotation
7,500 rpm = 8 ms
15,000 rpm = 4 ms
5
Price vs. Speed
100 SRAM
Price Per MByte ($)
10 DRAM
1
0.1
0.01
HDD
1E-3
If one can, one can put the entire computer system on a single chip:
TLB CPU
SRAM
SRAM
SRAM
DRAM
DRAM
Disk Drive
6
Magnetic RAM: Historical Perspective
Motorola
4Mbits MRAM Chip
Magnetic tunnel junction
2003
Honeywell
16Kbits MRAM Chip
AMR Technology 1994
Remember Magnet !
7
Memory Element
Magnetic Tunnel Junction (MTJ)
Magnetic electrode
State “0” State “1”
m1
Tunnel barrier
m2
Resistance (kΩ)
1.5
1.0
0.5
0.0
0 20 40 60 80 100
Data Bits
J. Zhu, 18-200 Lecture, Fall 2004 15
Memory Array
“L” “L” “H” “L”
“L”
“L”
“H”
“L”
8
Detailed Structure
Magnetic
moments
are fixed.
Only the magnetic moment of a storage layer is switched back and forth.
Writing Bits
r r
I M M
r
H
M
State “1”
State “0”
9
X-Point Addressing
y
x
I
half-select
elements
I
1.0 H k2 / 3 = H x2 / 3 + H y2 / 3
0.0
-0.5
-1.0
MRAM Cell
10
4 Mbits MRAM Chip
Advantages of MRAM:
11
A Potential Game Changer
Applications
12
System on Chip (SoC)
Example:
SoC
RF Module
le
n Modu
Functio cessing
)
ting (pro
Compu Data Processing
Memory
ory
NV Mem Memory
13
X-Point Addressing
y
x
I
half-select
elements
I
1.0 H k2 / 3 = H x2 / 3 + H y2 / 3
0.0
Magnetic Cladding
(18-303 Electromagnetics)
Digital Line
with cladding Read Transistor
x5
14
Thermally Activated Reversal
Hx
τrise= 0.3 ns
0.1 µm H x = 0.8H x0
2 ns t
0.2 µm
Angle
Density
Cyclability
Cost
Non-volatility
Power
consumption
15
Conclusions
Fundamentals of E.E.
18-220
Eng. Electromagnetics
Intro. to Data Storage Tech.
18-303
18-316
18-396
Signal & Sys.
18-517
Data Storage Sys. Design
Physics of Appl. Magn. 18-715
16
18-517
Data Storage Systems Design
Building
Building aa Virtual
Virtual Disk
Disk Drive
Drive using
using MATLAB/SIMULINK
MATLAB/SIMULINK
Equalizer
Recovered data
Detector
Course Objective:
Provide a basic understanding of present optical
communication systems and components, as well as
future engineering challenges.
J. Zhu, 18-200 Lecture, Fall 2004 34
17
Bandwidth Explosion
Year
Facts
A single optical fiber is capable of transmiting 2x1012 bits
of data per second, which is equivalent to
18
Fiber-Optical Long-Haul Routes Source: KMI
19
18-315 Introduction to Optical Communication Systems
Course Coverage Encoder
Laser
driver
Amp. Decoder
Systems
9 Time Division Multiplexing (TDM)
9 Wavelength Division Multiplexing (WDM)
9 Optical networks
20
Future Optical Internet…
21