Instruction set architecture (ISA) is the set of processor design techniques used to implement the

instruction work flow on hardware. In more practical words, ISA tells you that how your processor going
to process your program instructions.

CISC runs and includes full set of instructions in the computer. Pentium processors are examples
of such design. Main advantages and disadvantages of CISC architecture can be summarized as:

 High power consumption

 More suitable for High-Level Languages
 Complex instructions limits the memory use
 Complex instructions may take single step to complete
 Instructions can be completed in many clock cycles
 Expensive to produce
 Instructions are different in size
 Less space left for registers
 More transistors required

Example:- The Intel Pentium microprocessor is a 66-MHz, 112-MIPS, 32-bit

processor. It is a single-chip superscalar microprocessor implemented in
BiCMOS(bipolar complementary metal-oxide semiconductor) technology. The
BiCMOS technology uses the best features of bipolar and CMOS technology, which
provides high speed, high drive, and low power. Pentium can execute two instructions
per clock cycle. It has the properties of both CISC and RISC, but has more
characteristics of CISC than RISC. Therefore, it is referred to as CISC architecture.
Some of the instructions are entirely hardwired and can be executed in one clock
cycle (a RISC property), while other instructions use microinstructions for execution
and may require more than one cycle for execution time (a CISC property). Pentium
also has several addressing modes, several instruction formats, and few registers
(CISC properties).
RISC runs minimum number of machine instructions so it can operate at very high speeds.
PowerPC processors used in IBM computers or Macintosh computers are examples for RISC
designed processors. There are some certain design considerations for RICS

Cycles Per Instruction: This is one important feature of a CPU design.  It can be explained as
time needed for the execution of a single instruction.

1. Pipelining (Fetch, Decode, and Execute):  executions of the instructions or parts at the
same time.
2. Registers:  Keep large number of registers available to prevent interactions with memory.

Advantages and disadvantages of RISCS design can be illustrated as:

 Effective, fast
 Easy to design  and cheap to produce
 Short design period for engineers
 Low power consumption
 Instructions are the same length so it can be executed in one clock cycle
 Since the instructions are completed in one clock cycle, this allows processor to perform
multiple tasks at the same time.
 Higher clock speeds
 Large number of registers
 Needs to access memory only for LOAD and STORE instructions
 Fixed instructions length
 Complex instructions may complete in many steps and this may increase the coding size
 Less transistors needed