JV50-PU Block Diagram: AMD Giffin CPU S1G2 (35W)

5 4 3 2 1
Project code: 91.4CH01.001

JV50-PU Block Diagram PCB P/N : 48.4C901.001
REVISION :08252- -SB
PCB STACKUP
DDR2 667/800MHz
TOP
SYSTEM DC/DC
D 667/800 MHz AMD Giffin CPU G792 ISL62392HR 46 D
16,17 VCC
INPUTS OUTPUTS
S1G2 (35W) 35 CRT DCBATOUT
5V_S5(6A)
20
DDR2 667/800MHz
638-Pin uFCPGA638
4,5,6,7
S 3D3V_S5(6A)
667/800 MHz LCD S SYSTEM DC/DC

16,17 19 GND TPS51124 47
INPUTS OUTPUTS
OUT
HDMI BOTTOM 1D1V_S0(7.5A)
IN
16X16 DCBATOUT
21 1D2V_S0(4A)
SYSTEM DC/DC
North Bridge
CLK GEN. 3 AMD RS780M
M92XT
53,54,55,56,57,58,59
RT8202
INPUTS
49
OUTPUTS
ICS9LPRS480BKLFT 71.09480.A03 CPU I/F LVDS, CRT I/F
RTM880N-796-VB-GRT 71.00880.A03 DCBATOUT 1D8V_S3(11A)
INTEGRATED GRAHPICS LAN
Giga LAN TXFM RJ45 RT9025 49
27 27
C
BCM5764 26 5V_S5 1D1V_M92 C
INT MIC 8,9,10

New card PWR SW RT9161 49
30 W83L351YG
34 28 3D3V_S0 2D5V_S0
A-Link PCIex1 (200mA)
Line In Codec AZALIA 4X4 Mini Card
Kedron a/b/g/n
G957 49
30
ALC888 33
3D3V_S0 1D5V_S0
28 (1A)
MIC In Mini Card
South Bridge G9161 49
30 AMD SB700
LPC BUS
3D3V_S5 1D2V_S5
(400mA)
INT.SPKR USB 2.0/1.1 ports
ETHERNET (10/100/1000Mb) BIOS CHARGER
30 OP AMP High Definition Audio KBC
MXIC
MX25L1605
LPC MAX8731 50
APA205729 ATA 66/100 Winbond 37 DEBUG INPUTS OUTPUTS
WPC773 CONN.37
B 36 B
Line Out CHG_PWR
ACPI 1.1
(SPDIF) 18V 6.0A
LPC I/F DCBATOUT
UP+5V
30 Touch INT. 5V 100mA
PCI/PCI BRIDGE
11,12,13,14,15 Pad 38 KB 36
CPU DC/DC
ISL6265HR 45
MODEM SATA USB INPUTS OUTPUTS
CardReader VCC_CORE_S0_0
RJ11 MDC Card MS/MS Pro/xD
31 Realtek 0~1.55V 18A
Mini USB /MMC/SD
RTS5159 32 5 in 1
32 VCC_CORE_S0_1
Blue Tooth 24 DCBATOUT
HDD SATA 0~1.55V 18A
22 VDDNB
USB 0~1.55V 18A
4 Port 25
ODD SATA
Finger
A 23 <Core Design> A
Printer 31
Camera Daughter Board Daughter Board
USB Board LED Board Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLOCK DIAGRAM
Size Document Number Rev
A3
JV50-PU SB
Date: Friday, December 19, 2008 Sheet 1 of 61
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
A A
Wistron Corporation
Title
USB/PCIE Routing
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_CLK_VDD
3D3V_S0
1 R215 2 R221
0R0603-PAD 1 2 3D3V_48MPW R_S0
1
C500 C501 DY C502 C467 C453 C476 C462 C492 C504 Due to PLL issue on current clock chip, the SBlink clock
1
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY 2R3J-GP C511 C506
SC1U10V2KX-1GP need to come from SRC clocks for RS740 and RS780.
DY
SC4D7U6D3V3KX-GP
Future clock chip revision will fix this.
2
3000mA.80ohm
D D
Clock chip has internal serial terminations
3D3V_S0 for differencial pairs, external resistors are
reserved for debug purpose.
1 R197 2
0R0603-PAD
1D1V_CLK_VDDIO C508
2008/11/10 SC27P50V2JN-2-GP
R218
1 DY 2 1 2
1
1
C459 C460 C454 C461 C472 C464 C495 3D3V_CLK_VDD X5
1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
10MR2J-L-GP X-14D31818M-35GP
U20 82.30005.891
2
2
1D1V_CLK_VDDIO 2ND = 82.30005.B11 C509
26 61 GEN_XTAL_IN
2
VDDATIG X1 GEN_XTAL_OUT
25 VDDATIG_IO X2 62 1 2
CL=20pF±0.2pF
48 SC33P50V2JN-3GP
VDDCPU CLK_SMBCLK R2141
47 VDDCPU_IO SMBCLK 2 2 0R2J-2-GP SMBC0_SB 12,16,17
3 CLK_SMBDAT R2131 2 0R2J-2-GP
SMBDAT SMBD0_SB 12,16,17
16 VDDSRC
17 VDDSRC_IO
11 30 CLK_PCIE_PEG_1 R1871 2 0R2J-2-GP
3D3V_CLK_VDD VDDSRC_IO ATIG0T_LPRS CLK_PCIE_PEG#_1 R1881 CLK_PCIE_PEG 53
ATIG0C_LPRS 29 2 0R2J-2-GP CLK_PCIE_PEG# 53
35 28 CLK_NB_GFX_1 R1891 2 0R2J-2-GP
VDDSB_SRC ATIG1T_LPRS CLK_NB_GFX#_1 R1901 CLK_NB_GFX 9
34 VDDSB_SRC_IO ATIG1C_LPRS 27 2 0R2J-2-GP CLK_NB_GFX# 9
1 R238 2 40 VDDSATA
C 0R0603-PAD 4 23 CLKREQ0# C
VDD CLKREQ0# TP153 TPAD14-GP
1
C505 55 45 CLKREQ1#
SC1U10V2KX-1GP VDD_REF 56
VDDHTT CLKREQ1#
44 CLKREQ2#
TP160 TPAD14-GP CLKREQ# Internal
VDDREF CLKREQ2# TP159 TPAD14-GP
3D3V_48MPW R_S0 63 39 CLKREQ3#
TP156 TPAD14-GP pull Low
2
VDD48 CLKREQ3# CLKREQ4#

CLKREQ4# 38 TP157 TPAD14-GP
PD# 51
R191 1 0R0402-PAD CLK_PCIE_SB_1 PD# CPU_CLK_1 R222 1 0R0402-PAD
11 CLK_PCIE_SB 2 CPUKG0T_LPRS 50 2 CPU_CLK 6
SB A-Link R192 1 0R0402-PAD
2 CLK_PCIE_SB#_1 49 CPU_CLK#_1 R220 1 0R0402-PAD
2 CPU_CLK# 6
11 CLK_PCIE_SB# CPUKG0C_LPRS
22 SRC0T_LPRS
26 CLK_PCIE_LAN R193 1 0R0402-PAD
2 CLK_PCIE_LAN_1 21 64 CLK_48 RN65
LAN R194 1 0R0402-PAD CLK_PCIE_LAN#_1 SRC0C_LPRS 48MHZ_0 CLK48_USB 12
26 CLK_PCIE_LAN# 2 20 SRC1T_LPRS 1 4 SRN22-3-GP
19 SRC1C_LPRS 2 3 CLK48_5158E 32
R198 1 0R0402-PAD
2 CLK_NB_GPPSB_1 15 59 REF0
NB A-Link 9 CLK_NB_GPPSB R199 1 0R0402-PAD CLK_NB_GPPSB#_1 SRC2T_LPRS REF0/SEL_HTT66 REF1
9 CLK_NB_GPPSB# 2 14 SRC2C_LPRS REF1/SEL_SATA 58
1
13 57 REF2 2008/12/09 EC49
SRC3T_LPRS REF2/SEL_27
1
33 CLK_PCIE_MINI1 R200 1 0R0402-PAD
2 CLK_PCIE_MINI1_1 12 EC50 DY
SRC3C_LPRS
SC22P50V2JN-4GP
MINI1 33 CLK_PCIE_MINI1# R204 1 0R0402-PAD
2 CLK_PCIE_MINI1#_1 9 DY
2
SRC4T_LPRS
SC22P50V2JN-4GP
8
2
R205 1 0R0402-PAD CLK_PCIE_NEW _1 SRC4C_LPRS
34 CLK_PCIE_NEW 2 42 SRC6T/SATAT_LPRS GNDSATA 43
NEW 34 CLK_PCIE_NEW # R206 1 0R0402-PAD
2 CLK_PCIE_NEW #_1 41 24
SRC6C/SATAC_LPRS GNDATIG
6 SRC7T_LPRS/27MHZ_SS GND 7
33 CLK_PCIE_MINI2 R211 1 0R0402-PAD
2 CLK_PCIE_MINI2_1 5 52
SRC7C_LPRS/27MHZ_NS GNDHTT
MINI2 33 CLK_PCIE_MINI2# R208 1 0R0402-PAD
2 CLK_PCIE_MINI2#_1
GNDREF 60
GNDCPU 46
2008/11/05 54 CLK_27M_SSIN R209 1 0R0402-PAD
2 CLK_SRC0T_LPRS 37 1
SB_SRC0T_LPRS GND48
DY 36 SB_SRC0C_LPRS
54 CLK_27M_M92 2 R353 1 CLK_SRC0C_LPRS 32 SB_SRC1T_LPRS GNDSRC 10
31 SB_SRC1C_LPRS GNDSRC 18
B B
2008/11/13
1KR2F-3-GP NB CLOCK INPUT TABLE
GNDSB_SRC 33
1
R217 1 0R0402-PAD
2 CLK_NBHT_CLK_1 54 NB CLOCKS RS740 RX780 RS780
NB HT
DY
9R352
CLK_NBHT_CLK
9 CLK_NBHT_CLK#
1K2R2F-1-GP
R216 1 0R0402-PAD
2 CLK_NBHT_CLK#_1 53
HTT0T_LPRS/66M
HTT0C_LPRS/66M GND 65
For SB710 HT_REFCLKP
66M SE(SINGLE END) 100M DIFF 100M DIFF
ICS9LPRS480BKLFT-GP HT_REFCLKN NC 100M DIFF 100M DIFF
2
71.09480.A03
DY REFCLK_P
R229 14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
2ND = 71.00880.A03 REF1 110R2F-GP 2 1 REFCLK_N NC NC vref
CLK_SB_25M 11
3D3V_S0 PD# GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)*
RN70 R234 DY
8 1 75R2F-2-GP 2 1 GPP_REFCLK NC 100M DIFF NC or 100M DIFF OUTPUT
7 2
3D3V_S5 6 3 GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF
3D3V_S0 5 4 RUNPW ROK_D RUNPW ROK_D 42
SRN10KJ-6-GP * RS780 can be used as clock buffer to output two PCIE referecence clocks
By deault, chip will configured as input mode, BIOS can program it to output mode.
2
DY DY 27MHz non-spreading singled clock on pin 5

R231 R230 R228 SEL_27 1 and 27MHz spread clock on pin 6
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP REF2 R232
0* 100MHz differential spreading SRC clock 150R2F-1-GP
1
REF0 REF0 2 1
REF1 SEL_SATA 1 100MHz non-spreading differential SATA clock CLK_NB_14M 9
A REF2 REF1 2 1 <Core Design> A
0* 100MHz differential spreading SRC clock R235
2
75R2F-2-GP
DY SEL_HTT66 1 66MHz 3.3V single ended HTT clock
R225 R224 R223 REF0 Wistron Corporation
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 0* 100MHz differential HTT clock 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
OSC_14M_NB
1
CPU_CLK(200MHz) Title
RS780M 1.1V 158R/90.9R
2008/11/13 CLKGEN_ICS9LPRS480
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
D D
1D2V_S0
Place close to socket 1.5Amp
1
C705 C704 C706 C707 C703 C174 C177
DY DY DY DY
SC4D7U6D3V3MX-2GP
SC4D7U6D3V3MX-2GP
SC4D7U6D3V3MX-2GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
2
2
ACPU1A
D1 VLDT_A0 HT LINK VLDT_B0 AE2

D2 VLDT_A1 VLDT_B1 AE3
8 HT_NB_CPU_CAD_H0 E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CPU_NB_CAD_H0 8

8 HT_NB_CPU_CAD_L0 E2 L0_CADIN_L0 L0_CADOUT_L0 AC1 HT_CPU_NB_CAD_L0 8
8 HT_NB_CPU_CAD_H1 E1 L0_CADIN_H1 L0_CADOUT_H1 AC2 HT_CPU_NB_CAD_H1 8
8 HT_NB_CPU_CAD_L1 F1 L0_CADIN_L1 L0_CADOUT_L1 AC3 HT_CPU_NB_CAD_L1 8
8 HT_NB_CPU_CAD_H2 G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 HT_CPU_NB_CAD_H2 8
8 HT_NB_CPU_CAD_L2 G2 L0_CADIN_L2 L0_CADOUT_L2 AA1 HT_CPU_NB_CAD_L2 8
8 HT_NB_CPU_CAD_H3 G1 L0_CADIN_H3 L0_CADOUT_H3 AA2 HT_CPU_NB_CAD_H3 8
C H1 AA3 C
8 HT_NB_CPU_CAD_L3 L0_CADIN_L3 L0_CADOUT_L3 HT_CPU_NB_CAD_L3 8
8 HT_NB_CPU_CAD_H4 J1 L0_CADIN_H4 L0_CADOUT_H4 W2 HT_CPU_NB_CAD_H4 8
8 HT_NB_CPU_CAD_L4 K1 L0_CADIN_L4 L0_CADOUT_L4 W3 HT_CPU_NB_CAD_L4 8
8 HT_NB_CPU_CAD_H5 L3 L0_CADIN_H5 L0_CADOUT_H5 V1 HT_CPU_NB_CAD_H5 8
8 HT_NB_CPU_CAD_L5 L2 L0_CADIN_L5 L0_CADOUT_L5 U1 HT_CPU_NB_CAD_L5 8
8 HT_NB_CPU_CAD_H6 L1 L0_CADIN_H6 L0_CADOUT_H6 U2 HT_CPU_NB_CAD_H6 8
8 HT_NB_CPU_CAD_L6 M1 L0_CADIN_L6 L0_CADOUT_L6 U3 HT_CPU_NB_CAD_L6 8
8 HT_NB_CPU_CAD_H7 N3 L0_CADIN_H7 L0_CADOUT_H7 T1 HT_CPU_NB_CAD_H7 8
8 HT_NB_CPU_CAD_L7 N2 L0_CADIN_L7 L0_CADOUT_L7 R1 HT_CPU_NB_CAD_L7 8
8 HT_NB_CPU_CAD_H8 E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 HT_CPU_NB_CAD_H8 8
8 HT_NB_CPU_CAD_L8 F5 L0_CADIN_L8 L0_CADOUT_L8 AD3 HT_CPU_NB_CAD_L8 8
8 HT_NB_CPU_CAD_H9 F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 HT_CPU_NB_CAD_H9 8
8 HT_NB_CPU_CAD_L9 F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 HT_CPU_NB_CAD_L9 8
8 HT_NB_CPU_CAD_H10 G5 L0_CADIN_H10 L0_CADOUT_H10 AB4 HT_CPU_NB_CAD_H10 8
8 HT_NB_CPU_CAD_L10 H5 L0_CADIN_L10 L0_CADOUT_L10 AB3 HT_CPU_NB_CAD_L10 8
8 HT_NB_CPU_CAD_H11 H3 L0_CADIN_H11 L0_CADOUT_H11 AB5 HT_CPU_NB_CAD_H11 8
8 HT_NB_CPU_CAD_L11 H4 L0_CADIN_L11 L0_CADOUT_L11 AA5 HT_CPU_NB_CAD_L11 8
8 HT_NB_CPU_CAD_H12 K3 L0_CADIN_H12 L0_CADOUT_H12 Y5 HT_CPU_NB_CAD_H12 8
8 HT_NB_CPU_CAD_L12 K4 L0_CADIN_L12 L0_CADOUT_L12 W5 HT_CPU_NB_CAD_L12 8
8 HT_NB_CPU_CAD_H13 L5 L0_CADIN_H13 L0_CADOUT_H13 V4 HT_CPU_NB_CAD_H13 8
8 HT_NB_CPU_CAD_L13 M5 L0_CADIN_L13 L0_CADOUT_L13 V3 HT_CPU_NB_CAD_L13 8
8 HT_NB_CPU_CAD_H14 M3 L0_CADIN_H14 L0_CADOUT_H14 V5 HT_CPU_NB_CAD_H14 8
8 HT_NB_CPU_CAD_L14 M4 L0_CADIN_L14 L0_CADOUT_L14 U5 HT_CPU_NB_CAD_L14 8
8 HT_NB_CPU_CAD_H15 N5 L0_CADIN_H15 L0_CADOUT_H15 T4 HT_CPU_NB_CAD_H15 8
8 HT_NB_CPU_CAD_L15 P5 L0_CADIN_L15 L0_CADOUT_L15 T3 HT_CPU_NB_CAD_L15 8
8 HT_NB_CPU_CLK_H0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CPU_NB_CLK_H0 8

8 HT_NB_CPU_CLK_L0 J2 L0_CLKIN_L0 L0_CLKOUT_L0 W1 HT_CPU_NB_CLK_L0 8
8 HT_NB_CPU_CLK_H1 J5 L0_CLKIN_H1 L0_CLKOUT_H1 Y4 HT_CPU_NB_CLK_H1 8
B B
8 HT_NB_CPU_CLK_L1 K5 L0_CLKIN_L1 L0_CLKOUT_L1 Y3 HT_CPU_NB_CLK_L1 8
8 HT_NB_CPU_CTL_H0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CPU_NB_CTL_H0 8

8 HT_NB_CPU_CTL_L0 P1 L0_CTLIN_L0 L0_CTLOUT_L0 R3 HT_CPU_NB_CTL_L0 8
8 HT_NB_CPU_CTL_H1 P3 L0_CTLIN_H1 L0_CTLOUT_H1 T5 HT_CPU_NB_CTL_H1 8
8 HT_NB_CPU_CTL_L1 P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5 HT_CPU_NB_CTL_L1 8
SKT-CPU638P-GP-U2
62.10055.111
2ND = 62.10040.471 3RD = 62.10040.501
SKT-BGA638H176
A <Core Design> A
Wistron Corporation
Title
CPU_HT_LINK I/F_(1/4)
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
ACPU1C
MEM:DATA
16 MEM_MA_DATA0 G12 MA_DATA0 MB_DATA0 C11 MEM_MB_DATA0 17
16 MEM_MA_DATA1 F12 MA_DATA1 MB_DATA1 A11 MEM_MB_DATA1 17
16 MEM_MA_DATA2 H14 MA_DATA2 MB_DATA2 A14 MEM_MB_DATA2 17
16 MEM_MA_DATA3 G14 MA_DATA3 MB_DATA3 B14 MEM_MB_DATA3 17
16 MEM_MA_DATA4 H11 MA_DATA4 MB_DATA4 G11 MEM_MB_DATA4 17
16 MEM_MA_DATA5 H12 MA_DATA5 MB_DATA5 E11 MEM_MB_DATA5 17
16 MEM_MA_DATA6 C13 MA_DATA6 MB_DATA6 D12 MEM_MB_DATA6 17
16 MEM_MA_DATA7 E13 MA_DATA7 MB_DATA7 A13 MEM_MB_DATA7 17
Place near to CPU 16 MEM_MA_DATA8 H15 MA_DATA8 MB_DATA8 A15 MEM_MB_DATA8 17
16 MEM_MA_DATA9 E15 MA_DATA9 MB_DATA9 A16 MEM_MB_DATA9 17
D 4.7u x 4 0.22u X 2 180P x 6 16 MEM_MA_DATA10 E17 MA_DATA10 MB_DATA10 A19 MEM_MB_DATA10 17 D
16 MEM_MA_DATA11 H17 MA_DATA11 MB_DATA11 A20 MEM_MB_DATA11 17
16 MEM_MA_DATA12 E14 MA_DATA12 MB_DATA12 C14 MEM_MB_DATA12 17
1
1
C262 C736 C737 C263 C258 C254 C249 C255 C250 C256 C251 C252 F14 D14
16 MEM_MA_DATA13 MA_DATA13 MB_DATA13 MEM_MB_DATA13 17
DY DY DY DY DY 16 MEM_MA_DATA14 C17 MA_DATA14 MB_DATA14 C18 MEM_MB_DATA14 17
SC4D7U6D3V3MX-2GP
SC4D7U6D3V3MX-2GP
SC4D7U6D3V3MX-2GP
SC4D7U6D3V3MX-2GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
16 MEM_MA_DATA15 G17 D18 MEM_MB_DATA15 17
2
2
MA_DATA15 MB_DATA15
16 MEM_MA_DATA16 G18 MA_DATA16 MB_DATA16 D20 MEM_MB_DATA16 17
16 MEM_MA_DATA17 C19 MA_DATA17 MB_DATA17 A21 MEM_MB_DATA17 17
16 MEM_MA_DATA18 D22 MA_DATA18 MB_DATA18 D24 MEM_MB_DATA18 17
16 MEM_MA_DATA19 E20 MA_DATA19 MB_DATA19 C25 MEM_MB_DATA19 17
16 MEM_MA_DATA20 E18 MA_DATA20 MB_DATA20 B20 MEM_MB_DATA20 17
16 MEM_MA_DATA21 F18 MA_DATA21 MB_DATA21 C20 MEM_MB_DATA21 17
16 MEM_MA_DATA22 B22 MA_DATA22 MB_DATA22 B24 MEM_MB_DATA22 17
16 MEM_MA_DATA23 C23 MA_DATA23 MB_DATA23 C24 MEM_MB_DATA23 17
16 MEM_MA_DATA24 F20 MA_DATA24 MB_DATA24 E23 MEM_MB_DATA24 17
16 MEM_MA_DATA25 F22 MA_DATA25 MB_DATA25 E24 MEM_MB_DATA25 17
16 MEM_MA_DATA26 H24 MA_DATA26 MB_DATA26 G25 MEM_MB_DATA26 17
16 MEM_MA_DATA27 J19 MA_DATA27 MB_DATA27 G26 MEM_MB_DATA27 17
0D9V_S3 16 MEM_MA_DATA28 E21 MA_DATA28 MB_DATA28 C26 MEM_MB_DATA28 17
E22 D26
750 mA 16 MEM_MA_DATA29
H20
MA_DATA29 MB_DATA29
G23
MEM_MB_DATA29 17
CLOSE TO CPU 16 MEM_MA_DATA30
H22
MA_DATA30 MB_DATA30
G24
MEM_MB_DATA30 17
1D8V_S3 16 MEM_MA_DATA32 Y24 MA_DATA32 MB_DATA32 AA24 MEM_MB_DATA32 17
ACPU1B AB24 AA23
16 MEM_MA_DATA34 AB22 MA_DATA34 MB_DATA34 AD24 MEM_MB_DATA34 17
D10 VTT1 W10 16 MEM_MA_DATA35 AA21 AE24 MEM_MB_DATA35 17
C10 MEM:CMD/CTRL/CLK VTT5 AC10 W22
MA_DATA35 MB_DATA35
AA26
VTT2 VTT6 16 MEM_MA_DATA36 MA_DATA36 MB_DATA36 MEM_MB_DATA36 17
1
B10 AB10 C397 W21 AA25
VTT3 VTT7 16 MEM_MA_DATA37 MA_DATA37 MB_DATA37 MEM_MB_DATA37 17
R381 AD10 AA10 SCD1U10V2KX-4GP Y22 AD26
1D8V_S3 VTT4 VTT8 16 MEM_MA_DATA38 MA_DATA38 MB_DATA38 MEM_MB_DATA38 17
C 39D2R2F-L-GP A10 AA22 AE25 C
16 MEM_MA_DATA39 MEM_MB_DATA39 17
2
MEMZP VTT9 MA_DATA39 MB_DATA39
1 2 AF10 MEMZP VREF_DDR_CLAW 16 MEM_MA_DATA40 Y20 MA_DATA40 MB_DATA40 AC22 MEM_MB_DATA40 17
1 2 MEMZN AE10 Y10 VTT_SENSE 1 TP106TPAD14-GP RN48 AA20 AD22
MEMZN VTT_SENSE 16 MEM_MA_DATA41 MA_DATA41 MB_DATA41 MEM_MB_DATA41 17
R383 1 4 AA18 AE20
39D2R2F-L-GPTP111 1 MEM_RSVD_M1 H16 W17 2 3 AB18 AF20
RSVD_M1 MEMVREF 16 MEM_MA_DATA43 MA_DATA43 MB_DATA43 MEM_MB_DATA43 17
16 MEM_MA_DATA44 AB21 MA_DATA44 MB_DATA44 AF24 MEM_MB_DATA44 17
T19 B18 MEM_RSVD_M2 1 TP112 C391 C388 SRN1KJ-7-GP AD21 AF23
16,18 MEM_MA0_ODT0 MA0_ODT0 RSVD_M2 16 MEM_MA_DATA45 MA_DATA45 MB_DATA45 MEM_MB_DATA45 17
1
16,18 MEM_MA0_ODT1 V22 MA0_ODT1 16 MEM_MA_DATA46 AD19 MA_DATA46 MB_DATA46 AC20 MEM_MB_DATA46 17
SC1KP50V2KX-1GP
SCD1U10V2KX-4GP
U21 MA1_ODT0 MB0_ODT0 W26 MEM_MB0_ODT0 17,18 16 MEM_MA_DATA47 Y18 MA_DATA47 MB_DATA47 AD20 MEM_MB_DATA47 17
V19 W23 MEM_MB0_ODT1 17,18 16 MEM_MA_DATA48 AD17 AD18 MEM_MB_DATA48 17
2
MA1_ODT1 MB0_ODT1 MA_DATA48 MB_DATA48
MB1_ODT0 Y26 16 MEM_MA_DATA49 W16 MA_DATA49 MB_DATA49 AE18 MEM_MB_DATA49 17
16,18 MEM_MA0_CS#0 T20 MA0_CS_L0 16 MEM_MA_DATA50 W14 MA_DATA50 MB_DATA50 AC14 MEM_MB_DATA50 17
16,18 MEM_MA0_CS#1 U19 MA0_CS_L1 MB0_CS_L0 V26 MEM_MB0_CS#0 17,18 16 MEM_MA_DATA51 Y14 MA_DATA51 MB_DATA51 AD14 MEM_MB_DATA51 17
U20 MA1_CS_L0 MB0_CS_L1 W25 MEM_MB0_CS#1 17,18 16 MEM_MA_DATA52 Y17 MA_DATA52 MB_DATA52 AF19 MEM_MB_DATA52 17
V20 MA1_CS_L1 MB1_CS_L0 U22 16 MEM_MA_DATA53 AB17 MA_DATA53 MB_DATA53 AC18 MEM_MB_DATA53 17
16 MEM_MA_DATA54 AB15 MA_DATA54 MB_DATA54 AF16 MEM_MB_DATA54 17
16,18 MEM_MA_CKE0 J22 MA_CKE0 MB_CKE0 J25 MEM_MB_CKE0 17,18 16 MEM_MA_DATA55 AD15 MA_DATA55 MB_DATA55 AF15 MEM_MB_DATA55 17
16,18 MEM_MA_CKE1 J20 MA_CKE1 MB_CKE1 H26 MEM_MB_CKE1 17,18 16 MEM_MA_DATA56 AB13 MA_DATA56 MB_DATA56 AF13 MEM_MB_DATA56 17
16 MEM_MA_DATA57 AD13 MA_DATA57 MB_DATA57 AC12 MEM_MB_DATA57 17
N19 MA_CLK_H5 MB_CLK_H5 P22 16 MEM_MA_DATA58 Y12 MA_DATA58 MB_DATA58 AB11 MEM_MB_DATA58 17
N20 MA_CLK_L5 MB_CLK_L5 R22 16 MEM_MA_DATA59 W11 MA_DATA59 MB_DATA59 Y11 MEM_MB_DATA59 17
16 MEM_MA_CLK0_P E16 MA_CLK_H1 MB_CLK_H1 A17 MEM_MB_CLK0_P 17 16 MEM_MA_DATA60 AB14 MA_DATA60 MB_DATA60 AE14 MEM_MB_DATA60 17
16 MEM_MA_CLK0_N F16 MA_CLK_L1 MB_CLK_L1 A18 MEM_MB_CLK0_N 17 16 MEM_MA_DATA61 AA14 MA_DATA61 MB_DATA61 AF14 MEM_MB_DATA61 17
16 MEM_MA_CLK1_P Y16 MA_CLK_H7 MB_CLK_H7 AF18 MEM_MB_CLK1_P 17 16 MEM_MA_DATA62 AB12 MA_DATA62 MB_DATA62 AF11 MEM_MB_DATA62 17
16 MEM_MA_CLK1_N AA16 MA_CLK_L7 MB_CLK_L7 AF17 MEM_MB_CLK1_N 17 16 MEM_MA_DATA63 AA12 MA_DATA63 MB_DATA63 AD11 MEM_MB_DATA63 17
P19 MA_CLK_H4 MB_CLK_H4 R26
P20 MA_CLK_L4 MB_CLK_L4 R25 16 MEM_MA_DM0 E12 MA_DM0 MB_DM0 A12 MEM_MB_DM0 17
16 MEM_MA_DM1 C15 MA_DM1 MB_DM1 B16 MEM_MB_DM1 17
16,18 MEM_MA_ADD0 N21 MA_ADD0 MB_ADD0 P24 MEM_MB_ADD0 17,18 16 MEM_MA_DM2 E19 MA_DM2 MB_DM2 A22 MEM_MB_DM2 17
B B
16,18 MEM_MA_ADD1 M20 MA_ADD1 MB_ADD1 N24 MEM_MB_ADD1 17,18 16 MEM_MA_DM3 F24 MA_DM3 MB_DM3 E25 MEM_MB_DM3 17
16,18 MEM_MA_ADD2 N22 MA_ADD2 MB_ADD2 P26 MEM_MB_ADD2 17,18 16 MEM_MA_DM4 AC24 MA_DM4 MB_DM4 AB26 MEM_MB_DM4 17
16,18 MEM_MA_ADD3 M19 MA_ADD3 MB_ADD3 N23 MEM_MB_ADD3 17,18 16 MEM_MA_DM5 Y19 MA_DM5 MB_DM5 AE22 MEM_MB_DM5 17
16,18 MEM_MA_ADD4 M22 MA_ADD4 MB_ADD4 N26 MEM_MB_ADD4 17,18 16 MEM_MA_DM6 AB16 MA_DM6 MB_DM6 AC16 MEM_MB_DM6 17
16,18 MEM_MA_ADD5 L20 MA_ADD5 MB_ADD5 L23 MEM_MB_ADD5 17,18 16 MEM_MA_DM7 Y13 MA_DM7 MB_DM7 AD12 MEM_MB_DM7 17
16,18 MEM_MA_ADD6 M24 MA_ADD6 MB_ADD6 N25 MEM_MB_ADD6 17,18
16,18 MEM_MA_ADD7 L21 MA_ADD7 MB_ADD7 L24 MEM_MB_ADD7 17,18 16 MEM_MA_DQS0_P G13 MA_DQS_H0 MB_DQS_H0 C12 MEM_MB_DQS0_P 17
16,18 MEM_MA_ADD8 L19 MA_ADD8 MB_ADD8 M26 MEM_MB_ADD8 17,18 16 MEM_MA_DQS0_N H13 MA_DQS_L0 MB_DQS_L0 B12 MEM_MB_DQS0_N 17
16,18 MEM_MA_ADD9 K22 MA_ADD9 MB_ADD9 K26 MEM_MB_ADD9 17,18 16 MEM_MA_DQS1_P G16 MA_DQS_H1 MB_DQS_H1 D16 MEM_MB_DQS1_P 17
16,18 MEM_MA_ADD10 R21 MA_ADD10 MB_ADD10 T26 MEM_MB_ADD10 17,18 16 MEM_MA_DQS1_N G15 MA_DQS_L1 MB_DQS_L1 C16 MEM_MB_DQS1_N 17
16,18 MEM_MA_ADD11 L22 MA_ADD11 MB_ADD11 L26 MEM_MB_ADD11 17,18 16 MEM_MA_DQS2_P C22 MA_DQS_H2 MB_DQS_H2 A24 MEM_MB_DQS2_P 17
16,18 MEM_MA_ADD12 K20 MA_ADD12 MB_ADD12 L25 MEM_MB_ADD12 17,18 16 MEM_MA_DQS2_N C21 MA_DQS_L2 MB_DQS_L2 A23 MEM_MB_DQS2_N 17
16,18 MEM_MA_ADD13 V24 MA_ADD13 MB_ADD13 W24 MEM_MB_ADD13 17,18 16 MEM_MA_DQS3_P G22 MA_DQS_H3 MB_DQS_H3 F26 MEM_MB_DQS3_P 17
16,18 MEM_MA_ADD14 K24 MA_ADD14 MB_ADD14 J23 MEM_MB_ADD14 17,18 16 MEM_MA_DQS3_N G21 MA_DQS_L3 MB_DQS_L3 E26 MEM_MB_DQS3_N 17
16,18 MEM_MA_ADD15 K19 MA_ADD15 MB_ADD15 J24 MEM_MB_ADD15 17,18 16 MEM_MA_DQS4_P AD23 MA_DQS_H4 MB_DQS_H4 AC25 MEM_MB_DQS4_P 17
16 MEM_MA_DQS4_N AC23 MA_DQS_L4 MB_DQS_L4 AC26 MEM_MB_DQS4_N 17
16,18 MEM_MA_BANK0 R20 MA_BANK0 MB_BANK0 R24 MEM_MB_BANK0 17,18 16 MEM_MA_DQS5_P AB19 MA_DQS_H5 MB_DQS_H5 AF21 MEM_MB_DQS5_P 17
16,18 MEM_MA_BANK1 R23 MA_BANK1 MB_BANK1 U26 MEM_MB_BANK1 17,18 16 MEM_MA_DQS5_N AB20 MA_DQS_L5 MB_DQS_L5 AF22 MEM_MB_DQS5_N 17
16,18 MEM_MA_BANK2 J21 MA_BANK2 MB_BANK2 J26 MEM_MB_BANK2 17,18 16 MEM_MA_DQS6_P Y15 MA_DQS_H6 MB_DQS_H6 AE16 MEM_MB_DQS6_P 17
16 MEM_MA_DQS6_N W15 MA_DQS_L6 MB_DQS_L6 AD16 MEM_MB_DQS6_N 17
16,18 MEM_MA_RAS# R19 MA_RAS_L MB_RAS_L U25 MEM_MB_RAS# 17,18 16 MEM_MA_DQS7_P W12 MA_DQS_H7 MB_DQS_H7 AF12 MEM_MB_DQS7_P 17
16,18 MEM_MA_CAS# T22 MA_CAS_L MB_CAS_L U24 MEM_MB_CAS# 17,18 16 MEM_MA_DQS7_N W13 MA_DQS_L7 MB_DQS_L7 AE12 MEM_MB_DQS7_N 17
16,18 MEM_MA_W E# T24 MA_WE_L MB_WE_L U23 MEM_MB_W E# 17,18
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
A <Core Design> A
Wistron Corporation
Title
CPU_DDR_(2/4)
A3 SB
JV50-PU
5 4 3 2 1
5 4 3 2 1
The Processor has

1D8V_S0 reached a preset
maximum operating
temperature. 100℃
8
7
6
5
RN40
1DY 2
IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491
LYAOUT:ROUTE VDDA TRACE APPROX. I=Active HTC
SRN300J-1-GP C196 50mils WIDE(USE 2X25 mil TRACES TO O=FAN
SC100P50V2JN-3GP 2D5V_S0 2D5V_VDDA_S0 EXIT BALL FIELD) AND 500 mils LONG.
1
2
3
4
D R78 1 2 1 R401 2 D
11,52 CPU_LDT_RST# LDT_RST#_CPU 9
0R2J-2-GP 0R0603-PAD
1
1 2 LDT_PW ROK C739 C745 C227 C752 C264 2008/11/03
11,52 CPU_PW RGD
SC10U10V5ZY-1GP
SC4D7U10V5ZY-3GP
SC3300P50V2KX-1GP
SC10U10V5ZY-1GP
SCD22U16V3ZY-GP
R86 0R0402-PAD DY DY DY 1D8V_S3
1 2 1D8V_S3
11 CPU_LDT_STOP#
2
R79 0R0402-PAD LDT_STP#_CPU 9
1 2 CPU_LDT_REQ#_CPU
9 ALLOW _LDTSTOP R72 0R0402-PAD
3
4
8
7
6
5
1
ACPU1D RN87 R366
1D8V_S3 SRN1KJ-7-GP 300R2J-4-GP
RN84
DY
Cloce To CPU F8 VDDA1 KEY1 M11
F9 W18 SRN300J-1-GP
2
VDDA2 KEY2
1 2
2
1
1
2
3
4
2 3 CPU_CLK 1 2 R386 169R2F-GP CLKCPU_IN A9 CLKIN_H SVC A6 CPU_SVC 45
R364 C7341 2SC3900P50V2KX-2GP CLKCPU#_IN A8 A4
3 CPU_CLK# CLKIN_L SVD CPU_SVD 45
390R2J-1-GP C732 SC3900P50V2KX-2GP 2008/11/05
LDT_RST#_CPU B7 2008/11/05
LDT_PW ROK RESET_L CPU_DBREQ#
2008/11/03 A7
1
LDT_STP#_CPU PWROK THERMTRIP#

F10 LDTSTOP_L THERMTRIP_L AF6
CPU_SIC HDT_RST# 1 2 CPU_LDT_REQ#_CPU C6 AC7 PROCHOT# 1 R67 2
LDTREQ_L PROCHOT_L PROCHOT#_SB 11
R74 AA8 CPU_MEMHOT# 0R0402-PAD
0R0402-PAD TPAD14-GP MEMHOT_L
For HDT DBG TP186 1 CPU_SIC AF4 SIC internal pull high 300 ohm
TPAD14-GP TP185 1 CPU_SID AF5
TPAD14-GP SID
1D2V_S0 TP87 1CPU_ALERT# AE6 ALERT_L THERMDC W7 H_THERMDC 35
THERMDA W8 H_THERMDA 35
1 2 CPU_HTREF0 R6 1 2
1D8V_S3 R84 1 HT_REF0
For leverage S1g3, please reserve 2 44D2R2F-GP CPU_HTREF1 P6 HT_REF1 DY C213SC3300P50V2KX-1GP
2008/11/03
300 ohm resistor pullup to VDDIO. R83 44D2R2F-GP
C RN44 R110 10R0402-PAD
2CPU_VDD0_RUN_FB_H_RF6 W9 CPU_VDDIO_SUS_FB_H 1 TP99
C
45 CPU_VDD0_RUN_FB_H VDD0_FB_H VDDIO_FB_H
1 4CPU_TEST25_H 45 CPU_VDD0_RUN_FB_L
R108 10R0402-PAD
2CPU_VDD0_RUN_FB_L_R E6 VDD0_FB_L VDDIO_FB_L Y9 CPU_VDDIO_SUS_FB_L 1 TP100
For leverage S1g3, please reserve 2 3CPU_TEST25_L
300 ohm resistor pulldown to VSS R104 10R0402-PAD
2CPU_VDD1_RUN_FB_H_RY6 H6
45 CPU_VDD1_RUN_FB_H VDD1_FB_H VDDNB_FB_H CPU_VDDNB_RUN_FB_H 45
SRN300J-3-GP R105 10R0402-PAD
2CPU_VDD1_RUN_FB_L_R
AB6 G6
45 CPU_VDD1_RUN_FB_L VDD1_FB_L VDDNB_FB_L CPU_VDDNB_RUN_FB_L 45
DY 2008/11/03
2008/11/11 CPU_DBRDY
CPU_TMS
G10
AA9
DBRDY
E10 CPU_DBREQ#
LAYOUT: Route FBCLKOUT_H/L
CPU_TCK TMS DBREQ_L
CPU_TRST#
AC9
AD9
TCK
AE9 CPU_TDO
differentially impedance 80
1D8V_S3 CPU_TDI TRST_L TDO
AF9 TDI
SA
RN43 TP93 1 CPU_TEST23 AD7 J7 CPU_TEST28_H 1 TP92
TEST23 TEST28_H
1 4CPU_TEST25_L TEST28_L H8 CPU_TEST28_L 1 TP98
2 3CPU_TEST25_H TP108 1 CPU_TEST18 H10 TEST18
TP107 1 CPU_TEST19 G9 D7 CPU_TEST17 1 TP89
TEST19 TEST17 CPU_TEST16
SRN300J-3-GP E7 1 TP90
TP105 TEST16
1CPU_TEST25_H E9 TEST25_H TEST15 F7 CPU_TEST15 1 TP91
TP103 1CPU_TEST25_L E8 C7 CPU_TEST14 1 TP88
TEST25_L TEST14
TP104 1 CPU_TEST21 CPU_TEST21 AB8 C3
TP97 CPU_TEST20 CPU_TEST20 TEST21 TEST7
1 AF7 TEST20 TEST10 K8
TP94 1 CPU_TEST24 AE7
TP96 CPU_TEST22 TEST24
1 AE8 TEST22 TEST8 C4
TP95 1 CPU_TEST12 AC8
TP187 CPU_TEST27 TEST12
SA 1 AF8 TEST27
1D8V_S3 C9 CPU_TEST29H 1 TP101
TEST29_H
8
7
6
5 1 R77 2 CPU_TEST9 C2 TEST9 TEST29_L C8 CPU_TEST29L 1 TP102
3D3V_S0 RN42 0R0402-PAD AA6 TEST6
1
B SRN300J-1-GP B
R81 A3 H18
RSVD1 RSVD10
1
R101
DY 2K2R2J-2-GP A5 RSVD2 RSVD9 H19
B3 AA7
1
2
3
4
10KR2J-3-GP RSVD3 RSVD8

DY B5 D5
HDT Connectors
B 2
LDT_PW ROK_G RSVD4 RSVD7

C1 RSVD5 RSVD6 C5
DY
2
Q8
C E LDT_PW ROK SKT-CPU638P-GP-U2
45 CPU_PW RGD_SVID_REG MMBT3904-4-GP HDT1
84.T3904.C11 1 2
2ND = 84.03904.L06 DY
1
C205 DY 3 4
SCD1U16V2ZY-2GP 5 6
CPU_DBREQ# 7 8
2
Near CPU PIN CPU_DBRDY 9 10

CPU_TCK 11 12
LDT_PW ROK CPU_TMS 13 14
CPU_TDI 15 16
1
CPU_PW RGD_SVID_REG 1 2 LDT_PW ROK CPU_TRST# 17 18

R375 0R2J-2-GP R376 CPU_TDO 19 20
2K2R2J-2-GP C723 21 22
SCD1U16V2ZY-2GP 1D8V_S3 23 24
26
2
1 2
1D8V_SUS_Q2 SMC-CONN26A-FP
B
HDT_RST#
Q24
A THERMTRIP# E C <Core Design> A
RSMRST# 35,36
MMBT3904-4-GP
84.T3904.C11
2ND = 84.03904.L06 Wistron Corporation
CPU exceeds to 125℃ Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU_Control&Debug_(3/4)
A3 SB
JV50-PU
5 4 3 2 1
5 4 3 2 1
ACPU1F VCC_CORE_S0_0 36A for VDD0&VDD1

ACPU1E VCC_CORE_S0_1
AA4 VSS1 VSS66 J6
AA11 VSS2 VSS67 J8 Bottom Side Decoupling Bottom Side Decoupling
AA13 VSS3 VSS68 J10 G4 VDD0_1 VDD1_1 P8
AA15 VSS4 VSS69 J12 H2 VDD0_2 VDD1_2 P10
AA17 VSS5 VSS70 J14 J9 VDD0_3 VDD1_3 R4
D AA19 VSS6 VSS71 J16 J11 VDD0_4 VDD1_4 R7 D
AB2 VSS7 VSS72 J18 J13 VDD0_5 VDD1_5 R9
AB7 K2 C239 C281 C286 C295 C206 C244 C315 J15 R11 C193 C154 C308 C280 C253 C293 C312
VSS8 VSS73 VDD0_6 VDD1_6
1
AB9 VSS9 VSS74 K7 K6 VDD0_7 VDD1_7 T2
AB23 VSS10 VSS75 K9 DY DY K10 VDD0_8 VDD1_8 T6 DY DY
AB25 K11 K12 T8
2
VSS11 VSS76 VDD0_9 VDD1_9
AC11 VSS12 VSS77 K13 K14 VDD0_10 VDD1_10 T10
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD22U6D3V2KX-1GP
SCD01U50V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AC13 VSS13 VSS78 K15 L4 VDD0_11 VDD1_11 T12
AC15 VSS14 VSS79 K17 L7 VDD0_12 VDD1_12 T14
AC17 VSS15 VSS80 L6 L9 VDD0_13 VDD1_13 U7
AD6 VSS18 VSS83 L12 L15 VDD0_16 VDD1_16 U13
AD8 VSS19 VSS84 L14 M2 VDD0_17 VDD1_17 U15
AD25 VSS20 VSS85 L16 M6 VDD0_18 VDD1_18 V6
AE11 VSS21 VSS86 L18 M8 VDD0_19 VDD1_19 V8
AE13 VSS22 VSS87 M7 M10 VDD0_20 VDD1_20 V10
AE15 VSS23 VSS88 M9 N7 VDD0_21 VDD1_21 V12
AE17 VSS24 VSS89 AC6 N9 VDD0_22 VDD1_22 V14
AE19 VSS25 VSS90 M17 N11 VDD0_23 VDD1_23 W4
AE21 N4 VDDNB Y2
AE23
VSS26 VSS91
N8 add 0.1U 3A for VDDNB K16
VDD1_24
AC4
B4
VSS27 VSS92
N10 M16
VDDNB_1 VDD1_25
AD2
3A for VDDIO
VSS28 VSS93 VDDNB_2 VDD1_26 1D8V_S3
B6 VSS29 VSS94 N16 P16 VDDNB_3 Place near to CPU
B8 N18 C316 C324 C808 T16 Y25
VSS30 VSS95 VDDNB_4 VDDIO27
1
1
B9 VSS31 VSS96 P2 V16 VDDNB_5 VDDIO26 V25
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
B11 VSS32 VSS97 P7 DY VDDIO25 V23
B13 P9 H25 V21
2
2
VSS33 VSS98 VDDIO1 VDDIO24 C351 C362 C385 C379 C375 C365 C358 C361 C347 C363 C378
B15 VSS34 VSS99 P11 J17 VDDIO2 VDDIO23 V18
C B17 P17 K18 U17 C
VSS35 VSS100 VDDIO3 VDDIO22
1
B19 VSS36 VSS101 R8 K21 VDDIO4 VDDIO21 T25
B21 VSS37 VSS102 R10 K23 VDDIO5 VDDIO20 T23 DY DY DY DY
B23 R16 K25 T21
2
VSS38 VSS103 VDDIO6 VDDIO19
B25 VSS39 VSS104 R18 L17 VDDIO7 VDDIO18 T18
SC180P50V2JN-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
D6 VSS40 VSS105 T7 M18 VDDIO8 VDDIO17 R17
D8 T9 M21 P25
D9
VSS41 VSS106
T11
3A for VDDIO M23
VDDIO9 VDDIO16
P23
VSS42 VSS107 1D8V_S3 VDDIO10 VDDIO15
D11 VSS43 VSS108 T13 M25 VDDIO11 VDDIO14 P21
D13 VSS44 VSS109 T15 Bottom Side Decoupling N17 VDDIO12 VDDIO13 P18
D15 VSS45 VSS110 T17
D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6 SKT-CPU638P-GP-U2
D21 VSS48 VSS113 U8
D23 U10 C392 C398 C381 C356 C372 C349
VSS49 VSS114
1
D25 VSS50 VSS115 U12

E4 VSS51 VSS116 U14 DY DY
F2 U16
2
VSS52 VSS117
F11 VSS53 VSS118 U18
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
F13 VSS54 VSS119 V2

F15 VSS55 VSS120 V7
F17 VSS56 VSS121 V9
F19 VSS57 VSS122 V11
H7 VSS61 VSS126 W6
H9 VSS62 VSS127 Y21
H21 VSS63 VSS128 Y23
B B
H23 VSS64 VSS129 N6
J4 VSS65
SKT-CPU638P-GP-U2
A <Core Design> A
Wistron Corporation
Title
CPU_Power_(4/4)
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
ANB1A
4 HT_CPU_NB_CAD_H0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_NB_CPU_CAD_H0 4
4 HT_CPU_NB_CAD_L0 Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25 HT_NB_CPU_CAD_L0 4
4 HT_CPU_NB_CAD_H1 V22 HT_RXCAD1P HT_TXCAD1P E24 HT_NB_CPU_CAD_H1 4
4 HT_CPU_NB_CAD_L1 V23 HT_RXCAD1N HT_TXCAD1N E25 HT_NB_CPU_CAD_L1 4
4 HT_CPU_NB_CAD_H2 V25 HT_RXCAD2P HT_TXCAD2P F24 HT_NB_CPU_CAD_H2 4
4 HT_CPU_NB_CAD_L2 V24 HT_RXCAD2N HT_TXCAD2N F25 HT_NB_CPU_CAD_L2 4
4 HT_CPU_NB_CAD_H3 U24 HT_RXCAD3P HT_TXCAD3P F23 HT_NB_CPU_CAD_H3 4
4 HT_CPU_NB_CAD_L3 U25 HT_RXCAD3N HT_TXCAD3N F22 HT_NB_CPU_CAD_L3 4
4 HT_CPU_NB_CAD_H4 T25 HT_RXCAD4P HT_TXCAD4P H23 HT_NB_CPU_CAD_H4 4
4 HT_CPU_NB_CAD_L4 T24 HT_RXCAD4N HT_TXCAD4N H22 HT_NB_CPU_CAD_L4 4
4 HT_CPU_NB_CAD_H5 P22 HT_RXCAD5P HT_TXCAD5P J25 HT_NB_CPU_CAD_H5 4
HYPER TRANSPORT CPU I/F

4 HT_CPU_NB_CAD_L5 P23 HT_RXCAD5N HT_TXCAD5N J24 HT_NB_CPU_CAD_L5 4
D 4 HT_CPU_NB_CAD_H6 P25 HT_RXCAD6P HT_TXCAD6P K24 HT_NB_CPU_CAD_H6 4 D
4 HT_CPU_NB_CAD_L6 P24 HT_RXCAD6N HT_TXCAD6N K25 HT_NB_CPU_CAD_L6 4
4 HT_CPU_NB_CAD_H7 N24 HT_RXCAD7P HT_TXCAD7P K23 HT_NB_CPU_CAD_H7 4
4 HT_CPU_NB_CAD_L7 N25 HT_RXCAD7N HT_TXCAD7N K22 HT_NB_CPU_CAD_L7 4
4 HT_CPU_NB_CAD_H8 AC24 HT_RXCAD8P HT_TXCAD8P F21 HT_NB_CPU_CAD_H8 4

4 HT_CPU_NB_CAD_L8 AC25 HT_RXCAD8N HT_TXCAD8N G21 HT_NB_CPU_CAD_L8 4
4 HT_CPU_NB_CAD_H9 AB25 HT_RXCAD9P HT_TXCAD9P G20 HT_NB_CPU_CAD_H9 4
4 HT_CPU_NB_CAD_L9 AB24 HT_RXCAD9N HT_TXCAD9N H21 HT_NB_CPU_CAD_L9 4
4 HT_CPU_NB_CAD_H10 AA24 HT_RXCAD10P HT_TXCAD10P J20 HT_NB_CPU_CAD_H10 4
4 HT_CPU_NB_CAD_L10 AA25 HT_RXCAD10N HT_TXCAD10N J21 HT_NB_CPU_CAD_L10 4
4 HT_CPU_NB_CAD_H11 Y22 HT_RXCAD11P HT_TXCAD11P J18 HT_NB_CPU_CAD_H11 4
4 HT_CPU_NB_CAD_L11 Y23 HT_RXCAD11N HT_TXCAD11N K17 HT_NB_CPU_CAD_L11 4
4 HT_CPU_NB_CAD_H12 W21 HT_RXCAD12P HT_TXCAD12P L19 HT_NB_CPU_CAD_H12 4
4 HT_CPU_NB_CAD_L12 W20 HT_RXCAD12N HT_TXCAD12N J19 HT_NB_CPU_CAD_L12 4
4 HT_CPU_NB_CAD_H13 V21 HT_RXCAD13P HT_TXCAD13P M19 HT_NB_CPU_CAD_H13 4
4 HT_CPU_NB_CAD_L13 V20 HT_RXCAD13N HT_TXCAD13N L18 HT_NB_CPU_CAD_L13 4
4 HT_CPU_NB_CAD_H14 U20 HT_RXCAD14P HT_TXCAD14P M21 HT_NB_CPU_CAD_H14 4
4 HT_CPU_NB_CAD_L14 U21 HT_RXCAD14N HT_TXCAD14N P21 HT_NB_CPU_CAD_L14 4
4 HT_CPU_NB_CAD_H15 U19 HT_RXCAD15P HT_TXCAD15P P18 HT_NB_CPU_CAD_H15 4
4 HT_CPU_NB_CAD_L15 U18 HT_RXCAD15N HT_TXCAD15N M18 HT_NB_CPU_CAD_L15 4
4 HT_CPU_NB_CLK_H0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_NB_CPU_CLK_H0 4

4 HT_CPU_NB_CLK_L0 T23 HT_RXCLK0N HT_TXCLK0N H25 HT_NB_CPU_CLK_L0 4
4 HT_CPU_NB_CLK_H1 AB23 HT_RXCLK1P HT_TXCLK1P L21 HT_NB_CPU_CLK_H1 4
4 HT_CPU_NB_CLK_L1 AA22 HT_RXCLK1N HT_TXCLK1N L20 HT_NB_CPU_CLK_L1 4
4 HT_CPU_NB_CTL_H0 M22 HT_RXCTL0P HT_TXCTL0P M24 HT_NB_CPU_CTL_H0 4

4 HT_CPU_NB_CTL_L0 M23 HT_RXCTL0N HT_TXCTL0N M25 HT_NB_CPU_CTL_L0 4
C R21 P19 C
4 HT_CPU_NB_CTL_H1
R20
HT_RXCTL1P HT_TXCTL1P
R18
HT_NB_CPU_CTL_H1 4 Placement: close RS780
4 HT_CPU_NB_CTL_L1 HT_RXCTL1N HT_TXCTL1N HT_NB_CPU_CTL_L1 4
1 2 R344 HT_RXCALP C23 HT_RXCALP HT_TXCALP B24 HT_TXCALP 1 2 R343
301R2F-GP HT_RXCALN A24 B25 HT_TXCALN 301R2F-GP
HT_RXCALN HT_TXCALN
Place < 100mils from pin C23 and A24 Place < 100mils from pin B25 and B24
RS780M-GP-U2
Placement: close RS780
ANB1B
PEG_RXP0 D4 A5 GTXP0 DIS
1 2 C617 SCD1U16V2KX-3GP PEG_TXP0
PEG_RXN0 GFX_RX0P GFX_TX0P GTXN0 C616 SCD1U16V2KX-3GP PEG_TXN0
C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5 DIS
1 2
PEG_RXP1 A3 A4 GTXP1 DIS
PEG_RXN1 GFX_RX1P GFX_TX1P GTXN1 C593 SCD1U16V2KX-3GP PEG_TXN1 PEG_TXP[15..0] 53
B3 GFX_RX1N GFX_TX1N B4 DIS
1 2 PEG_TXN[15..0] 53
PEG_RXP2 C2 C3 GTXP2 DIS
C1 GFX_RX2N GFX_TX2N B2 DIS
1 2
PEG_RXP3 E5 D1 GTXP3 DIS
F5 GFX_RX3N GFX_TX3N D2 DIS
1 2 RS780M Display Port Support(muxed on GFX)
PEG_RXP4 G5 E2 GTXP4 DIS
G6 GFX_RX4N GFX_TX4N E1 DIS
1 2 DP0 GFX_TX0,TX1,TX2,TX3,AUX0,HPD0
PEG_RXP5 H5 F4 GTXP5 DIS
H6 GFX_RX5N GFX_TX5N F3 DIS
1 2 DP1 GFX_TX4,TX5,TX6,TX7,AUX1,HPD1
PEG_RXP6 J6 F1 GTXP6 DIS
53 PEG_RXN[15..0] J5 GFX_RX6N GFX_TX6N F2 DIS
1 2
PEG_RXP7 J7 H4 GTXP7 DIS
PEG_RXN7 GFX_RX7P GFX_TX7P GTXN7 C586 SCD1U16V2KX-3GP PEG_TXN7 GTXP0 C30 SCD1U16V2KX-3GP
53 PEG_RXP[15..0] J8 GFX_RX7N GFX_TX7N H3 DIS
1 2 UMA 1 2 HDMI_DATA2+ 21
PEG_RXP8 L5 H1 GTXP8 DIS
1 2 C609 SCD1U16V2KX-3GP PEG_TXP8 GTXN0 UMA C29 1 2 SCD1U16V2KX-3GP HDMI_DATA2- 21
PEG_RXN8 GFX_RX8P GFX_TX8P GTXN8 C608 SCD1U16V2KX-3GP PEG_TXN8 GTXP1 C27 SCD1U16V2KX-3GP
L6 GFX_RX8N GFX_TX8N H2 DIS
PEG_RXP9 M8 J2 GTXP9 DIS
1 2 C585 SCD1U16V2KX-3GP PEG_TXP9 GTXN1 UMA C26 1 2 SCD1U16V2KX-3GP HDMI_DATA1- 21
B PEG_RXN9 GFX_RX9P GFX_TX9P GTXN9 C584 SCD1U16V2KX-3GP PEG_TXN9 GTXP2 C25 SCD1U16V2KX-3GP B
L8 GFX_RX9N GFX_TX9N J1 DIS
PEG_RXP10 P7 K4 GTXP10 DIS
1 2 C607 SCD1U16V2KX-3GP PEG_TXP10 GTXN2 UMA C22 1 2 SCD1U16V2KX-3GP
PCIE I/F GFX
GFX_RX10P GFX_TX10P HDMI_DATA0- 21

PEG_RXN10 M7 K3 GTXN10 DIS
1 2 C606 SCD1U16V2KX-3GP PEG_TXN10 GTXP3 UMA C21 1 2 SCD1U16V2KX-3GP HDMI_CLK+ 21
PEG_RXP11 GFX_RX10N GFX_TX10N GTXP11 C583 SCD1U16V2KX-3GP PEG_TXP11 GTXN3 C19 SCD1U16V2KX-3GP
P5 GFX_RX11P GFX_TX11P K1 DIS
1 2 UMA 1 2 HDMI_CLK- 21
PEG_RXN11 M5 K2 GTXN11 DIS
1 2 C582 SCD1U16V2KX-3GP PEG_TXN11
PEG_RXP12 GFX_RX11N GFX_TX11N GTXP12 C605 SCD1U16V2KX-3GP PEG_TXP12
R8 GFX_RX12P GFX_TX12P M4 DIS
1 2
PEG_RXN12 P8 M3 GTXN12 DIS
R6 GFX_RX13P GFX_TX13P M1 DIS
1 2
PEG_RXN13 R5 M2 GTXN13 DIS
P4 GFX_RX14P GFX_TX14P N2 DIS
1 2
PEG_RXN14 P3 N1 GTXN14 DIS
T4 GFX_RX15P GFX_TX15P P1 DIS
1 2
PEG_RXN15 T3 P2 GTXN15 DIS
GFX_RX15N GFX_TX15N
TXP0 C621 SCD1U16V2KX-3GP
2008/11/05
26 PCIE_RXP1 AE3
AD4
GPP_RX0P GPP_TX0P AC1
AC2 TXN0 C622
1
1
2
2 SCD1U16V2KX-3GP
PCIE_TXP1 26 LAN 2008/11/05
LAN 26 PCIE_RXN1 GPP_RX0N GPP_TX0N TXP1 C597 SCD1U16V2KX-3GP
PCIE_TXN1 26
2008/11/05
33 PCIE_RXP2 AE2
AD3
GPP_RX1P GPP_TX1P AB4
AB3 TXN1 C596
1
1
2
2 SCD1U16V2KX-3GP
PCIE_TXP2 33 MINICARD1 2008/11/05
MINICARD1 33 PCIE_RXN2
AD1
GPP_RX1N GPP_TX1N
AA2 TXP3 C599 1 2 SCD1U16V2KX-3GP
PCIE_TXN2 33
33 PCIE_RXP3 GPP_RX2P GPP_TX2P PCIE_TXP3 33
2008/11/05 AD2 PCIE I/F GPP AA1 TXN3 C598 1 2 SCD1U16V2KX-3GP 2008/11/05
MINICARD2 33 PCIE_RXN3
V5
GPP_RX2N GPP_TX2N
Y1 TXP5 C600 1 2 SCD1U16V2KX-3GP
PCIE_TXN3 33 MINICARD2
34 PCIE_RXP5 GPP_RX3P GPP_TX3P PCIE_TXP5 34
W6 Y2 TXN5 C601 1 2 SCD1U16V2KX-3GP
NEW CARD 34 PCIE_RXN5
U5
GPP_RX3N GPP_TX3N
Y4
PCIE_TXN5 34 NEW CARD
GPP_RX4P GPP_TX4P
U6 GPP_RX4N GPP_TX4N Y3
TPAD14-GP GPP_RX5P U8 V1 GPP_TX5P
TP21 GPP_RX5P GPP_TX5P TP16 TPAD14-GP
TPAD14-GP GPP_RX5N U7 V2 GPP_TX5N
TP20 GPP_RX5N GPP_TX5N TP17 TPAD14-GP
11 ALINK_NBRX_SBTX_P0 AA8 AD7 ALINK_NBTX_SBRX_P0 C642 1 2 SCD1U16V2KX-3GP

SB_RX0P SB_TX0P ALINK_NBTX_C_SBRX_P0 11
A 11 ALINK_NBRX_SBTX_N0 Y8 AE7 ALINK_NBTX_SBRX_N0 C640 1 2 SCD1U16V2KX-3GP <Core Design> A
SB_RX0N SB_TX0N ALINK_NBTX_C_SBRX_N0 11
11 ALINK_NBRX_SBTX_P1 AA7 AE6 ALINK_NBTX_SBRX_P1 C632 1 2 SCD1U16V2KX-3GP
SB_RX1P SB_TX1P ALINK_NBTX_C_SBRX_P1 11
Y7 AD6 ALINK_NBTX_SBRX_N1 C637 1 2 SCD1U16V2KX-3GP
A-LINK 11 ALINK_NBRX_SBTX_N1 SB_RX1N
PCIE I/F SB
SB_TX1N ALINK_NBTX_SBRX_P2 C627 SCD1U16V2KX-3GP
ALINK_NBTX_C_SBRX_N1 11
11
11
ALINK_NBRX_SBTX_P2
ALINK_NBRX_SBTX_N2
AA5
AA6
SB_RX2P
SB_RX2N
SB_TX2P
SB_TX2N
AB6
AC6 ALINK_NBTX_SBRX_N2 C629
1
1
2
2 SCD1U16V2KX-3GP
ALINK_NBTX_C_SBRX_P2
ALINK_NBTX_C_SBRX_N2
11
11
Wistron Corporation
W5 AD5 ALINK_NBTX_SBRX_P3 C624 1 2 SCD1U16V2KX-3GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
11 ALINK_NBRX_SBTX_P3 SB_RX3P SB_TX3P ALINK_NBTX_C_SBRX_P3 11
Y5 AE5 ALINK_NBTX_SBRX_N3 C625 1 2 SCD1U16V2KX-3GP Taipei Hsien 221, Taiwan, R.O.C.
11 ALINK_NBRX_SBTX_N3 SB_RX3N SB_TX3N ALINK_NBTX_C_SBRX_N3 11
AC8 PCE_PCAL 1 2 Title
PCE_CALRP
PCE_CALRN AB8 PCE_NCAL R315 1 2 1K27R2F-L-GP 1D1V_S0
ATi-RS780M_HT LINK&PCIe(1/3)
R16 2KR2F-3-GP
RS780M-GP-U2 A3
Place < 100mils from pin AC8 and AB8
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_S0
L3
STRAP_DEBUG_BUS_GPIO_ENABLEb
1 2 3D3V_S0_AVDD
220ohm 200mA Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC#)
8
7
6
5
C70
SBK160808T-221Y-N-GP
C71 DYSCD1U10V2KX-4GP RN14 *1 :Disable 0 : Enable
68.00119.111SC1U10V2KX-1GP SRN3K3J-1-GP
2
2ND = 68.00217.521 RS780: Enables Side port memory ( RS780 use HSYNC#)
R21 0R2J-2-GP
*1 :Disable 0 : Enable
1
2
3
4
1 DY 2 1D8V_S0 GMCH_VSYNC
6 LDT_RST#_CPU
R17 GMCH_HSYNC
D 11,26,33,36 1 2 SYSREST# 1 R41 2 1D8V_S0_AVDDDI D
PLT_RST1#
0R2J-2-GP 0R0603-PAD SUS_STAT#
1
C88 C89 Selects Loading of STRAPS From EEPROM
1
SC1U10V2KX-1GP SCD1U10V2KX-4GP
C37 68.00119.111 *10 :: Bypass the loading of EEPROM straps and use Hardware Default Values
2
2008/12/08 SC220P50V2KX-3GP 1D8V_S0 I2C Master can load strap values from EEPROM if connected,
R43 2ND = 68.00217.521
2
or use default values if not connected
1 2 ANB1C
1
2008/11/04 220ohmSBK160808T-221Y-N-GP
200mA C99 F12 A22 GMCH_TXAOUT0+ 19
AVDD1 TXOUT_L0P
1
Close to NB ball TC2 C80 SCD1U10V2KX-4GP E12 PART 3 OF 6 B22 GMCH_TXAOUT0- 19
SC1U10V2KX-1GP AVDD2 TXOUT_L0N
F14 A21 GMCH_TXAOUT1+ 19
2
AVDDDI TXOUT_L1P
ST100U6D3VBM-5GP
DY G15 B21 GMCH_TXAOUT1- 19
2
GMCH_BLUE 1D8V_S0_AVDDQ AVSSDI TXOUT_L1N
H15 AVDDQ TXOUT_L2P B20 GMCH_TXAOUT2+ 19
H14 AVSSQ TXOUT_L2N A20 GMCH_TXAOUT2- 19
GMCH_GREEN 77.C1071.081 A19
TXOUT_L3P
2ND = 77.21071.07L E17 C_Pr TXOUT_L3N B19
GMCH_RED F17 Y
F15 B18 GMCH_TXBOUT0+ 19
CRT/TVOUT
COMP_Pb TXOUT_U0P
1
R36 R37 R38 A18 GMCH_TXBOUT0- 19

TXOUT_U0N
20 GMCH_RED G18 RED TXOUT_U1P A17 GMCH_TXBOUT1+ 19
150R2F-1-GP
150R2F-1-GP
140R2F-GP
G17 REDb TXOUT_U1N B17 GMCH_TXBOUT1- 19

20 GMCH_GREEN E18 GREEN TXOUT_U2P D20 GMCH_TXBOUT2+ 19
F18 D21 GMCH_TXBOUT2- 19
2
1D8V_S0 GREENb TXOUT_U2N

20 GMCH_BLUE E19 BLUE TXOUT_U3P D18
F19 BLUEb TXOUT_U3N D19
20 GMCH_HSYNC A11 DAC_HSYNC TXCLK_LP B16 GMCH_TXACLK+ 19

2
20 GMCH_VSYNC B11 DAC_VSYNC TXCLK_LN A16 GMCH_TXACLK- 19

C 2008/11/06 R25 F8 D16 GMCH_TXBCLK+ 19
C
20 GMCH_DDCCLK DAC_SCL TXCLK_UP
DY 1KR2F-3-GP E8 D17 GMCH_TXBCLK- 19 1D8V_S0
20 GMCH_DDCDATA DAC_SDA TXCLK_UN
R14
L34
1 2 NB_LDT_STOP# 1D1V_S0 1 R33 2DAC_RSET G14
6 LDT_STP#_CPU L33
1
0R2J-2-GP SC1U10V2KX-1GP 715R2F-GP 2008/11/04 DAC_RSET 1D8V_S0_VDDLP18

VDDLTP18 A13 1 2
R24 1 2 1D1V_S0_PLLVDD A12 B13
PLLVDD VSSLTP18
1
6 ALLOW _LDTSTOP 1 2 NB_ALLOW _LDTSTOP 1D8V_S0_PLVDD18 D14 PLLVDD18 C648 SBK160808T-221Y-N-GP
1
1
0R2J-2-GP 220ohmSBK160808T-221Y-N-GP
200mA C643 B12 A15 C649 DY
PLLVSS VDDLT18_1
R69 BOM Option 2ND = 68.00217.521 C644 DY SCD1U10V2KX-4GP B15 SC1U10V2KX-1GP 68.00119.111
SCD1U10V2KX-4GP
2
VDDLT18_2
LVTM
68.00119.111 VDDA18HTPLL H17 A14 2ND
L35 = 68.00217.521
2
2 VDDA18HTPLL VDDLT33_1
PLL PWR
1D8V_S0 B14
L4 VDDLT33_2
D7 1D8V_S0_VDDLT18 1 2
VDDA18PCIEPLL VDDA18PCIEPLL1 PBY201209T-221Y-N-GP
1 2 E7 VDDA18PCIEPLL2 VSSLT1 C14
1
VSSLT2 D15 2ND = 68.00216.161
1
TC1 220ohm 200mA C78 SYSREST# D8 C16 C652 DY C653

SBK160808T-221Y-N-GP SYSRESET# VSSLT3
1
SC1U10V2KX-1GP
68.00119.111 DY C77 A10 C18 SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP

12,42 NB_PW RGD
2
POWERGOOD VSSLT4
ST100U6D3VBM-5GP
C82
2ND = 68.00217.521 DY NB_LDT_STOP# C10 C20
2
SC47U6D3V5MX-1-GP SCD1U10V2KX-4GP NB_ALLOW _LDTSTOP LDTSTOP# VSSLT5

11 NB_ALLOW _LDTSTOP C12 E20
2
ALLOW_LDTSTOP VSSLT6
VSSLT7 C22
CLOCKs PM
77.C1071.081 2008/11/10 3 CLK_NBHT_CLK C25 HT_REFCLKP
2ND = 77.21071.07L 3 CLK_NBHT_CLK# C24 HT_REFCLKN
1D1V_S0
RN11 E11
3 CLK_NB_14M REFCLK_P/OSCIN
1 4 NB_REFCLK_N F11 E9
ENABLE External CLK GEN 2 3
REFCLK_N LVDS_DIGON
F7 GMCH_BL_ON
GMCH_LCDVDD_ON 19
LVDS_BLON GMCH_BL_ON 36
68.00119.111 CLK_NB_GFX T2 G12 LVDS_ENA_BL
3 CLK_NB_GFX GFX_REFCLKP LVDS_ENA_BL TP26 TPAD14-GP
1D8V_S0 2ND = 68.00217.521 SRN1KJ-7-GP CLK_NB_GFX# T1 RN10
L5 3 CLK_NB_GFX# GFX_REFCLKN
2 3
1 2 VDDA18HTPLL CLK_NBGPP_CLK U1 1 4
B TPAD14-GP
TP180 GPP_REFCLKP B
220ohm 200mA CLK_NBGPP_CLK# U2
TPAD14-GP
TP181 GPP_REFCLKN
1
C97 SRN4K7J-8-GP
SBK160808T-221Y-N-GP
C86 DY SCD1U10V2KX-4GP
3 CLK_NB_GPPSB V4 GPPSB_REFCLKP
SC1U10V2KX-1GP V3 R31 1 DY 2 100KR2J-1-GP
3 CLK_NB_GPPSB#
2
GPPSB_REFCLKN
19 CLK_DDC_EDID B9 I2C_CLK
A9 D9
68.00119.111
19 DAT_DDC_EDID
B8
I2C_DATA MIS. TMDS_HPD
D10 NB_DVI_HPD HDMI_DETECT# 21
DDC_CLK0/AUX0P DDC_DATA0/AUX0N HPD TP24 TPAD14-GP
1D8V_S0 2ND = 68.00217.521 A8
L1 DDC_DATA0/AUX0N DDC_CLK0/AUX0P
21 GMCH_HDMI_CLK GMCH_HDMI_CLK B7 D12 SUS_STAT# 2 1 3D3V_S0
VDDA18PCIEPLL GMCH_HDMI_DATA DDC_CLK1/AUX1P SUS_STAT# R29 10KR2J-3-GP
1 2 21 GMCH_HDMI_DATA A7 DDC_DATA1/AUX1N
220ohm 200mA AE8 RS780_DXP3_1
THERMALDIODE_P TP23 TPAD14-GP
1
C42 STRP_DATA B10 AD8 RS780_DXN3_1

SBK160808T-221Y-N-GP STRP_DATA THERMALDIODE_N TP22 TPAD14-GP
C41 DY SCD1U10V2KX-4GP GPIO MODE
SC1U10V2KX-1GP G11 D13 TESTMODE_NB
2
RESERVED TESTMODE
STRP_DATA 0 *1
1
RS780_AUX_CAL C8 AUX_CAL R347
VCC_NB 1.1V 1.0V
1
1K8R2F-GP
R294 RS780M-GP-U2
150R2F-1-GP
2
2
3D3V_S0
1
A R19 <Core Design> A

DY 2K2R2J-2-GP
Wistron Corporation
2
STRP_DATA
Title
ATi-RS780M_LVDS&CRT_(2/3)
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
ANB1F
1D1V_S0
0.6A per ANT Rev1.1, Page3
A25 VSSAHT1 VSSAPCIE1 A2
L36 D23 PART 6/6 B1
+1.1V_RUN_VDDHT 1D1V_S0 VSSAHT2 VSSAPCIE2
1 2 ANB1E E22 VSSAHT3 VSSAPCIE3 D3
PBY201209T-221Y-N-GP C655 C91 C659 C94 300mil Width G22 D5
VSSAHT4 VSSAPCIE4
1
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
220 ohm @ 100MHz,2A J17 VDDHT_1 VDDPCIE_1 A6 G24 VSSAHT5 VSSAPCIE5 E4
2ND = 68.00216.161 DY DY K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6 G25 VSSAHT6 VSSAPCIE6 G1
1
L16 C6 C83 C49 C55 C68 C40 H19 G2
2
VDDHT_3 VDDPCIE_3 VSSAHT7 VSSAPCIE7
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
D M16 D6 DY DY SC4D7U6D3V3KX-GP J22 G4 D
SCD1U10V2KX-4GP
P16 E6 L17 H7
2
R16 VDDHT_6 VDDPCIE_6 F6 L22 VSSAHT10 VSSAPCIE10 J4
T16 VDDHT_7 VDDPCIE_7 G7 L24 VSSAHT11 VSSAPCIE11 R7
VDDPCIE_8 H8 L25 VSSAHT12 VSSAPCIE12 L1
H18 VDDHTRX_1 VDDPCIE_9 J9 M20 VSSAHT13 VSSAPCIE13 L2
1D1V_S0 0.45A per ANT Rev1.1, Page3 G19 K9 N22 L4
L40 VDDHTRX_2 VDDPCIE_10 VSSAHT14 VSSAPCIE14
F20 VDDHTRX_3 VDDPCIE_11 M9 P20 VSSAHT15 VSSAPCIE15 L7
1 2 +1.1V_RUN_VDDHTRX E21 L9 1103 R19 M6
PBY201209T-221Y-N-GP C677 C674 C106 C102 VDDHTRX_4 VDDPCIE_12 VSSAHT16 VSSAPCIE16
D22 VDDHTRX_5 VDDPCIE_13 P9 10A per ANT Rev1.1, Page3 R22 VSSAHT17 VSSAPCIE17 N4
1
1
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
220 ohm @ 100MHz,2A B23 VDDHTRX_6 VDDPCIE_14 R9 +NB_VCORE R24 VSSAHT18 VSSAPCIE18 P6
SCD1U10V2KX-4GP
2ND = 68.00216.161 DY DY A23 VDDHTRX_7 VDDPCIE_15 T9 Per check list (Rev 0.02) R25 VSSAHT19 VSSAPCIE19 R1
V9 H20 R2
2
2
VDDPCIE_16 1D1V_S0 VSSAHT20 VSSAPCIE20
AE25 VDDHTTX_1 VDDPCIE_17 U9 RS780M: 1V ~ 1.1V, check PWR team U22 VSSAHT21 VSSAPCIE21 R4
AD24 VDDHTTX_2 V19 VSSAHT22 VSSAPCIE22 V7
GROUND
AC23 VDDHTTX_3 VDDC_1 K12 W22 VSSAHT23 VSSAPCIE23 U4
1D2V_S0 AB22 J14 W24 V8
VDDHTTX_4 VDDC_2 VSSAHT24 VSSAPCIE24
1
AA21 U16 C52 C36 C74 C90 C60 C79 C46 C85 C76 W25 V6
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
L38 Y20 J11 DY DY DY Y21 W1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2 +1.2V_RUN_VDDHTTX W19 K15 AD25 W2
2
PBY201209T-221Y-N-GP C673 C111 C104 C95 C101 VDDHTTX_7 VDDC_5 VSSAHT27 VSSAPCIE27
V18 VDDHTTX_8 VDDC_6 M12 VSSAPCIE28 W4
1
1
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
POWER
220 ohm @ 100MHz,2A U17 VDDHTTX_9 VDDC_7 L14 L12 VSS11 VSSAPCIE29 W7
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2ND = 68.00216.161 DY DY T17 VDDHTTX_10 VDDC_8 L11 M14 VSS12 VSSAPCIE30 W8
R17 M13 N13 Y6
2
VDDHTTX_11 VDDC_9 VSS13 VSSAPCIE31

P17 VDDHTTX_12 VDDC_10 M15 P12 VSS14 VSSAPCIE32 AA4
M17 VDDHTTX_13 VDDC_11 N12 P15 VSS15 VSSAPCIE33 AB5
VDDC_12 N14 R11 VSS16 VSSAPCIE34 AB1
J10 VDDA18PCIE_1 VDDC_13 P11 R14 VSS17 VSSAPCIE35 AB7
1D8V_S0 P10 P13 T12 AC3
C VDDA18PCIE_2 VDDC_14 VSS18 VSSAPCIE36 C
K10 VDDA18PCIE_3 VDDC_15 P14 U14 VSS19 VSSAPCIE37 AC4
L2 80mil Width M10 R12 U11 AE1
+1.8V_RUN_VDDA18PCIE VDDA18PCIE_4 VDDC_16 VSS20 VSSAPCIE38
1 2 L10 VDDA18PCIE_5 VDDC_17 R15 U15 VSS21 VSSAPCIE39 AE4
PBY201209T-221Y-N-GP W9 T11 V12 AB2
VDDA18PCIE_6 VDDC_18 VSS22 VSSAPCIE40
1
220 ohm @ 100MHz,2A C63 C62 C53 C57 C61 C47 H9 T15 W11
VDDA18PCIE_7 VDDC_19 VSS23
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2ND = 68.00216.161 DY DY T10 VDDA18PCIE_8 VDDC_20 U12 W15 VSS24

R10 T14 AC12 AE14
2
VDDA18PCIE_9 VDDC_21 VSS25 VSS1

Y9 VDDA18PCIE_10 VDDC_22 J16 AA14 VSS26 VSS2 D11
AA9 VDDA18PCIE_11 Y18 VSS27 VSS3 G8
AB9 AE10 VDD_MEM 1 R316 2 AB11 E14
VDDA18PCIE_12 VDD_MEM1 0R0603-PAD VSS28 VSS4
AD9 VDDA18PCIE_13 VDD_MEM2 AA11 AB15 VSS29 VSS5 E15
AE9 VDDA18PCIE_14 VDD_MEM3 Y11 AB17 VSS30 VSS6 J15
1D8V_S0 U10 AD10 AB19 J12
VDDA18PCIE_15 VDD_MEM4 VSS31 VSS7
VDD_MEM5 AB10 AE20 VSS32 VSS8 K14
F9 AC10 3D3V_S0 AB21 M11
VDD18_1 VDD_MEM6 VSS33 VSS9
G9 VDD18_2 K11 VSS34 VSS10 L15
1
C59 1 R320 2 +1.8V_RUN_VDD18_MEM AE11 H11

VDD18_MEM1 VDD33_1
SC1U10V2KX-1GP
0R0603-PAD AD11 H12 +3.3V_RUN_VDD33 1 R30 2

VDD18_MEM2 VDD33_2 0R0603-PAD RS780M-GP-U2
2
C651
RS780M-GP-U2
1
SC1U10V2KX-1GP
C65
C66 DY SCD1U10V2KX-4GP
2
SCD1U10V2KX-4GP
2
B B
ANB1D
MEM_COMP_P and MEM_COMP_N trace
PAR 4 OF 6 width >=10mils and 10mils spacing from
AB12 MEM_A0 MEM_DQ0/DVO_VSYNC AA18
AE16 MEM_A1 MEM_DQ1/DVO_HSYNC AA20 other Signals in X,Y,Z directions
V11 MEM_A2 MEM_DQ2/DVO_DE AA19
AE15 MEM_A3 MEM_DQ3/DVO_D0 Y19
AA12 V17 1D8V_S0
MEM_A4 MEM_DQ4
AB16 MEM_A5 MEM_DQ5/DVO_D1 AA17
AB14 MEM_A6 MEM_DQ6/DVO_D2 AA15 1 R339 2
AD14 Y15 0R0402-PAD
MEM_A7 MEM_DQ7/DVO_D4
AD13 MEM_A8 MEM_DQ8/DVO_D3 AC20
AD15 MEM_A9 MEM_DQ9/DVO_D5 AD19
AC16 AE22
SBD_MEM/DVO_I/F
MEM_A10 MEM_DQ10/DVO_D6
AE13 MEM_A11 MEM_DQ11/DVO_D7 AC18
AC14 MEM_A12 MEM_DQ12 AB20
Y14 MEM_A13 MEM_DQ13/DVO_D9 AD22
AC22 +1.8V_IOPLLVDD18 1D1V_S0
MEM_DQ14/DVO_D10
AD16 MEM_BA0 MEM_DQ15/DVO_D11 AD21
AE17 MEM_BA1 1 R341 2
AD17 Y17 0R0402-PAD
MEM_BA2 MEM_DQS0P/DVO_IDCKP
MEM_DQS0N/DVO_IDCKN W18
W12 MEM_RAS# MEM_DQS1P AD20
Y12 MEM_CAS# MEM_DQS1N AE21
AD18 MEM_WE#
AB13 MEM_CS# MEM_DM0 W17
AB18 MEM_CKE MEM_DM1/DVO_D8 AE19
V14 MEM_ODT
A IOPLLVDD18 AE23 <Core Design> A
V15 AE24 +1.1V_IOPLLVDD
MEM_CKP IOPLLVDD
W14 MEM_CKN
AE12 MEM_COMPP
IOPLLVSS AD23
Wistron Corporation
AD12 AE18 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
MEM_COMPN MEM_VREF Taipei Hsien 221, Taiwan, R.O.C.
RS780M-GP-U2
Title
ATi-RS780M_Side Port&PWR&GND(3/3)
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
ASB1A
R146
33R2J-2-GP
1 2 NB_RST# N2
SB700 P4 PCI_CLK0_R
9,26,33,36 PLT_RST1# A_RST# PCICLK0 TP204 TPAD14-GP
Part 1 of 5 P3 PCI_CLK1_R TP203 TPAD14-GP
C774 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P0 PCICLK1 PCI_CLK2_R
PCI CLKS
8 ALINK_NBRX_SBTX_P0 1 2 V23 PCIE_TX0P PCICLK2 P1 1 2 PCI_CLK2 15
C777 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N0 V22 P2 PCI_CLK3_R R144 10R0402-PAD
2 PCI_CLK3 15
8 ALINK_NBRX_SBTX_N0 PCIE_TX0N PCICLK3
C779 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P1 V24 T4 PCI_CLK4_R R141 10R0402-PAD
2 CLK_PCI4 15
8 ALINK_NBRX_SBTX_P1 PCIE_TX1P PCICLK4
C787 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N1 V25 T3 PCI_CLK5_R R137 10R0402-PAD
2 CLK_PCI_LOM 15
8 ALINK_NBRX_SBTX_N1 PCIE_TX1N PCICLK5/GPIO41
C794 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P2 U25 R138 0R0402-PAD
8 ALINK_NBRX_SBTX_P2 PCIE_TX2P
EC42
EC41
EC39
EC40
C791 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N2 U24
8 ALINK_NBRX_SBTX_N2 PCIE_TX2N
C802 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P3 T23
8 ALINK_NBRX_SBTX_P3 PCIE_TX3P
C801 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N3 T22 N1 PCIRST#_SB TP138 TPAD14-GP
8 ALINK_NBRX_SBTX_N3 PCIE_TX3N PCIRST#
1
D D
U22
PCI EXPRESS INTERFACE

8 ALINK_NBTX_C_SBRX_P0 PCIE_RX0P
8 ALINK_NBTX_C_SBRX_N0 U21 U2
2
PCIE_RX0N AD0
8 ALINK_NBTX_C_SBRX_P1 U19 PCIE_RX1P AD1 P7 DY DY DY DY
8 ALINK_NBTX_C_SBRX_N1 V19 PCIE_RX1N AD2 V4
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
8 ALINK_NBTX_C_SBRX_P2 R20 PCIE_RX2P AD3 T1
8 ALINK_NBTX_C_SBRX_N2 R21 PCIE_RX2N AD4 V3
8 ALINK_NBTX_C_SBRX_P3 R18 PCIE_RX3P AD5 U1
8 ALINK_NBTX_C_SBRX_N3 R17 PCIE_RX3N AD6 V1
1D2V_S0 +1.2V_RUN_PCIE_PVDD PCIE_VDDR V2
R143 AD7
1 2 562R2F-GP PCIE_CALRP T25 PCIE_CALRP AD8 T2
R147 1 2 2K05R2F-GP PCIE_CALRN T24 W1
PCIE_CALRN AD9
L24 >15mil Width 43 mA AD10 T9
1 2 P24 PCIE_PVDD AD11 R6
PBY201209T-221Y-N-GP R7
AD12
1
220 ohm 2A C810 P25 R5

C811 PCIE_PVSS AD13
2ND = 68.00216.161 AD14 U8
SC1U10V2KX-1GP
SC1U10V2KX-1GP
Place R <100mils form pins T25,T24 U5

2
AD15
AD16 Y7
AD17 W8
AD18 V9
AD19 Y8
AD20 AA8
AD21 Y4
AD22 Y3
AD23 Y2 PCI_AD23 15
AD24 AA2 PCI_AD24 15
AD25 AB4 PCI_AD25 15
3 CLK_PCIE_SB N25 PCIE_RCLKP/NB_LNK_CLKP AD26 AA1 PCI_AD26 15
C N24 AB3 C
3D3V_S5 3 CLK_PCIE_SB# PCIE_RCLKN/NB_LNK_CLKN AD27 PCI_AD27 15
AD28 AB2 PCI_AD28 15
K23 NB_DISP_CLKP AD29 AC1 PCI_AD29 15
K22 NB_DISP_CLKN AD30 AC2 PCI_AD30 15
PCI INTERFACE
AD31 AD1
U16A
14
M24 NB_HT_CLKP CBE0# W2

M25 NB_HT_CLKN CBE1# U7
1 CBE2# AA7
3 PLT_RST1#_B 32,33,34,37,53 P17 CPU_HT_CLKP CBE3# Y1
9,26,33,36 PLT_RST1# 2 M18 CPU_HT_CLKN FRAME# AA6
DEVSEL# W5
TSLVC08APW -1-GP M23 AA5
7
SLT_GFX_CLKP IRDY#
M22 SLT_GFX_CLKN TRDY# Y5
73.07408.L16 PAR U6
2ND = 73.07408.L15 J19 GPP_CLK0P STOP# W6
3RD = 73.07408.02B J18 GPP_CLK0N PERR# W4
SERR# V7
L20 AC3 PCI_REQ#0 TP124 TPAD14-GP
GPP_CLK1P REQ0# PCI_REQ#1
L19 GPP_CLK1N REQ1# AD4 TP119 TPAD14-GP
AB7 PCI_REQ#2 TP198 TPAD14-GP
REQ2# PCI_REQ#3
M19 AE6 TP115 TPAD14-GP
For SB710 M20
GPP_CLK2P REQ3#/GPIO70
AB6 PCI_REQ#4
CLOCK GENERATOR
GPP_CLK2N REQ4#/GPIO71 TP197 TPAD14-GP
AD2 PCI_GNT#0 TP117 TPAD14-GP
GNT0# PCI_GNT#1
N22 AE4
DY P22
GPP_CLK3P
GPP_CLK3N
GNT1#
GNT2# AD5 PCI_GNT#2
TP121
TP118
TPAD14-GP
TPAD14-GP
1 DY 2 2008/11/06 R440 AC6 PCI_GNT#3 TP192 TPAD14-GP
R162 10MR2J-L-GP GNT3#/GPIO72
3 CLK_SB_25M 2 1CLK_SB_25M_1L18 25M_48M_66M_OSC GNT4#/GPIO73 AE5 PCI_GNT#4 TP120 TPAD14-GP
0R2J-2-GP AD6
CLKRUN# PM_CLKRUN# 36
2 1 32K_X1 V5 PCI_LOCK# TP201 TPAD14-GP
LOCK#
1
B C424 SC15P50V2JN-2-GP TP209 B
J21 25M_X1
TPAD14-GP AD3 INT_PIRQE# TP116 TPAD14-GP R126
INTE#/GPIO33 INT_PIRQF# 10KR2J-3-GP DY
INTF#/GPIO34 AC4 TP191 TPAD14-GP
AE2 INT_PIRQG# TP123 TPAD14-GP
INTG#/GPIO35
3
TP210 J20 AE3 INT_PIRQH# LPC_LAD[0..3]

TP122 TPAD14-GP LPC_LAD[0..3] 36,37
2
R164 TPAD14-GP 25M_X2 INTH#/GPIO36
X-32D768KHZ-38GPU X4 10MR2J-L-GP RN51
G22 LPCCLK0_R 1 4 SRN22-3-GP PCLK_FW H 15,37
LPCCLK0 LPCCLK1_R
E22 2 3 PCLK_KBC 15,36
2
LPCCLK1 EC48
A3 H24 LPC_LAD0 36,37 1 DY 2
2
X1 LAD0 EC47
LAD1 H23 LPC_LAD1 36,37 1 DY 2SC22P50V2JN-4GP
RTC XTAL
J25 SC22P50V2JN-4GP
LAD2 LPC_LAD2 36,37
82.30001.691 LAD3 J24 LPC_LAD3 36,37
LPC
2 2ND 1 = 82.30001.861 32K_X2 B3 X2 LFRAME# H25 LPC_LFRAME# 36,37

C433 H22 LDRQ0# ARTC1
LDRQ0# TP213 TPAD14-GP
SC15P50V2JN-2-GP AB8 LDRQ1#
LDRQ1#/GNT5#/GPIO68 TP193 TPAD14-GP
AD7 PCI_REQ#5 1
BMREQ#/REQ5#/GPIO65 PCI_REQ#5 12 PWR
SERIRQ V15 INT_SERIRQ 36 2 GND
NP1 NP1
1
2008/11/069 F23 RTC_AUX_S5 C409 NP2
NB_ALLOW _LDTSTOP ALLOW_LDTSTP RTC_CLK 15,35 NP2
SCD1U16V2ZY-2GP
6 PROCHOT#_SB F24 PROCHOT# RTCCLK C3 DY
6,52 CPU_PW RGD F22 C2 INTRUDER#
TP148 TPAD14-GP
2
LDT_PG INTRUDER_ALERT# RTC_AUX_S5_R BAT-CON2-1-GP-U
CPU
6 CPU_LDT_STOP# G25 LDT_STP# VBAT B2 1 2

RTC
6,52 CPU_LDT_RST# G24 R158 62.70001.011

LDT_RST# 1KR2J-1-GP
1
1
C407 C408
SC1U10V2KX-1GP
SCD1U16V2ZY-2GP
SB700-1-GP-U1 DY
2
2
A <Core Design> A
Wistron Corporation
Title
ATi-SB700_PCIE&PCI_(1/5)
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
9,42 NB_PW RGD 2 DY 1 NB_PW RGD_R ASB1D

R422 0R2J-2-GP
SB700 Part 4 of 5
1D8V_S0 E1 TP143 1ICH_PME# PCI_PME#/GEVENT4#
E2 TP142 1 RI# RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC C8 CLK48_USB
CLK48_USB 3
H7 TP211 1 S2# SLP_S2/GPM9#
F5 G8 USB_PCOMP 1 2
34,35,36,42,44,49,60 PM_SLP_S3# SLP_S3# USB_RCOMP R167
G1 1 DY 2CLK48_USB_R2 C432
1 DY2
USB MISC
NB_PW RGD 34,36,48 PM_SLP_S5# SLP_S5# 11K8R2F-GP R161
1 2 H2
ACPI / WAKE UP EVENTS

R419 300R2J-4-GP 36,52 PM_PW RBTN# PWR_BTN# 10KR2J-3-GP SC10P50V2JN-4GP
3D3V_S0 42 SB_PW RGD H1
PM_SUS_STAT# K3 PWR_GOOD 1%
D
TPAD14-GP
TP208
SB_TEST2 SUS_STAT# Place these close SB700 D
H5 TEST2 USB_FSD13P E6
SB_TEST1 H4 E7 Place R near pin14. Route it with 10mils
FP_ID SB_TEST0 TEST1 USB_FSD13N
1
R411
DY 2
10KR2J-3-GP
H3 TEST0 Trace width and 25mils spacing to any
36 KA20GATE Y15 F7
USB 1.1
GA20IN/GEVENT0# USB_FSD12P signals in X, Y, Z directions.
36 KBRCIN# W15 KBRST#/GEVENT1# USB_FSD12N E8
36 ECSCI#_1 K4 LPC_PME#/GEVENT3#
3D3V_S5 ECSMI#_KBC K24 H11 USBPP10 32
TPAD14-GP GEVENT5# LPC_SMI#/EXTEVNT1# USB_HSD11P
TP141 F1 S3_STATE/GEVENT5# USB_HSD11N J10 USBPN10 32
1 DY 2 SB_TEST2 TPAD14-GP SYS_RST# J2
TP139 SYS_RESET#/GPM7#
R445 2K2R2F-GP 26,34 PCIE_W AKE# H6 E11 USBPP8 19
SB_TEST1 EC_TMR WAKE#/GEVENT8# USB_HSD10P
1 DY 2 36 EC_TMR F2 BLINK/GPM6# USB_HSD10N F11 USBPN8 19 USB
R443 2K2R2F-GP SMB_ALERT# J6
SB_TEST0 3D3V_S0 NB_PW RGD_R SMBALERT#/THRMTRIP#/GEVENT2#
1 DY 2 W14 NB_PWRGD USB_HSD9P A11 USBPP4 33 Pair Device
R442 2K2R2F-GP B11
USB_HSD9N USBPN4 33
RSMRST#_KBC D3
36 RSMRST#_KBC RSMRST#
USB_HSD8P C10 USBPP3 25 11 CardReader
2
1 DY 2 ICH_PME# D10
USB_HSD8N USBPN3 25
R154 10KR2J-3-GP R410 10 WEBCAM
1 DY 2 PCIE_W AKE# 1KR2F-3-GP 38 FP_ID FP_ID AE18 G11
SATA_IS0#/GPIO10 USB_HSD7P USBPP1 25
R444 10KR2J-3-GP GPIO6 AD18 H12 9 MINIC2
TP190 CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USBPN1 25
1 DY 2 SMB_ALERT# TPAD14-GP GPIO4 AA19
TP194
1
R441 10KR2J-3-GP GPIO0/HDMI TPAD14-GP SMARTVOLT/SATA_IS2#/GPIO4
W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 USBPP2 25 8 USB4 OCP1#
2008/11/06 V17 CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N E14 USBPN2 25
RN97 W20 7 USB3
PM_SLP_S5# CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
8 1 28 ACZ_SPKR W21 SPKR/GPIO2 USB_HSD5P C12 USBPP5 24
USB 2.0
7 2 ECSCI#_1 SMBC0_SB AA18 D12 USBPN5 24 6 USB2
ECSW I# SMBD0_SB W18 SCL0/GPOC0# USB_HSD5N
6 3 SDA0/GPOC1#
5 4 PM_SLP_S3# SMB_CLK K1 B12 5 Bluetooth
C SMB_DATA SCL1/GPOC2# USB_HSD4P C
K2 SDA1/GPOC3# USB_HSD4N A12
GPIO
SRN10KJ-6-GP TPAD14-GP DDC1_SCL AA20 4 NC
TP196 DDC1_SCL/GPIO9
TPAD14-GP DDC1_SDA Y18 G12 USBPP6 38
TP199 DDC1_SDA/GPIO8 USB_HSD3P
TPAD14-GP SATA_DET# C1 G14 USBPN6 38 3 Fringer print
TP149 LLB#/GPIO66 USB_HSD3N
RN95 TPAD14-GP GPIO5 Y19
TP200 SHUTDOWN#/GPIO5
3D3V_S5 8 1 RSMRST#_KBC TPAD14-GP
TP218
GEVENT7# G5 DDR3_RST#/GEVENT7# USB_HSD2P H14 USBPP9 34 2 NEW1
7 2 USB_HSD2N H15 USBPN9 34
3D3V_S0 6 3 ECSMI#_KBC 1 MINIC1
5 4 PCI_REQ#5 PCI_REQ#5 11 USB_HSD1P A13 USBPP7 33
USB_HSD1N B13 USBPN7 33 0 USB1 OCP0#
SRN10KJ-6-GP
36 ECSW I# USB_HSD0P B14 USBPP0 25
B9 USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N A14 USBPN0 25
Close to SB700 TPAD14-GP USB_OC#5 B8 2008/11/05
TP151 USB_OC5#/IR_TX0/GPM5#
25 USB_OC#4 USB_OC#4 A8 A18
USB_OC4#/IR_RX0/GPM4# IMC_GPIO8
USB OC
RN49 34 CPPE# A9 B18
SRN33J-5-GP-U TPAD14-GP USB_OC#2 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
TP220 E5 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 F21
28 ACZ_BITCLK 1 4 TPAD14-GP USB_OC#1 F8 D21
TP150 USB_OC1#/GPM1# SCL2/IMC_GPIO11
31 ACZ_BTCLK_MDC 2 3 25 USB_OC#0 E4 USB_OC0#/GPM0# SDA2/IMC_GPIO12 F19
RN47 E20
ACZ_BIT_CLK SCL3_LV/IMC_GPIO13
31 ACZ_SDATAOUT_MDC 1 4 M1 AZ_BITCLK SDA3_LV/IMC_GPIO14 E21
28 ACZ_SDATAOUT 2 3 ACZ_SDATAOUT_R M2 E19
AZ_SDOUT IMC_PWM1/IMC_GPIO15
28 ACZ_SDATAIN0 J7 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 D19 SB_GPO16 15
31 ACZ_SDATAIN1 SRN33J-5-GP-U J8 E18 SB_GPO17 15
AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17
HD AUDIO
TPAD14-GP ACZ_SDIN2 L8
TP206 AZ_SDIN2/GPIO44
RN96 SRN33J-5-GP-U TPAD14-GP ACZ_SDIN3 M3 G20
TP205 AZ_SDIN3/GPIO46 IMC_GPIO18
ACZ_SYNC_R
28,31
28,31
ACZ_SYNC
ACZ_RST#
1
2
4
3
L6
ACZ_RST#_R M4 AZ_SYNC IMC_GPIO19 G21
D25
Strap Pin / define to use LPC or SPI ROM
TP207 GPM8# L5 AZ_RST# IMC_GPIO20
1 AZ_DOCK_RST#/GPM8# IMC_GPIO21 D24
INTEGRATED uC
B B
IMC_GPIO22 C25
2
EC45 EC44 EC43 EC80 EC82 C24

IMC_GPIO23
2
R151 ACZ_RST#_R 15 B25

IMC_GPIO24
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
10KR2J-3-GP
R439 R448 C23

IMC_GPIO25
10KR2J-3-GP
10KR2J-3-GP
DY TO STRAPS
1
DY DY B24
1
IMC_GPIO26
DY DY DY DY DY B23
1
IMC_GPIO27
IMC_GPIO28 A23
IMC_GPIO29 C22
IMC_GPIO30 A22
IMC_GPIO31 B22
IMC_GPIO32 B21
IMC_GPIO33 A21
TP212 1 IMC_GPIO0 H19 D20
3D3V_S0 TP214 IMC_GPIO1 IMC_GPIO0 IMC_GPIO34
1 H20 IMC_GPIO1 IMC_GPIO35 C20
INTEGRATED uC
3D3V_S5 3D3V_S0 R152 TP216 1 IMC_GPIO2 H21 A20
IDE_RST# SPI_CS2#/IMC_GPIO2 IMC_GPIO36
1 DY 2 F25 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 B20
NEWCARD /GLAN IMC_GPIO38 B19
10KR2J-3-GP TP221 1 IMC_GPIO4 D22 A19
IMC_GPIO4 IMC_GPIO39
5
6
7
8
TP147 1 IMC_GPIO5 E24 D18

RN53 TP145 IMC_GPIO6 IMC_GPIO5 IMC_GPIO40
1 E25 IMC_GPIO6 IMC_GPIO41 C18
TP222 1 IMC_GPIO7 D23
SRN4K7J-10-GP IMC_GPIO7
4
3
2
1
SB700-1-GP-U1
26,33,34 SMB_CLK
26,33,34 SMB_DATA
A 3,16,17 SMBC0_SB <Core Design> A
3,16,17 SMBD0_SB
2008/12/17
Wistron Corporation
1
C859 C857 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

SC100P50V2JN-3GP SC100P50V2JN-3GP Taipei Hsien 221, Taiwan, R.O.C.
2
Title
ATi-SB700_USB&GPIO_(2/5)
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
PLACE SATA AC DECOUPLING

CAPS CLOSE TO SB700
ASB1B
D C370 1 2SCD01U50V2KX-1GP SATA_TXP0_C AD9

SB700 AA24 D
22 SATA_TXP0 SATA_TX0P IDE_IORDY
22 SATA_TXN0 C371 1 2SCD01U50V2KX-1GP SATA_TXN0_C AE9 Part 2 of 5 AA25
SATA_TX0N IDE_IRQ
SATA HDD IDE_A0 Y22
22 SATA_RXN0 C687 1 2SCD01U50V2KX-1GP SATA_RXN0_C AB10 AB23
C686 1 SATA_RX0N IDE_A1
22 SATA_RXP0 2SCD01U50V2KX-1GP SATA_RXP0_C AC10
SATA_RX0P IDE_A2 Y23
IDE_DACK# AB24
23 SATA_TXP1 C369 1 2SCD01U50V2KX-1GP SATA_TXP1_C AE10 AD25
C368 1 SATA_TX1P IDE_DRQ
23 SATA_TXN1 2SCD01U50V2KX-1GP SATA_TXN1_C AD10
SATA_TX1N IDE_IOR# AC25
SATA ODD IDE_IOW# AC24
23 SATA_RXN1 C449 1 2SCD01U50V2KX-1GP SATA_RXN1_C AD11 Y25
C446 1 SATA_RX1N IDE_CS1#
23 SATA_RXP1 2SCD01U50V2KX-1GP SATA_RXP1_C AE11
SATA_RX1P IDE_CS3# Y24
AB12 SATA_TX2P IDE_D0/GPIO15 AD24

AC12 SATA_TX2N IDE_D1/GPIO16 AD23 2008/11/06
IDE_D2/GPIO17 AE22
ATA 66/100/133
AE12 SATA_RX2N IDE_D3/GPIO18 AC22
AD12 AD21 CLK_ID_0
SATA_RX2P IDE_D4/GPIO19 CLK_ID_1
IDE_D5/GPIO20 AE20
AD13 SATA_TX3P IDE_D6/GPIO21 AB20 Dummy CKG select
SERIAL ATA
AE13 SATA_TX3N IDE_D7/GPIO22 AD19
IDE_D8/GPIO23 AE19
AB14 SATA_RX3N IDE_D9/GPIO24 AC20
AC14 AD20 3D3V_S0
SATA_RX3P IDE_D10/GPIO25
IDE_D11/GPIO26 AE21
AE14 SATA_TX4P IDE_D12/GPIO27 AB22
AD14 SATA_TX4N IDE_D13/GPIO28 AD22
1
IDE_D14/GPIO29 AE23
R407 R412
AD15
AE15
SATA_RX4N IDE_D15/GPIO30 AC23
10KR2J-3-GP 10KR2J-3-GP
CLK_ID
SATA_RX4P
C
2008/12/11
RTM SEG (1,0) C
Very Close to SB700 AB16
2
SATA_TX5P
AC16 SATA_TX5N SB_SPI_MISO
CLK_ID_1
CLK_ID_0
ICS: 0,0
G6 TP217 TPAD14-GP
2 1 AE16 SATA_RX5N
SPI_DI/GPIO12
SPI_DO/GPIO11 D2 SPI_MOSI_R TP146 TPAD14-GP SEG: 0,1
R434 AD16 D1 ICH_SPICLK
SATA_RX5P SPI_CLK/GPIO47 TP144 TPAD14-GP RTM: 1,0
1
1
C373 1KR2F-3-GP F4 SB_SPI_HOLD TP215 TPAD14-GP
SPI_HOLD#/GPIO31
SPI ROM
XTAL-25MHZ-120-GP-U
SC15P50V2JN-2-GP X3 R127 1 2 SATA_CAL V12 F3 ICH_SPICS0# TP219 TPAD14-GP R416 R413
10MR2J-L-GP SATA_CAL SPI_CS#/GPIO32 10KR2J-3-GP 10KR2J-3-GP
82.30020.A31
2ND = 82.30020.851 SATA_X1 Y12 U15 LAN_RST# TP202 TPAD14-GP ICS+SEG ICS+RTM
2
SATA_X1 LAN_RST#/GPIO13 ROM_RST#

J1 TP140 TPAD14-GP
2
2
SATA_X2_R SATA_X2AA12 ROM_RST#/GPIO14
2 1 1 2 SATA_X2
R128 300R2J-4-GP M8
C367 FANOUT0/GPIO3
39 MEDIA_LED# W11 SATA_ACT#/GPIO67 FANOUT1/GPIO48 M5
SC15P50V2JN-2-GP M7
FANOUT2/GPIO49
93 mA
1D2V_S0 PLLVDD_SATA AA11 P5
PLLVDD_SATA FANIN0/GPIO50
SATA PWR
>15mil Width FANIN1/GPIO51 P8
1 R426 2 W12 XTLVDD_SATA FANIN2/GPIO52 R8
0R0603-PAD
1
C784 C785 C6
TEMP_COMM
SCD1U10V2KX-4GP
SC1U10V2KX-1GP DY B6
TEMPIN0/GPIO61
A6
2
TEMPIN1/GPIO62
TEMPIN2/GPIO63 A5
HW MONITOR
TEMPIN3/TALERT#/GPIO64 B5 ALERT# 35
A4 PSW _CLR#
VIN0/GPIO53
VIN1/GPIO54 B4
3D3V_S0 C4
B XTLVDD_SATA VIN2/GPIO55 B
VIN3/GPIO56 D4
>15mil Width VIN4/GPIO57 D5
1 R428 2 VIN5/GPIO58 D6
0R0603-PAD A7 PSW _CLR#
VIN6/GPIO59
1
C778 B7
VIN7/GPIO60
2
SC1U10V2KX-1GP
AVDD_HW M 3D3V_S5 G106
2
>15mil Width
AVDD F6 1 R163 2 GAP-OPEN
0R0603-PAD
1
G7 C418
AVSS
1
C423
SCD1U10V2KX-4GP
SC2D2U6D3V3KX-GP
DY
SB700-1-GP-U1
2
3D3V_S0
RN98
8 1 MEDIA_LED# Layout connect to Cap then GND
7 2 PSW _CLR#
6 3 ALERT#
5 4
SRN10KJ-6-GP
A <Core Design> A
Wistron Corporation
Title
ATi-SB700_SATA-IDE_(3/5)
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
ASB1C
ASB1E
131 mA SB700 510 mA 1D2V_S0
L9 VDDQ_1 VDD_1 L15 >100mil Width
M9 VDDQ_2 Part 3 of 5 VDD_2 M12 SB700 Part 5 of 5
3D3V_S0 T15 M14 A2
VDDQ_3 VDD_3 VSS_1
1
U9 N13 C806 C805 C815 C814 C386 A25
VDDQ_4 VDD_4 VSS_2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V3MX-GP
3D3V_S0
CORE S0
U16 VDDQ_5 VDD_5 P12 DY DY DY VSS_3 B1
U17
PCI/GPIO I/O
P14 D7
2
VDDQ_6 VDD_6 VSS_4
V8 VDDQ_7 VDD_7 R11 T10 AVSS_SATA_1 VSS_5 F20
W7 VDDQ_8 VDD_8 R15 U10 AVSS_SATA_2 VSS_6 G19
1
1
C435 C781 C800 C799 C807 C773 Y6 T16 U11 H8
VDDQ_9 VDD_9 AVSS_SATA_3 VSS_7
SC10U6D3V3MX-GP
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY DY AA4 VDDQ_10 U12 AVSS_SATA_4 VSS_8 K9
D AB5 V11 K11 D
2
2
VDDQ_11 AVSS_SATA_5 VSS_9
AB21 VDDQ_12 V14 AVSS_SATA_6 VSS_10 K16
W9 AVSS_SATA_7 VSS_11 L4
Y9 AVSS_SATA_8 VSS_12 L7
>50mil Width CKVDD 1D2V_S0 Y11 L10
AVSS_SATA_9 VSS_13
Y14 AVSS_SATA_10 VSS_14 L11
Y20 VDD33_18_1 CKVDD_1.2V_1 L21 1 R148 2 Y17 AVSS_SATA_11 VSS_15 L12
71 mA AA21 L22 0R0402-PAD AA9 L14
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_12 VSS_16
1
C403 C400 C402 C401
IDE/FLSH I/O
CLKGEN I/O
AA22 VDD33_18_3 CKVDD_1.2V_3 L24 AB9 AVSS_SATA_13 VSS_17 L16
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
AE25 VDD33_18_4 CKVDD_1.2V_4 L25 AB11 AVSS_SATA_14 VSS_18 M6
DY DY DY DY AB13 M10
2
1D2V_S0 AVSS_SATA_15 VSS_19
AB15 AVSS_SATA_16 VSS_20 M11
PCIE_VDDR AB17 M13
L25 600 mA AVSS_SATA_17 VSS_21
>100mil Width AC8 AVSS_SATA_18 VSS_22 M15
1 2 AD8 AVSS_SATA_19 VSS_23 N4
PBY201209T-221Y-N-GP AE8 N12
AVSS_SATA_20 VSS_24
1
1
220 ohm 2A C394 C809 C389 C395 C396 N14
POWER VSS_25
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2ND = 68.00216.161 DY DY VSS_26 P6
P9
2
2
3D3V_S5 VSS_27
VSS_28 P10
P18 32 mA >20mil Width A15 P11
PCIE_VDDR_1 AVSS_USB_1 VSS_29
P19 PCIE_VDDR_2 B15 AVSS_USB_2 VSS_30 P13
P20 PCIE_VDDR_3 C14 AVSS_USB_3 VSS_31 P15
1
A-LINK I/O
P21 A17 C404 C414 C419 C405 D8 R1
PCIE_VDDR_4 S5_3.3V_1 AVSS_USB_4 VSS_32
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
R22 PCIE_VDDR_5 S5_3.3V_2 A24 DY DY D9 AVSS_USB_5 VSS_33 R2
R24 B17 D11 R4
2
PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_6 VSS_34
R25 PCIE_VDDR_7 S5_3.3V_4 J4 D13 AVSS_USB_7 VSS_35 R9
3.3V_S5 I/O
GROUND
S5_3.3V_5 J5 D14 AVSS_USB_8 VSS_36 R10
S5_3.3V_6 L1 D15 AVSS_USB_9 VSS_37 R12
C L2 E15 R14 C
1D2V_S0 2ND AVDD_SATA S5_3.3V_7 AVSS_USB_10 VSS_38
= 68.00216.161 >50mil Width F12 AVSS_USB_11 VSS_39 T11
L23 567 mA F14 T12
AVSS_USB_12 VSS_40
1 2 AA14 AVDD_SATA_1 G9 AVSS_USB_13 VSS_41 T14
PBY201209T-221Y-N-GP AB18 113 mA 1D2V_S5 H9 U4
AVDD_SATA_4 AVSS_USB_14 VSS_42
1
C786 C770 C772 AA15 >30mil Width H17 U14

1
SATA I/O
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY EC81 C354 C366 AA17 AVDD_SATA_3 S5_1.2V_1 G2 J9 AVSS_USB_16 VSS_44 V6

SCD1U16V2ZY-2GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
CORE S5
DY DY AC18 G4 J11 Y21
2
AVDD_SATA_5 S5_1.2V_2 AVSS_USB_17 VSS_45
1
AD17 C427 C431 C422 C417 C434 J12 AB1
2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AE17 AVDD_SATA_7
197 mA DY DY SC10U6D3V3MX-GP J14 AVSS_USB_19 VSS_47 AB19
J15 AB25
2
AVSS_USB_20 VSS_48
USB_PHY_1.2V_1 A10 K10 AVSS_USB_21 VSS_49 AE1
USB_PHY_1.2V_2 B10 K12 AVSS_USB_22 VSS_50 AE24
K14 AVSS_USB_23
K15 AVSS_USB_24
PCIE_CK_VSS_9 P23
PCIE_CK_VSS_10 R16
5V_S0 R19
R406 PCIE_CK_VSS_11
Use Plane Shape for +3.3V_AVDD_USB >10mil Width PCIE_CK_VSS_12 T17
A16 AE7 V5_VREF 2 1 U18
AVDDTX_0 V5_VREF PCIE_CK_VSS_13
B16 AVDDTX_1 H18 PCIE_CK_VSS_1 PCIE_CK_VSS_14 U20
1
3D3V_S5 C16 J16 AVDDCK_3D3V C769 C766 1KR2J-1-GP J17 V18
AVDDTX_2 AVDDCK_3.3V 3D3V_S0 PCIE_CK_VSS_2 PCIE_CK_VSS_15
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
L27 658 mA D16 AVDDTX_3 DY D26 J22 PCIE_CK_VSS_3 PCIE_CK_VSS_16 V20
1 2 AVDD_USB D17 K17 AVDDK_1D2V 3D3V_S5 K25 V21
2
AVDDTX_4 AVDDCK_1.2V PCIE_CK_VSS_4 PCIE_CK_VSS_17
PLL
PBY201209T-221Y-N-GP >50mil Width E17 L28 K A M16 W19

AVDDTX_5 3D3V_AVDDC PCIE_CK_VSS_5 PCIE_CK_VSS_18
2ND = 68.00216.161 F15
USB I/O
AVDDRX_0 AVDDC E9 1 2 M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W22

F17 AVDDRX_1
17mA PBY201209T-221Y-N-GP
RB751V-40-2-GP M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W24
1
1
C428 C429 C416 C415 C420 C421 F18 C437 C436 2ND = 68.00216.161 P16 W25
AVDDRX_2 PCIE_CK_VSS_8 PCIE_CK_VSS_21
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
B DY DY DY G15 AVDDRX_3 DY 83.R2004.B8F B
G17 >15mil Width 2ND = 83.R0304.A8F F9 L17
2
2
AVDDRX_4 AVSSC AVSSCK
G18 AVDDRX_5 3RD = 83.R3004.A8F
SB700-1-GP-U1
SB700-1-GP-U1
47 mA 3D3V_S0
>15mil Width
AVDDCK_3D3V 2 L26 1
0R0603-PAD
1
C425 C426
SCD1U10V2KX-4GP SC1U10V2KX-1GP DY
2
2
62 mA 1D2V_S0
AVDDK_1D2V
>15mil Width L52 2
1
0R0603-PAD
1
1
C816 C817
SCD1U10V2KX-4GP DY SC1U10V2KX-1GP
A <Core Design> A
2
Wistron Corporation
Title
ATi-SB700_POWER&GND_(4/5)
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
REQUIRED STRAPS
REQUIRED SYSTEM STRAPS
D D
3D3V_S0 3D3V_S5
R145 R142 R136 R140 R153 R155 R160 R430 R171

1
1
DY DY DY DY DY DY DY DY DY
2
2
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
2K2R2F-GP
PCI_CLK2 11
PCI_CLK3 11
CLK_PCI4 11
CLK_PCI_LOM 11
PCLK_FW H 11,37
PCLK_KBC 11,36
RTC_CLK 11,35
C ACZ_RST#_R 12 C
SB_GPO17 12
1
2
R135 R139 R159 R429
2
1
1
RN52
1
2
RN46 SRN2K2J-1-GP
SRN10KJ-5-GP DY DY DY
RN50
SRN10KJ-5-GP
DEBUG STRAPS
2
4
3
3
4
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
SB_GPO16 12
4
3
1
TPAD14-GP
TP137 PCI_AD23 11
R166 TPAD14-GP
TP136 PCI_AD24 11
DY 2K2R2F-GP TPAD14-GP
TP195 PCI_AD25 11
TPAD14-GP
TP135 PCI_AD26 11
TPAD14-GP
TP134
2
PCI_AD27 11
TPAD14-GP
TP133 PCI_AD28 11
TPAD14-GP
TP130 PCI_AD29 11
TPAD14-GP
TP129 PCI_AD30 11
B
CLK_PCI_LOM PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD30 B
PCI_CLK2 PCI_CLK3 CLK_PCI4 PCLK_FWH PCLK_KBC RTCCLK AZ_RST# SB_GPO17 , SB_GPO16 PCI_AD29
ROM TYPE: USE USE PCI USE ACPI USE IDE USE DEFAULT
PULL WatchDOG USE CLKGEN INTERNAL ENABLE PCI PULL LONG PLL BCLK PLL PCIE STRAPS Reserved
HIGH (NB_PWRGD) DEBUG IMC ENABLED RTC ROM BOOT H, H = Reserved HIGH RESET
ENABLED STRAPS ENABLED
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
(Use Internal) DEFAULT H, L = SPI ROM DEFAULT Reserved
RESERVED
EXT. RTC DISABLE PCI USE BYPASS BYPASS BYPASS IDE USE EEPROM Reserved
PULL WatchDog IGNORE IMC CLKGEN (PD on X1, ROM BOOT L, H = LPC ROM PULL SHORT PCI PLL ACPI PLL PCIE STRAPS
LOW (NB_PWRGD) DEBUG DISABLED DISABLED apply LOW RESET BCLK
DISABLED STRAPS (Use External) 32KHz to DEFAULT L, L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)
Note: SB700 has 15K internal PU FOR PCI_AD[30:23]

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTCCLK
A <Core Design> A
Wistron Corporation
Title
ATi-SB700_STRAPPING_(5/5)
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
ADIMM2
5,18 MEM_MA_ADD0 102 108 MEM_MA_RAS# 5,18

A0 RAS#
5,18 MEM_MA_ADD1 101 A1 WE# 109 MEM_MA_WE# 5,18
5,18 MEM_MA_ADD2 100 113 MEM_MA_CAS# 5,18
A2 CAS#
5,18 MEM_MA_ADD3 99
A3
5,18 MEM_MA_ADD4 98 110 MEM_MA0_CS#0 5,18
A4 CS0#
5,18 MEM_MA_ADD5 97 115 MEM_MA0_CS#1 5,18
A5 CS1#
5,18 MEM_MA_ADD6 94 A6
5,18 MEM_MA_ADD7 92 A7 CKE0 79 MEM_MA_CKE0 5,18
5,18 MEM_MA_ADD8 93 80 MEM_MA_CKE1 5,18
A8 CKE1
5,18 MEM_MA_ADD9 91
A9
5,18 MEM_MA_ADD10 105 A10/AP CK0 30 MEM_MA_CLK0_P 5
5,18 MEM_MA_ADD11 90 A11 CK0# 32 MEM_MA_CLK0_N 5
5,18 MEM_MA_ADD12 89 A12
D 116 164 D
5,18 MEM_MA_ADD13 A13 CK1 MEM_MA_CLK1_P 5
5,18 MEM_MA_ADD14 86 A14 CK1# 166 MEM_MA_CLK1_N 5
5,18 MEM_MA_ADD15 84 A15
85 10 MEM_MA_DM0 5
A16/BA2 DM0
5,18 MEM_MA_BANK2 26 MEM_MA_DM1 5
DM1
5,18 MEM_MA_BANK0 107 BA0 DM2 52 MEM_MA_DM2 5
5,18 MEM_MA_BANK1 106 67 MEM_MA_DM3 5
BA1 DM3
DM4 130 MEM_MA_DM4 5
DM5 147 MEM_MA_DM5 5
5 MEM_MA_DATA0 5 170 MEM_MA_DM6 5
DQ0 DM6
5 MEM_MA_DATA1 7 DQ1 DM7 185 MEM_MA_DM7 5
5 MEM_MA_DATA2 17
DQ2
5 MEM_MA_DATA3 19 DQ3
5 MEM_MA_DATA4 4 195 SMBD0_SB 3,12,17
DQ4 SDA 3D3V_S0
5 MEM_MA_DATA5 6 197 SMBC0_SB 3,12,17
DQ5 SCL
5 MEM_MA_DATA6 14
DQ6
5 MEM_MA_DATA7 16 DQ7 VDDSPD 199
5 MEM_MA_DATA8 23
DQ8
1
25 198 C458 C456
5 MEM_MA_DATA9 DQ9 SA0
35 200 SC2D2U6D3V3KX-GP SCD1U10V2KX-4GP
5 MEM_MA_DATA10 DQ10 SA1
37 DY DY
2
5 MEM_MA_DATA11 DQ11
20 50
5
5
MEM_MA_DATA12
MEM_MA_DATA13 22
36
DQ12
DQ13
NC#50
NC#69 69
83
(A0)
5 MEM_MA_DATA14 DQ14 NC#83
5 MEM_MA_DATA15 38 120
DQ15 NC#120
5 MEM_MA_DATA16 43 DQ16 NC#163/TEST 163
45 1D8V_S3
55
NORMAL TYPE
5 MEM_MA_DATA19 57 DQ19 VDD 81
DQ21 VDD
DQ22 VDD
C
5 MEM_MA_DATA23 58 DQ23 VDD 95 PLACE CLOSE TO PROCESSOR C
5 MEM_MA_DATA24 61 96 WITHIN 1.5 INCH

DQ24 VDD
DQ25 VDD
75 111 MEM_MA_CLK0_P
5 MEM_MA_DATA27 DQ27 VDD
DQ28 VDD
1
64 117 C338
74 118 SC1D5P50V2CN-1GP
76
2
5 MEM_MA_DATA31 DQ31 MEM_MA_CLK0_N
DQ32 VSS
5 MEM_MA_DATA33 125 DQ33 VSS 8
135 9 MEM_MA_CLK1_P
5 MEM_MA_DATA34 DQ34 VSS
1
124 15 C331
126 18 SC1D5P50V2CN-1GP
134 21
2
136 24 MEM_MA_CLK1_N
DQ40 VSS
DQ41 VSS
DQ43 VSS
DQ44 VSS
DQ45 VSS
DQ46 VSS
DQ47 VSS
DQ48 VSS
DQ50 VSS
DQ51 VSS
DQ52 VSS
DQ53 VSS
174 65
DDR_VREF
B 5 MEM_MA_DATA55 176 DQ55 VSS 66 B
DQ57 VSS
DQ59 VSS
5 MEM_MA_DATA60 180 121
DQ60 VSS 1D8V_S3 VREF_DDR_MEM
5 MEM_MA_DATA61 182 122
DQ61 VSS
5 MEM_MA_DATA62 192 127
DQ62 VSS
5 MEM_MA_DATA63 194 128
DQ63 VSS
VSS 132
1
11 133 C844
5 MEM_MA_DQS0_N DQS0# VSS
29 138 SCD1U10V2KX-4GP
49 139 RN100
2
5 MEM_MA_DQS3_N 68 144 1 4
DQS3# VSS
5 MEM_MA_DQS4_N 129 DQS4# VSS 145 2 3
1
146 149 C834 C832
SCD1U10V2KX-4GP
167 150 SRN1KJ-7-GP
186 155 SC1KP50V2KX-1GP
2
156
VSS
5 MEM_MA_DQS0_P 13 161
DQS0 VSS
DQS1 VSS
5 MEM_MA_DQS2_P 51 DQS2 VSS 165
DQS3 VSS
131 171
5
5
MEM_MA_DQS4_P
MEM_MA_DQS5_P 148
DQS4
DQS5
VSS
VSS
172 LAYOUT: Locate close to DIMM
5 MEM_MA_DQS6_P 169 177
DQS6 VSS
5 MEM_MA_DQS7_P 188 DQS7 VSS 178
183
VSS
5,18 MEM_MA0_ODT0 114 184
OTD0 VSS
5,18 MEM_MA0_ODT1 119 187
OTD1 VSS
190
VSS
VREF_DDR_MEM 1 VREF VSS 193
A 2 196 A
VSS VSS
1
SCD1U10V2KX-4GP
C845 C847 202 201 <Core Design>

SC2D2U6D3V3KX-GP GND GND
2
MH1 MH1 MH2 MH2

Wistron Corporation
SKT-SODIMM20020U4GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
62.10017.661
Title
2ND = 62.10017.A41
Place C2.2uF and 0.1uF < DDR_SO-DIMM SKT_1
500mils from DDR connector LOW 5.2 mm Size Document Number Rev
Custom
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
ADIMM1
5,18 MEM_MB_ADD0 102 108 MEM_MB_RAS# 5,18

A0 RAS#
5,18 MEM_MB_ADD1 101 A1 WE# 109 MEM_MB_WE# 5,18
5,18 MEM_MB_ADD2 100 113 MEM_MB_CAS# 5,18
A2 CAS#
5,18 MEM_MB_ADD3 99
A3
5,18 MEM_MB_ADD4 98 110 MEM_MB0_CS#0 5,18
A4 CS0#
5,18 MEM_MB_ADD5 97 115 MEM_MB0_CS#1 5,18
A5 CS1#
5,18 MEM_MB_ADD6 94 A6
5,18 MEM_MB_ADD7 92 A7 CKE0 79 MEM_MB_CKE0 5,18
5,18 MEM_MB_ADD8 93 80 MEM_MB_CKE1 5,18
A8 CKE1
5,18 MEM_MB_ADD9 91
A9
5,18 MEM_MB_ADD10 105 A10/AP CK0 30 MEM_MB_CLK0_P 5
5,18 MEM_MB_ADD11 90 A11 CK0# 32 MEM_MB_CLK0_N 5
5,18 MEM_MB_ADD12 89 A12
D D
5,18 MEM_MB_ADD13 116 A13 CK1 164 MEM_MB_CLK1_P 5
5,18 MEM_MB_ADD14 86 A14 CK1# 166 MEM_MB_CLK1_N 5
5,18 MEM_MB_ADD15 84 A15
85 10 MEM_MB_DM0 5
A16/BA2 DM0
5,18 MEM_MB_BANK2 26 MEM_MB_DM1 5
DM1
5,18 MEM_MB_BANK0 107 BA0 DM2 52 MEM_MB_DM2 5
5,18 MEM_MB_BANK1 106 67 MEM_MB_DM3 5
BA1 DM3
DM4 130 MEM_MB_DM4 5
DM5 147 MEM_MB_DM5 5
5 MEM_MB_DATA0 5 170 MEM_MB_DM6 5
DQ0 DM6
5 MEM_MB_DATA1 7 DQ1 DM7 185 MEM_MB_DM7 5
5 MEM_MB_DATA2 17
DQ2
5 MEM_MB_DATA3 19 DQ3
5 MEM_MB_DATA4 4 195 SMBD0_SB 3,12,16
DQ4 SDA 3D3V_S0
5 MEM_MB_DATA5 6 197 SMBC0_SB 3,12,16
DQ5 SCL
5 MEM_MB_DATA6 14
DQ6
5 MEM_MB_DATA7 16 DQ7 VDDSPD 199
5 MEM_MB_DATA8 23
DQ8
1
25 198 DIMM2_SA1 1 2 C499
5 MEM_MB_DATA9 DQ9 SA0
35 200 R203 10KR2J-3-GP C507 DY DY SCD1U10V2KX-4GP
5 MEM_MB_DATA10 DQ10 SA1
37 SC2D2U6D3V3KX-GP
2
5 MEM_MB_DATA11 DQ11
20 50
5 MEM_MB_DATA12
5 MEM_MB_DATA13 22
36
DQ12
DQ13
NC#50
NC#69 69
83
(A2)
5 MEM_MB_DATA14 DQ14 NC#83
5 MEM_MB_DATA15 38 120
DQ15 NC#120
5 MEM_MB_DATA16 43 DQ16 NC#163/TEST 163
45 1D8V_S3
5 MEM_MB_DATA17 DQ17
5 MEM_MB_DATA18 55
DQ18
5 MEM_MB_DATA19 57 DQ19 VDD 81
5 MEM_MB_DATA20 44 DQ20 VDD 82 PLACE CLOSE TO PROCESSOR
5 MEM_MB_DATA21 46 87 WITHIN 1.5 INCH
DQ21 VDD
C DQ22 VDD C
5 MEM_MB_DATA23 58 DQ23 VDD 95
61 96 MEM_MB_CLK0_P
5 MEM_MB_DATA24 DQ24 VDD
DQ25 VDD
1
73 104 C348
75 111 SC1D5P50V2CN-1GP
62 112
2
64 117 MEM_MB_CLK0_N
DQ30 VDD MEM_MB_CLK1_P
5 MEM_MB_DATA31 76 DQ31
DQ32 VSS
1
125 8 C340
5 MEM_MB_DATA33 DQ33 VSS
135 9 SC1D5P50V2CN-1GP
5 MEM_MB_DATA34 DQ34 VSS
137 12
2
5 MEM_MB_DATA35 DQ35 VSS MEM_MB_CLK1_N
DQ36 VSS
DQ37 VSS
DQ38 VSS
DQ39 VSS
DQ40 VSS
DQ41 VSS
REVERSE TYPE
DQ42 VSS
DQ43 VSS
DQ44 VSS
DQ45 VSS
DQ46 VSS
DQ47 VSS
DQ48 VSS
5 MEM_MB_DATA49 159 DQ49 VSS 48
DQ50 VSS
DQ51 VSS
DQ52 VSS
DQ53 VSS
B DQ54 VSS B
DQ57 VSS
DQ59 VSS
5 MEM_MB_DATA60 180 121
DQ60 VSS
5 MEM_MB_DATA61 182 122
DQ61 VSS
5 MEM_MB_DATA62 192 127
DQ62 VSS
5 MEM_MB_DATA63 194 128
DQ63 VSS
VSS 132
5 MEM_MB_DQS0_N 11 DQS0# VSS 133
5 MEM_MB_DQS1_N 29 138
DQS1# VSS
5 MEM_MB_DQS3_N 68 144
DQS3# VSS
5 MEM_MB_DQS5_N 146 149
DQS5# VSS
5 MEM_MB_DQS6_N 167 150
DQS6# VSS
5 MEM_MB_DQS7_N 186 155
DQS7# VSS
156
VSS
5 MEM_MB_DQS0_P 13 161
DQS0 VSS
DQS1 VSS
5 MEM_MB_DQS2_P 51 DQS2 VSS 165
DQS3 VSS
5 MEM_MB_DQS5_P 148 172
DQS5 VSS
5 MEM_MB_DQS6_P 169 177
DQS6 VSS
183
VSS
5,18 MEM_MB0_ODT0 114 184
OTD0 VSS
5,18 MEM_MB0_ODT1 119 187
OTD1 VSS
190
VSS
VREF_DDR_MEM 1 VREF VSS 193
A A
2 196
VSS VSS
1
SCD1U10V2KX-4GP
<Core Design>
C854 C855 202 201
GND GND
2
SC2D2U6D3V3KX-GP MH1 MH1 MH2 MH2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DDR2-200P-22-GP-U3 Taipei Hsien 221, Taiwan, R.O.C.
62.10017.A61 Title
2ND = 62.10017.A51
Place C2.2uF and 0.1uF < DDR_SO-DIMM SKT_2
500mils from DDR connector HI 9.2mm Custom
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
Decoupling Capacitor
0D9V_S3
Put decap near power(0.9V) and pull-up resistor
1
C450 C451 C452 C470 C468 C469 C498 C497 C496 C515 C514 C516 C513
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
D DY DY D
PARALLEL TERMINATION
2
Put decap near power(0.9V) and pull-up resistor
0D9V_S3 0D9V_S3
RN63 RN55
1 8 MEM_MA0_ODT1 5,16 1 8 MEM_MB_ADD4 5,17
2 7 MEM_MA0_CS#1 5,16 2 7 MEM_MB_ADD11 5,17
3 6 MEM_MA_W E# 5,16 3 6 MEM_MB_ADD5 5,17
4 5 MEM_MA_CAS# 5,16 4 5 MEM_MB_ADD8 5,17
SRN47J-4-GP
RN66 2008/11/05
SRN47J-4-GP
RN58
Place these Caps near DM1
1 8 MEM_MA_ADD8 5,16 1 8 MEM_MB_ADD6 5,17
2 7 2 7 1D8V_S3
MEM_MA_ADD5 5,16 MEM_MB_ADD2 5,17
3 6 MEM_MA_CKE1 5,16 3 6 MEM_MB_ADD0 5,17
4 5 MEM_MA_ADD15 5,16 4 5 MEM_MB_BANK1 5,17
1
SRN47J-4-GP SRN47J-4-GP C482 C480 C838 C841 C886 C884 C484 Layout Note:
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN68 RN59 DY
Place one cap close to every 2 pullup
SCD1U16V2ZY-2GP
1 8 MEM_MA_ADD4 5,16 1 8 MEM_MB_RAS# 5,17
2
2 7 MEM_MA_ADD2 5,16 2 7 MEM_MB0_CS#0 5,17 resistors terminated to 0D9V_S3
3 6 MEM_MA_BANK1 5,16 3 6 MEM_MB0_ODT0 5,17
SRN47J-4-GP SRN47J-4-GP
C RN61 RN54 C
3 6 3 6
4 5
MEM_MA_BANK2 5,16
MEM_MA_CKE0 5,16 4 5
MEM_MB_BANK2 5,17
MEM_MB_CKE0 5,17 Place these Caps near DM2 1D8V_S3
RN62 RN60
1 8 MEM_MA_BANK0 5,16 1 8 MEM_MB_CKE1 5,17
1
3 6 3 6 C840 C481 C487 C839 C885 C887 C483 C888 Layout Note:
MEM_MA_ADD3 5,16 MEM_MB_ADD14 5,17
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
4 5 MEM_MA_ADD1 5,16 4 5 MEM_MB_ADD7 5,17 DY
Place one cap close to every 2 pullup
2
SRN47J-4-GP SRN47J-4-GP resistors terminated to 0D9V_S3
RN67 2008/11/05 RN56
1 8 MEM_MA_ADD14 5,16 1 8 MEM_MB_BANK0 5,17
RN69 RN57
1 8 MEM_MA0_CS#0 5,16 1 8 MEM_MB0_CS#1 5,17
2 7 MEM_MA_RAS# 5,16 2 7 MEM_MB0_ODT1 5,17
3 6 MEM_MA0_ODT0 5,16 3 6 MEM_MB_CAS# 5,17 1D8V_S3
4 5 MEM_MA_ADD13 5,16 4 5 MEM_MB_W E# 5,17 0D9V_S3 Place these Caps near PARALLEL TERMINATION
C488
1
B B
SCD1U16V2ZY-2GP
C523 C524 C525 C526 C527 C490 C491 C479
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY DY DY DY
2
Do not share the Term resistor between
the DDR addess and Control Signals.
1
C478 C440 C441 C442 C444 C443 C477 C489 C475
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY DY DY DY DY
2
A <Core Design> A
Wistron Corporation
Title
DDR_DAMPING & TERMINATION

A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
LCD/INVERTER/CCD CONN 54
54
54
54
LVDS_TXACLK-
LVDS_TXACLK+
LVDS_TXAOUT2-
LVDS_TXAOUT2+
LVDS_TXACLK-
LVDS_TXACLK+
LVDS_TXAOUT2-
LVDS_TXAOUT2+
1
2
3
4
RN23
8
7
6
5
LCD_TXACLK-
LCD_TXACLK+
LCD_TXAOUT2-
LCD_TXAOUT2+
LCDVDD DIS SRN0J-7-GP

SB 2008/12/11 RN22 Inverter Pin
2008/11/04 54 LVDS_TXAOUT0- LVDS_TXAOUT0- 1 8 LCD_TXAOUT0-
54 LVDS_TXAOUT0+ LVDS_TXAOUT0+ 2 7 LCD_TXAOUT0+ Pin Symbol
1
LCD1 C1 54 LVDS_TXAOUT1- LVDS_TXAOUT1- 3 6 LCD_TXAOUT1-
41 SC10U10V5ZY-1GP 54 LVDS_TXAOUT1+ LVDS_TXAOUT1+ 4 5 LCD_TXAOUT1+ 1 Vin
D 36 LCD_CB_SEL 40 1 D
2
DIS SRN0J-7-GP 2 Vin
39 2
SB 2008/12/11 38 3 RN25 3 Brightness
37 4 54 LVDS_TXBCLK- LVDS_TXBCLK- 1 8 LCD_TXBCLK-
36 5 LCD_TXBCLK+ 54 LVDS_TXBCLK+ LVDS_TXBCLK+ 2 7 LCD_TXBCLK+ 4 BLON
36 DBC_EN 35 6 LCD_TXBCLK- 54 LVDS_TXBOUT2- LVDS_TXBOUT2- 3 6 LCD_TXBOUT2-
3D3V_S0 34 7 LCD_TXBOUT2+ 54 LVDS_TXBOUT2+ LVDS_TXBOUT2+ 4 5 LCD_TXBOUT2+ 5 GND
LCD_EDID_CLK 33 8 LCD_TXBOUT2-
LCD_EDID_DAT 32 9 LCD_TXBOUT1+ DIS SRN0J-7-GP 6 GND
31 10 LCD_TXBOUT1-
30 11 LCD_TXBOUT0+ RN24
29 12 LCD_TXBOUT0- 54 LVDS_TXBOUT0- LVDS_TXBOUT0- 1 8 LCD_TXBOUT0-
BRIGHTNESS_CN 28 13 LCD_TXACLK+ 54 LVDS_TXBOUT0+ LVDS_TXBOUT0+ 2 7 LCD_TXBOUT0+ CCD Pin
BLON_OUT_1 27 14 LCD_TXACLK- 54 LVDS_TXBOUT1- LVDS_TXBOUT1- 3 6 LCD_TXBOUT1-
26 15 LCD_TXAOUT2+ 54 LVDS_TXBOUT1+ LVDS_TXBOUT1+ 4 5 LCD_TXBOUT1+ Pin Symbol
25 16 LCD_TXAOUT2-
2008/11/13 24 17 LCD_TXAOUT1+ SRN0J-7-GP 1 CCD_PWR
DCBATOUT 23 18 LCD_TXAOUT1- DIS
F1 22 19 LCD_TXAOUT0+ 2008/11/11 2 USB-
1 2 DCBATOUT_LCD1 21 20 LCD_TXAOUT0- 2008/10/29
42 RN17 3 USB+
1
POLYSW -1D1A24V-GP 9 GMCH_TXAOUT2+ GMCH_TXAOUT2+ 1 8 LCD_TXAOUT2+

69.50007.A31 C5 ACES-CONN40C-2-GP 9 GMCH_TXAOUT2- GMCH_TXAOUT2- 2 7 LCD_TXAOUT2- 4 GND
SC10U35V0ZY-GP
2ND = 69.50007.A41 20.F1230.040 9 GMCH_TXACLK+ GMCH_TXACLK+ 3 6 LCD_TXACLK+

2
2ND = 20.F1096.040 9 GMCH_TXACLK- GMCH_TXACLK- 4 5 LCD_TXACLK- 5 GND

UMA SRN0J-7-GP
C C
RN16
9 GMCH_TXAOUT1+ GMCH_TXAOUT1+ 1 8 LCD_TXAOUT1+
9 GMCH_TXAOUT1- GMCH_TXAOUT1- 2 7 LCD_TXAOUT1-
9 GMCH_TXAOUT0+ GMCH_TXAOUT0+ 3 6 LCD_TXAOUT0+
DY 9 GMCH_TXAOUT0- GMCH_TXAOUT0- 4 5 LCD_TXAOUT0-
USBPN8_R 1 2 EC56
SC22P50V2JN-4GP UMA SRN0J-7-GP
USBPP8_R 1 2 EC57
CCD 2008/10/29
DY SC22P50V2JN-4GP
9
9
GMCH_TXBOUT2+
GMCH_TXBOUT2-
GMCH_TXBOUT2+
GMCH_TXBOUT2-
1
2
RN19
8
7
LCD_TXBOUT2+
LCD_TXBOUT2-
9 GMCH_TXBCLK+ GMCH_TXBCLK+ 3 6 LCD_TXBCLK+
CCD1 9 GMCH_TXBCLK- GMCH_TXBCLK- 4 5 LCD_TXBCLK-
6
CCD_PW R 1 UMA SRN0J-7-GP
RN18
12 USBPN8 R253 1 2 USBPN8_R 2 9 GMCH_TXBOUT1+ GMCH_TXBOUT1+ 1 8 LCD_TXBOUT1+
12 USBPP8 R254 1 0R2J-2-GP
2 USBPP8_R 3 20.D0197.105 9 GMCH_TXBOUT1- GMCH_TXBOUT1- 2 7 LCD_TXBOUT1-
0R2J-2-GP 4 2ND = 20.F0984.005 9 GMCH_TXBOUT0+ GMCH_TXBOUT0+ 3 6 LCD_TXBOUT0+
5 9 GMCH_TXBOUT0- GMCH_TXBOUT0- 4 5 LCD_TXBOUT0-
7 F2
1 2 3D3V_S0 UMA SRN0J-7-GP
ACES-CON5-1GP-U
FUSE-1D1A6V-4GP-U
2008/11/10 69.50007.691
CCD_PW R 2ND = 69.50007.771 RN1
CCD_PW R 1 TP1 AFTE14P-GP BRIGHTNESS_CN 1 4 BRIGHTNESS 36
1
B USBPN8_R TP2 AFTE14P-GP C555 C554 BLON_OUT_1 B

1 2 3 BLON_OUT 36
SC4D7U10V5ZY-3GP
USBPP8_R 1 TP3 AFTE14P-GP DY SCD1U16V2ZY-2GP

SRN33J-5-GP-U
2
1
2008/11/07 C4 C3
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY DY R3
10KR2J-3-GP
2
3D3V_M92 3D3V_S0
2
3D3V_S0
4
3
4
3
RN111 RN2
UMA LCDVDD 2008/11/19 SRN4K7J-8-GP SRN4K7J-8-GP
9 GMCH_LCDVDD_ON 1 2
R2 0R2J-2-GP DY
U1
1
2
1
2
Layout 40 mil
54 LCDVDD_ON 1 5 LCD_EDID_CLK
EN IN#5 54 LCD_EDID_CLK
2 GND
3 4 LCD_EDID_DAT
R1 OUT IN#4 54 LCD_EDID_DAT
1
1
1
DY C6 C2 G5285T11U-GP C7 RN13 C856 C701 2008/12/17

SCD1U16V2ZY-2GP
SC4D7U16V5ZY-GP
DY SC4D7U16V5ZY-GP
74.05285.07F 9 CLK_DDC_EDID 2 3
2
2
100KR2J-1-GP 9 DAT_DDC_EDID 1 4 SC220P50V2KX-3GP
2
UMA SRN0J-10-GP-U SC220P50V2KX-3GP

2
A <Core Design> A
Wistron Corporation
Title
LCD CONN
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
UMA
RN21
8 1
9 GMCH_BLUE 7 2
9 GMCH_GREEN 6 3
9 GMCH_RED 5 4
SRN10J-5-GP
2008/12/8
Ferrite bead impedance: 10 ohm@100MHz
D CRT_R_1 2ND = 68.00119.081 1

L18
2
2008/12/8
CRT_R
3D3V_S0
Hsync & Vsync level shift D
68.00230.021 5V_S0
FCB1608CF-GP
L16
2008/12/8
1
CRT_G_1 2ND = 68.00119.081 1 2 CRT_G
4
3
68.00230.021 C700
RN37 DY SCD1U16V2ZY-2GP For System CRT
2
FCB1608CF-GP
L15 SRN2K2J-1-GP
2008/12/8
CRT_B_1 2ND = 68.00119.081 CRT_B U46A 2008/12/8
14
1 2
1
DIS 68.00230.021 DIS
1
2
1
1
RN114 EC32 EC30 EC27 C215 C203 C176 RN34 RN36
FCB1608CF-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
8 1 DY DY DY 2 3 HSYNC_1 2 3 CRT_HSYNC1_1 1 4 SRN22-3-GP
CRT_HSYNC1
R489 R488 R490 54,57 CRT_HSYNC CRT_VSYNC1
7 2 1 4 2 3
2
54 CRT_RED 150R2F-1-GP 54,57 CRT_VSYNC SRN0J-10-GP-U
54 CRT_GREEN 6 3
150R2F-1-GP U46B TSAHCT125PW -GP
14
5 4
7
54 CRT_BLUE
4
150R2F-1-GP 73.74125.L13
2
2
SRN0J-7-GP
VSYNC_1 5 6 CRT_VSYNC1_1
2008/12/10 UMA
2008/12/17 RN31
2 3 TSAHCT125PW -GP
7
9 GMCH_VSYNC
EC31 DY 9 GMCH_HSYNC 1 4 73.74125.L13
SRN0J-10-GP-U
2008/11/11
CRT_R 1 2
Layout Note:
C Place these resistors C
close to the CRT-out MLVG04023R0QV05-GP
connector EC29 DY
CRT_G 1 2
MLVG04023R0QV05-GP
Layout Note: DY
* Must be a ground return path between this ground and the ground on
EC28
DDC_CLK & DATA level shift
the VGA connector. CRT_B 1 5V_CRT_S0
2
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
MLVG04023R0QV05-GP
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
1
F3 5V_S0
FUSE-1D1A6V-4GP-U 3D3V_S0
2ND = 69.50007.771
1
2
69.50007.691 D25
3D3V_M92 CH551H-30PT-GP
3D3V_S0
83.R5003.C8F
CRT I/F & CONNECTOR
2
2008/11/11 500mA
5V_CRT_DDC 2nd = 83.R5003.H8H
2008/12/15 3RD = 83.5R003.08F
8
7
6
5
B B
4
3
4
3
DY RN35
CRT1 RN112 RN26 SRN10KJ-6-GP
16 SRN2K2J-1-GPSRN2K2J-1-GP
CRT_R 1 6
1
2
3
4
11 2008/11/27
1
2
1
2
CRT_IN#_R
CRT_G 2 7
DAT_DDC1_5 5V_CRT_S0
CRT_B
12 DIS RN33 U69
3 8
13 CRT_HSYNC1 2 3 DAT_DDC1_5_Q 4 3 DAT_DDC1 2R49 1DAT_DDC1_5
54 CRT_DDCDATA
4 9 1 4 0R2J-2-GP
54 CRT_DDCCLK
14 CRT_VSYNC1 SRN0J-10-GP-U 5 2
10 C722
CRT_IN#_R 5 15 CLK_DDC1_5 6 1
SCD01U16V2KX-3GP UMA
CRT_VSYNC1 17 RN20 2N7002EDW -GP
CRT_HSYNC1 2 3 CLK_DDC1_5_Q 84.27002.F3F
9 GMCH_DDCCLK
1
C150 VIDEO-15-42-GP-U 1 4
9 GMCH_DDCDATA
SA SRN0J-10-GP-U
SC18P50V2JN-1-GP
CLK_DDC1_5 20.20378.015 CLK_DDC1 2R50 1CLK_DDC1_5

2
C161 DAT_DDC1_5 2008/11/11 0R2J-2-GP

1
SC18P50V2JN-1-GP
C142 2ND = 20.20378.015

1
DY C148
2
SC100P50V2JN-3GP
DY SC100P50V2JN-3GP
2
R64
A <Core Design> A
2 1CRT_IN#_R
36 CRT_DEC#
470R2J-2-GP DY
EC24 Wistron Corporation
1
C129 DY 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

SC100P50V2JN-3GP Taipei Hsien 221, Taiwan, R.O.C.
2
1 2
Title
MLVG04023R0QV05-GP CRT Connector

JV50-PU SB
5 4 3 2 1
5 4 3 2 1
5V_S0
5V_S0
2008/12/11 SB
HDMI1
RN6
18 15 TDMS_A_CLK 3 2
+5V_POWER SCL TDMS_A_DAT
SDA 16 4 1
HDMI_TX0+ 7
HDMI_TX0- TMDS_DATA0+ HDMI_A_CEC TP14 TPAD14-GP SRN1K5J-GP
9 TMDS_DATA0- CEC 13 1
HDMI_TX1+ 4 17 DY 66.15236.04L
TMDS_DATA1+ DDC/CEC_GROUNG
1
D HDMI_TX1- 6 19 HDMI_A_HPD_CN EC66 DY D
HDMI_TX2+ TMDS_DATA1- HOT_PLUG_DETECT EC65
1 TMDS_DATA2+
SC220P50V2JN-3GP
HDMI_TX2- 3 14 EC64
2
TMDS_DATA2- RESERVED#14
SC220P50V2JN-3GP
MLVG04023R0QV05-GP
8 TMDS_DATA0_SHIELD
5 TMDS_DATA1_SHIELD DY
2 TMDS_DATA2_SHIELD
20
2
GND
11 TMDS_CLOCK_SHIELD GND 21
HDMI_TXC+ 10 22
HDMI_TXC- TMDS_CLOCK+ GND 3D3V_M92 3D3V_S0
12 TMDS_CLOCK- GND 23
SKT-HDMI19P-11GP-U1
62.10078.171 2008/04/03 SB 2008/12/18
4
3
4
3
2ND = 62.10078.121 2008/11/19
3RD = 62.10027.991 RN113 RN79
SRN1K5J-GP SRN1K5J-GP
DIS
66.15236.04L 66.15236.04L
1
2
1
2
UMA RN32
9 GMCH_HDMI_CLK 2 3 HDMI_A_CLK HDMI_A_CLK 54
9 GMCH_HDMI_DATA 1 4 HDMI_A_DAT HDMI_A_DAT 54
SRN0J-6-GP
3D3V_S0
3D3V_S0 2008/11/13
54 TMDS_A_TXC-
C 54 TMDS_A_TXC+ C
2
C32 C34 C28 C638 DY RN8
R281 4K7R2J-2-GP
4K7R2J-2-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
54 TMDS_A_TX0- TMDS_A_TX0-
54 TMDS_A_TX0+ 2 3 HDMI_TX0-
TMDS_A_TX0+ 1 4 HDMI_TX0+
1
SRN0J-10-GP-U
54 TMDS_A_TX1- RN9
54 TMDS_A_TX1+ DY
2
R282 2
TMDS_A_TX1- 2 3 HDMI_TX1-
TMDS_A_TX1+ 1 4 HDMI_TX1+
54 TMDS_A_TX2- SRN0J-10-GP-U
54 TMDS_A_TX2+ RN12
TMDS_A_TX2-
DY
DY DY 2 3 HDMI_TX2-
1
1
From VGA TMDS_A_TX2+ 1 4 HDMI_TX2+
SRN0J-10-GP-U
DY RN7
TMDS_A_TXC- 3 HDMI_TXC-
11
15
21
26
33
40
46
35
34
2
2
U35 TMDS_A_TXC+ 1 4 HDMI_TXC+
SRN0J-10-GP-U
NC#35
NC#34
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
2008/11/13
UMA HDMI_TXC-
8 HDMI_CLK- 2 3 38 IN_D1- OUT_D1- 23
8 HDMI_CLK+ 1 4 RN27 39 IN_D1+ OUT_D1+ 22 HDMI_TXC+
UMA SRN0J-10-GP-U
8 HDMI_DATA0- 2 3 41 20 HDMI_TX0-
IN_D2- OUT_D2- 3D3V_S0
8 HDMI_DATA0+ 1 4 RN28 42 IN_D2+ OUT_D2+ 19 HDMI_TX0+
UMA SRN0J-10-GP-U
IN_D3- OUT_D3-
UMA SRN0J-10-GP-U
IN_D4- OUT_D4-
2
B B
SRN0J-10-GP-U R492
From NB Recommended Equalization: [PC1,PC0]=01, 4dB 2K2R2F-GP
3D3V_S0 R301 2 4K7R2J-2-GP
1 PC0 3 8 HDMI_A_DAT
R302 2 4K7R2J-2-GP
1 PC1 4
PC0 SDA
9 HDMI_A_CLK DY
1
PC1 SCL HPD
DY HPD 7
REXT_HDMI 6
RT_EN#_8101 REXT HDMI_A_HPD_CN
R283 10 RT_EN# HPD_SINK 30
3D3V_S0 3D3V_S0 OE#_8101 25 29 TDMS_A_DAT
DDC_EN_PS8101 OE# SDA_SINK TDMS_A_CLK
3D3V_S0 2 1 32 DDC_EN SCL_SINK 28
U72
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
4K7R2J-2-GP 5V_S0
1
HDMI_A_CLK 2 1 DDC_OE
1A 1OE
2
R295 R288 HDMI_A_DAT 5 7

1
5
12
18
24
27
31
36
37
43
49 2A 2OE
20KR2F-L-GP R303 PS8101-GP
4K7R2J-2-GP 499R2F-2-GP 71.P8101.003 8
DY TDMS_A_CLK 3
VCC
2
TDMS_A_DAT 1B
6 4
1
OE#_8101 2B GND
RT_EN#_8101 TSCBTD3305CPW R-GP DY

73.03305.A0B
2008/11/07 2ND = 73.53305.A0B
2008/11/14 Q19
D
2N7002-7F-GP
<Core Design>
A UMA A
9 HDMI_DETECT# HDMI_DETECT# 1 2 HPD
HDMI_A_HPD_CN G R305 1KR2J-1-GP
54 HDMI_A_HPD 1 2 Wistron Corporation
DIS 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
S
R304 Taipei Hsien 221, Taiwan, R.O.C.

200KR2F-L-GP
84.27002.N31 2008/11/07
1
2ND = 84.27002.Y31 Title

R306
DY 200KR2F-L-GP HDMI Connector
JV50-PU SB
2
5 4 3 2 1
5 4 3 2 1
D D
SATA Connector
SATA1
23
NP1
1
2
3
4
5 5V_S0
6
7
8
9
K
1
1
10
C 11 TC22 DY C685 D23 C
12 SS24-GP
2
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
13
14 MP
A
15 83.2R004.08G
16 2ND = 83.2R004.J8M
17 3RD = 83.2R004.H8M
18 SATA_RXP0 13
19 SATA_RXN0 13
20
21 SATA_TXN0 13
22 SATA_TXP0 13
NP2
24
SKT-SATA22P-27-GP
62.10065.471
2ND = 62.10065.551
3RD = 62.10065.661
2008/12/17
SATA_TXP0
SATA_RXN0
SATA_RXP0
SATA_TXN0
MP
B B
3
DY DY DY DY
3
D21
BAV99PT-GP-U D22 D19 D24
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U
1
3D3V_S0 3D3V_S0
83.00099.K11 3D3V_S0 3D3V_S0
2ND = 83.00099.M11 83.00099.K11 83.00099.K11 83.00099.K11
2ND = 83.00099.M112ND = 83.00099.M11 2ND = 83.00099.M11
<Core Design>
A A
Wistron Corporation
Title
HDD
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
D
SATA ODD Connector D
2008/11/12
ODD1
13 SATA_RXP1 S6 B+ GND 9
13 SATA_RXN1 S5 B- GND 8
GND P6
GND P5
13 SATA_TXP1 S2 A+ GND S7
13 SATA_TXN1 S3 A- GND S4
GND S1
5V_S0
P3 P1 ODD_DP
+5V DP ODD_MD TP152 TPAD14-GP
P2 +5V MD P4
1
K
1
2008/11/14 DY SKT-SATA7P+6P-39-GP-U R165
C430 TC9 10KR2J-3-GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
D4 62.10065.541 DY
2
83.2R004.H8M SB
2
SSM24PT-GP
A
C C
2nd: 62.10065.481 BOM change to 62.10065.751

3nd: 62.10065.441
2008/12/17
SATA_RXP1
MP
SATA_RXN1
SATA_TXN1
SATA_TXP1
3
DY D5 DY DY DY
3
BAV99PT-GP-U D6 D8
BAV99PT-GP-U BAV99PT-GP-U D7
BAV99PT-GP-U
1
3D3V_S0 3D3V_S0
83.00099.K11 3D3V_S0 3D3V_S0
B
2ND = 83.00099.M11 83.00099.K11 83.00099.K11 B
2ND = 83.00099.M112ND = 83.00099.M11 83.00099.K11

2ND = 83.00099.M11
A A
<Core Design>
Wistron Corporation
Title
ODD
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
D
BLUETOOTH MODULE D
1.5A / High Active Voltage 2V
3D3V_S0
3D3V_BT_S0
U68 C920
SC4D7U10V5ZY-3GP
3D3V_BT_S0 1 5 1 DY 2
OUT IN
2 GND
3 NC#3 EN 4
1
EC98 DY BLUETOOTH_EN 36
SCD1U16V2ZY-2GP
G5240B1T1U-GP
2
74.05240.A7F
2ND = 74.09711.A7F R527
0R0402-PAD
2 1
EC21 put near
BLUE1 / all
USB put one
choke near
6
connector by
EMI request USB_5-
4 USBPN5 12
C 3 USB_5+ C
USBPP5 12
2
BT1 1 3D3V_BT_S0
ACES-CON4-1-GP-U2
20.D0197.104
2ND = 20.F0984.004
5
USB_5- 1 AFTE14P-GP TP235

2 1 USB_5+ 1 AFTE14P-GP TP236
3D3V_BT_S0 1 AFTE14P-GP TP237
R528
0R0402-PAD
B B
A A
Wistron Corporation
Title
BLUETOOTH
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
5V_USB1_S0
USB1
2008/11/06
USB1
6
R133 1 5V_USB1_S0
0R0402-PAD
2 1 USB_0- 2 5V_S5 5V_USB1_S0
12 USBPN0
2 1 USB_0+ 3 U54 100 mil
12 USBPP0
4
R134 5 1 8 TC29 TC24
GND VOUT
1
SE220U6D3VM-7GP
SE220U6D3VM-7GP
0R0402-PAD 2 7 EC79 EC83
VIN VOUT
SCD1U16V2ZY-2GP
SC1000P50V3JN-GP
SKT-1394-4P-27-GP-U 3 VIN VOUT 6 DY DY DY
D USB_PW R_EN# 4 5 D
2
EN# FLG# USB_OC#0 12
22.10218.T51
2ND = 22.10321.111 EC84 79.22710.6AL
1
3RD = 22.10218.W51 RT9715DGF-GP SCD1U16V2ZY-2GP 2ND = 77.92271.021
1
C836 DY 3RD = 79.22710.E0L
SC4D7U10V3KX-GP 2008/11/03
74.09715.079
2
79.22710.6AL
2
5V_USB1_S0
2ND = 74.00547.A79 2ND = 77.92271.021
3RD = 74.02065.079 3RD = 79.22710.E0L
USB2
2008/11/06
USB3
6
R156 1
0R0402-PAD
2 1 USB_2- 2
12 USBPN2
2 1 USB_2+ 3
12 USBPP2
4
R157 5
0R0402-PAD
SKT-1394-4P-27-GP-U
22.10218.T51
2ND = 22.10321.111
3RD = 22.10218.W51
5V_USB1_S0
U14
C C
1 4
USBPN0 2 3 USBPP0
DY AOZ8001J-GP-U1
83.08000.AAE
2008/11/04
USBCN1 2nd = 83.5V0U2.0A3
2008/11/07
2008/11/13 17
USB_OC#4 1 TP173 AFTE14P-GP
15 5V_USB1_S0
12 USB_OC#4
USBPN1 1 TP174 AFTE14P-GP 14
13 U17
12 USBPN1
USBPP1 1 TP176 AFTE14P-GP 12
12 USBPP1
11 1 4
USBPN3 1 TP175 AFTE14P-GP 10
12 USBPN3
12 USBPP3 9
USBPP3 1 TP177 AFTE14P-GP 8 USBPN2 2 3 USBPP2
7
USB_PW R_EN# 1 TP178 AFTE14P-GP 6
36 USB_PW R_EN#
5V_S5 TP179 AFTE14P-GP
5 DY AOZ8001J-GP-U1
1 4
5V_S5 3 83.08000.AAE
2
B B
SCD1U16V2ZY-2GP
SC1U16V3ZY-GP
2nd = 83.5V0U2.0A3
1
EC85 C837 1 1.U75 as close to the USB2 as possible

DY
2008/11/10 16 2.U76 as close to the USB1 as possible
2
ACES-CON15-8-GP-U
20.F1290.015
2ND = 20.F1035.015
3RD = 21.D0214.115
A A
Wistron Corporation
Title
USB
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
LAN_AVDD
1D2V_LAN_S5 3D3V_S5 3D3V_LAN_S5 3D3V_LAN_S5 3D3V_LAN_S5
1 R46 2 CO-Layout BCM5764 and BCM5784
1
0R0603-PAD
modify BOM :71.05784.003
1
1
C110 C103 C64 C93 R13
SC4D7U6D3V3MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
10KR2J-3-GP
56
61
15
19
38
52
68
U3 R44
6
U4
2
2
2008/10/28 1 2XTALVDD_G
DC#38
DC#52
DC#68
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
2
1D2V_LAN_S5 SO SI C33
1 SI SO 8
SCLK 2 7 SCD1U10V2KX-4GP
1
SCK GND FCM1608K-601T03GP
1
2D5V_1D2V_LAN AT45_RESET# 3 6 C100
RESET# VCC 3D3V_LAN_S5
BIASVDDH 36 BIASVDD_G CS# 4 CS# WP# 5 68.00217.241 SCD1U10V2KX-4GP
5
2ND = 68.00121.071
2
VDDC_IO
1
D 55 C35 D
VDDC_IO R20
SCD1U10V2KX-4GP
13 VDDC DY AT45DB011D-SH-T-GP
20 23 XTALVDD_G 72.45011.B01 1 2BIASVDD_G
2
VDDC XTALVDDH
1
C107 C54 C114 34 VDDC
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
60 C44
VDDC FCM1608K-601T03GP SCD1U10V2KX-4GP
2
68.00217.241
2
2ND = 68.00121.071
48 LAN_AVDD
AVDDH R27
42 LAN_AVDD
AVDDH
1 2LAN_AVDD
AVDDL_G 39 AVDDL FCM1608K-601T03GP C67
1
AVDDL_G 45 C48
AVDDL
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AVDDL_G 51 AVDDL
68.00217.241
2ND = 68.00121.071
2
3D3V_LAN_S0
3D3V_S0 49
TRD3_N MDI3- 27
TRD3_P 50 MDI3+ 27
1 R26 2 GPHY_PLLVDD 35 GPHY_PLLVDDL
0R0603-PAD 47 MDI2- 27 Place PLLVDD/AVDDL
C56 TRD2_N
TRD2_P 46 MDI2+ 27 CKT as close to chip as
1
SCD1U10V2KX-4GP possible
TRD1_N 43 MDI1- 27
44 MDI1+ 27
2
PCIE_PLLVDD TRD1_P 3D3V_AUX_S5

30 PCIE_PLLVDDL
27 PCIE_PLLVDDL TRD0_N 41 MDI0- 27
TRD0_P 40 MDI0+ 27
1
C C
R35
2 3D3V_LAN_S5 DY 10KR2J-3-GP
PCIE_SDSVDD LINKLED#
33 PCIE_VDDL SPD100LED# 1 10M/100M/1G_LED# 27
24 67
2
PCIE_VDDL SPD1000LED#
1
66 LAN_ACT_LED# 27 ENERGY_DET
C69 TRAFFICLED#
1
SCD1U10V2KX-4GP
2
8 GPIO2 R40
GPIO_2
1
TP59 TPAD14-GP C98 C113 C108 C72 C115 DY 10KR2J-3-GP
SC4D7U6D3V3MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
2
9 UART_MODE
UART_MODE GPIO1 TP61 TPAD14-GP 1D2V_LAN_S5
GPIO_1/SERIAL_DI 7
8 PCIE_RXP1 SCD1U16V2KX-3GP 1 2 C87 PCIE_RXDP 26 4 GPIO0 TP60 TPAD14-GP
PCIE_TXD_P GPIO_0/SERIAL_DO R18
8 PCIE_RXN1 SCD1U16V2KX-3GP 1 2 C96 PCIE_RXDN 25 TP183TPAD14-GP
PCIE_TXD_N
8 PCIE_TXP1 31 PCIE_RXD_P 1 2 AVDDL_G
8 PCIE_TXN1 32 PCIE_RXD_N
SCD1U10V2KX-4GP
R48 12,34 PCIE_W AKE# 12 C43
WAKE# FCM1608K-601T03GP
1
9,11,33,36 PLT_RST1# 1 2 LAN_RST 10 PERST#
0R2J-2-GP 3 CLK_PCIE_LAN 29 PCIE_REFCLK_P SCLK/EECLK 65 SCLK 68.00217.241C50
1
28 63 SI SC4D7U6D3V3MX-2GP
3 CLK_PCIE_LAN# 2ND = 68.00121.071
2
PCIE_REFCLK_N SI SO
DY SO/EEDATA 64 R23
C117 62 CS#
2
SC47P50V2JN-3GP CS#
1 2GPHY_PLLVDD
2D5V_1D2V_LAN
ENERGY_DET 36 FCM1608K-601T03GP
1
2
B ENERGY_DET 59 68.00217.241
C38 C45
B
R340 SC4D7U6D3V3MX-2GP
2ND = 68.00121.071
SCD1U10V2KX-4GP
4K7R2J-2-GP
1
VAUX_PRESENT54 C112 C116
1
VAUX_PRSNT
SCD1U10V2KX-4GP
36 LOW _PW R VMAINPRSNT 53 SCD1U10V2KX-4GP 1 R32 2PCIE_PLLVDD
LOW _PW R VMAIN_PRSNT 0R0603-PAD
3
2
LOW_PWR
1
2 R47
DY 1
0R2J-2-GP 2D5V_1D2V_LAN C75 C81
SCD1U10V2KX-4GP
R39 1 2 LAN_SMB_CLK 58 17 SC4D7U6D3V3MX-2GP
12,33,34 SMB_CLK
2
R34 1 0R2J-2-GP SMB_CLK VDDC_IO
12,33,34 SMB_DATA 2 LAN_SMB_DATA 57 SMB_DATA
0R2J-2-GP
LAN_XO_R 2 1LAN_X0
X1 3D3V_LAN_S5
R45 200R2J-L1-GP 22 18 1 R28 2PCIE_SDSVDD
XTALO REGOUT12_IO 0R0603-PAD
1 2 21 XTALI
1
LAN_XI
C92 C51
XTAL-25MHZ-120-GP-U C105
1
1
1 R22 2RDAC 37 2008/11/13 C109 SC4D7U6D3V3MX-2GP
2
RDAC
1
SC15P50V2JN-2-GP
SC4D7U6D3V3MX-2GP
82.30020.A31 C84
SC15P50V2JN-2-GP
R42 SCD1U10V2KX-4GP
2ND = 82.30020.851
2
1K24R2F-GP 1D5R3F-GP
2
2
REGCTL12 Q5
2008/11/13 REGCTL12 14
3
BCP69-GP
84.00069.B1B1
2ND = 84.DCP69.01B
2
3RD = 84.00069.A1B
A 1D2V_LAN_S5 A
LAN_CLKREQ# 11
3D3V_LAN_S0 CLKREQ#
Wistron Corporation
1
3D3V_LAN_S5 RN15 C58 1 C73 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SC10U10V5ZY-1GP
1 8 VMAINPRSNT 16 SCD1U10V2KX-4GP Taipei Hsien 221, Taiwan, R.O.C.

VAUX_PRESENT SUPER_IDDQ
2 7
GND
3 6 LAN_CLKREQ# Title
4 5
BCM5764MKMLG-GP BCM5764MKMLG
69
SRN1KJ-10-GP-U 71.05764.M01 Size Document Number Rev

2ND = 71.05784.003 A3
JV50-PU SB
5 4 3 2 1
A B C D E
LAN Connector
1.route on bottom as differential pairs.
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends. LAN_ACT_LED#
4.pairs must be equal lengths. 10M/100M/1G_LED#

5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
4 7.Must not cross ground moat,except 4
RJ-45 moat. DY DY
C11 C558
SC1KP50V2KX-1GP SC1KP50V2KX-1GP
GIGA Lan Transformer A2(+) A1(-)::GREEN

XF1 2008/11/11
A2(+) A3(-):ORANGE
26 MDI1+ 1 12 RJ45_3
2D5V_1D2V_LAN MCT2
DY 3 10
1 R15 2 XRF_TDC 26 MDI1- 2 11 RJ45_6

2008/11/130R2J-2-GP
26 MDI0+ 5 8 RJ45_1
2008/12/17 C31
LAN Connector
1
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
4 9 MCT1
C39
26 MDI0- 6 7 RJ45_2 2008/11/05
2
RJ45
9
XFORM-271-GP 26 10M/100M/1G_LED# A1
CONN_PW R A2
A3
68.HD081.301 RJ45_1 1
2ND = 68.68161.30A
3 RJ45_2 2 3
XF2 RJ45_3 3
26 MDI3+ 1 12 RJ45_7 RJ45_4 4
RJ45_5 5
3 10 MCT4 RJ45_6 6
RJ45_7 7
26 MDI3- 2 11 RJ45_8 RJ45_8 8
CONN_PW R2 B1
26 MDI2+ 5 8 RJ45_4
26 LAN_ACT_LED# B2
4 9 MCT3 10
2008/11/17
26 MDI2- 6 7 RJ45_5 RJ45-125-GP-U1
1
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
22.10277.021
C16 C14 2ND = 22.10277.231
XFORM-271-GP
2
B1(+) B2(-):YELLOW
68.HD081.301
2ND = 68.68161.30A
DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers
2 2
RN5
3D3V_LAN_S5 1 8 CONN_PW R2
2 7 CONN_PW R
3 6
4 5
2
SRN470J-3-GP EC11 EC60
1
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY DY
MCT1
MCT2
MCT3
MCT4
8
7
6
5
RN77
SRN75J-1-GP
1
2
3
4
MCT_R
1 1
2
C570
SC1KP2KV8KX-GP Wistron Corporation
1
Title
LAN CONN
A3
JV50-PU SB
A B C D E
5 4 3 2 1
3D3V_S0
1
C898
SC10U10V5ZY-1GP
D D
2
5VA_S0
"VAUX" Pull high to enable standby mode
1
C909
SC10U10V5ZY-1GP C912
3D3V_S0 SCD1U10V2KX-4GP
2
RN108 C901
1
KBC_BEEP_1 1 4 AUDIO_BEEP 1 2 AUDIP_PC_BEEP
2 3 C900 2208/12/09
SC1U10V3KX-3GP
C897
2
SRN47K-2-GP-U SC33P50V2JN-3GP
1
2 1
R515 C896 SCD1U10V2KX-4GP
1K91R2F-1-GP SC100P50V2JN-3GP
2
RESET# R516 1 2 ACZ_RST# 12,31
0R2J-2-GP ACZ_SYNC 12,31 R520
2
BCLK R514 1 2 ACZ_BITCLK 12 1 2 LINEOUT_JD# 30
36 KBC_BEEP 1 2 0R2J-2-GP 39K2R2F-L-GP
C SCD47U16V3ZY-3GP C893 1 2 C
C895 DY R519
12 ACZ_SPKR 1 2 SPKR_SB_1 SC22P50V2JN-4GP ALC268_SENSE 1 2 LINEIN_JD# 30
SCD47U16V3ZY-3GP C894 10KR2F-2-GP
C899
2DY R518
25
38
12
11
10
33
44
43
34
13
1
1
9
6
U64 1 2 MIC_JD# 30
SC22P50V2JN-4GP 20KR2F-L-GP
AVDD1
AVDD2
RESET#
DVDD_IO
AGPIO
DVDD
SYNC
CENTER
BEEP
BCLK
LFE
SENSE_B
SENSE_A
Sense resistors need close codec
30 LINE_IN_L SC4D7U10V3KX-GP 2 1 C907 ALC861_LINE_IN_L 23 5 ACZ_SDATAOUT 12

30 LINE_IN_R SC4D7U10V3KX-GP 2 LINE1_L SDATA_OUT
1 C911 ALC861_LINE_IN_R 24 LINE1_R SDATA_IN 8 AC97_DATIN 1 2 ACZ_SDATAIN0 12
14 R517 39R2J-L-GP
LINE2_L
15 LINE2_R
2208/12/18 48 AUD_SPDIF_OUT
SPDIFO1 ALC_EAPD AUD_SPDIF_OUT 30
2208/12/16
SRN75J-1-GP 29 LINE1_VREFO SPDIFI/EAPD 47 ALC_EAPD 29
31
30
30 INT_MIC
AUD_MICIN_L
4
3
2
5
6
7MIC1-L_PORT-B_1
SC4D7U10V3KX-GP 2 1 C905 MIC1-L_PORT-B 21
LINE2_VREFO
MIC1_L
ALC888S SIDESURR_L
SIDESURR_R
45
46
30 AUD_MICIN_R 1 8 MIC1-R_PORT-B_1
SC4D7U10V3KX-GP 2 1 C906 MIC1-R_PORT-B 22 MIC1_R
INT_MIC_2
SC1U16V3ZY-GP 1 2 C902 IMT_MIC1-L 16
GPIO0/DMIC_CLK/SPDIFO2
RN103 SC1U16V3ZY-GP C904 IMT_MIC1-R MIC2_L
1 2 17 MIC2_R SURR_L 39 FRONTL 29
SURR_R 41 FRONTR 29
GPIO1/DMIC_DATA
RN109 MIC1V_R 32
MIC1V_L MIC1_VREFO_R
1 8 28 MIC1_VREFO_L FRONT_L 35 SOUNDL 29
B MIC2-VREFO B
PIN37_VREFO
2 7 30 MIC2_VREFO FRONT_R 36 SOUNDR 29
3 6
4 5
CD_GND
2
C914 C916 C915

AVSS1
AVSS2
JDREF
DVSS
DVSS
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
CD_R
VREF
CD_L
SRN2K2J-2-GP
2008/11/11
1
ALC888S-VC2-GR-GP
26
42
4
7
27
40
37
2
3
18
20
19
71.00888.D0G
DMIC_CLK 1
TP225 TPAD14-GP
JDREF
MXM_SPDIF 1
TP223 TPAD14-GP
1 DMIC_DAT MONO-OUT
1
TPAD14-GP TP224 VREF TP234 TPAD14-GP
1
1
1
C919 C917 R521

DY SC10U10V5ZY-1GP SCD47U16V3ZY-3GP 20KR2F-L-GP
2
2
A A
Wistron Corporation
Title
Azalia codec ALC888
A3
JV50-PU SB
5 4 3 2 1
A B C D E
SB 2008/11/15
5V_S0 +5V_SPK_AMP
Close to U53.8 Close to U53.18 +5V_SPK_AMP
+5V_SPK_AMP
2 R532 1 +5V_SPK_AMP
0R0603-PAD
SC1U10V3KX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
1
1
C922
C923
C924
1
C928
C929
SCD1U10V2KX-4GP
60ohm 100MHz C930
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2
2
DY DY DY SC1U6D3V2KX-GP
3000mA 0.05ohm DC
2
1
1
C925
C926
C927
2
2
4 4
Close to Pin9
18
17
30
8
9
U70
R533
PVDD
PVDD
CPVDD
HPVDD
VDD
6K2R2F-GP
SPKR_L+ 6 2 AUD_LIN_R 2 1 AUD_LIN_R_1 1 2 C931 SC1U10V3KX-4GP
30 SPKR_L+ OUTL+ SPKR_INR SOUNDR 28
SPKR_L- 7 3 AUD_LIN_L 2 1 AUD_LIN_L_1 1 2 C932 SC1U10V3KX-4GP
30 SPKR_L- OUTL- SPKR_INL SOUNDL 28
SPKR_R- 19
30 SPKR_R- SPKR_R+ OUTR- R534 6K2R2F-GP
30 SPKR_R+ 20 OUTR+ 2008/12/17
R535 2 1 100KR2J-1-GP
DY +5V_SPK_AMP
SPKR_R+1 15 23 AUD_SPK_ENABLE# R537 2 1 0R2J-2-GP MAX9789A_SHDN#
30 SPKR_R+1 SPKR_L+1 HPR SPKR_EN# AMP_MUTE#_R R536 2
30 SPKR_L+1 16 HPL MUTE# 25 1 0R2J-2-GP
DY AMP_SHUTDOW N# 36
SB 2008/11/15 HP_EN 22 R538
4 AMP_REGEN 2 1 5V_S0
AUD_AMP_GAIN1 REGEN AMP_C1P C933 1
31 GAIN1 C1P 10 2 SC1U10V3KX-3GP
AUD_AMP_GAIN2 32 12 AMP_C1N 100KR2J-1-GP
SC1U25V3KX-1-GP 2K2R2J-2-GP GAIN2 C1N
VOUT 29 5VA_S0
C935 R541 24 AUD_BIAS
SC4D7U10V3KX-GP
BIAS
1 2 AUD_HP1_OUT_R1 1 2 AUD_HP1_OUT_R2 26 1 AUD_SET
SC1U10V3KX-3GP
28 FRONTR HP_INR SET
CPGND
1 2 AUD_HP1_OUT_L1 1 2 AUD_HP1_OUT_L2 27
CPVSS
28 FRONTL HP_INL
1
PGND
PGND
PVSS
R540
0R2J-2-GP
GND
GND
1
C936
C937
C934 R539
SC1U25V3KX-1-GP 2K2R2J-2-GP
MAX9789A-GP
21
5
28
33
11
13
14
2
74.09789.013
Signal inverter for speaker shutdown
2
3 3
+5V_SPK_AMP
C938
2 1AUD_CPVSS
1
SC1U10V3KX-3GP R542
100KR2J-1-GP
2
AUD_SPK_ENABLE#
AMP_SHUTDOW N# 36
D
U71
28 ALC_EAPD
AMP_MUTE#_R G
1
2N7002A-7-GP
1
D32
R543 BAW 56-3-GP
S
0R0402-PAD 83.00056.E11
DY
GAIN SETTING
3
R544
+5V_SPK_AMP
MAX9789A_SHDN# 1 2 3D3V_S0
10KR2J-3-GP
1
2 R545 R546 2
DY
DY
2
AUD_AMP_GAIN1 AUD_AMP_GAIN2
1
R547 R548
DY
2
GAIN1 GAIN2 GAIN

0 0 6dB
0 1 10dB
1 0 15.6dB
1 1 21.6dB
1 1
Wistron Corporation
Title
AUDIO AMP
JV50-PU SB
A B C D E
5 4 3 2 1
Internal Speaker LINE IN

29 SPKR_L- SPKR_L- LIN1
29 SPKR_L+ SPKR_L+
29 SPKR_R- SPKR_R- 2008/11/13 NP2
29 SPKR_R+ SPKR_R+ 2008/11/11 NP1
D RN107 28 LINEIN_JD# 5 D
4
METAL
2 3 LINE_IN_R_CONN 3
28 LINE_IN_R
28 LINE_IN_L 1 4 6
LINE_IN_L_CONN 2
SRN75J-2-GP-U 1
1
1
R512
R513
PHONE-JK329-GP
1
EC97 EC96 22.10133.G21
SB 2008/12/11
2008/10/29 DYDY
10KR2J-3-GP
10KR2J-3-GP
MLVG04023R0QV05-GP
MLVG04023R0QV05-GP
2
2
SPKR_R1
3
2
SPKR_R+ 1
SPKR_R-
DY DY
2
4
PTW O-CON2-3-GP
20.F1214.002
SPKR_L1 2ND = 20.F0825.002
3 3RD = 20.F1297.002
SPKR_L+
SPKR_L-
1
2 2008/12/17
MIC IN MICIN1
4 2008/12/16
C 2008/11/13 NP2 C
2008/11/11 NP1
1
EC1 EC2 EC67 EC68 PTW O-CON2-3-GP 28 MIC_JD# 5

DY DY DY DY 20.F1214.002 RN41 4
METAL
2ND = 20.F0825.002 2 3 AUD_MICIN_R_2 3
2
28 AUD_MICIN_R
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
3RD = 20.F1297.002 28 AUD_MICIN_L 1 4 6

SRN0J-10-GP-U AUD_MICIN_L_2 2
1
1
EC94 EC95
DY
1
1
R498
R500
PHONE-JK330-GP
MLVG04023R0QV05-GP
MLVG04023R0QV05-GP
22.10133.G31
DY
10KR2J-3-GP
10KR2J-3-GP
2
2
2
DYDY
AUD_SPDIF_OUT 1 AFTE14P-GP TP164
5V_SPDIF_S0 1 AFTE14P-GP TP158
LINEOUT_JD# 1 AFTE14P-GP TP154
LOUT_R+1 1 AFTE14P-GP TP163
LOUT_L+1 1 AFTE14P-GP TP155 SPKR_L- 1 AFTE14P-GP TP5
MIC_JD# 1 AFTE14P-GP TP168 SPKR_L+ 1 AFTE14P-GP TP6
AUD_MICIN_R_2 1 AFTE14P-GP TP166 SPKR_R- 1 AFTE14P-GP TP18
AUD_MICIN_L_2 1 AFTE14P-GP TP165 SPKR_R+ 1 AFTE14P-GP TP19
INT_MIC_1 1 AFTE14P-GP TP4 SB 2008/12/11

B LINEIN_JD#
LINE_IN_R_CONN 1
1 AFTE14P-GP
AFTE14P-GP
TP172
TP171
INT MIC B
AMIC1
LINE_IN_L_CONN 1 AFTE14P-GP TP170 3 ER1
1 INT_MIC_1 1 2
0R2J-2-GP INT_MIC 28
2
LINE OUT
1
4
DY
EC58
2
LOUT1 PTW O-CON2-3-GP SC47P50V2JN-3GP
U56 NP2 20.F1214.002
NP1 2ND = 20.F0825.002
TX 3RD = 20.F1297.002
LINEOUT_JD# 4 3 C
EN# NC#3 28 AUD_SPDIF_OUT
5V_SPDIF_S0
IC
GND 2 B
5V_SPDIF_S0
DRIVE
5V_S0 5 IN OUT 1 A LED
1
28 LINEOUT_JD# 5
1
C851 C853 RN102 4

G5240B2T1U-GP-U LOUT_L+1
SCD1U16V2ZY-2GP 2 3 3
METAL
2
29 SPKR_L+1
SCD1U16V2ZY-2GP 74.05240.B7F DY 1 4 LOUT_R+1 2
2
29 SPKR_R+1
DY 1
R4722ND = 74.09711.07F
2
1
2 1 DY SRN47J-7-GP 7
0R2J-2-GP 2008/11/20 6
SRN1KJ-7-GP DY2008/12/09 PHONE-JK332-GP
2008/12/17
RN101 22.10133.G51
A
Wistron Corporation A
3
4

Title
AUDIO JACK
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
D
MDC 1.5 CONN D
2
C539
MDC1 SC4D7U10V5ZY-3GP
1
12 ACZ_SDATAOUT_MDC ACZ_SDATAOUT_MDC 13 15
NP1 14
1 2 3D3V_S5
3 4
R437 0R2J-2-GP 5 6 3D3V_S5
12,28 ACZ_SYNC 1 2 ACZ_SYNC_A 7 8
12 ACZ_SDATAIN1 R245 1 33R2J-2-GP
2 ACZ_SDATAIN1_A 9 10 R244
R438 11 12 ACZ_BTCLK_MDC_1 1 2 ACZ_BTCLK_MDC 12
12,28 ACZ_RST# 1 2ACZ_RST#_MDC NP2 17 0R2J-2-GP
0R2J-2-GP 16 18
1
C540
1 11
1
TYCO-CONN12A-2-GP-U1
1
SC4D7U10V5ZY-3GP
20.F0917.012 R243 C541
13 16
100KR2J-1-GP
DY C534 2ND = 20.F0604.012 DUMMY-C2
1
SC22P50V2JN-4GP C536
14 17
2
SC100P50V2JN-3GP
2
15 18
2
2008/12/09 2 12
C C
B B
A A
Wistron Corporation
Title
MDC
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_D_S0
R487
SD_CLK/XD_D1/MS_CLK
SD_DAT0/XD_D6/MS_D0
SD_DAT7/XD_D2/MS_D2
SD_DAT6/XD_D7/MS_D3
1 2
SD_DAT4/XD_WP#
SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
SD_DAT1/XD_D4
SD_DAT5/XD_D0
0R3-0-U-GP
XD_D5/MS_BS
XD_D3/MS_D1
MS_INS#
XD_R/B#
XD_CD#
SD_CD#
XD_CE#
XD_CLE
D D
XD_ALE
CARD_3D3V_S0
SD_WP
2
C876
DY SC1U10V3KX-3GP
1
U58
19
20
21
23
25
26
27
28
29
31
34
35
37
38
39
40
41
42
43
RTS5159-GR-GP
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
SP17
SP18
SP19
2
C872
2
SC1U10V3KX-3GP C874
SCD1U16V2ZY-2GP 9 24
1
R493 CARD_3V3 MS_D5
22
1
VREG AV_PLL MS_D4
2 1 1 AV_PLL
0R2J-2-GP VREG 10
R491 VREG
NC#30 30
3D3V_S0 2 1 3V_VBUS_S0 8 7
0R3-0-U-GP 3V3_IN NC#7
NC#3 3
3D3V_D_S0 33 D3V3
2
C871 C875 -1 11 D3V3
1
SC4D7U6D3V5KX-3GP SCD1U16V2ZY-2GP DY C852
DY C873 SCD1U16V2ZY-2GP
1
SCD1U16V2ZY-2GP
2
MODE_SEL 45
LED1 SD_CMD MODE_SEL
36 SD_CMD GND 6
3D3V_S0 1 R484 2 VBUS_R ADY K VBUS_LED 14 GPIO0 GND 12
DY68R2F-GP R494 2 32
RREF GND
XTAL_CTR
LED-W -23-GP 1 2 RREF 44 46
C 6K19R2F-GP RST# GND C
EEDO
EECS
EESK
XTLO
RST# 1 2
EEDI
XTLI
3D3V_D_S0
DM
R480 0R3-0-U-GP
DP
71.05159.00G
5
4
13
47
48
17
16
15
18
1
MODE_SEL
DY
1
R474
1
100KR2J-1-GP R482 2 1 USB_10+
XDAL_CTR
R479 C864 12 USBPP10 R496 0R2J-2-GP
0R2J-2-GP
2
2 1RST# SC47P50V2JN-3GP 2 1 USB_10-
12M_XO
11,33,34,37,53 PLT_RST1#_B
2
12 USBPN10 R495 0R2J-2-GP
DY
2
1
0R3-0-U-GP C858
SC1U10V3KX-3GP
DY 2008/11/10 R485
2
3D3V_D_S0 2 1
0R2J-2-GP R486
3 CLK48_5158E 2 1 12M_XO
0R2J-2-GP
B B
5 IN1 CARD-READER (SD/MMC/MS/MS PRO/XD)

CARD_3D3V_S0
CARD1
CARD_3D3V_S0 23 25 SD_DAT0/XD_D6/MS_D0_1 R471 2 1 0R2J-2-GP SD_DAT0/XD_D6/MS_D0

SD_VCC SD_DAT0
1
C880 C881 14 29 SD_DAT1/XD_D4_1 R475 2 1 0R2J-2-GP SD_DAT1/XD_D4

SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP MS_VCC SD_DAT1 SD_DAT2/XD_RE#_1 R476
33 XD_VCC SD_DAT2 10 2 1 0R2J-2-GP SD_DAT2/XD_RE#
DY 11 SD_DAT3/XD_W E#_1 R473 2 1 0R2J-2-GP SD_DAT3/XD_W E#
2
SD_DAT3
SD_DAT5/XD_D0 0R2J-2-GP 1 2 R506 SD_DAT5/XD_D0_1 8 12 SD_CMD_1 R470 2 1 0R2J-2-GP SD_CMD
SD_CLK/XD_D1/MS_CLK XD_D0 SD_CMD SD_CLK/XD_D1/MS_CLK
9 XD_D1 SD_CLK 24
SD_DAT7/XD_D2/MS_D2_1 26 36 SD_CD#
XD_D3/MS_D1 0R2J-2-GP 1 XD_D2 SD_CD_SW
2 R502 XD_D3/MS_D1_1 27 XD_D3 SD_WP_SW 35 SD_W P
SD_DAT1/XD_D4_1 28
XD_D5/MS_BS_1 XD_D4
30 XD_D5
SD_DAT0/XD_D6/MS_D0_1 31 19 SD_DAT0/XD_D6/MS_D0_1
SD_DAT6/XD_D7/MS_D3_1 XD_D6 MS_DATA0 XD_D3/MS_D1_1
32 XD_D7 MS_DATA1 20
18 SD_DAT7/XD_D2/MS_D2_1 R501 2 1 0R2J-2-GP SD_DAT7/XD_D2/MS_D2
XD_R/B# MS_DATA2 SD_DAT6/XD_D7/MS_D3_1 R507 2
1 XD_R/B MS_DATA3 16 1 0R2J-2-GP SD_DAT6/XD_D7/MS_D3
SD_DAT2/XD_RE#_1 2
XD_CE# XD_RE XD_D5/MS_BS_1 R503 2
3 XD_CE MS_BS 21 1 0R2J-2-GP XD_D5/MS_BS
XD_CLE 4 17 MS_INS#
XD_ALE XD_CLE MS_INS SD_CLK/XD_D1/MS_CLK
5 XD_ALE MS_SCLK 15
SD_DAT3/XD_W E#_1 6
SD_DAT4/XD_W P# 0R2J-2-GP 1 XD_WE
A 2 R505 SD_DAT4/XD_W P#_1 7 XD_WP A
XD_CD# 34 13
XD_CD_SW 4IN1_GND
22
NP1 NP1
4IN1_GND
4IN1_GND 38 Wistron Corporation
SD_DAT0/XD_D6/MS_D0_1 1 2 NP2 37 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SD_DAT1/XD_D4_1 EC88 SCD1U25V2ZY-1GP NP2 4IN1_GND Taipei Hsien 221, Taiwan, R.O.C.
DY 1 2
SD_DAT2/XD_RE#_1 DY EC90 1 2 SCD1U25V2ZY-1GP
SD_DAT3/XD_W E#_1 DY EC92 1 2 SCD1U25V2ZY-1GP CARD-PUSH-36P-5-GP Title
SD_W P DY EC89 1 2 SCD1U25V2ZY-1GP 20.I0081.011
SD_CD# DY EC93 1 2 SCD1U25V2ZY-1GP 2ND = 20.I0079.011 CARDREADER- RTS5159
SD_CMD_1 DY EC91 1 2 SCD1U25V2ZY-1GP Size Document Number Rev
SD_CLK/XD_D1/MS_CLK DY EC86 1 2 SCD1U25V2ZY-1GP
DY EC87 SCD1U25V2ZY-1GP JV50-PU SB
5 4 3 2 1
A B C D E
Mini Card Connector(WLAN) Mini Card Connector(Robson2 and 3G) 3D3V_S0 3D3V_S5 3D3V_S0
3D3V_S5
2008/11/12 DY
2008/11/05 1D5V_S0 DY
1
DY
0R2J-2-GP
1
7.3/9.2mm
0R2J-2-GP
0R2J-2-GP R297 0R2J-2-GP
DY R296 R336
MINI1 R331
4 4
2
53
2
2008/11/12 NP1
2008/11/05 1 2 MINI3_PW R
MINI2_PW R
H=6.0/8.0mm 3D3V_MINI 3D3V_MINI
3 4
5 6
1D5V_S0 7 8
MINI2
9 10
2
53 3 CLK_PCIE_MINI2# 11 12
NP1 R250 13 14 C639 DY
3 CLK_PCIE_MINI2 SC100P50V2JN-3GP 10KR2J-3-GP
1 2 0R3-0-U-GP 15 16
1
DY 2008/11/07 1 DY 2
3 4 0R2J-2-GP
1 2E51_RxD_1 17 18 R312
2
36 E51_RxD R310
5 6 36 E51_TxD 1 2E51_TxD_1 19 20 W IRELESS2_EN 36
7 8 DY R307 0R2J-2-GP
DY 21 22 2 R300 1
C631 1 RXN3 0R0402-PAD PLT_RST1# 9,11,26,36
9 10 8 PCIE_RXN3 2 23 24
11 12 8 PCIE_RXP3 C628 1 SCD1U16V2KX-3GP
2 RXP3 25 26
3 CLK_PCIE_MINI1#
2
13 14 2208/12/09 SCD1U16V2KX-3GP 27 28 RN78
3 CLK_PCIE_MINI1 C552 SMB_CLK_MINI2
15 16 DY 29 30 1 DY 4 SMB_CLK 12,26,34
SC100P50V2JN-3GP 10KR2J-3-GP 8 PCIE_TXN3 31 32 SMB_DATA_MINI2 2 3 SMB_DATA 12,26,34
1
1 DY 2 8 PCIE_TXP3 33 34 SRN33J-5-GP-U
17 18 R252 35 36 USBPN4_1 1 DY 2
36 E51_RxD USBPN4 12
19 20 DY 37 38 USBPP4_1 R292 1 0R2J-2-GP
2
36 E51_TxD W IRELESS_EN 36 USBPP4 12
21 22 PLT_RST1#_MINI1 1 R251 2 3D3V_S0 1 R289 23D3V_S0_MIN1_1 39 40 R291 DY 0R2J-2-GP
C550 1 RXN2 0R2J-2-GP PLT_RST1#_B 11,32,34,37,53 0R2J-2-GP LED_W W AN2# TP15 TPAD14-GP
8 PCIE_RXN2 2 23 24 41 42 1
8 PCIE_RXP2 C549 1 2 SCD1U16V2KX-3GP
RXP2 25 26 3D3V_S5 1 2 43 44
SCD1U16V2KX-3GP RN72 SRN33J-5-GP-U R290DY0R2J-2-GP W LAN2_LED#_MC 41
27 28 45 46
29 30 SMB_CLK_MINI1 1 DY 4 47 48 2008/11/07
SMB_CLK 12,26,34
3
8 PCIE_TXN2 31 32 SMB_DATA_MINI1 2 3 49 50 3
SMB_DATA 12,26,34
8 PCIE_TXP2 33 34 5V_S5 1 2 5V_S5_MIN1 51 52
35 36 USBPN7_1 1 R248 2 R280 DY 0R2J-2-GP NP2
USBPN7 12
37 38 USBPP7_1 1 0R2J-2-GP
2 54
USBPP7 12
3D3V_MINI 39 40 R246 0R2J-2-GP
41 42 LED_W W AN# 1 TP169 TPAD14-GP SKT-MINI52P-20-GP
43 44 W LAN_LED#_MC 41
45 46 20.F1117.052
47 48
49 50 2ND = 62.10043.391
5V_S5 1R241 2 5V_S5_MIN2 51 52
0R2J-2-GP NP2
54 DY
SKT-MINI52P-13-GP
2ND = 20.F1049.052
3RD = 62.10043.511
2 2
R239 0R2J-2-GP
3D3V_S0 1 2 3D3V_MINI
R240 0R2J-2-GP
3D3V_S5 1 DY 2
Place near MINI2
3D3V_S0 1D5V_S0
3D3V_MINI
C521 C519 C522 C553 C530 C538

1
1
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
TC13
ST100U6D3VBM-8GP
2
DY Place near MINI1

2008/11/07
3D3V_S0 1D5V_S0
MINI2_PW R
1 1
C667 C658 C594 C630
1
1
SC1U10V3ZY-6GP
Wistron Corporation
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C618 TC20
SC10U10V5KX-2GP ST100U6D3VBM-8GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2
2
DY Taipei Hsien 221, Taiwan, R.O.C.
DY DY DY DY
2008/11/07
DY Title
MINI CARD
JV50-PU SB
A B C D E
5 4 3 2 1
NEWCARD Connector
NEW 2
DY
1 2
D D
CARDBUS2P-21-GP-U
21.H0182.001
2ND = 21.H0168.011
3RD = 21.H0183.001
NEW 1 3D3V_S5
NP2
26 12,36,48 PM_SLP_S5#
8 PCIE_TXP5 25
8 PCIE_TXN5 24
DY 23
C532 1 2 SCD1U16V2KX-3GP RXP5 2008/11/10
21
20
19
18
17
16
8 PCIE_RXP5 22
8 PCIE_RXN5 C531 1 2 SCD1U16V2KX-3GP RXN5 21 U26
DY 20
SHDN#
OC#
NC#16
GND
RCLKEN
AUXIN
3 CLK_PCIE_NEW 19
3D3V_NEW _S0 18
3 CLK_PCIE_NEW # CPPE#
12 CPPE# 17
NEW _PIN16 16 12,35,36,42,44,49,60 PM_SLP_S3# 1 15
STBY# AUXOUT 3D3V_NEW _LAN_S5
TP167 15 2 14
3D3V_S0 3_3VIN NC#14 1D5V_S0
14 3D3V_NEW _S0 3 3_3VOUT NC#13 13 1D5V_NEW _S0
3D3V_NEW _LAN_S5 TPS2231_PERST# 13 4 12
3D3V_S0 NC#4 1_5VIN 1D5V_S0
12 3D3V_NEW _S0 5 NC#5 1_5VOUT 11 1D5V_NEW _S0
1DY PCIE_W AKE#_NEW
SYSRST#
12,26 PCIE_W AKE# 2 11
CPUSB#
PERST#
R226 0R2J-2-GP 10 DY
CPPE#
1D5V_NEW _S0
RN64 9
GND
12,26,33 SMB_DATA 1 DY 4 SMB_DATA_NEW 8
C
12,26,33 SMB_CLK 2 3 SMB_CLK_NEW 7 C
SRN33J-5-GP-U CONN_TP1 6 W 83L351YG-GP
6
7
8
9
10
TP162 CONN_TP2 5 DY R242
DY TP161 CPUTSB# 4 11,32,33,37,53 PLT_RST1#_B 2 1 PLT_RST1#_NEW CARD
R210 1 2 0R2J-2-GP USBPP9_1 3 0R2J-2-GP 3D3V_S5
12 USBPP9 R207 1 2 0R2J-2-GP USBPN9_1 2 TPS2231_PERST# RN71
12 USBPN9 DY 2 1 CPUTSB# 2 3
1 DY DY CPPE# 1 DY 4
NP1 C533
SC100P50V2JN-3GP 74.83351.073 SRN100KJ-6-GP
CARDBUS26P-20GP-U 2208/12/09 2ND = 74.04156.07T
3RD = 74.02231.073
62.10081.131
2ND = 62.10081.151
3RD = 20.F1311.026
Place them Near to Chip Place them Near to Connector
3D3V_S0 3D3V_NEW _S0 1D5V_NEW _S0 3D3V_NEW _LAN_S5
C518
1
1
C543 C503
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP C520 C512
SCD1U16V2ZY-2GP
DY SC1U10V3ZY-6GP C510 SCD1U16V2ZY-2GP
2
2
SC1U10V3ZY-6GP
B B
DY DY DY DY
A
Wistron Corporation A

Title
NEW CARD
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
FAN1_VCC
5V_S0
*Layout* 15 mil
1
C669 C679 C670 FAN1_VCC 1 AFTE14P-GP TP57
SCD1U16V2ZY-2GP DY SC4D7U10V5ZY-3GP D20 DY SC2200P50V2KX-2GP
1
BAS16-1-GP R9 FAN1_FG1 1 AFTE14P-GP TP58
2
83.00016.B11 2008/12/8
10KR2J-3-GP
FAN1_VCC
2
D
2ND = 83.00016.K11 AFAN1
D
2
3RD = 83.00016.F11 2008/11/04
5
FAN1_FG1 3
2
1
4
1
C18 *Layout* 15 mil
SC1KP50V2KX-1GP
ACES-CON3-GP-U1
2
20.F0714.003
SA 2ND = 20.F1000.003
5V_S0
5V_S0 U2
*Layout* 30 mil
1 2 5V_G792_S0 6 1
R12 VCC FAN1
20 DVCC FG1 4
10R2J-2-GP C12 14 G792_32K
CLK
1
1
SC4D7U6D3V3MX-2GP C9 C10 16
SDA SMBD_Therm 36,54
DY SCD1U16V2ZY-2GP 7 18
DXP1 SCL SMBC_Therm 36,54
1
C24 9 19 3.System Sensor, Put Plamrest.

2
2
DXP2 NC#19
1
SC1U10V3ZY-6GP 11
R11 SCD1U16V2ZY-2GP DXP3 G792_DXP2
C
2
21KR2F-GP 5 G792_DXP3
C
13 ALERT# DGND
15 17 B Q23
ALERT# DGND
1
T8_HW _SHUT# 13 C17 C8 C551 B Q11 C702 MMBT3904-4-GP
2
THERM#
SC470P50V3JN-2GP
C V_DEGREE 3 8 MMBT3904-4-GP C
84.T3904.C11
E
THERM_SET SGND1 G792_DXN2 SC470P50V3JN-2GP
42 RUNPW ROK 2 10
84.T3904.C11
E
RESET# SGND2
1
T8=90 SGND3 12 G792_DXN3 SC2200P50V2KX-2GP 2ND = 84.03904.L06

R10 2ND = 84.03904.L06
GAP-CLOSE
GAP-CLOSE
49K9R2F-L-GP SC2200P50V2KX-2GP
2
G792SFUF-GP G1 G2
74.00792.A79 2.H/W Shutdown
2
1
3D3V_S5
DXP1:108 Degree H_THERMDA 6
DXP2:H/W Setting
1
Place near chip as close C20
U16B DXP3:88 Degree SC2200P50V2KX-2GP
14
as possible
R7
2
4 10R2J-2-GP H_THERMDC 6
12,34,36,42,44,49,60 PM_SLP_S3# 32KHZ G792_32K
6 1 2
11,15 RTC_CLK 5 1.For CPU Sensor
TSLVC08APW -1-GP
7
73.07408.L16
2ND = 73.07408.L15
32K 3RD = 73.07408.02B
suspend clock output BL3#
5V_AUX_S5 DCBATOUT 5V_AUX_S5
B
HW Thermal Throttling B
1
1
R308
1
C656 U43 DY 150R2J-L1-GP-U

SCD1U16V2ZY-2GP DY DY R330 5V_AUX_S5
5 1 HTH 1MR2F-GP HW thermal shut down tempature
2
2
VCC HTH
DY GND 2 2 setting 95 degree . Put Near SB.
4 3 LTH
RESET#/RESET LTH
1
C645
1
SCD01U16V2KX-3GP DY R309
T8_HW _SHUT# LOW 3_OFF G680LT1UF-GP R338 U38 DY 0R2J-2-GP
R321
2
DY 6K04R2F-GP
1 DY 2 SB_THSET 1 5 G709_VCC
2
18KR2F-GP SET VCC
2 GND DY
2
T8_HW _SHUT# 3 4 SB_TH_HYST

3D3V_AUX_S5 HTH OUT# HYST
2
1
G709T1UF-GP
R322 DY R337 R314
2
0R2J-2-GP 174KR2F-GP DY 0R2J-2-GP

3
D18 OUT#: Hi active / mount R1110

1
DY BAW 56-7-F-GP Low active / mount R1108

1
2
R311 D17 RSMRST# 6,36
10KR2J-3-GP BAT54-4-GP 3D3V_AUX_S5
DY U39
3
2
1 A VCC 5
36,52 S5_ENABLE 2 B
1
A C646 3 4 S5PW R_ENABLE 46 <Core Design>

A
SCD1U16V2ZY-2GP GND Y
DY
2
NC7S08M5X-NL-GP 3RD = 83.00016.F11

2ND = 83.00016.K11 Wistron Corporation
BAS16-1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
D16 Taipei Hsien 221, Taiwan, R.O.C.
83.00016.B11
1 2 1
R298 1KR2J-1-GP 2008/11/07 Title
3 KBC_THERMTRIP# 36
G792
2 Size Document Number Rev
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
3D3V_AUX_S5 3D3V_S0
FOR KBC DEBUG
1
3D3V_AUX_S5 3D3V_AUX_S5 C207 C194
5V_AUX_S5
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
EC36 VBAT VBAT 1 R394 2
KBC_XO_R 2
2
8
7
6
5
SCD1U16V2ZY-2GP 0R0603-PAD 3 2
1
C753 C751 C754 C750 C725 C139 C749 C730 TPAD14-GP

TP113
1
3D3V_S0 3D3V_S0
SC10U6D3V3MX-GP
SCD1U16V2ZY-2GP
SC1U16V3ZY-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY RN39 C733 X2 TPAD14-GP
TP114
SC10U6D3V3MX-GP
SRN4K7J-10-GP DY DY
2
DY 4 1
2
C259 C271
1
2
3
4
1
SC10U6D3V3MX-GP
SCD1U16V2ZY-2GP
BAT_SCL SMBC_Therm
1
BAT_SDA SMBD_Therm R87 2 R66 1 10KR2J-3-GP
X-32D768KHZ-38GPU U6B
30KR2F-GP
D DY DY D
82.30001.691
2
LPC_LAD[0..3]
11,37 LPC_LAD[0..3] 51 BAT_IN# 2ND = 82.30001.861
2
3D3V_AUX_S5 1 2 KBC_XI 77 53 KCOL0 1 TP39 AFTE14P-GP
R85 10MR2J-L-GP 32KX1/32KCLKIN KBSOUT0/JENK# KCOL1 TP27 AFTE14P-GP
KBSOUT1/TCK 52 1
102
115
KCOL2 TP40 AFTE14P-GP
80
19
46
76
88
KBSOUT2/TMS 51 1
1
9,11,26,33 PLT_RST1# 2 R95 1 U6A
KBSOUT3/TDI 50 KCOL3 1 TP28 AFTE14P-GP
0R0402-PAD R382 KBC_XO 79 49 KCOL4 1 TP41 AFTE14P-GP
GPIO41
VDD
AVCC
VCC
VCC
VCC
VCC
VCC
32KX2 KBSOUT4/JEN0#
1
100KR2F-L1-GP 30 48 KCOL5 1 TP29 AFTE14P-GP
29 AMP_SHUTDOW N# GPIO55/CLKOUT KBSOUT5/TDO
C232 47 KCOL6 1 TP42 AFTE14P-GP
TPAD14-GP KBC_CIR KBSOUT6/RDY# KCOL7 TP30 AFTE14P-GP
2208/12/09 SC100P50V2JN-3GP TP63 63 43 1
2
BAT_IN# GPIO14/TB1 KBSOUT7 KCOL8 TP43 AFTE14P-GP
124 GPIO10/LPCPD# VREF 104 12,52 PM_PW RBTN# 117 GPIO20/TA2 KBC KBSOUT8 42 1
PLT_RST1#_1 7 39 Volume_down# Volume_down# 31 41 KCOL9 1 TP31 AFTE14P-GP
LRESET# 1105 GPIO56/TA1 KBSOUT9 KCOL10 TP44 AFTE14P-GP
11,15 PCLK_KBC 2 LCLK A/D GPI90/AD0 97 AD_IA 50 28 KBC_BEEP 32 GPIO15/A_PWM KBSOUT10 40 1
3 98 TP_LOCK_BTN# 40 12 EC_TMR 118 39 KCOL11 1 TP32 AFTE14P-GP
11,37 LPC_LFRAME# LFRAME# GPI91/AD1 GPIO21/B_PWM KBSOUT11
2
126 99 W IRELESS_BTN# 40 19 BRIGHTNESS 62 38 KCOL12 1 TP45 AFTE14P-GP

11,37 LPC_LAD0 LAD0 GPI92/AD2 GPIO13/C_PWM KBSOUT12/GPIO64
R109 127 100 BT_BTN# 40 37 KCOL13 1 TP33 AFTE14P-GP
11,37 LPC_LAD1 LAD1 GPI93/AD3 KBSOUT13/GPIO63
0R2J-2-GPDY 128 108 36 KCOL14 1 TP46 AFTE14P-GP
11,37 LPC_LAD2 LAD2 GPIO05/AD4 1105 KBSOUT14/GPIO62
1 96 TP189 TPAD14-GP 35 KCOL15 1 TP25 AFTE14P-GP
C285
11,37 LPC_LAD3
125
LAD3 LPC GPIO04/AD5 FP_DETECT# 38
BECKUP# 13
KBSOUT15/GPIO61/XOR_OUT
34 KCOL16 1 TP47 AFTE14P-GP
11 INT_SERIRQ
1
SERIRQ 1105 40 BECKUP# GPIO12/PSDAT3 GPIO60/KBSOUT16

1 DY2PCLK_KBC_RC 11 PM_CLKRUN# 8 GPIO11/CLKRUN# 39 POW ER CONSUMPTION_LED# 12 GPIO25/PSCLK3 GPIO57/KBSOUT17 33 KCOL17 1 TP34 AFTE14P-GP
12 KBRCIN# 122 KBRST# 41 L-line_LED 11 GPIO27/PSDAT2
SC4D7P50V2CN-1GP 12 KA20GATE 121 101 39 POW ER CONSUMPTION# 10
ECSCI#_KBC 29 GA20 GPI94/DA0 PCB_VER0 KBC_THERMTRIP# 35 TPDATA GPIO26/PSCLK2 KROW 0 TP48 AFTE14P-GP
ECSCI#/GPIO54 GPI95/DA1 105 38 TPDATA 71 GPIO35/PSDAT1 KBSIN0 54 1
9 106 PCB_VER1 TPCLK 72 55 KROW 1 1 TP35 AFTE14P-GP
54 BLON_IN
ECSW I#_KBC123 GPIO65/SMI# D/A GPI96/DA2
107
38 TPCLK GPIO37/PSCLK1 PS/2 KBSIN1
56 KROW 2 1 TP49 AFTE14P-GP
GPIO67/PWUREQ# GPI97/DA3 CRT_DEC# 20 KBSIN2
57 KROW 3 1 TP36 AFTE14P-GP
KBSIN3 KROW 4 TP50 AFTE14P-GP
KBSIN4 58 1
37 SPIDI 86 59 KROW 5 1 TP37 AFTE14P-GP
C THER_SDA F_SDI KBSIN5 KROW 6 TP51 AFTE14P-GP C
THERMAL-----> 68 GPIO74/SDA2 GPIO01/TB2 64 PM_SLP_S3# 12,34,35,42,44,49,60 37 SPIDO 87 F_SDO KBSIN6 60 1
THER_SCL 67 95 90 61 KROW 7 1 TP52 AFTE14P-GP
69
GPIO73/SCL2 SMB GPIO03/AD6
93
KBC_PW RBTN# 40 37 SPICS#
92
F_CS0# FIU KBSIN7
50,51 BAT_SDA GPIO22/SDA1 GPIO06 AC_IN# 50 37 SPICLK F_SCK
BATTERY-----> 50,51 BAT_SCL 70 GPIO17/SCL1 GPIO07/AD7 94 LID_CLOSE# 40
119 SB_ID 85 ECRST#
GPIO23/SCL3 Volume_up# TP109 TPAD14-GP VCC_POR#
GPIO24 6 Volume_up# 39
GPIO30 109 W IRELESS2_EN 33
3D3V_S0 R112 81 120 MODEL_ID0
10KR2J-3-GP
39 NUM_LED GPIO66/G_PWM SP GPIO31/SDA3
65
GPIO32/D_PWM FRONT_PW RLED 41 W PC775L-0DG-GP-U
1 2 E51_RxD 66
DY GPIO33/H_PWM
16
STDBY_LED 41
CAP_LED 39 RN90
R111 GPIO40/F_PWM ECRST#
24 BLUETOOTH_EN 84 GPIO77/SPI_DI GPIO42/TCK 17 AD_OFF 51 3D3V_AUX_S5 5 4
10KR2J-3-GP 2008/12/11 DBC_EN 83 20 6 3 C731
19 DBC_EN GPIO76/SPI_DO/SHBM SPI GPIO43/TMS RSMRST#_KBC 12
1
SC1U10V3KX-3GP
1 2 E51_TxD 82 21 7 2 KA20GATE
DY 33 W IRELESS_EN
91
GPIO75/SPI_CLK GPIO GPIO44/TDI
22
PM_SLP_S5# 12,34,48
CHARGE_LED 41 3D3V_S0 8 1 KBRCIN#
41 W LAN_TEST_LED GPIO81 GPIO45/E_PWM Q7
23
2
E
GPIO46/TRST# MODEL_ID1 SRN10KJ-6-GP
GPIO47/SCL4 24
25 SPI_W P_R# TP86 TPAD14-GP 6,35 RSMRST# B
GPIO50/TDO
RN88 111 26 TP_LOCK_LED 41
E51_TxD 33 E51_TxD GPO83/SOUT_CR/BADDR1 GPIO51/TA3
1 4 113 27 BLON_OUT 19 1 DY 2 ECSCI#_KBC MMBT3906-4-GP
C
DBC_EN 33 E51_RxD CCD_ON 112 GPIO87/SIN_CR GPIO52/RDY# UMA_DISCRETE# R71 0R2J-2-GP
2 3 GPO84/BADDR0 GPIO53/SDA4 28 84.T3906.A11
TPAD14-GP TP110 73 LOW _PW R LOW _PW R 26 D2 2ND = 84.03906.F11
SRN4K7J-8-GP DC_BATFULL114 GPIO70 ENERGY_DET
41 DC_BATFULL GPIO16 GPIO71 74 ENERGY_DET 26
LCD_CB_SEL 14 75 BT_LED 41 2008/11/13 6 1
19 LCD_CB_SEL GPIO34 GPIO72 12 ECSCI#_1
35,52 S5_ENABLE 15 GPIO36/TB3 GPO82/TRIS# 110 USB_PW R_EN# 25
RN89
GPIO34 and GPIO46 swap
SER/IR 5 2 3D3V_S5 8 1 LOW _PW R
3D3V_AUX_S5 7 2KBC_THERMTRIP#
VCORF 44 3D3V_S5 6 3 ENERGY_DET
B VCORF SPI_W P_R# 2 R76 ECSW I#_KBC S5_ENABLE B
1 SPI_W P# 37 12 ECSW I# 4 3 5 4
1
0R0402-PAD
AGND
C146
GND
GND
GND
GND
GND
GND
SCD1U16V2ZY-2GP UMA CH731UPT-GP SRN10KJ-6-GP

2
2008/11/04 BLON_IN 1 2 83.R0304.A8H 2ND = 83.R2002.B8E

KB1 GMCH_BL_ON 9
R384 0R2J-2-GP 3RD = 83.R3004.A8E
103
5
18
45
78
89
116
27 W PC775L-0DG-GP-U
3D3V_S0 1 DY 2
KCOL0 1 Change to 71.00773.00G R88 0R2J-2-GP
KCOL1 2
1
KCOL2 3 3D3V_S0
KCOL3 R115 R114
KCOL4
4
5 Internal KeyBoard Connector 10KR2J-3-GP 10KR2J-3-GP
PlanarID
KCOL5 6 DY DY (1,0)
4
3
2
1
KCOL6 7
2
KCOL7
KCOL8
8
PCB_VER1
SA: 0,0 RN91
9 SRN10KJ-6-GP
KCOL9 10 PCB_VER0 SB: 0,1
KCOL10 11
-1: 1,0
1
1
KCOL11 12
5
6
7
8
KCOL12 13 THER_SCL R116 R113
KCOL13 14 10KR2J-3-GP 10KR2J-3-GP -2: 1,1 CRT_DEC#
KCOL14 15
KCOL15 16 Q6
2
2
KCOL16 17
KCOL17 18
KROW 0 19 4 3
A KROW 1 20 <Core Design> A
KROW 2 21 5 2 MODEL_ID0
KROW 3 22 SMBC_Therm 35,54
KROW 4 20.K0326.026 THER_SDA UMA_DISCRETE#
23 6 1 SMBD_Therm 35,54 Wistron Corporation
2
KROW 5 24 2ND = 20.K0320.026
KROW 6 25 R393 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2
KROW 7 26 2N7002DW -1-GP 10KR2J-3-GP Taipei Hsien 221, Taiwan, R.O.C.

84.27002.D3F R380
Title
28 2nd = 84.27002.E3F 10KR2J-3-GP
1
3D3V_S0 DIS KBC WPC775

1
PTW O-CON26-1-GP Size Document Number Rev

A3 SB
JV50-PU
5 4 3 2 1
5 4 3 2 1
3D3V_AUX_S5
EC34 3D3V_AUX_S5
5
6
7
8
D SCD1U16V2ZY-2GP D
DY RN94
2
2
SRN10KJ-6-GP R106
0R0603-PAD
2008/10/30
4
3
2
1
U9
1
SPI_HOLD#
36 SPICS# 1 8 BIOS_VCC
ER4 CS# VCC
36 SPIDI 1 2BIOS_DO 2 SO/SIO1 HOLD# 7 SPI_HOLD#
36 SPI_W P# 33R2J-2-GP SPI_W P# 3 6 BIOS_CLK ER3 2 1 0R2J-2-GP SPICLK 36
WP#/ACC SCLK BIOS_DIO ER2 2
4 GND SI/SIO0 5 1 0R2J-2-GP SPIDO 36
1
EC77 EC78
1
SC4D7P50V2CN-1GP
DY DY MX25L1605DM2I-12G-GP EC76 EC75

SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
DY DY
2
72.25165.A01
2
2ND = 72.25X16.A01
16M Bits
SPI FLASH ROM
C C
GOLDEN FINGER FOR DEBUG BOARD
LPC_LAD[0..3]
11,36 LPC_LAD[0..3]
DB1
3D3V_S0 1
11,36 LPC_LAD0 2
11,36 LPC_LAD1 3
11,36 LPC_LAD2 4
11,36 LPC_LAD3 5
11,36 LPC_LFRAME# 6 DY
11,32,33,34,53 PLT_RST1#_B 7
8
11,15 PCLK_FW H 9
B B
10
11
12
MLX-CON10-7-GP
20.D0183.110
A <Core Design> A
Wistron Corporation
Title
BIOS
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
TOUCH PAD
AFTE14P-GP TP62 1 5V_S0
AFTE14P-GP TP68 1 TP_DATA
SA AFTE14P-GP TP67 1 TP_CLK
5V_S0 AFTE14P-GP TP69 1 TP_LEFT
5V_S0 AFTE14P-GP TP70 1 TP_RIGHT
D D
2
1
2
1
EC73 EC74 EC22 EC23
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
RN83 EC26 2008/11/12
1
SCD1U10V2KX-4GP
DY 2008/11/05 DY DY DY DY
2
SRN10KJ-5-GP
2008/10/29
4 TPCN1
3
14
RN85 12
11
36 TPDATA TPDATA 1 4 TP_DATA 10
36 TPCLK TPCLK 2 3 TP_CLK 9
8
2008/11/12 SRN33J-5-GP-U 7
TP_RIGHT 6
2008/11/11 5
4
2008/11/13 3
2
TP_LEFT 1
13
C PTW O-CON12-3-GP-U C
20.K0370.012
2ND = 20.K0315.012
B B
Finger printer
3D3V_S0
1
2008/10/29
R427
0R0603-PAD FPCN1
13
2
3D3V_FP_S0 2
12 USBPP6 R149 1 2 0R2J-2-GP USBPP6_1 3
12 USBPN6 R150 1 2 0R2J-2-GP USBPN6_1 4
36 FP_DETECT# 5
6
12 FP_ID 7
TP_LEFT 8
A TP_RIGHT 9 A
<Core Design>
10 2008/11/07
08/02/25 SB Swap FP_ID and FP_DETECT# 11
12 AFTE14P-GP TP132 1 3D3V_FP_S0
AFTE14P-GP TP131 1 USBPP6_1 Wistron Corporation
14 AFTE14P-GP TP128 1 USBPN6_1 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
AFTE14P-GP TP126 1 FP_DETECT# Taipei Hsien 221, Taiwan, R.O.C.
PTW O-CON12-3-GP-U AFTE14P-GP TP127 1 FP_ID
Title
20.K0370.012
2ND = 20.K0315.012 Touch PAD/Finger printer
A3 SB
JV50-PU
5 4 3 2 1
5 4 3 2 1
SB 2008/12/11 EC72
1 2
PSCN1
7 SC1U16V3ZY-GP
1 3D3V_S0
2 POW ER CONSUMPTION# 36
3 POW ER CONSUMPTION_LED#_R
4 Volume_Up# 36
5 Volume_Down# 36
D 6 D
8
3D3V_S0
PTW O-CON6-12-GP
20.K0382.006
2ND = 20.K0320.006
2008/10/30
4
3
2
1
2008/11/06
2008/11/11 RN92
SRN10KJ-6-GP
2008/12/18
2008/11/12 2008/11/06
5
6
7
8
Q20 RN93
3 POW ER CONSUMPTION_LED#_R Volume_Up# 1 8 Volume_Up#_1
1 R1 Volume_Down# 2 7 Volume_Down#_1
36 POW ER CONSUMPTION_LED# POW ER CONSUMPTION# POW ER CONSUMPTION#_1
2 3 6
R2 4 5
DTC143ZUB-GP
84.00143.G1K
2ND = 84.00143.D1K 2008/11/12 SRN470J-3-GP
3RD = 84.00143.E1K 5V_S0
2008/10/30
NUM_LED1
Q16 R263
3 NUM_LED#_R 1 2 NUM_LED# K A
1 R1 56R2J-4-GP
36 NUM_LED
2 LED-B-98-GP
R2
C DTC143ZUB-GP 2008/11/12 C
84.00143.G1K 5V_S0
2ND = 84.00143.D1K 2008/10/30
3RD = 84.00143.E1K CAP_LED1
Q17 R265
3 CAP_LED#_R 1 2 CAP_LED# K A
1 R1 56R2J-4-GP
36 CAP_LED
2 LED-B-98-GP
R2 2008/11/12
DTC143ZUB-GP
2008/10/30 5V_S0
84.00143.G1K
2ND = 84.00143.D1K MEDIA_LED1
3RD = 84.00143.E1K
1 R264 2 K A
13 MEDIA_LED# 100R2J-2-GP
POW ER CONSUMPTION# 1 AFTE14P-GP TP55
LED-B-98-GP
Volume_Up# 1 AFTE14P-GP TP53
DY Volume_Down# 1 AFTE14P-GP TP38

Power consumption# 1 2
EC71 SC220P50V2JN-3GP 5V_S0 1 AFTE14P-GP TP125
DY
NUM_LED#_R 1 2 3D3V_S0 1 AFTE14P-GP TP56
EC61 SC220P50V2JN-3GP
DY
CAP_LED#_R 1 2
DY POW ER CONSUMPTION_LED#_R 1 AFTE14P-GP TP54
B MEDIA_LED# 1 2 B
A A
Wistron Corporation
Title
LAUNCH BOARD
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
Power Button Cover Up Switch

PW R_SW 1
1 3 KBC_PW RBTN#_1 3D3V_AUX_S5
D D
5
1
2008/10/27
2 4 DY EC3 2008/11/13
SC1KP50V2KX-1GP
LID1
2
SW -TACT-119-GP LID_CLOSE#
OUT 2 LID_CLOSE# 36
62.40009.671 3 GND
2nd:62.40012.101
2
1 EC70
3D3V_AUX_S5 VDD SCD1U16V2ZY-2GP DY
RN80
1
KBC_PW RBTN# ME268-002-GP
1 4
2 3 LID_CLOSE#
Beckup Button 74.00268.07B
2
SRN10KJ-5-GP EC69
SCD1U16V2ZY-2GP
1
BK_SW 1
1 3 Beckup#_1
5
1
2008/10/27
2 4 DY EC4
SC1KP50V2KX-1GP
2
SW -TACT-119-GP
C C
3D3V_S0
62.40009.671 RN4
2ND = 62.40012.101
1 8 W IRELESS_BTN#
2 7 BT_BTN#
3 6 BECKUP#
4 5
SRN10KJ-6-GP
WIRELESS Button
2008/11/11
W LAN_SW 1
1 3 W IRELESS_BTN#_1 RN3
Beckup#_1 1 8 Beckup# BECKUP# 36
5 BT_BTN#_1 2 7 BT_BTN# BT_BTN# 36
1
2008/10/27 W IRELESS_BTN#_1 3 6 W IRELESS_BTN# W IRELESS_BTN# 36

2 4 DY EC6 KBC_PW RBTN#_1 4 5 KBC_PW RBTN# KBC_PW RBTN# 36
SC1KP50V2KX-1GP
2
SRN470J-3-GP
SW -TACT-119-GP
62.40009.671
B 2ND = 62.40012.101 B
3D3V_S0
T/P lock Button
1
R233
BT/3G Button 10KR2J-3-GP
TP_SW 1 R227
2
1 3 TP_LOCK_BTN#_1 1 2 TP_LOCK_BTN# 36
BT_SW 1 5 470R2J-2-GP
1
1 3 BT_BTN#_1 2008/10/27
2 4 EC51
5 SC1KP50V2KX-1GP
2
1
2008/10/27 DY
2 4 DY EC5 SW -TACT-119-GP
SC1KP50V2KX-1GP 62.40009.671
2
SW -TACT-119-GP
62.40009.671
2ND = 62.40012.101
A A
Wistron Corporation
Title
SWITCH
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
Q29
3 PW RLED#_DB
1 R1 2008/11/07
36 FRONT_PW RLED
2
D R2 PW R_LED1 5V_S5 D
84.00143.G1K DTC143ZUB-GP 2008/11/06
2ND = 84.00143.D1K FRONT_PW RLED#_R 3 2 2008/11/04
3RD = 84.00143.E1K 2008/11/06
RN74 PW R_LED4
Q30 PW RLED#_DB 1 4 FRONT_PW RLED#_1
K A 5V_S5
3 STDBY_LED#_BD 2008/11/06 STDBY_LED#_R 4 1 3D3V_S5 PW RLED#_DB 2 3
1 R1 SRN300J-1-GP 2008/11/06 LED-B-77-GP-U2
36 STDBY_LED
2 4 5 83.01221.I70
R2 3 6 LED-OB-2-GP SRN100J-3-GP
84.00143.G1K DTC143ZUB-GP 2 7 83.19223.A70 2008/11/04
2ND = 84.00143.D1K 1 8
3RD = 84.00143.E1K PW R_LED3
Q31 RN110 SA FRONT_PW RLED#_2
K A 5V_S5
3 DC_BATFULL#
1 R1 2008/11/07 LED-B-77-GP-U2
36 DC_BATFULL 5V_AUX_S5
2 2008/11/04 83.01221.I70
R2 2008/11/06
DTC143ZUB-GP CHARGER_LED1
84.00143.G1K
2ND = 84.00143.D1K DC_BATFULL#_R 3 2
3RD = 84.00143.E1K
Q32
3 CHARGE_LED#
1 R1 CHARGE_LED#_R 4 1
36 CHARGE_LED 3D3V_AUX_S5
2 2008/11/06
R2
DTC143ZUB-GP LED-OB-2-GP
84.00143.G1K 83.19223.A70
C 2008/11/06 C
2ND = 84.00143.D1K
3RD = 84.00143.E1K 2008/11/04
2008/12/16
2008/11/06 R258 PW R_LED2
PW RLED#_DB 1 2 FRONT_PW RLED#_3K A 5V_S5
PW R_LED5
Q14 RN73
3 L-line_LED# 1 4 L-line_LED#_1 K A 5V_S5 100R2J-2-GP LED-B-77-GP-U2
1 R1 2 3 2008/11/06 83.01221.I70
36 L-line_LED
2 LED-B-98-GP
R2
DTC143ZUB-GP SRN100J-3-GP
84.00143.G1K
2ND = 84.00143.D1K
3RD = 84.00143.E1K 2008/12/16
PW R_LED6
2008/12/03
L-line_LED# L-line_LED#_2 K A 5V_S5 PW R_LED7
R530
L-line_LED# 1 2 K A 5V_S5
LED-B-98-GP 56R2J-4-GP
LED-B-98-GP
PW R_LED8 2008/12/03
2208/12/09 3D3V_S0 R531
L-line_LED# 1 2 K A 5V_S5
R219
Q10 TP_LED1 56R2J-4-GP
3 TP_LOCK_LED# 1 2 TP_LOCK_LED#_1 2 1
R1 LED-B-98-GP
36 TP_LOCK_LED 1
B LED-Y-29-GP B
2 100R2J-2-GP
R2 83.00190.S70
DTC143ZUB-GP
84.00143.G1K
2ND = 84.00143.D1K
3RD = 84.00143.E1K
2008/11/06 3D3V_S0
Q1
R2 D1 R4
2 W LAN_LED#_1 2 W LAN_LED1
R5
1 1 2 W LAN_LED#_2 2 1
33 W LAN_LED#_MC R1
W LAN_LED#
3 3 1 2
LED-Y-29-GP
75R2J-1-GP
DTA143ZUB-GP 1 33R2J-2-GP 83.00190.S70
84.00143.F1K
D
3RD = 84.00143.C1K BAW 56-5-GP Q4

83.00056.Q11 .
Q2 2ND = 83.00056.K11
3RD = 83.00056.G11 .
. .
R2
2 W LAN2_LED#_1 .
33 W LAN2_LED#_MC 1 R1
3
G
DTA143ZUB-GP 36 W LAN_TEST_LED
84.00143.F1K
3RD = 84.00143.C1K 2N7002E-1-GP
84.2N702.D31
2008/11/06 2ND = 84.2N702.I31
A A
5V_S0
Q3 R6 BT_LED1 Wistron Corporation
3 BT_LED# 1 2 BLT_LED#_1 K A 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1 R1 390R2J-1-GP Taipei Hsien 221, Taiwan, R.O.C.
36 BT_LED
2 LED-B-98-GP
R2 83.00193.A70 Title
DTC143ZUB-GP
84.00143.G1K Blue-tooth LED LED
2ND = 84.00143.D1K Size Document Number Rev
3RD = 84.00143.E1K A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
2D5V_S0 3D3V_S0
4
3
RN99
SRN100KJ-6-GP
D D
1
2
C825
D27
2 1 2D5V_S0_PG 2
SC1U10V3ZY-6GP 3 VCORE_EN 45,47
12,34,35,36,44,49,60 PM_SLP_S3# 1
BAW 56-5-GP
83.00056.Q11
2ND = 83.00056.K11
3RDR457
= 83.00056.G11
46 3V/5V_POK 1 DY 2
0R2J-2-GP
R456
48 1D8V_S3_PW RGD 1 DY 2
0R2J-2-GP
C C
P/H @ 1D8V_S3 PAGE

R120
45 VRM_PW RGD 1 DY 2 1D1V_PW RGD 47
0R2J-2-GP
1D8V_S3
Q9
G
. .
D
.
.
.
3D3V_S5 S NB_PW RGD 9,12
U16C
14
2N7002E-1-GP
2ND = 84.2N702.I31
9 84.2N702.D31
12,34,35,36,44,49,60 PM_SLP_S3#
8 SB_PW RGD 12
10
B B
D3 TSLVC08APW -1-GP
7
47 1D1V_PW RGD 2
73.07408.L16
3 RUNPW ROK_D 2ND = 73.07408.L15
RUNPW ROK_D 3
3RD = 73.07408.02B
35 RUNPW ROK 1 PH in page 3
BAW 56-5-GP
83.00056.Q11
2ND = 83.00056.K11
3RD = 83.00056.G11
A <Core Design> A
Wistron Corporation
Title
POWER ON LOGIC
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
Adapter DCDC 5V/3D3V(TPS51125) DCDC 1D2V(RT8202)

Input Signal Output Signal
AD_IN# Input Signal Output Signal Input Signal Output Signal
AD_OFF (I) (O)
EN0 1D2V_PWRGD
VCORE_EN
S5_ENABLE EN_PSV PGOOD
ENTRIP1
D Input Power Output Power D
AD_JK AD+ ENTRIP2 3V/5V OK

VCC(I) VCC(O) PGOOD Input Power Output Power
5V_S5
V5FILT
Input Power Output Power 1D2V_S0
+15V_ALW V5DRV VTT
DCBATOUT VCLK
CPU_CORE VIN DCBATOUT
3D3V_AUX_S5 V(I)
ISL6265HRTZ VREG3
VREG5 5V_AUX_S5
CPU_SVD VOUT 3D3V_S5
SVD
VRM_PWRGD 5V_S5
PGOOD VOUT
CPU_SVC
SVC
DCDC 1D1V(RT8202)
VCORE_EN
ENABLE
C
DCDC 1D8V(RT8202) Input Signal Output Signal
C
CPU_PWRGD_SVID_REG
PWROK Input Signal Output Signal 1D2V_PWRGD 1D1V_PWRGD
EN_PSV PGOOD
PM_SLP_S5# 1D8V_S3_PWRGD
Input Power Output Power EN_PSV PGOOD
Input Power Output Power
+5V_RUN VCC_VORE0
VCC VCC_CORE(O) Input Power Output Power +5V_SUS
5V_S5 V5FILT
1D8V_S3
DCBATOUT VCC_CORE1 V5IN VTT 1D2V_S0
VIN VCC_CORE(O) V5DRV VTT
DCBATOUT
V(I) DCBATOUT
VDDNB V(I)
VCC_CORE(O)
0D9V LDO RT9026 CHARGER MAX8731

B
1D2V LDO G9161 B
Input Signal Output Signal Input Signal Output Signal
PM_SLP_S5#
Input Signal Output Signal LDO_SHDN# LDO_POK MAX8731A ACIN ACIN
MAX8731A ACOK
PBAT_SMBDAT ACOK
5V_S5 Input Power Output Power SDA
Input Power Output Power VIN 0D9V_S3
LDO_OUT PBAT_SMBCLK
SCL
3D3V_S5 1D2V_S5 1D8V_S3 VLDOIN LDO_OUT
IN OUT
Input Power Output Power
1D5V LDO G9571 AD+

DCIN +VCHGR
V(O)
2D5V LDO R9161 Input Signal Output Signal
3D3V_AUX_S5
VDDSMB
A Input Power Output Power <Core Design> A
Input Power Output Power 3D3V_S0 1D5V_S0 Wistron Corporation

IN OUT
3D3V_S0 2D5V_S0 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
IN OUT Taipei Hsien 221, Taiwan, R.O.C.
Title
Power Block Diagram
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
Aux Power 3D3V_AUX_S5
5V_AUX_S5 I min = 150 mA

3D3V_AUX_S5 5V_S0 2008/12/18 5V_S5
U11
D D
G9 U28
1
2
3
VINDY
GND
SHDN#
VOUT
NC#4
5
4
3D3V_AUX_S5_G 1 2
GAP-CLOSE-PW R
Run Power C546
SCD1U25V3KX-GP
1 DY2
1
2
3
S
S
S
D
D
D
8
7
6
4 G D 5
DCBATOUT
1
1
BC2 G909-330T1U-GP BC1 RUN_POW ER_ON
SI4800BDY-T1
SC1U16V3ZY-GP
DY 74.00909.03F DY 84.04800.D37
SC1U16V3ZY-GP
2nd source:74.09198.G7F 1 2 Z_12V S D 2ND = 84.04468.037
2
2
R522 10KR2J-3-GP Q28 3D3V_S0 3D3V_S5
K
1
1
NDS0610-NL-GP R525 C921 1 R526 U25
SCD22U25V3KX-GP
330KR2J-L1-GP
84.S0610.B31 D31 1 8
10KR2J-3-GP
S D
2ND = 84.00610.C31 2 PDZ9D1B-GP 2 S D 7
3 S D 6
2 R523 1 Z_12V_G3 4 5
A
G D
330KR2J-L1-GP
3D3V_S0
83.9R103.C3F SI4800BDY-T1 2008/12/18
2ND = 83.9R103.F3F 84.04800.D37
1
2ND = 84.04468.037
R529
1
100KR2J-1-GP Z_12V_D4 1D8V_S3
1D8V_S0
DY R524
100R5J-3-GP U49
2
U67 1 S D 8
2 7
2
S D
4 3 3 6
Z_12V_D3
S D
3D3V_runpwr 4 G D 5
5 2 PM_SLP_S3# 12,34,35,36,42,49,60
C Q33 C
SI4800BDY-T1 2008/12/18
D
2N7002-11-GP 6 1 R431 84.04800.D37
1 2 1D8V_S0_ON
2ND = 84.04468.037
DY 2N7002EDW -GP 2008/10/29
1
G Z_12V_D3 84.27002.F3F 1MR2F-GP C795
2ND = 84.27002.G3F 2008/10/30 SC22P50V2JN-4GP
84.27002.W31
2
S
2ND = 84.27002.Y31
3D3V_M92
DIS 3D3V_S5
S D
U44
APM2300AAC-TRLGP
G
84.02300.B31
R342
2ND = 84.03400.A37
1 2 3D3V_M92_ON
DIS
1
C675
B 2MR2F-GP SC22P50V2JN-4GP B
2
DIS
A <Core Design> A
Wistron Corporation
Title
RUN AND AUX POWER

A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
DCBATOUT DCBATOUT_6265_2
DCBATOUT DCBATOUT_6265_3 G4 DCBATOUT_6265_1
G15 1 2
1 2
SCD1U25V3KX-GP
GAP-CLOSE-PW R
GAP-CLOSE-PW R G3 C383 C387 C382 C384
1
G16 1 2
5
6
7
8
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2 TC8 DY
D
D
D
D
ST15U25VDM-1-GP
GAP-CLOSE-PW R U15
2
GAP-CLOSE-PW R G5 1 2 AOL1426-GP VCC_CORE_S0_0
2
1 2 C374 SC33P50V2JN-3GP C377 SC180P50V2JN-1GP
Design Current: 12.6A
1 2 84.01426.037 Peak current: 18A
2008/11/04 GAP-CLOSE-PW R 2ND = 84.12003.A37
G
S
S
S
D G6 1 R131 26265_FB_NB_R 1 2 OCP_min:24A D
5V_S0 44K2R2F-1-GP C376 SC1KP50V2KX-1GP
1 2 68.R3610.20A
4
3
2
1
R415 2ND = 68.R3610.20C
GAP-CLOSE-PW R 1 2 1 2 VCC_CORE_S0_0
DCBATOUT DCBATOUT_6265_1 C380 SCD1U10V2KX-4GP UGATE0 2008/12/18 L49
G11 2R3J-GP PHASE0 1 2
1
1 2 1 R132 2 L-D36UH-1-GP
1
C768 22KR2F-GP BOOT0 1 2 Parts
GAP-CLOSE-PW R SC1U10V3KX-3GP C346 R389
16K2R2F-GPclose to
5
6
7
8
5
6
7
8
1
G12 GNDA_VCORE SCD22U10V3KX-2GP
D
D
D
D
D
D
D
D
1 2 U12 U13 PWM IC TC4 TC3 TC25
GNDA_VCORE R1301 0R0402-PAD
2 AOL1712-GP AOL1712-GP SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
CPU_VDDNB_RUN_FB_H 6
2
1
GAP-CLOSE-PW R 1 R385 2
TC7 DCBATOUT_6265_3 VDDNB 4K02R2F-GP
G13 79.33719.L01
ST15U25VDM-1-GP
1 2 1 R125 2 PHASE_NB RN45 1 2 2ND = 77.C3371.051
2
G
S
S
S
G
S
S
S
1 R414 2 11K3R2F-2-GP 1 4 CPU_VDDNB_RUN_FB_H C735 SCD1U16V2KX-3GP 3RD = 77.23371.13L
6265_OCSET_NB
GAP-CLOSE-PW R 5V_S0 3D3V_S0 2R3J-GP LGATE_NB 2 3 CPU_VDDNB_RUN_FB_L R390 R402 79.33719.L01
4
3
2
1
4
3
2
1
1
G14 84.01712.037 84.01712.037 1 DY 2 1 DY 2 2ND = 77.C3371.051
C767 PHASE_NB SRN10J-7-GP 10R2F-L-GP NTC-10K-9-GP
6265_COMP_NB
1 2 2ND = 84.57N03.A372ND = 84.57N03.A37 3RD = 77.23371.13L
ISP0
6265_VSEN_NB
6265_FSET_NB
SCD1U25V3KX-GP 2008/11/12 LGATE0 79.33719.L01
6265_FB_NB
2
1
1
2008/11/10 GAP-CLOSE-PW R UGATE_NB 2008/12/08 ISP0_R 2ND = 77.C3371.051
6265_VCC
6265_VIN
R124 R123 2008/12/18 ISN0 2 1 3RD = 77.23371.13L
DY 0R0603-PAD DY R122 GNDA_VCORE G8
10KR2F-2-GP 0R2J-2-GP CPU_VDDNB_RUN_FB_L_R 1 R129 2 CPU_VDDNB_RUN_FB_L 6 GAP-CLOSE-PW R-3-GP
R862 close
0R0402-PAD
to L75
2
6265_OFS/VFIXEN
3D3V_S0 DCBATOUT_6265_3
1
GNDA_VCORE 2008/12/18
49
48
47
46
45
44
43
42
41
40
39
38
37
1
C R121DY C393 C406 C822 C
GND
VIN
VCC
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
R403 0R2J-2-GP
10KR2F-2-GP DY
2
5
6
7
8
2
U50
D
D
D
D
2
GNDA_VCORE 1 36 BOOT_NB SI4800BDY-T1

OFS/VFIXEN BOOT_NB BOOT0
42 VRM_PW RGD 2 PGOOD BOOT0 35
CPU_PW RGD_SVID_REG 3 34 UGATE0
6 CPU_PW RGD_SVID_REG PWROK UGATE0
R119 1 0R0402-PAD
2 6265_SVD 4 33 PHASE0
6 CPU_SVD SVD PHASE0
R117 1 0R0402-PAD
2 6265_SVC 5 32 5V_S0 84.04800.D37 VDDNB: Design Current: 2.1A
6 CPU_SVC
G
S
S
S
R118 1 0R0402-PAD 6265_ENABLE SVC PGND0 LGATE0
42,47 VCORE_EN 2 6 U10 31 2ND = 84.08884.037 Peak current: 3A OCP_min:5A
4
3
2
1
6265_RBIAS ENABLE LGATE0
1 2 7 RBIAS PVCC 30
1 2 R400 93K1R2F-L-GP 6265_OCSET 8 29 LGATE1 VDDNB
OCSET LGATE1
1
R399 23K7R2F-GP 6265_VDIFF0 9 28 C320 UGATE_NB L53
6265_FB0 VDIFF0 PGND1 PHASE1 SC2D2U10V3KX-1GP BOOT_NB 1 PHASE_NB 1
10 FB0 PHASE1 27 2 2
6265_COMP0 11 26 UGATE1 C364 IND-4D7UH-88-GP
2
GNDA_VCORE 6265_VW 0 COMP0 UGATE1 BOOT1 SCD22U10V3KX-2GP
12 VW0 BOOT1 25 68.4R710.20D
TC28
2ND = 68.4R71C.10A
5
6
7
8
1
SE220U2VDM-8GP
COMP1
VDIFF1
VSEN0
VSEN1
RTN0
RTN1
G10 U53
D
D
D
D
ISN0
ISN1
ISP0
ISP1
VW1
FB1
1 2 SI4800BDY-T1
2
GAP-CLOSE-PW R-3-GP ISL6265HRTZ-T-1-GP 79.22719.20L
13
14
15
16
17
18
19
20
21
22
23
24
74.06265.A73 DCBATOUT_6265_2
2ND = 80.2271V.A9L
GNDA_VCORE 84.04800.D37 3RD = 77.22271.20L
G
S
S
S
ISP0 ISN1 2ND = 84.08884.037
6265_FB1
6265_COMP1
6265_VW1
6265_VDIFF1
4
3
2
1
ISN0 ISP1 ESR=15mohm
change to 74.06265.A73
1D8V_S3 C181 C180 C179 C178 LGATE_NB
5
6
7
8
1
B VCC_CORE_S0_0 B
D
D
D
D
VCC_CORE_S0_1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
U5 DY
1
AOL1426-GP
2
R96
1
R387 R103
DY 0R2J-2-GP
84.01426.037
G
S
S
S
Close to 10R2J-2-GP 10R2J-2-GP 2ND = 84.12003.A37
2
CPU socket 68.R3610.20A VCC_CORE_S0_1
4
3
2
1
2ND = 68.R3610.20C Design Current: 12.6A
2
VCC_CORE_S0_1
6 CPU_VDD0_RUN_FB_H Peak current: 18A
UGATE1 2008/12/18L47
6 CPU_VDD0_RUN_FB_L
PHASE1 1 2 OCP_min:24A
L-D36UH-1-GP
6 CPU_VDD1_RUN_FB_L
2
BOOT1 1 2 Parts
6 CPU_VDD1_RUN_FB_H
C288 R107
16K2R2F-GPclose to
1
5
6
7
8
5
6
7
8
Parallel SCD22U10V3KX-2GP 79.33719.L01
1
D
D
D
D
D
D
D
D
R388 R97 U8 U7 PWM IC 2ND = 77.C3371.051
10R2J-2-GP 10R2F-L-GP AOL1712-GP AOL1712-GP TC6 TC5
TC23 3RD = 77.23371.13L
1
Close to 1 2 SE330U2VDM-L-GP
2
R93 4K02R2F-GP SE330U2VDM-L-GP
CPU socket
2
1 2 SE330U2VDM-L-GP
G
S
S
S
G
S
S
S
C240 SCD1U16V2KX-3GP
79.33719.L01
4
3
2
1
4
3
2
1
84.01712.037 84.01712.037 R858 close 2ND = 77.C3371.051
2ND = 84.57N03.A372ND = 84.57N03.A37 R100 R379 3RD = 77.23371.13L
LGATE1 to 79.33719.L01
L77
1 DY 2 1 DY 2
6265_FB0_C C741 SC180P50V2JN-1GP 6265_FB1_C C261 SC180P50V2JN-1GP 10R2F-L-GP NTC-10K-9-GP 2ND = 77.C3371.051
<Core Design>
ISP1
1 2 DY 1 2DY ISP1_R 3RD = 77.23371.13L
A R398 C744 C746 R98 C237 C236 A
1 2 1 2 1 12 2 1 2 1 2 1 2 1 2 ISN1 2 1
249R2F-GP C740 SC1KP50V2KX-1GP 249R2F-GP SC1KP50V2KX-1GP G7 Wistron Corporation
SC4700P50V2KX-1GP SC180P50V2JN-1GP SC4700P50V2KX-1GP SC180P50V2JN-1GP C241 GAP-CLOSE-PW R-3-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
R102
R90
1KR2F-3-GP R391 C738 R392 1KR2F-3-GP C218 Title
1 R397 2 1 2 1 2 1 2 1 2 1 2 1 2 1 R94 2
54K9R2F-L-GP 6K81R2F-1-GP CPU Vcore(ISL6265HR)
2 R395 1 SC180P50V2JN-1GP 2 R92 1 54K9R2F-L-GP SC1KP50V2KX-1GP 6K81R2F-1-GP Size Document Number Rev
3D3V_S0 DY
910KR2J-GP
3D3V_S0 DY
316KR2F-GP
A3
6265_FB0_R 1 2 6265_FB1_R 1 2 JV50-PU SB
2 R396 1 C742 SC1KP50V2KX-1GP 2 R91 1 C217 SC180P50V2JN-1GP Date: Friday, December 19, 2008 Sheet 45 of 61
0R2J-2-GPDY 0R2J-2-GPDY
5 4 3 2 1
5 4 3 2 1
DCBATOUT DCBATOUT_62392 DCBATOUT DCBATOUT_62392
G24 G20
5V_PW R 5V_S5 1 2 1 2 R183
G40 1 2 3V/5V_EN 3D3V_PW R 3D3V_S5
35 S5PW R_ENABLE
1
1 2 GAP-CLOSE-PW R GAP-CLOSE-PW R
1
G21 TC10 G22 2008/11/07 2KR2F-3-GP G29
GAP-CLOSE-PW R TC11 1 2 ST15U25VDM-1-GP1 2 R186 1 2
2
G35 ST15U25VDM-1-GP 200KR2F-L-GP
2
1 2 GAP-CLOSE-PW R GAP-CLOSE-PW R GAP-CLOSE-PW R
D G19 G18 G30 D
2
GAP-CLOSE-PW R 1 2 1 2 1 2
G38
G23 G17 G31
GAP-CLOSE-PW R 1 2 1 2 1 2
G41
G27
GAP-CLOSE-PW R 1 2
G37
1 2 GAP-CLOSE-PW R
G26
GAP-CLOSE-PW R 1 2
G39 DCBATOUT_62392 DCBATOUT_62392 DCBATOUT_62392
1 2 GAP-CLOSE-PW R
G25
GAP-CLOSE-PW R 1 2
G36 DY C471 C463
1
1
1 2 C494 C474 C486 C473 C485 C493 GAP-CLOSE-PW R
SCD01U50V2KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
G28
GAP-CLOSE-PW R 84.04800.D37 1 2
2
2
2ND = 84.08884.037
GAP-CLOSE-PW R
8
7
6
5
5
6
7
8
Id=7A
D
D
D
D
U21 Id=7A U24
D
D
D
D
Qg=8.7~13nC
SI4800BDY-T1 SI4800BDY-T1
Rdson=23~30mohm Qg=8.7~13nC
Iomax=7A 84.04800.D37 Rdson=23~30mohm Iomax=6A
C C
OCP>10.5A Cyntec 7*7*3 2ND = 84.08884.037 Cyntec 7*7*3 OCP>9A
17
C455 R195 U19 R196 C457
S
S
S
G
DCR=30mohm, Irating=6A DCR=30mohm, Irating=6A
G
S
S
S
SCD22U25V3KX-GP 2D2R2F-GP 2D2R2F-GP SCD22U25V3KX-GP
VIN
1
2
3
4
4
3
2
1
3D3V_PW R 2008/12/19 Isat=13.5A 2 16239_BOOT_1
1 26239_BOOT1
14 BOOT1 21 1 2 1 2 Isat=13.5A 2008/12/19 5V_PW R
6239_UGATE1 BOOT2 6239_UGATE2
L29 13 UGATE1 UGATE2 22 L30 2008/12/18
1 2 6239_PHASE1 12 23 6239_PHASE2 1 2
IND-3D3UH-57GP PHASE1 PHASE2 IND-3D3UH-57GP
68.3R310.20A 6239_LGATE1 15 20 6239_LGATE2 68.3R310.20A
LGATE1 LGATE2
8
7
6
5
5
6
7
8
L/DCR=RC
2ND = 68.3R31A.10E 2ND = 68.3R31A.10E
D
D
D
D
C537 U22 U23 C517
D
D
D
D
C528
SI4812BDY-T1-E3-GP
SI4812BDY-T1-E3-GP
R236 6239_OCSET1 10 25 6239_OCSET2 C529
OCSET1 OCSET2
1
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
TC14 1 2 1 2 6239_ISEN1 9 26 6239_ISEN2 1 R237 2 1 2 TC12
ISEN1 ISEN2
8 27
ST220U6D3VDM-20GP
ST220U6D3VDM-20GP
SCD1U25V3KX-GP 30KR2F-GP VOUT1 VOUT2
84.04812.A3730KR2F-GP SCD1U25V3KX-GP
2
2
6239_FB1 7 28 6239_FB2 2ND = 84.08878.037
S
S
S
G
G
S
S
S
FB1 FB2
1
1
R181
R182
2008/12/18 Roc=Ioc*DCR/10uA 2008/12/18
1
2
3
4
4
3
2
1
6239_LDO3 16 1
LDO3 PGOOD R184 0R2J-2-GP
84.04812.A37
Id=7.7A 2ND = 84.08878.037 11 1 2 3V/5V_EN Id=7.7A
30KR2F-GP
30KR2F-GP
EN1
Qg=8.5~13nC 24 1 2
Qg=8.5~13nC 2008/11/05
2
2
6239_PVCC EN2 R185 0R2J-2-GP
18 PVCC LDO3EN 5 2008/10/21
77.22271.27L Rdson=16.5~21mohm 4 VCC FCCM 3 Rdson=16.5~21mohm 77.22271.27L
2ND = 77.C2271.00L FSET1 6 2ND = 77.C2271.00L
2008/10/21 19 2
GND
PGND FSET2
2008/11/05 2008/12/18
1
1
C447 ISL62392HRTZ-T-GP C448
2008/12/18
29
SC1200P50V2KX-1GP R201 1 R173 2 3D3V_AUX_S5 SC1200P50V2KX-1GP
1
1
B 100KR2F-L1-GP B
3D3V_AUX_S5
2
2
R179 1 2 R180
45K3R2F-L-GP 0R0402-PAD-1-GP 68K1R2F-1-GP
20081127 1R202 2
2008/11/04 3V/5V_POK 42 20081127
5V_AUX_S5
6239_FSET2
1
62392_FB2_R C465 0R0402-PAD-1-GP 6239_VCC 1 R174 2 6239_FCCM 62392_FB1_R

2
2
1
1
SC4D7U10V3KX-GP
C466 0R2J-2-GP
SC4D7U10V3KX-GP
R176 R175
DY 6239_VCC
2
2008/12/17 3K3R2F-2-GP 2008/12/17 3K3R2F-2-GP

2
2
1
C438 R168
20081120
2
2
SC1U25V3KX-1-GP 0R2J-2-GP
DY 6239_FSET1
2008/12/19
2
1
1
1 R178
R177
10KR2F-2-GP 9K09R2F-GP
1 R169 2
2
2
0R0402-PAD
2008/12/18 1
1
C445 R172 C439 R170
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
19K6R2F-GP 24K3R2F-1-GP
2008/12/19
2
2
Polymer
2
2
Polymer 220uF,6.3V,25mohm,Iripple=2.236A
220uF,6.3V,25mohm,Iripple=2.236A OS-CON
OS-CON 220uF,6.3V,10mohm,Iripple=3.9A
A 220uF,6.3V,10mohm,Iripple=3.9A A
Wistron Corporation
Vout=0.6*(1+R1/R2) Taipei Hsien 221, Taiwan, R.O.C.
Title
ISL62392 5V/3D3V
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
DCBATOUT DCBATOUT_51124
G63 1D1V_PW R 1D1V_S0
1 2 DCBATOUT_51124_1 G55
1 2
1
TC15 GAP-CLOSE-PW R
SE100U25VM-L1-GP GAP-CLOSE-PW R
G64
1 2 C633 C634 G56
2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
C635
D 1 2
5
6
7
8
SCD1U25V3KX-GP
GAP-CLOSE-PW R
D
D
D
D
D G65 U37 GAP-CLOSE-PW R D
1 2 G57
2
SI4800BDY-T1 1 2
GAP-CLOSE-PW R 84.04800.D37
2ND = 84.08884.037 GAP-CLOSE-PW R
G
S
S
S
79.10712.L02 G58
2ND = 79.10712.6JL G S 1 2
4
3
2
1
3RD = 79.10112.3JL
GAP-CLOSE-PW R
DCBATOUT DCBATOUT_51124_1 Iomax=8A G59
G49 1 2
1 2 Vtrip(mV)=Rtrip(Kohm)*10(uA) Vo(cal)=1.1060V 1D1V_PW R
L32 GAP-CLOSE-PW R
GAP-CLOSE-PW R Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin)) 1 2 C647 G53
G47 COIL-1UH-34-GP-U 1 2
SC18P50V2JN-1-GP
1 2 68.1R01A.20B
1
1
TC21 2ND = 68.1R10A.10S R319 C623 TC16 GAP-CLOSE-PW R
D
5
6
7
8
1
SE100U25VM-L1-GP
SE220U2VDM-8GP
GAP-CLOSE-PW R 1 2 18KR2F-GP TC17 G51
G48 R333 0R2J-2-GP 3D3V_S0 U40 DY SE390U2D5VM-2GP
1 2
DY
D
D
D
D
2
2
SI4812BDY-T1-E3-GP
SCD1U10V2KX-4GP
1 2
DY
2
3D3V_S0 51124_VFB1 GAP-CLOSE-PW R
1
GAP-CLOSE-PW R R334 G52
1
5V_S5 79.3971V.6AL
1 2
1
R313 10KR2J-3-GP 84.04812.A37 R318 2ND = 77.93971.02L
G
S
S
S
39K2R2F-L-GP GAP-CLOSE-PW R
G S 2ND = 84.08878.037
4
3
2
1
10KR2J-3-GP 79.22719.20L G54
2
79.10712.L02 2ND = 80.2271V.A9L 1 2
2
1
1
2ND = 79.10712.6JL C650
2
SC4D7U6D3V3KX-GP
3RD = 79.10112.3JL R327 2008/10/21 GAP-CLOSE-PW R

C 2R3J-GP 1D2V_PW R C
2
1D1V_PW R 1D1V_PW RGD Close to VFB Pin (pin5)

51124_VFB2 1D1V_PW RGD 42
2
51124_VFB1 1D2V_PW RGD 1 TP182TPAD14-GP

1
C654
SC1U10V2KX-1GP
24
U41
2
5
1
6
7
R299 DY
2
2 1
VFB1
VFB2
VO1
VO2
PGOOD1
PGOOD2
42,45 VCORE_EN
10KR2J-3-GP
1
SC180P50V2JN-1GP
C636 1 BC3 21 51124_DRVH1

DRVH1 51124_LL1
SC1U10V2KX-1GP LL1 20 20080307_Modify by
2 DY 51124_V5FILT 15 19 51124_DRVL1
2
V5FILT DRVL1
16 V5IN Brian
ACOUSTIC NIOSE
51124_EN1 23
51124_EN2 EN1 DCBATOUT_51124
8 EN2 1D2V_PW R 1D2V_S0
3 GND
25 10 51124_DRVH2 C664 C665 C666 G66
GND DRVH2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
2008/11/13 13 11 51124_LL2 1 2
PGND2 LL2
TONSEL
1
1 2 18 12 51124_DRVL2
VBST1
VBST2
42,45 VCORE_EN PGND1 DRVL2
5
6
7
8
TRIP1
TRIP2
R335 0R2J-2-GP GAP-CLOSE-PW R
D
D
D
D
G67
2
1 BC4 U45 1 2
SCD47U6D3V2KX-GP TPS51124RGER-GPU1 SI4800BDY-T1
17
14
22
9
4
2 DY 74.51124.073 84.04800.D37 GAP-CLOSE-PW R
51124_TRIP1 2ND = 84.08884.037 G68
1D2V Iomax=5A
G
S
S
S
51124_TRIP2
51124_TONSEL
1 2
1
B B
OCP>10A
4
3
2
1
1
R317 GAP-CLOSE-PW R
5K6R2F-2-GP R332 1D2V_PW R G69
9K1R2F-1-GP L37 1 2
1 2
2
IND-1D5UH-23-GP GAP-CLOSE-PW R
SCD1U10V2KX-4GP
SC18P50V2JN-1-GP
2
1
2008/12/18 68.1R510.10K G70
1
C657
C682
2ND = 68.1R510.10Y TC19 1 2
1
SE220U2VDM-8GP
C641 R329 TC18
DY DY
2
5
6
7
8
51124_LL1 2 1 51124_VBST1 17K8R2F-GP GAP-CLOSE-PW R
SE390U2D5VM-2GP
2
DY R326 U42 G73
DY
D
D
D
D
2
SI4812BDY-T1-E3-GP
SCD1U16V2KX-3GP DY R323 0R2J-2-GP 51124_VFB2 1 2
84.04812.A37
1
C661 10KR2J-3-GP 2ND = 84.08878.037 GAP-CLOSE-PW R
79.3971V.6AL
1
51124_LL2 2 1 51124_VBST2 R328 2ND = 77.93971.02L

G71
30KR2F-GP 1 2
G
S
S
S
SCD1U16V2KX-3GP 79.22719.20L
4
3
2
1
2ND = 80.2271V.A9L GAP-CLOSE-PW R
2
51124_V5FILT G72
2008/10/21 1 2
GAP-CLOSE-PW R
GND OPEN V5FILT
A 240k/CH1 300k/CH1 360k/CH1 <Core Design> A

TONSEL 300k/CH2 360k/CH2 420k/CH2
Wistron Corporation
Vout=0.758V*(R1+R2)/R2 --> PWM mode
Vout=0.764V*(R1+R2)/R2 --> Skip Mode Title
TPS51124_1D1V_1D2V
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
DCBATOUT DCBATOUT_51117 DCBATOUT
G92 G91 DCBATOUT_51117

1 2 1 2
SE100U25VM-L1-GP
1
TC31 GAP-CLOSE-PW R GAP-CLOSE-PW R
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
G94 G93 C863 C867 C868
1
1 2 1 2
2
D GAP-CLOSE-PW R GAP-CLOSE-PW R D
2
G95 G96
5
6
7
8
1 2 1 2
D
D
D
D
79.10712.L02 U61
2ND = 79.10712.6JL GAP-CLOSE-PW R GAP-CLOSE-PW R
3RD = 79.10112.3JL SI4800BDY-T1
5V_S5 84.04800.D37 Cyntec 10*10*4
2ND = 84.08884.037 DCR=4.2mohm, Irating=16A
G
S
S
S
Isat=33A Vo(cal)=1.8214V
4
3
2
1
1 2ND = 68.1R51A.10G 1D8V_PW R
1D8V Iomax=10A
1
C862 R469 L54

SC1U10V2KX-1GP 300R3F-GP 1 2 OCP>15A
IND-1D5UH-34-GP
2
SC18P50V2JN-1-GP
SCD1U10V2KX-4GP
C861 68.1R510.10J
2
5
6
7
8
1
51117A_V5FILT 2 1 R465 C849 C903 TC33 TC32
D
D
D
D
30KR2F-GP SE390U2D5VM-2GP
SC1U10V2KX-1GP
1
5V_S5 SCD1U25V3KX-GP U60 DY DY DY 79.3971V.6AL
2
C850 SI4812BDY-T1-E3-GP 2ND = 77.93971.02L
2008/10/29
2
84.04812.A37 51117A_VFB SE390U2D5VM-2GP
2
1
2ND = 84.08878.037
1
G
S
S
S
D29 79.3971V.6AL
U57 R464 2ND = 77.93971.02L
4
3
2
1
CH551H-30PT-GP 4 13 51117A_DRVH 21KR2F-GP
83.R5003.C8F V5FILT DRVH 51117A_DRVL
10 9
2
V5DRV DRVL
2ND = 83.R5003.H8H
2
51117A_VFB 5 12 51117A_LL
51117A_VBST VFB LL
14 VBST 2008/10/21
C C
3RD = 83.5R003.08F 3
0R2J-2-GP VOUT
PGOOD 6
1D8V_PW R 3D3V_S5 Vout=0.75*(R1+R2)/R2
12,34,36 PM_SLP_S5# 1 R467 251117A_EN 1 EN_PSV GND 7
1 R466 2 51117A_TON 2 TON PGND 8
1
51117A_TRIP 11 15 1D8V_PW R 1D8V_S3 1D8V_PW R
249KR2F-GP TRIP GND R468
1
TPS51117RGYR-GP 200KR2J-L1-GP G99 G103

R481 1 2 1 2
15K8R2F-GP
2
GAP-CLOSE-PW R GAP-CLOSE-PW R
1D8V_S3_PW RGD 42
G100 G104
2
1 2 1 2
G109 G107
1 2 1 2
2008/12/17 GAP-CLOSE-PW R GAP-CLOSE-PW R
G101 G105
1 2 1 2
G102 G108
1 2 1 2
B
DDR_0.9V B
Iomax=1.5A
5V_S5 1D8V_S3 OCP>3A
1
DDR_VREF_PW R 0D9V_S3
1
C548 C545 G32

C547 SC10U10V5KX-2GP SCD1U10V2KX-4GP 1 2
2
SC1U16V3KX-2GP
2
GAP-CLOSE-PW R
G33
U27 1 2
10 1 GAP-CLOSE-PW R
VIN VDDQSNS
12,34,36 PM_SLP_S5# 2 R249 1 9026_S5 9 S5 VLDOIN 2 G34
0R0402-PAD 8 3 1 2
GND VTT
2 R247 1 9026_S3 7 S3 PGND 4
DDR_VREF_S3 0R0402-PAD 6 5 GAP-CLOSE-PW R
VTTREF VTTSNS
GND
2
C542
SCD1U10V2KX-4GP RT9026PFP-GP C535 C544
1
11
SC10U10V5KX-2GP SC10U10V5KX-2GP
2
A <Core Design> A
74.09026.079
2ND = 74.02997.A79
Wistron Corporation
Title
DCDC_1D8V_TPS51117/LDO 0D9V
A3 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
D 1D5V_S0 D
Iomax=1A
G957 1D5V_S0_LDO 1D5V_S0
G111
1 2
1
2008/12/12 SB C918 DY GAP-CLOSE-PW R-3-GP
G110
SC10U6D3V5KX-1GP 1 2
2
U66 GAP-CLOSE-PW R-3-GP
3 3D3V_S0
VOUT
DY GND
VIN
2
1
1
C913
DY G957T65UF-GP DY SC1U10V3KX-3GP
74.95765.03C
2
1D2V_S5
For MINI Card.NEW Card power SW Iomax=400mA
C 3D3V_S5 1D2V_S5 C
C413
SC10U10V5KX-2GP
C410
2D5V
1
SC1U10V3KX-3GP
C412 C411
1
2
3
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
U18
DY DY Iomax=0.2A
IN
GND
OUT
2
2
3D3V_S0 2D5V_LDO
G9161-120U65U-GP U47
74.09161.E3C G74
VOUT 3 1 2 2D5V_S0
2
Place near to SB700 VIN
GND 1 GAP-CLOSE-PW R-3-GP
1
C761
C782
SC1U10V3ZY-6GP
SC22U6D3V5MX-2GP
RT9161-A-25PG-GP
2
B 1D8V_S3 B
5V_S5 Place near to CPU

DY
1
C820 C819
1
SC10U10V5ZY-1GP SC10U10V5ZY-1GP C803

Iomax=0.8A
2
SC1U16V3ZY-GP
2
DIS
DIS
1D1V_M92_PW R
1D1V_M92
R447 U48 DIS G85
9
PM_SLP_S3# 2 19025_EN 1 2
12,34,35,36,42,44,60 PM_SLP_S3#
0R0402-PAD
GND
4 5 DIS GAP-CLOSE-PW R
VDD NC#5
1
3 6 C775 DY G86
VIN VOUT R421 C776 C771
2 EN ADJ 7 1 2
SC100P50V2JN-3GP
SC10U10V5ZY-1GP
1 8 DIS 8K25R2F-1-GP
2
3D3V_S0 PGOOD GND

SC10U10V5ZY-1GP
DIS GAP-CLOSE-PW R
2
9025_FB
1
RT9025-25PSP-GP
A R446 74.09025.03D R420 <Core Design> A
DIS 2K2R2J-2-GP 2ND = 74.0G966.03D DIS 20KR2F-L-GP
Wistron Corporation
2

9025_POK Taipei Hsien 221, Taiwan, R.O.C.
Vo=0.8*(1+(R1/R2)) Title
LDO 2D5V/1D5V/1D2V_S5
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
AD+ 2008/12/18
U30 AD+_TO_SYS DCBATOUT 2008/12/18
8 D S 1 BT+
7 D S 2 R262 U34
6 D S 3 1 2 1 S D 8
5 D G 4 2 S D 7
D01R2512F-4-GP AD+ 3 S D 6
AO4433-GP R260 R259 4 G D 5 C23
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
2
SCD1U25V3KX-GP
84.04433.A37 AD+_G_1
1ISL88731_CSSN
1 2 1 2
G42
G43
D 2ND = 84.04407.F37 AO4433-GP D
10KR2J-3-GP 100KR2J-1-GP 84.04433.A37
2
1
2ND = 84.04407.F37
1
R293
3
470KR2J-2-GP
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
Q15 84.27002.F3F
1
2N7002EDW -GP
2
2ND = 84.27002.G3F R287 R286
10R2J-2-GP 10R2J-2-GP
G62
G60
G61
G50
2
2
2 R261 1
SCD1U25V3KX-GP
10KR2F-2-GP
C574 C573
83.R2003.C8F ISL88731_ACOK 2 1 1 2
2ND = 83.R2003.F8F D14
3RD = 83.R2003.J8F
A K SCD1U25V3KX-GP SCD047U25V3KX-GP C577
1
CH521S-30PT-GP-U C572 CHG_AGND
ISL88731_CSSP
2008/11/04
2
1
2008/10/20 SC1U25V5KX-1GP CHRG_IN
1
C576
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
R277 U32 SC1U10V3KX-3GP
C620
C626
C619
215KR3F-1-GP CHG_AGND
NC#1
5
6
7
8
1
22 28 R285
2
DCIN CSSP 4D7R3F-L-GP U36
D
D
D
D
ISL88731_ACIN 2 2 CHG_AGND
SI4800BDY-T1
2
ACIN ISL88731_CSSN_R
27 84.04800.D37
SCD01U50V2KX-1GP
2
CSSN
1
5V_S5 11 26 ISL88731_VCC 3 D15 DY 2ND = 84.08884.037

VDDSMB VCC
1
C571
R279 R284
1
C 49K9R2F-L-GP C561 0R3-0-U-GP 1 C

C595
G
S
S
S
SCD1U10V2KX-4GP 25 ISL88731_BST 1 2ISL88731_BST1
2
4
3
2
1
BOOT ISL88731_LDO BAT54PT-GP
21 1 2
2
ISL88731_ACOK VDDP
13 ACOK
SC1U10V3KX-4GP 2008/11/13
CHG_AGND 24 ISL88731_DHI BT+
CHG_AGND UGATE
36,51 BAT_SCL 10 SCL 1 2 2008/11/04 L31
C575 R278
23 ISL88731_LX SCD1U50V3KX-GP ISL88731_LX 1 2 1 2
PHASE
68.1001B.10S
9 D01R2512F-4-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
36,51 BAT_SDA SDA ISL88731_DLO IND-10UH-119-GP
20
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
LGATE
C13
C15
C568
C563
5
6
7
8
1
G46
G45
14 19 U33
2008/11/04
D
D
D
D
NC#14 PGND
R276 10R2F-L-GP SI4800BDY-T1
2
18 ISL88731_CSIP_R 1 2
CHG_AGND CSOP
R272
1
2008/11/17 17 C567 84.04800.D37
ISL88731_CSIP
ISL88731_IINP CSON SCD22U50V3ZY-1GP
1 2 8 2ND = 84.08884.037
G
S
S
S
36 AD_IA ICM
4
3
2
1
ISL88731_CSIN
1KR2F-3-GP
R274
1ISL88731_CCV1
SCD01U16V2KX-3GP
1 2 ISL88731_CCV 6
10KR2F-2-GP VCOMP
5 NC#5 NC#16 16
1
R267 ISL88731_CCS 4 ICOMP

3
SCD01U50V2KX-1GP
R275
SCD01U50V2ZY-1GP
VREF
10KR2J-3-GP
C560
C564
DY 7
SC1U10V3KX-3GP
SCD1U25V2ZY-1GP
B NC#7 PBATT_SENSE_R B
12 15 1 2
GND
GND VFB BATT_SENSE 51

1
1
C565
C569
C562
2
C566
DY DY 100R2J-2-GP
SCD015U25V2KX-GP
2
29
DY ISL88731AHRZ-T-GP
74.88731.B73
20081008
1 2
2008/11/04
G44
GAP-CLOSE-PW R-2U
2008/12/18 CHG_AGND
3D3V_AUX_S5
1
R270
10KR2F-2-GP ISL88731_LDO
36 AC_IN#
AC_IN# 2
1
R268
10KR2F-2-GP
D
2
Q18 R269
A 2N7002-11-GP G 1 2 ISL88731_ACOK <Core Design> A
1
0R2J-2-GP
S
84.27002.W31 R266
2ND = 84.27002.Y31 15KR2J-1-GP Wistron Corporation
2008/11/17 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2
Title
ISL88731A Charger
A3 SB
JV50-PU
5 4 3 2 1
A B C D E
2008/11/06
2008/10/29
4 4
DCIN1 AD_JK
GND
6
Adaptor in to generate DCBATOUT AD+
5 2008/12/18
4 AD_JK
2
1 EC59 U29
SCD1U50V3KX-GP
2 DY 1 S D 8
3 2 S D 7
K
NP1 3 S D 6
1
C556 D9 AD+_2 4 G D 5
DC-JACK150-GP SCD1U50V3ZY-GP
P6SBMJ24APT-GP AO4433-GP
2
22.10037.G11 83.P6SBM.AAG 84.04433.A37
A
R256 C557 2ND = 84.04407.F37
1
200KR2F-L-GP SC1U50V5ZY-1-GP
Q13
2
R2
2
AD_OFF#_JK 1 R1
3
1
DTA124EUB-GP R255
Q12
AD_JK 1 AFTE14P-GP TP8 3 84.00124.T1K 100KR2J-1-GP
AD_JK 1 AFTE14P-GP TP7 1 R1
2
2ND = 84.00124.N1K
2
R2 3RD = 84.00124.K1K
36 AD_OFF DTC124EUB-GP
3 3
84.00124.S1K
2ND = 84.00124.M1K
1
3RD = 84.00124.H1K
R257
1KR2F-3-GP
2
BATTERY CONNECTOR BATA_SDA_1 1 AFTE14P-GP TP9

3D3V_AUX_S5 BATA_SCL_1 1 AFTE14P-GP TP10
BAT_IN#_1 1 AFTE14P-GP TP11
BT+ 1 AFTE14P-GP TP13
BT+ 1 AFTE14P-GP TP12
1
2
D10 DY D11 DY D12 DY
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U BAT1
83.00099.K11 83.00099.K11 83.00099.K11 9 GND
2ND = 83.00099.M11
2ND = 83.00099.M11
2ND = 83.00099.M11 8
3
GND
RN76 7 GND
1 8 6 GND
2 BATA_SDA_1 2
36,50 BAT_SDA 2 7 5 DAT
3 6 BATA_SCL_1 4
36,50 BAT_SCL CLK
4 5 BAT_IN#_1 3 BAT_IN
2 BT+2
SRN33J-7-GP 1 BT+1
36 BAT_IN# BT+
1
DY EC13 ALP-CON7-9-GP
1
DY EC16 DY EC19 EC14 DY 20.81094.007

K
SC10P50V2JN-4GP
SC10P50V2JN-4GP
EC17 DY EC18
2
SC1000P50V3JN-GP
SC1000P50V3JN-GP
D13 SCD1U50V3ZY-GP SCD1U50V3ZY-GP

2
MM3Z5V6T1G-GP
A
83.5R603.E3F 2008/11/10
3RD = 83.5R603.D3F 2008/11/15
R8
50 BATT_SENSE 1 2
0R0402-PAD
1 1
Wistron Corporation
Title
AD/BATT CONN
JV50-PU SB
A B C D E
5 4 3 2 1
1D8V_S0
3D3V_S5 2008/12/17
EC716 EC717 EC718 EC719 EC720 EC721 EC722 EC723 EC724 EC725 EC726 EC727 EC728 EC729 EC730 EC731 EC732 EC733 EC734 EC735 EC736
1
U16D DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
14
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
12
2
11
13
TSLVC08APW -1-GP
7
73.07408.L16 5V_S5
D 2ND = 73.07408.L15 3D3V_S0 D
DCBATOUT BT+ 2008/11/12 2008/11/12 1D1V_S0 2008/12/18
3RD = 73.07408.02B
1
1
EC7 EC8 EC9 EC10 EC12 EC20 EC46 EC25 EC37 EC21 EC15 EC52 EC53 EC54 EC99 EC100 EC55 EC101 EC102 EC103
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
2
2
1D8V_S3
VCC_CORE_S0_0 2008/12/17
2008/11/13
EC701 EC702 EC703 EC704 EC705 EC706 EC707 EC708 EC709 EC710 EC711 EC712 EC713 EC714 EC715
1
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
EC33 EC35 EC38
2
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
H9 DY DY DY
2
HOLE
C C
1
GND1 GND2 GND3 GND4 GND6 GND7 GND12 GND9

HOLE355X355R111-S1-GPHOLE355X355R111-S1-GPHOLE355X355R111-S1-GP HOLE355X355R111-S1-GP HOLE355X355R111-S1-GPHOLE355X355R111-S1-GPHOLE355X355R111-S1-GPHOLE355X355R111-S1-GP
GND5 GND10 GND11
SPRING-48-GP SPRING-48-GP SPRING-48-GP
34.43G01.002 34.43G01.002 34.43G01.002
1
1
DY DY DY
SPRING_GND14 SPRING_GND15 2008/11/10 2008/11/10 2008/11/10 2008/11/10 SPRING_GND21 SPRING_GND22

SPRING-7 SPRING-7 ASPRING_GND16 SPRING_GND17 ASPRING_GND18 ASPRING_GND19 ASPRING_GND20 SPRING-7 SPRING-7
SPRING-12-GP-U SPRING-12-GP-U SPRING-12-GP-U SPRING-12-GP-U SPRING-12-GP-U
34.49U26.001 34.49U26.001 34.41Y19.001 34.41Y19.001 34.41Y19.001 34.41Y19.001 34.41Y19.001

1
1
B B
DY DY DY DY DY DY DY DY DY
2008/10/27
2008/12/18 2008/12/18
ASPRING_GND22 ASPRING_GND21
SPRING-58-GP SPRING-62-GP
SA SB -1
1
DY
2008/11/12
TOP TOP BOT Check test point
3D3V_S0 TP233 TPAD14-GP
CPU NB VGA MDC MINI1 3D3V_AUX_S5 TP232 TPAD14-GP

AH1 AH2 AH3 AH4 AH5 AH6 H7 H10 H8 3D3V_S5 TP231 TPAD14-GP
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
5V_S5 TP230 TPAD14-GP
A A
12,36 PM_PW RBTN# TP229 TPAD14-GP
TP228 TPAD14-GP
Wistron Corporation
1
6,11 CPU_PW RGD 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
34.4Z003.001
34.4Z003.001
34.4Z003.001
34.4Z003.001
34.4Z003.001
34.4Z003.001
34.42Y01.011
34.4P901.001
DY Taipei Hsien 221, Taiwan, R.O.C.

35,36 S5_ENABLE TP227 TPAD14-GP
Title
2008/10/27 6,11 CPU_LDT_RST# TP226 TPAD14-GP
EMI/Spring/Boss
放放Dimm Door打
Test Point放打打打打打打 JV50-PU SB
5 4 3 2 1
5 4 3 2 1
AVGA1A 1 OF 8
PEG_RXP[15..0]
PEG_TXP[15..0] 8 PEG_RXP[15..0]
8 PEG_TXP[15..0] PEG_RXN[15..0]
PEG_TXN[15..0] 8 PEG_RXN[15..0]
8 PEG_TXN[15..0]
D PEG_TXP0 AA38 Y33 PEG_RXP0_1 C222 1 2 PEG_RXP0 D
PEG_TXN0 PCIE_RX0P PCIE_TX0P PEG_RXN0_1 SCD1U16V2KX-3GP PEG_RXN0
Y37 PCIE_RX0N PCIE_TX0N Y32 1 2
DIS
PEG_TXP1 Y35 W33 PEG_RXP1_1 C226 1 2
DIS PEG_RXP1
W36 PCIE_RX1N PCIE_TX1N W32 1 2
DIS
PEG_TXP2 W38 U33 PEG_RXP2_1 C257 1 2
DIS PEG_RXP2
V37 PCIE_RX2N PCIE_TX2N U32 1 2
DIS
PEG_TXP3 PEG_RXP3_1 C268 DIS PEG_RXP3
V35 PCIE_RX3P PCIE_TX3P U30 1 2
PEG_TXN3 U36 U29 PEG_RXN3_1 SCD1U16V2KX-3GP 1 2 PEG_RXN3
PCIE_RX3N PCIE_TX3N C248 SCD1U16V2KX-3GP
DIS
PEG_TXP4 U38 T33 PEG_RXP4_1 C278 1 2
DIS PEG_RXP4
T37 T32 1 2
PCI EXPRESS INTERFACE

DIS
T35 PCIE_RX5P PCIE_TX5P T30 1 2
PEG_TXN5 R36 T29 PEG_RXN5_1 SCD1U16V2KX-3GP 1 2 PEG_RXN5
DIS
R38 PCIE_RX6P PCIE_TX6P P33 1 2
PEG_TXN6 P37 P32 PEG_RXN6_1 SCD1U16V2KX-3GP 1 2 PEG_RXN6
DIS
PEG_TXP7 P35 P30 PEG_RXP7_1 C307 1 2
DIS PEG_RXP7
C PEG_TXN7 PCIE_RX7P PCIE_TX7P PEG_RXN7_1 SCD1U16V2KX-3GP PEG_RXN7 C
N36 PCIE_RX7N PCIE_TX7N P29 1 2
DIS
N38 PCIE_RX8P PCIE_TX8P N33 1 2
PEG_TXN8 M37 N32 PEG_RXN8_1 SCD1U16V2KX-3GP 1 2 PEG_RXN8
DIS
M35 PCIE_RX9P PCIE_TX9P N30 1 2
PEG_TXN9 L36 N29 PEG_RXN9_1 SCD1U16V2KX-3GP 1 2 PEG_RXN9
DIS
L38 PCIE_RX10P PCIE_TX10P L33 1 2
PEG_TXN10 K37 L32 PEG_RXN10_1 SCD1U16V2KX-3GP 1 2 PEG_RXN10
DIS
K35 PCIE_RX11P PCIE_TX11P L30 1 2
PEG_TXN11 J36 L29 PEG_RXN11_1 SCD1U16V2KX-3GP 1 2 PEG_RXN11
DIS
PEG_TXP12 J38 K33 PEG_RXP12_1 C314 1 2
DIS PEG_RXP12
H37 PCIE_RX12N PCIE_TX12N K32 1 2
DIS
H35 PCIE_RX13P PCIE_TX13P J33 1 2
PEG_TXN13 G36 J32 PEG_RXN13_1 SCD1U16V2KX-3GP 1 2 PEG_RXN13
DIS
G38 PCIE_RX14P PCIE_TX14P K30 1 2
PEG_TXN14 F37 K29 PEG_RXN14_1 SCD1U16V2KX-3GP 1 2 PEG_RXN14
B PCIE_RX14N PCIE_TX14N C360 SCD1U16V2KX-3GP B
DIS
PEG_TXP15 F35 H33 PEG_RXP15_1 C352 1 2
DIS PEG_RXP15
E37 PCIE_RX15N PCIE_TX15N H32 1 2
DIS
DIS
CLOCK
3 CLK_PCIE_PEG AB35 PCIE_REFCLKP
3 CLK_PCIE_PEG# AA36 PCIE_REFCLKN 1D1V_M92
CALIBRATION R89 DIS 1K27R2F-L-GP

AJ21 NC#AJ21 PCIE_CALRP Y30 1 2
AK21 NC#AK21
AH16 NC_PWRGOOD PCIE_CALRN Y29 1 2
R99 2KR3F-L-GP
11,32,33,34,37 PLT_RST1#_B 1 2 PLT_RST1#_M92_1 AA30
R423 0R2J-2-GP PERST# DIS
DIS
1
M92-M2-GP
DY DIS
C780
2
SC47P50V2JN-3GP
A M92 A
Wistron Corporation
Title
M92 PCIE
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
DPLL_PVDD
L7
1 DIS 2
Layout notice:
1D8V_S0
BLM15BD121SN1D-GP
It should be pleace near HDMI connector
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C138
C147
C121 C123
1
DIS DIS AVGA1B 2 OF 8
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DIS DIS AVGA1G 7 OF 8
2
AU24 TX2P_DPAP3 C696
SCD1U16V2KX-3GP 1 2
TXCAP_DPA3P TMDS_A_TXC+ 21
2008/11/07 AV23 TX2P_DPAN3 DIS 1 2 LVDS CONTROL AK27 BLON_IN 2008/11/04
TXCAM_DPA3N TMDS_A_TXC- 21 VARY_BL BLON_IN 36
2008/11/05 C697
SCD1U16V2KX-3GP DIS AJ27 LCDVDD_ON 19
TX2P_DPAP2 C694
SCD1U16V2KX-3GP 1 DIGON
AT25 2 TMDS_A_TX0+ 21
MUTI GFX TX0P_DPA2P TX2P_DPAN2
TX0M_DPA2N
AR24 DIS 1 2 TMDS_A_TX0- 21
DIS DPLL_VDDC 1D8V_S0 1D8V_S0 1D8V_S0 1D8V_S0 DPA C695
SCD1U16V2KX-3GP DIS
L6
4
3
D AU26 TX2P_DPAP1 C692
SCD1U16V2KX-3GP 1 2 D
TX1P_DPA1P TMDS_A_TX1+ 21
1 2 AV25 TX2P_DPAN1 DIS 1 2 TMDS_A_TX1- 21 AK35 LVDS_TXBCLK+ 19 RN38
1D1V_M92
2
TX1M_DPA1N C693
SCD1U16V2KX-3GP TXCLK_UP_DPF3P
DIS TXCLK_UN_DPF3N
AL36 LVDS_TXBCLK- 19 DIS SRN10KJ-11-GP-U
BLM15BD121SN1D-GP R365 R367 R370 R371 AR8 AT27 TX2P_DPAP0 C690
SCD1U16V2KX-3GP 1 2
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DVPCNTL_MVP_0 TX2P_DPA0P TMDS_A_TX2+ 21
C130
C126
C122 AU8 AR26 TX2P_DPAN0 DIS 1 2 AJ38
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
TMDS_A_TX2- 21 LVDS_TXBOUT0+ 19
1
1
DVPCNTL_MVP_1 TX2M_DPA0N TXOUT_U0P_DPF2P
C120
DIS DIS DIS DIS DY DIS DY DY AP8 C691
SCD1U16V2KX-3GP DIS AK37 LVDS_TXBOUT0- 19
1
2
DVPCNTL_0 TXOUT_U0N_DPF2N
SC10U6D3V3MX-GP
AW8 AR30 2008/11/03
1
DVPCNTL_1 TXCBP_DPB3P
AR3 AT29 AH35 LVDS_TXBOUT1+ 19
2
8
7
6
5
8
7
6
5
DVPCNTL_2 TXCBM_DPB3N TXOUT_U1P_DPF1P
AR1 AJ36 LVDS_TXBOUT1- 19
MEM_ID0 DVPCLK RN82 RN81 TXOUT_U1N_DPF1N
AU1 AV31
MEM_ID1 DVPDATA_0 TX3P_DPB2P
AU3 AU30 SRN499F-GP SRN499F-GP AG38 LVDS_TXBOUT2+ 19
MEM_ID2 DVPDATA_1 DPB TX3M_DPB2N TXOUT_U2P_DPF0P
AW3 AH37 LVDS_TXBOUT2- 19
MEM_ID3 DVPDATA_2 TXOUT_U2N_DPF0N
AP6 AR32
2008/11/04 DVPDATA_3 TX4P_DPB1P
AW5 AT31 DIS DIS 2008/11/10 AF35
1
2
3
4
1
2
3
4
DVPDATA_4 TX4M_DPB1N TXOUT_U3P
AU5 AG36
DVPDATA_5 TXOUT_U3N
AR6 AT33
2
DVPDATA_6 TX5P_DPB0P
AW6 AU32
DVPDATA_7 TX5M_DPB0N LVTMDP
DVPDATA [3:2:1:0] for VRAM type 2008/10/27 R363 R368 R369 R374 AU6
DVPDATA_8
selection H/W strap 10KR2J-3-GP AT7 AU14
DVPDATA_9 TXCCP_DPC3P
DIS DY DIS DIS AV7
DVPDATA_10 TXCCM_DPC3N
AV13
TXCLK_LP_DPE3P
AP34 LVDS_TXACLK+ 19
Should provide VRAM Table for VBios AN7 AR34 LVDS_TXACLK- 19
1
DVPDATA_11 TXCLK_LN_DPE3N
request AV9 AT15
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
DVPDATA_12 TX0P_DPC2P
AT9 AR14 AW37 LVDS_TXAOUT0+ 19
DVPDATA_13 TX0M_DPC2N TXOUT_L0P_DPE2P
AR10 AU35
D
DVPDATA_14 5V_S0 TXOUT_L0N_DPE2N LVDS_TXAOUT0- 19
DVPDATA [3:0] AW10 DPC AU16
DVPDATA_15 TX1P_DPC1P
0100 512MB Hynix-H5PS1G63EFR-20L (500MHz) AU10
DVPDATA_16 TX1M_DPC1N
AV15 DIS TXOUT_L1P_DPE1P
AR37 LVDS_TXAOUT1+ 19
AP10 AU39 LVDS_TXAOUT1- 19
1000 512MB Samsung-K4N1G164QE-HC20 (500MHz) DVPDATA_17 TXOUT_L1N_DPE1N
AV11 AT17 G
DVPDATA_18 TX2P_DPC0P 2N7002E-1-GP
1100 512MB QIMONDA HYB18T1G161C2F-20 (500MHz) AT11 AR16 AP35 LVDS_TXAOUT2+ 19
1
DVPDATA_19 TX2M_DPC0N Q22 TXOUT_L2P_DPE0P
AR12 AR35 LVDS_TXAOUT2- 19
S
DVPDATA_20 R324 TXOUT_L2N_DPE0N
AW12 AU20
DVPDATA_21 TXCDP_DPD3P 100KR2F-L1-GP
AU12
DVPDATA_22 TXCDM_DPD3N
AT19 84.2N702.D31 TXOUT_L3P
AN36
AP12
DVPDATA_23 DIS 2ND = 84.2N702.I31 TXOUT_L3N
AP37
AT21
2
TX3P_DPD2P
AR20
TX3M_DPD2N
DPD AU22 2008/11/12
TX4P_DPD1P M92-M2-GP
It's strap for GDDR3-136ball AV21
TX4M_DPD1N
Need to Clarify I2C
TX5P_DPD0P
AT23 CRT_RED
DIS
AR22
TX5M_DPD0N CRT_GREEN
C
19 LCD_EDID_CLK AK26 C
3D3V_M92 SCL
19 LCD_EDID_DAT AJ26
SDA CRT_BLUE
AD39 CRT_RED 20
8
7
6
5
GENERAL PURPOSE I/O R
AD37
R# RN86
57 GPIO_VGA_00 AH20
GPIO_0 SRN150F-1-GP
57 GPIO_VGA_01 AH18 AE36 CRT_GREEN 20
2
GPIO_1 G
57 GPIO_VGA_02 AN16
GPIO_2 G#
AD35 DIS 1 2
R75 1 GPIO_VGA_03 AH23
TP83 GPIO_VGA_04 GPIO_3_SMBDATA R80 0R2J-2-GP
10KR2J-3-GP 1 AJ23 AF37 CRT_BLUE 20 2008/12/17
1
2
3
4
TP80 GPIO_4_SMBCLK B
DIS 57 GPIO_VGA_05 AH17
GPIO_5_AC_BATT B#
AE38 2008/12/18 DIS
1 AJ17 DAC1
1
TP84 GPIO_6 AVSSQ

AK17 AC36 CRT_HSYNC 20,57
GPIO_7_BLON HSYNC
2008/11/03 57 GPIO_VGA_08 AJ13
GPIO_8_ROMSO VSYNC
AC38 CRT_VSYNC 20,57
Thermal_int AH15
57 GPIO_VGA_09 GPIO_9_ROMSI
AJ16 R82 499R2F-2-GP
GPIO_10_ROMSCK
57 GPIO_VGA_11 AK16
GPIO_11 RSET
AB34 1 DIS 2
AL16 DAC2_VDD2DI 1D8V_S0 DAC1_AVDD 1D8V_S0
57 GPIO_VGA_12 GPIO_12
AM16 AD34 65mA DAC1_AVDD R52 0R2J-2-GP
57 GPIO_VGA_13 GPIO_13 AVDD
1 AM14 AE34 AVSSQ 1 2 L14 1 2
GPIO_14_HPD2 AVSSQ
C158
C118
C119
C182
C183
C184
2008/11/03 TP64 AM13 DIS BLM15BD121SN1D-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
60 PWRCNTL_0
1
R354 2 GPIO_15_PWRCNTL_0 C187
3 CLK_27M_SSIN DY 1 AK14
GPIO_16_SSIN VDD1DI
AC33 100mA DAC1_VDD1DI DIS
SC10U6D3V3MX-GP
0R2J-2-GP Thermal_int AG30 AC34 AVSSQ DIS
GPIO_17_THERMAL_INT VSS1DI
1 AN14 DIS DIS DIS DIS DIS DIS
2
THERMTRIP_VGA TP66 GPIO_18_HPD3
1 2008/11/03 AM17
GPIO_19_CTF
TP79 60 PWRCNTL_1 AL13 AC30
R355 1 GPIO_20_PWRCNTL_1 R2
DIS 2 AJ14
GPIO_21_BB_EN R2#
AC31
10KR2J-3-GP AK13
57 GPIO_VGA_22 GPIO_22_ROMCSB
2008/11/03 1 AN13 AD30 AVSSQ
TP184 JTAG_TRSTB GPIO_23_CLKREQB G2
AM23 AD31
JTAG_TRSTB G2#
1 AN23
TP65 JTAG_TDI DAC2_A2VDD 3D3V_M92 DAC1_VDD1DI 1D8V_S0
1 AK23 AF30
1KR2J-1-GP
1
TP73 JTAG_TCK B2 R70 0R2J-2-GP

1 AL24 AF31
JTAG_TMS B2#
R53
TP72 1 AM24 1 2 L17 1 2

JTAG_TDO
C173
C160
C159
C220
C221
DIS TP71 1 AJ19 DIS BLM15BD121SN1D-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1
1
GENERICA
Back Bias (body bias) which minimizes TP85 1 AK19
GENERICB C
AC32 C156 C204
DIS
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
TP76 1 AJ20 AD32
power consumption in battery modes.
2
TP81 GENERICC Y
1 AK20 AF32 DIS DIS DIS DIS DIS DIS DIS
2
PD = Disable TP74 GENERICD COMP
1 AJ24
TP78 GENERICE_HPD4 DAC2
PU = Enable 1 AH26
GENERICF
TP75 1 AH24 AD29
B TP82 GENERICG H2SYNC B
AC29
1D8V_S0 V2SYNC
HPD1 AK24 100mA
HPD1
AG31 DAC2_VDD2DI
1
VDD2DI
AG32
R73 VSS2DI DAC2_A2VDDQ 1D8V_S0
499R2F-2-GP VREFG VOLTAGE DIVIDER IS 130mA
DIS AG33 L19 1 2 3D3V_M92
(VREFG = VDDR4,5(1.8V) / 3 = 0.6V) A2VDD DAC2_A2VDD
C202
C201
2mA BLM15BD121SN1D-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
2
1
AD33 DAC2_A2VDDQ
VGA_VREFG A2VDDQ DIS
AH13
VREFG
AF33 DIS DIS
2
1
A2VSSQ
DIS
R69 C152 R418
1
249R2F-GP
DIS DIS SCD1U16V2KX-3GP AA29 1 2
2
R2SET 715R2F-GP C559

DIS
SCD1U16V2KX-3GP
2
2
DPLL_PVDD DDC/AUX AM26 U31
PLL/CLOCK DDC1CLK CRT_DDCCLK 20
120mA DDC1DATA
AN26 CRT_DDCDATA 20
AM32 R2711 2 0R2J-2-GP SMBC_G781 8 1
DPLL_VDDC DPLL_PVDD 35,36 SMBC_Therm SMBCLK VCC
Depending on OSC used select voltage divider resist AN32 AM27 R2731 DIS 2 0R2J-2-GP SMBD_G781 7 2 GPU_DPLUS
DPLL_PVSS AUX1P 35,36 SMBD_Therm SMBDATA DXP
AL27 DIS ALERT#_G781 6 3 GPU_DMINUS
values R25 R70 to ensure XTALIN voltage level of 300mA AUX1N
5
ALERT# DXN
4
1.8V GND THERM#
AN31 AM19 HDMI_A_CLK 21
DPLL_VDDC DDC2CLK
AL19 HDMI_A_DAT 21
0R0402-PAD DDC2DATA
DIS G781P8F-GP
R212 1 2 XTALIN AV33 AN20
3 CLK_27M_M92 XTALIN AUX2P
XTALOUT AU34 AM20
XTALOUT AUX2N
2008/12/17
2008/12/17 AL30
4
3
DDCCLK_AUX3P
AM30
DDCDATA_AUX3N RN75
2008/12/17
For Thermal sensor AL29 3D3V_M92 SRN2K2J-1-GP
GPU_DPLUS DDCCLK_AUX4P
AF29
DPLUS DDCDATA_AUX4N
AM29 DIS
GPU_DMINUS AG29 THERMAL
DMINUS
AN21
1
2
DDCCLK_AUX5P
L10 DDCDATA_AUX5N
AM21 DIS
TP77 1 FAN_PWM AK32
C
TSVDD TS_FDO
1D8V_S0 1 DIS 220mA AJ32
TSVDD DDC6CLK
AJ30
AJ33 AJ31 Q21 B HDMI_A_HPD 21
A BLM15BD121SN1D-GP TSVSS DDC6DATA MMBT3904-4-GP A
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
1
C125
C153
AK30 2008/11/07 3D3V_M92

E
1
R360 NC_DDCCLK_AUX7P
DIS DIS NC_DDCDATA_AUX7N
AK29
DIS 1MR2J-1-GP HPD1 84.T3904.C11
X6 2ND = 84.03904.L06
2
1
2
M92
3 2 M92-M2-GP DIS R325
10KR2J-3-GP
DIS Wistron Corporation
2
2008/12/17 SB 4 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

1
C678 Title
SC22P50V2JN-4GP XTAL-27MHZ-54-GP C689 M92 IO
2
DIS DIS SC22P50V2JN-4GP

2
82.30034.421 DIS Size Document Number Rev

A2
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
1D8V_S0
D D
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
C245
C305
C247
C246
1
1
AVGA1E 5 OF 8 C224
SC10U6D3V3MX-GP
1D8V_S0 DIS DIS DIS DIS DIS
MEM I/O
2
PCIE
AC7 AA31
VDDR1 PCIE_VDDR
AD11 AA32
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDR1 PCIE_VDDR
AF7 AA33
1
VDDR1 PCIE_VDDR
C339
C345
C341
C335
C323
C342
C195
AG10 AA34
VDDR1 PCIE_VDDR
DIS DIS DIS DIS DIS DIS DIS AJ7
VDDR1 PCIE_VDDR
V28
AK8 W29
2
VDDR1 PCIE_VDDR
AL9 W30
VDDR1 PCIE_VDDR 1D1V_M92
G11 Y31
VDDR1 PCIE_VDDR
G14
VDDR1
G17
VDDR1
G20 G30
VDDR1 PCIE_VDDC
G23 G31
VDDR1 PCIE_VDDC
G26 H29
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDR1 PCIE_VDDC
C313
C306
C321
C337
C298
C283
C329
C276
G29 H30
1
VDDR1 PCIE_VDDC
C317
C219
C199
C318
C336
C188
C171
H10 J29 C350
VDDR1 PCIE_VDDC
SC10U6D3V3MX-GP
DIS DIS DIS DIS DIS DIS DIS J7
VDDR1 PCIE_VDDC
J30 DIS DIS DIS DIS DIS DIS DIS DIS
J9 L28 DIS
2
VDDR1 PCIE_VDDC
K11 M28
VDDR1 PCIE_VDDC
K13 N28
VDDR1 PCIE_VDDC
K8 R28
VDDR1 PCIE_VDDC
L12 T28
VDDR1 PCIE_VDDC
L16 U28
VDDR1 PCIE_VDDC
L21
VDDR1
L23
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDR1
L26 AA15
SC1U6D3V2KX-GP
1
1
VDDR1 VDDC
C169
C291
C302
C325
C164
C330 L7 CORE AA17
1
VDDR1 VDDC
C334
DIS M11 AA20 VCC_GFX_CORE
VDDR1 VDDC
SC10U6D3V3MX-GP
DIS DIS DIS DIS DIS DIS N11 AA22

2
2
VDDR1 VDDC
2 P7 AA24
VDDR1 VDDC
R11 AA27
VDDR1 VDDC
U11 AB13
VDDR1 VDDC
U7 AB16
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
VDDR1 VDDC
C216
C269
C290
C297
C267
C277
C266
C162
C210
C265
C270
C223
C228
C157
C234
C Y11 AB18 C
1
VDDR1 VDDC
Y7 AB21
VDDR1 VDDC
VDDC
AB23 DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
AB26
2
1D8V_S0 VDDC
L22 AB28
VDDC
AC12
VDD_CT LEVEL VDDC
1 DIS 2 VDDC
AC15
BLM15BD121SN1D-GP TRANSLATION AC17
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
VDDC
POWER
AF26 AC20
1
VDD_CT VDDC
C197
C198
C167
C168
C327 AF27 AC22
VDD_CT VDDC
SC10U6D3V3MX-GP
DIS DIS DIS DIS DIS AG26

VDD_CT VDDC
AC24
AG27 AC27
2
VDD_CT VDDC
AD13
VDDC
AD16
I/O VDDC
AD18
VDDC VCC_GFX_CORE
AF23 AD21
VDDR3 VDDC
AF24 AD23
3D3V_M92 VDDR3 VDDC
AG23 AD26
VDDR3 VDDC
AG24 AF17
VDDR3 VDDC
AF20
VDDC
AF22
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1
VDDC
SC10U6D3V3MX-GP
AF13 AG16 C296 C200 C165 C189 C190 C208 C235 C172 C185 C209
1
VDDR5 VDDC
C166
C175
C191
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
C668 AF15 AG18
VDDR5 VDDC
DIS AG13 AG21 DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
2
VDDR5 VDDC
DIS DIS DIS AG15 AH22
2
VDDR5 VDDC
M16
VDDC
M18
VDDC
AD12 M23
VDDR4 VDDC
AF11 M26
1D8V_S0 VDDR4 VDDC
AF12 N15
VDDR4 VDDC
AG11 N17
VDDR4 VDDC
N20
VDDC
N22
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1D8V_S0 VDDC
N24
1
VDDC
C326
C260
C272
C149
L20 MEM CLK N27

DIS DIS DIS DIS 1 2
N96? +VDDRHA M20
VDDRHA
VDDC
VDDC
R13
BLM15BD121SN1D-GP M21 R16
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2
VSSRHA VDDC
DIS R18
1
1D8V_S0 VDDC
C242
C243
DIS L21 R21 VCC_GFX_CORE

+VDDRHA VDDC
1 DIS 2 V12
VDDRHB VDDC
R23
DIS BLM15BD121SN1D-GP U12 R26
2
B VSSRHB VDDC B
T15
C310 C311 VDDC
DIS DIS VDDC
T17
SC1U6D3V2KX-GP SC1U6D3V2KX-GP T20
2
VDDC
T22
1
PLL VDDC C355 C284 C300 C225
T24
VDDC
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
PCIE_PVDD AB37 T27
PCIE_PVDD VDDC
U16 DIS DIS DIS DIS
2
VDDC
H7 U18
NC_MPV18#1 VDDC
H8 U21
NC_MPV18#2 VDDC
U23
1D8V_S0 PCIE_PVDD VDDC
L46 U26
VDDC
DIS AM10
NC_SPV18 VDDC
V15
1 2 V17
BLM15BD121SN1D-GP VDDC
SPV10 AN9 V20
SPV10 VDDC
V22
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
VDDC
SC10U6D3V3MX-GP
C726
AN10 V24
1
SPVSS VDDC
C727
C729 V27
VDDC
DIS DIS VDDC
Y16
DIS Y18
2
VDDC VCC_GFX_CORE
Y21
VCC_GFX_CORE BACK BIAS VDDC
Y23
VDDC
Y26
VDDC
AA13 Y28
BBP VDDC
Y13 AH27
BBP VDDC
AH28
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDC
C275
C230
C282
C274
C304
1
1
M15 C357
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDCI
SC10U6D3V3MX-GP
C229
C211
ISOLATED N13 DIS DIS

1
CORE I/O VDDCI

R12 DIS DIS DIS DIS
2
VDDCI
T12
VDDCI
DIS
2
VCC_GFX_CORE SPV10 DIS

L11
1 2 M92-M2-GP
BLM15BD121SN1D-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
DIS
SC10U6D3V3MX-GP
C134
1
DIS
C137
C133 DIS
DIS
DIS
2
A A
M92
Wistron Corporation
Title
M92 POWER
A2
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
AVGA1F 6 OF 8
AB39 A3
PCIE_VSS GND
E39 A37
PCIE_VSS GND
F34 AA16
PCIE_VSS GND
F39 AA18
PCIE_VSS GND
G33 AA2
PCIE_VSS GND
G34 AA21
PCIE_VSS GND
H31 AA23
PCIE_VSS GND
D H34 AA26 D
PCIE_VSS GND
H39 AA28
PCIE_VSS GND
J31 AA6
PCIE_VSS GND
J34 AB12
PCIE_VSS GND
K31 AB15
AVGA1H 8 OF 8 PCIE_VSS GND
K34 AB17
PCIE_VSS GND
K39 AB20
DP C/D POWER DP A/B POWER PCIE_VSS GND
L31 AB22
PCIE_VSS GND
L34 AB24
PCIE_VSS GND
AP20 AN24 M34 AB27
NC_DPC_VDD18#1 NC_DPA_VDD18#1 PCIE_VSS GND
AP21 AP24 M39 AC11
NC_DPC_VDD18#2 NC_DPA_VDD18#2 PCIE_VSS GND
N31 AC13
1D1V_M92 1D1V_M92 PCIE_VSS GND
N34 AC16
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
L8 PCIE_VSS GND
P31 AC18
DPA_VDD10 PCIE_VSS GND
1 R349 2 AP13 AP31 1 2 P34 AC2
DPC_VDD10 DPA_VDD10 PCIE_VSS GND
C131
C128
0R0603-PAD AT13 AP32 BLM18PG300SN-GP P39 AC21
1
DPC_VDD10 DPA_VDD10 PCIE_VSS GND
2008/10/27 C124 DIS R34 AC23
PCIE_VSS GND
SC10U6D3V3MX-GP
DIS DIS DIS T31
PCIE_VSS GND
AC26
AN17 AN27 T34 AC28
2
DPC_VSSR DPA_VSSR PCIE_VSS GND
AP16 AP27 T39 AC6
AP17 AP28 U31 AD15
AW14 AW24 U34 AD17
AW16 AW26 V34 AD20
V39 AD22
PCIE_VSS GND
W31 AD24
PCIE_VSS GND
W34 AD27
PCIE_VSS GND
AP22 AP25 Y34 AD9
NC_DPD_VDD18#1 NC_DPB_VDD18#1 PCIE_VSS GND
AP23 AP26 Y39 AE2
NC_DPD_VDD18#2 NC_DPB_VDD18#2 PCIE_VSS GND
AE6
1D1V_M92 1D1V_M92 GND
AF10
GND
AF16
DPB_VDD10 GND
1 R348 2 AP14 AN33 1 R65 2 AF18
0R0603-PAD DPD_VDD10 DPB_VDD10 0R0603-PAD GND
AP15 AP33 AF21
2008/10/27 DPD_VDD10 DPB_VDD10
2008/10/27
F15
GND
GND GND
GND
GND
AG17
AG2
F17 AG20
GND GND
AN19 AN29 F19 AG22
DPD_VSSR DPB_VSSR GND GND
AP18 AP29 F21 AG6
AP19 AP30 F23 AG9
AW20 AW30 F25 AH21
AW22 AW32 F27 AH29
C F29 AJ10 C
1D8V_S0 1D8V_S0 GND GND
F31 AJ11
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
L41 L9 GND GND

F33 AJ2
GND GND
1 2 2 R359
DIS 1 AW18 AW28 1 R358 2 1 2 F7 AJ28
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
DPCD_CALR DPAB_CALR GND GND
C708
C155
C136
C132
BLM15BD121SN1D-GP DIS BLM15BD121SN1D-GP F9 AJ6
1
1
C709 150R2F-1-GP 150R2F-1-GP C127 GND GND
DIS DIS G2
GND GND
AK11
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DIS DIS DIS DIS 1D8V_S0 G6 AK31
DP E/F POWER DP PLL POWER GND GND
DIS DIS DPE_VDD18 AH34 AU28 DPA_PVDD H9 AK7
2
2
DPE_VDD18 DPA_PVDD GND GND
AJ34 AV27 1 R51 2 J2 AL11
DPE_VDD18 DPA_PVSS 0R0603-PAD GND GND
J27 AL14
GND GND
1D1V_M92 2008/10/27 J6 AL17
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
L13 GND GND

J8 AL2
DPE_VDD10 DPB_PVDD GND GND
2 1 AL33 AV29 K14 AL20
DPE_VDD10 DPB_PVDD GND GND
C141
C140
BLM18PG300SN-GP AM33 AR28 K7 AL21

1
C135 DPE_VDD10 DPB_PVSS GND GND

DIS L11
GND GND
AL23
SC10U6D3V3MX-GP
DIS 1D8V_S0 L17 AL26

GND GND
DIS DIS L2 AL32
2
DPC_PVDD GND GND

AN34 AU18 1 R351 2 L22 AL6
DPE_VSSR DPC_PVDD 0R0603-PAD GND GND
AP39 AV17 L24 AL8
1D8V_S0 DPE_VSSR DPC_PVSS GND GND
L43 AR39
DPE_VSSR
2008/10/27 L6
GND GND
AM11
AU37 DPD_PVDD M17 AM31
DPE_VSSR GND GND
1 2 AW35 M22 AM9
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
DPE_VSSR GND GND

C711
C186
BLM15BD121SN1D-GP AV19 M24 AN11

1
C712 DPD_PVDD GND GND

DIS DPD_PVSS
AR18 N16
GND GND
AN2
SC10U6D3V3MX-GP
DIS N18
GND GND
AN30
DIS DIS DPF_VDD18 AF34 DPE_PVDD N2 AN6
2
DPF_VDD18 GND GND

AG34 N21 AN8
DPF_VDD18 DPD_PVDD 1D8V_S0 GND GND
AM37 N23 AP11
1D1V_M92 DPE_PVDD GND GND
AN38 N26 AP7
L12 DPE_PVSS GND GND
1 R350 2 N6 AP9
DPF_VDD10 1D8V_S0 GND GND
2 1 AK33 2008/10/27 0R0603-PAD R15 AR5
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
DPF_VDD10 L44 GND GND

C145
C151
BLM18PG300SN-GP AK34 R17 AW34

1
C143 DPF_VDD10 DPF_PVDD GND GND

DIS AL38 1 2 R2 B11
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
NC_DPF_PVDD GND GND
SC10U6D3V3MX-GP
C717
C718
DIS AM35 BLM15BD121SN1D-GP R20 B13
1
NC_DPF_PVSS C719 GND GND
DIS DIS DIS R22 B15
2
GND GND
SC10U6D3V3MX-GP
AF39
DPF_VSSR
DIS R24
GND GND
B17
AH39 DIS DIS R27 B19
2
DPF_VSSR GND GND
AK39 R6 B21
DPF_VSSR DPE_PVDD 1D8V_S0 GND GND
AL34 L42 T11 B23
DPF_VSSR GND GND
AM34 T13 B25
DPF_VSSR GND GND
1 2 T16 B27
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
GND GND
C714
C715
B BLM15BD121SN1D-GP T18 B29 B
1
C713 GND GND
DIS T21
GND GND
B31
SC10U6D3V3MX-GP
2 R68 1 AM39 DIS T23 B33
DPEF_CALR GND GND
DIS DIS DIS T26 B7
2
150R2F-1-GP GND GND
U15 B9
M92-M2-GP GND GND
U17 C1
GND GND
DIS U2
GND GND
C39
U20 E35
GND GND
U22 E5
GND GND
U24 F11
GND GND
U27 F13
GND GND
U6
GND
V11
GND
V16
GND
V18
GND
V21
GND
V23
GND
V26
GND
W2
GND
W6
GND
Y15
GND
Y17
GND
Y20
GND
Y22 A39
GND VSS_MECH
Y24 AW1
GND VSS_MECH
Y27 AW39
GND VSS_MECH
U13
GND
V13
GND
M92-M2-GP
DIS
A A
M92
Wistron Corporation
Title
DP POWER_GND
A2
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
M92-M2 uses memory group B only THEY MUST NOT CONFLICT DURING RESET
H2SYNC, GENERICC
AVGA1D 4 OF 8
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
58,59 MDB[0..63] 3D3V_M92
MAB[0..12] 58,59 THEY MUST NOT CONFLICT DURING RESET
MDB0 C5 P8 MAB0
MDB1 DQB_0 MAB_0 MAB1
C3
DQB_1 MAB_1
T9 54 GPIO_VGA_00 R63 1 2 10KR2J-3-GP GPIO_28_TDO , GPIO21_BB_EN
MDB2 E3 P9 MAB2
MEMORY INTERFACE B
E1 N7 DIS
MDB4 DQB_3 MAB_3 MAB4 R62
F1 N8 1 2 10KR2J-3-GP
MDB5 DQB_4 MAB_4 MAB5 54 GPIO_VGA_01
F3 N9
F5 U9 DIS
MDB7 DQB_6 MAB_6 MAB7 R58
D G4 U8 54 GPIO_VGA_02 1 2 10KR2J-3-GP D
H5
DQB_8 MAB_8
Y9 If BIOS_ROM_EN (GPIO22) = 0 If BIOS_ROM_EN (GPIO22) = 1
MDB9 H6 W9 MAB9
DQB_9 MAB_9 DIS
MDB10 J4 AC8 MAB10 R61 1 2 10KR2J-3-GP Size of the primary
MDB11 DQB_10 MAB_10 MAB11 54 GPIO_VGA_05
K6
DQB_11 MAB_11
AC9 memory apertures GPIO[13,12,11] Manufacturer Part Number GPIO[13,12,11]
MDB12 K5 AA7 MAB12 2008/11/27 DIS
MDB13 DQB_12 MAB_12 BA2 R54
L4 AA8 BA2 58,59 54 GPIO_VGA_08 1 2 10KR2J-3-GP
MDB14 DQB_13 MAB_13/BA2 BA0
M6
DQB_14 MAB_14/BA0
Y8 BA0 58,59 128MB x000 M25P05A 0100
MDB15 M1 AA9 BA1 2008/11/27 DY ST
MDB16 DQB_15 MAB_15/BA1 BA1 58,59
R56
256MB x001 M25P10A 0101
M3 54 GPIO_VGA_09 1 2 10KR2J-3-GP V Microelectronics
MDB17 DQB_16 DQMB#0 64MB x010 M25P20 0101
M5 H3
MDB18 DQB_17 DQMB_0 DQMB#1
N4
DQB_18 DQMB_1
H1 DY 32MB x M25P40 0101
MDB19 P6 T3 DQMB#2 R57 1 2 10KR2J-3-GP
MDB20 P5
DQB_19 DQMB_2
T5 DQMB#3
54 GPIO_VGA_11 512MB x M25P80 0101
MDB21 DQB_20 DQMB_3 DQMB#4 1GB x
R4 AE4 DIS
MDB22 DQB_21 DQMB_4 DQMB#5 Chingis
T6
DQB_22 DQMB_5
AF5 2008/11/27 2GB x Pm25LV512A 0100
MDB23 T1 AK6 DQMB#6 R55 1 2 10KR2J-3-GP (formerly PMC)
DQB_23 DQMB_6 54 GPIO_VGA_22 4GB x Pm25LV010A 0101
MDB24 U4 AK5 DQMB#7
MDB25 DQB_24 DQMB_7
V6 DY
MDB26 DQB_25 RDQSB0
V1 F6 DQMB#[0..7] 58,59
MDB27 DQB_26 QSB_0/RDQSB_0 RDQSB1
V3 K3
Y6 P3 2008/11/04
MDB29 DQB_28 QSB_2/RDQSB_2 RDQSB3 RECOMMENDED SETTINGS
Y1 V5
MDB30 DQB_29 QSB_3/RDQSB_3 RDQSB4 R377
Y3 AB5 20,54 CRT_HSYNC 1 2 10KR2J-3-GP STRAPS PIN DESCRIPTION 0= DO NOT INSTALL RESISTOR
( 0.5 * VDDR1 ) ( for SSTL-1.8/SSTL-2/DDR2 ) Y5
DQB_31 QSB_5/RDQSB_5
AH1 1 = INSTALL 10K RESISTOR
( 0.7 * VDDR1 ) ( for GDDR3/GDDR4 ) MDB32 AA4 AJ9 RDQSB6 R378 1 2 10KR2J-3-GP
DQB_32 QSB_6/RDQSB_6 20,54 CRT_VSYNC DIS X = DESIGN DEPENDANT
MDB33 AB6 AM5 RDQSB7 NA = NOT APPLICABLE
MDB34 DQB_33 QSB_7/RDQSB_7 PCIE FULL TX OUTPUT SWING
AB1 RDQSB[0..7] 58,59 DIS
MDB35 DQB_34 WDQSB0
AB3 G7 Tansmitter Power Savings Enable
MDB36 DQB_35 QSB_0B/WDQSB_0 WDQSB1
DIVIDER RESISTORS DDR2 DDR3 AD6
DQB_36 QSB_1B/WDQSB_1
K1 54 GPIO_VGA_12
R60 1 2 10KR2J-3-GP TX_PWRS_ENB GPIO0 0= 50% Tx output swing
MDB37 AD1 P1 WDQSB2
1= Full Tx output swing
AD3
W4 DIS (Internal PD) 1
MVREF TO 1.8V 100R 40.2R MDB39 AD5 AC4 WDQSB4 R59 1 2 10KR2J-3-GP
DQB_39 QSB_4B/WDQSB_4 54 GPIO_VGA_13
MDB40 AF1 AH3 WDQSB5
AF3
AJ8 DIS Transmitter De-emphasis Enable
MVREF TO GND 100R 100R MDB42 AF6 AM3 WDQSB7 TX_DEEMPH_EN GPIO1 0= Tx de-emphasis disabled
MDB43 DQB_42 QSB_7B/WDQSB_7 1
AG4 WDQSB[0..7] 58,59 1= Tx de-emphasis enabled
MDB44 DQB_43 ODTB0
AH5
DQB_44 ODTB0
T7 ODTB0 58 (Internal PD)
MDB45 AH6 W7 ODTB1
MDB46 DQB_45 ODTB1 ODTB1 59
AJ4
MDB47 DQB_46 CLKB0 PCIE GNE2 ENABLED
AK3 L9 CLKB0 58
1D8V_S0 MDB48 DQB_47 CLKB0 CLKB0#
C AF8
DQB_48 CLKB0#
L8 CLKB0# 58 HDMI must only be enabled on systems that are 0 = Advertises the PCI-E device C
MDB49 AF9 BIF_GEN2_EN_A GPIO2 as 2.5GT/s
MDB50 AG8
DQB_49
AD8 CLKB1
legally entitled. It is the responsibility of the system 1
MDB51 DQB_50 CLKB1 CLKB1#
CLKB1 59 designer to ensure that the system is entitled to 1 = Advertises the PCI-E device
AG7 AD7 CLKB1# 59
1
R435 MDB52 DQB_51 CLKB1# as 5GT/s

AK9
DQB_52 support this feature.
DIS 100R2F-L1-GP-U MDB53 AL7 T10 RASB0#
MDB54 DQB_53 RASB0# RASB1# RASB0# 58
AM8 Y10 RASB1# 59
MDB55 DQB_54 RASB1#
AM7
DQB_55
AC_BATT GPIO5 AC (Performance mode) = 3.3 V
MDB56 AK1 W10 CASB0#
CASB0# 58 Battery saving mode = 0.0 V
2
MDB57 DQB_56 CASB0# CASB1#

AL4 AA10 CASB1# 59
MDB58 DQB_57 CASB1#
AM6
DQB_58
C789
C792
MDB59 AM1 P10 CSB0#_0

SCD01U16V2KX-3GP
SCD1U16V2KX-3GP
1D8V_S0 DQB_59 CSB0_0# CSB0#_0 58

MDB60 AN4 L10 BIF_CLK_PM_EN
1
MDB61 DQB_60 CSB0_1#

R432 AP3
DQB_61 ROMSO GPIO8 Serial ROM Output from ROM 0
100R2F-L1-GP-U MDB62 AP1 AD10 CSB1#_0
DQB_62 CSB1_0# CSB1#_0 59
DIS DIS DIS MDB63 AP5 AC10
2
2
1
R436 DQB_63 CSB1_1# VGA ENABLED

100R2F-L1-GP-U U10 CKEB0 ROMSI GPIO9 Serial ROM Input to ROM 0
2
MVREFDB CKEB0 CKEB1 CKEB0 58

DIS Y12
MVREFDB CKEB1
AA11 CKEB1 59
MVREFSB AA12
MVREFSB WEB0# SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
N10
2
WEB0# WEB0# 58
AB11 WEB1# if BIOS_ROM_EN=1,then Config[3:0]
WEB1# WEB1# 59
ROMIDCFG[3:0] defines the ROM type X X X
C790
C793
GPIO[13,12,11]
SCD01U16V2KX-3GP
SCD1U16V2KX-3GP
TESTEN if BIOS_ROM_EN=0,then Config[3:0]

AD28 (Internal PD)
1
R433 TESTEN defines the primary memory apeture size

100R2F-L1-GP-U DIS CLKTESTA AK10
CLKTESTB CLKTESTA
DIS DIS AL10 AH11
2
CLKTESTB DRAM_RST
PWRCNTL_[1,0] GPIO[15,20] Power control signals to control the core
1
R417 R357 R356

voltage regulator
2
1
1KR2J-1-GP
4K7R2F-GP
4K7R2F-GP
DIS DIS DIS

M92-M2-GP BB_EN GPIO21 Back Bias (body bias) which minimizes
2
STRAPS PIN DESCRIPTION power consumption in battery modes.

2
DIS 0V = Disable 0
GPIO DVPDATA(23:20) Initialization Behavior: This signal is input during 3D3V = Enable
reset (no reference clock is required). After reset,
(Internal PD) the default state is output low (0 V).
B The signals above can be left unconnected if not AUD[1:0] B
used. AUD[1] VGA_HSYNC 00:No audio function
AUD[0] VGA_VSYNC
01:Audio for DisplayPort and HDMI
( if adapter is detected) 1
(Internal PD) 10:Audio for DisplayPort only
11:Audio for both DisplayPort and HDMI
CCBYPASS GENERICC 0
A A
M92
Wistron Corporation
Title
Memory / Straps
A2
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
AFBRAM3
BA0 L2 B9 MDB26 AFBRAM4
57,59 BA0 BA0 DQ15
BA1 L3 B1 MDB31 BA0 L2 B9 MDB1
57,59 BA1 BA1 DQ14 57,59 BA0 BA0 DQ15
D9 MDB25 BA1 L3 B1 MDB0
DQ13 57,59 BA1 BA1 DQ14
MAB12 R2 D1 MDB30 D9 MDB3
MAB11 A12 DQ12 MDB28 MAB12 DQ13 MDB7 MAB[12..0]
P7 A11 DQ11 D3 R2 A12 DQ12 D1 57,59 MAB[12..0]
MAB10 M2 D7 MDB24 MAB11 P7 D3 MDB4
MAB9 A10/AP DQ10 MDB29 MAB10 A11 DQ11 MDB5
P3 A9 DQ9 C2 M2 A10/AP DQ10 D7
MAB8 P8 C8 MDB27 MAB9 P3 C2 MDB2 2008/10/30
MAB7 A8 DQ8 MDB19 MAB8 A9 DQ9 MDB6 MDB[63..0]
P2 A7 DQ7 F9 2008/10/30 P8 A8 DQ8 C8 57,59 MDB[63..0]
D MAB6 N7 F1 MDB22 MAB7 P2 F9 MDB9 D
MAB5 A6 DQ6 MDB18 MAB6 A7 DQ7 MDB12
N3 A5 DQ5 H9 N7 A6 DQ6 F1
MAB4 N8 H1 MDB16 MAB5 N3 H9 MDB11
N2 A3 DQ3 H3 N8 A4 DQ4 H1
MAB2 M7 H7 MDB17 MAB3 N2 H3 MDB13
M3 A1 DQ1 G2 M7 A2 DQ2 H7
MAB0 M8 G8 MDB20 MAB1 M3 G2 MDB14 CLKB0#
A0 DQ0 MAB0 A1 DQ1 MDB8
M8 A0 DQ0 G8
CLKB0
CLKB0# K8 A9
57 CLKB0# CK# VDDQ
1
CLKB0 J8 C1 CLKB0# K8 A9
57 CLKB0 CK VDDQ 57 CLKB0# CLKB0 CK# VDDQ R409 R408
VDDQ C3 57 CLKB0 J8 CK VDDQ C1
CKEB0 K2 C7 C3 DIS
57 CKEB0 CKE VDDQ VDDQ
56R2F-1-GP
56R2F-1-GP
C9 CKEB0 K2 C7 DIS
VDDQ 57 CKEB0 CKE VDDQ
E9 C9
2
VDDQ 1D8V_S0 VDDQ
VDDQ G1 VDDQ E9
CSB0#_0 L8 G3 G1 1D8V_S0
57 CSB0#_0 CS# VDDQ CSB0#_0 VDDQ
VDDQ G7 57 CSB0#_0 L8 CS# VDDQ G3
W EB0# K3 G9 G7
57 W EB0# WE# VDDQ W EB0# VDDQ
57 W EB0# K3 WE# VDDQ G9
RASB0# K7 A1
57 RASB0# RAS# VDD RASB0#
VDD E1 57 RASB0# K7 RAS# VDD A1
CASB0# L7 J9 E1 1
57 CASB0# CAS# VDD L48 VDD
M9 CASB0# L7 J9 DIS C763
VDD 57 CASB0# CAS# VDD L51
DQMB#2 F3 R1 1 DIS 2 M9 DIS 2 SCD47U6D3V2KX-GP
57 DQMB#2 DQMB#3 LDM VDD BLM15BD121SN1D-GP DQMB#1 VDD
57 DQMB#3 B3 UDM 57 DQMB#1 F3 LDM VDD R1 1 2
2008/10/30 J1 DQMB#0 B3 BLM15BD121SN1D-GP
VDDL 57 DQMB#0 UDM
VSSDL J7 2008/10/30 VDDL J1
1
ODTB0 K9 DIS DIS J7
57 ODTB0 ODT VSSDL
1
C C759 C760 ODTB0 K9 C
SCD1U16V2KX-3GP SC1U6D3V2KX-GP 57 ODTB0 ODT C797 C798
DIS DIS
2
RDQSB2 F7 SCD1U16V2KX-3GP SC1U6D3V2KX-GP
2
1D8V_S0 57 RDQSB2 W DQSB2 LDQS RDQSB1
57 W DQSB2 E8 LDQS# VSSQ A7 57 RDQSB1 F7 LDQS
B2 1D8V_S0 W DQSB1 E8 A7
VSSQ 57 W DQSB1 LDQS# VSSQ
2008/10/30 VSSQ B8 VSSQ B2
1
VSSQ D2 2008/10/30 VSSQ B8
1
R405 RDQSB3 B7 D8 D2
4K99R2F-L-GP 57 RDQSB3 W DQSB3 UDQS VSSQ R425 RDQSB0 VSSQ
DIS 57 W DQSB3 A8 UDQS# VSSQ E7 57 RDQSB0 B7 UDQS VSSQ D8
2008/10/30 F2 4K99R2F-L-GP DIS W DQSB0 A8 E7
VSSQ 57 W DQSB0 UDQS# VSSQ
F8 F2
2
VSSQ VSSQ
J2 H2 F8
2
VREF VSSQ VSSQ
VSSQ H8 J2 VREF VSSQ H2
1
R404 C762 A2 H8
NC#A2 VSSQ
1
1
E2 A3 R424 C788 A2
NC#E2 VSS NC#A2
1
4K99R2F-L-GP
SCD1U16V2KX-3GP
BA2 L1 E3 DIS E2 A3
57,59 BA2 NC#L1/BA2 VSS NC#E2 VSS
4K99R2F-L-GP
SCD1U16V2KX-3GP
DIS DIS R3 J3 DIS BA2 L1 E3
2
NC#R3/A14 VSS 57,59 BA2 NC#L1/BA2 VSS

R7 N1 R3 J3
2
2
NC#R7/A15 VSS NC#R3/A14 VSS
R8 P9 R7 N1
2
R8 NC#R8/A13 VSS P9
DIS H5PS1G63EFR-20L-GP
72.51G63.A0U
2008/11/11 72.51G63.A0U
2008/11/11
B 1D8V_S0 B
C812 C796 C783 C390 C399 C813 C804 C748 C758 C756 C755 C747 C757 C764
1
1
C765 C743 C821 C818
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
2
2
DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
DIS DIS DIS DIS
A M92 A
Wistron Corporation
Title
DDR2 B0
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
AFBRAM2
BA0 L2 B9 MDB33 AFBRAM1
57,58 BA0 BA0 DQ15
BA1 L3 B1 MDB32 BA0 L2 B9 MDB49
57,58 BA1 BA1 DQ14 57,58 BA0 BA0 DQ15
D9 MDB38 BA1 L3 B1 MDB51
DQ13 57,58 BA1 BA1 DQ14
D MAB12 R2 D1 MDB35 D9 MDB52 D
MAB11 A12 DQ12 MDB39 MAB12 DQ13 MDB48
P7 A11 DQ11 D3 R2 A12 DQ12 D1
MAB10 M2 D7 MDB37 MAB11 P7 D3 MDB53 MAB[12..0]
A10/AP DQ10 A11 DQ11 57,58 MAB[12..0]
MAB9 P3 C2 MDB34 MAB10 M2 D7 MDB54
MAB8 A9 DQ9 MDB36 MAB9 A10/AP DQ10 MDB55
P8 A8 DQ8 C8 P3 A9 DQ9 C2
MAB7 P2 F9 MDB40 MAB8 P8 C8 MDB50 2008/10/30
MAB6 A7 DQ7 MDB42 MAB7 A8 DQ8 MDB63 MDB[63..0]
N7 A6 DQ6 F1 2008/10/30 P2 A7 DQ7 F9 57,58 MDB[63..0]
MAB5 N3 H9 MDB46 MAB6 N7 F1 MDB56
N8 A4 DQ4 H1 N3 A5 DQ5 H9
MAB3 N2 H3 MDB47 MAB4 N8 H1 MDB57
M7 A2 DQ2 H7 N2 A3 DQ3 H3
MAB1 M3 G2 MDB41 MAB2 M7 H7 MDB62
M8 A0 DQ0 G8 M3 A1 DQ1 G2
MAB0 M8 G8 MDB60
A0 DQ0
CLKB1# K8 A9
57 CLKB1# CLKB1 CK# VDDQ CLKB1#
57 CLKB1 J8 CK VDDQ C1 57 CLKB1# K8 CK# VDDQ A9
C3 CLKB1 J8 C1
CKEB1 VDDQ 57 CLKB1 CK VDDQ
57 CKEB1 K2 CKE VDDQ C7 VDDQ C3
C9 CKEB1 K2 C7 CLKB1#
VDDQ 57 CKEB1 CKE VDDQ
VDDQ E9 VDDQ C9
G1 1D8V_S0 E9 CLKB1
CSB1#_0 VDDQ VDDQ 1D8V_S0
57 CSB1#_0 L8 CS# VDDQ G3 VDDQ G1
1
G7 CSB1#_0 L8 G3
W EB1# VDDQ 57 CSB1#_0 CS# VDDQ R362 R361
57 W EB1# K3 WE# VDDQ G9 VDDQ G7
W EB1# K3 G9
57 W EB1# WE# VDDQ
56R2F-1-GP
56R2F-1-GP
RASB1# K7 A1 DIS DIS
57 RASB1# RAS# VDD RASB1#
E1 K7 A1
2
CASB1# VDD 57 RASB1# RAS# VDD
57 CASB1# L7 CAS# VDD J9 L45 VDD E1
C M9 CASB1# L7 J9 C
VDD 57 CASB1# CAS# VDD L39
DQMB#5 F3 R1 1 DIS 2 M9
57 DQMB#5 DQMB#4 LDM VDD BLM15BD121SN1D-GP DQMB#7 VDD
57 DQMB#4 B3 UDM 57 DQMB#7 F3 LDM VDD R1 1 DIS 2
2008/10/30 J1 DQMB#6 B3 BLM15BD121SN1D-GP
VDDL 57 DQMB#6 UDM
VSSDL J7 2008/10/30 VDDL J1
1
ODTB1 K9 J7
57 ODTB1 ODT VSSDL
1
C721 DIS C720 DIS ODTB1 K9 1
SCD1U16V2KX-3GP SC1U6D3V2KX-GP 57 ODTB1 ODT C681 C680 C699
DIS DIS DIS
2
RDQSB5 F7 SCD1U16V2KX-3GP SC1U6D3V2KX-GP 2 SCD47U6D3V2KX-GP
2
1D8V_S0 57 RDQSB5 W DQSB5 LDQS RDQSB7
57 W DQSB5 E8 LDQS# VSSQ A7 57 RDQSB7 F7 LDQS
2008/10/30 B2 1D8V_S0 W DQSB7 E8 A7
VSSQ 57 W DQSB7 LDQS# VSSQ
VSSQ B8 VSSQ B2
1
VSSQ D2 VSSQ B8
1
R373 RDQSB4 B7 D8 D2
4K99R2F-L-GP 57 RDQSB4 W DQSB4 UDQS VSSQ R346 RDQSB6 VSSQ
DIS 57 W DQSB4 A8 UDQS# VSSQ E7 57 RDQSB6 B7 UDQS VSSQ D8
2008/10/30 F2 4K99R2F-L-GP DIS W DQSB6 A8 E7
VSSQ 57 W DQSB6 UDQS# VSSQ
F8 2008/10/30 F2
2
VSSQ VSSQ
J2 H2 F8
2
VREF VSSQ VSSQ
VSSQ H8 J2 VREF VSSQ H2
1
R372 C716 A2 H8
NC#A2 VSSQ
1
1
E2 A3 R345 C684 A2
NC#E2 VSS NC#A2
1
4K99R2F-L-GP
SCD1U16V2KX-3GP
DIS DIS BA2 L1 E3 E2 A3

57,58 BA2 NC#L1/BA2 VSS NC#E2 VSS
4K99R2F-L-GP
SCD1U16V2KX-3GP
R3 J3 BA2 L1 E3
2
NC#R3/A14 VSS 57,58 BA2 NC#L1/BA2 VSS

R7 N1 DIS DIS R3 J3
2
2
R8 P9 R7 N1
2
R8 NC#R8/A13 VSS P9
B B
72.51G63.A0U
72.51G63.A0U
1D8V_S0
C192 C170 C663 C660 C144 C212 C163 C214 C724 C671 C672 C676 C683 C688
1
1
C698 C662 C710 C728
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DIS
2
2
DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
DIS DIS DIS DIS
A M92 A
Wistron Corporation
Title
M92 DDR2 B1
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
DCBATOUT DCBATOUT_8202_VGA
G87
1 2
GAP-CLOSE-PW R
G88 5V_S5
1 2
1
GAP-CLOSE-PW R
G89 DIS R454
TC30 1 2 10R2F-L-GP
1
DCBATOUT_8202_VGA
SE100U25VM-L1-GP
D DIS GAP-CLOSE-PW R 5V_S5 D
2
G90 RT8202_VDD_VGA
2
1 2
1
DIS D28
GAP-CLOSE-PW R DIS C831 CH521S-30-GP-U1
Iomax=8A, OCP>12A
5
6
7
8
DCBATOUT_8202_VGA SC1U10V3ZY-6GP C824 C823 C828 C826
1
D
D
D
D
3D3V_S0 83.00521.01F U51 DIS DIS DIS DIS
VGA_CORE_PW R VCC_GFX_CORE
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
1 R461 2 RT8202_TON_VGA 5V_S5 2ND = 83.R2003.F8F
2
1MR2F-GP SI4800BDY-T1
RT8202_BST_VGA
79.10712.L02 3RD = 83.R2003.J8F
2
1
1
2ND = 79.10112.3JL DIS C842 84.04800.D37 DIS G77
3RD = 79.10712.6JL R449 SC1KP50V2KX-1GP 2ND = 84.08884.037 1 2
1
10KR2F-2-GP
G
S
S
S
DIS DIS
2
DIS C830 GAP-CLOSE-PW R
R450
4
3
2
1
SC1U10V3ZY-6GP DIS G78
2
2
2 1 C835 1 2
9
U55 1 2RT8202_LX_VGA
1
DIS 0R0402-PAD-1-GP DIS RT8202_DH_VGA 2ND = 68.1R51A.10G VGA_CORE_PW R GAP-CLOSE-PW R
VDD
VDDP
C827 R460 SCD1U25V3KX-GP L50 G80
SC100P50V2JN-3GP 16 13 RT8202_BST_VGA_L
1 2 RT8202_LX_VGA DIS1 2 1 2
2
RT8202_PGOOD_VGA TON BOOT RT8202_DH_VGA 1R2F-GP IND-1D5UH-34-GP C843

4 PGOOD UGATE 12
11 RT8202_LX_VGA 68.1R510.10J GAP-CLOSE-PW R
PHASE
5
6
7
8
R462 8 RT8202_DL_VGA G81
LGATE R455
1
D
D
D
D
SCD1U10V2KX-4GP
1 2 RT8202_EN_VGA 15 DIS DIS 1 2
12,34,35,36,42,44,49 PM_SLP_S3# EN/DEM
1
0R2J-2-GP 10 RT8202_OC_VGA_L 1 2 RT8202_LX_VGA U52 TC26
OC
1
DIS C846 DY 3 RT8202_FB_VGA DIS SI4812BDY-T1-E3-GP TC27 SE390U2D5VM-2GP GAP-CLOSE-PW R
2
FB SE330U2VDM-L-GP
5 DIS 2008/12/18 84.04812.A37 G82
2
SCD1U25V3ZY-1GP NC#5 VGA_CORE_PW R 8K2R2F-1-GP
14 1 2ND = 84.08878.037 DIS 1 2
2
NC#14 VOUT
G
S
S
S
DY
PGND
GAP-CLOSE-PW R
GND
GND
4
3
2
1
C C
79.3971V.6AL G84
2ND = 77.93971.02L 1 2
RT8202APQW -GP
17
6
79.33719.L01 GAP-CLOSE-PW R
2ND = 77.C3371.051 G79
RT8202_DL_VGA 1 2
GAP-CLOSE-PW R
G75
1 2
RT8202_FB_VGA
GAP-CLOSE-PW R
G83
1 2
Vout=0.75*(1+Rh/Rl) GAP-CLOSE-PW R
G76
1 2
1
1
DIS R459 GAP-CLOSE-PW R

C833 DIS 12KR2F-L-GP
SC47P50V2JN-3GP
2
RT8202_FB_VGA
2
1
2008/11/07
1
R458 R451
R452 DY 110KR2F-L-GP DIS 30KR2F-GP
DIS 59KR2F-GP
2
2
B B
2
Q26 Q25
D
D
2N7002-7F-GP 2N7002-7F-GP
DY R463 DIS R453
2008/11/14 G NV_VID1 1 2 G NV_VID0 1 DIS 2
PW RCNTL_1 54 PW RCNTL_0 54
DY
S
S
1
1
84.27002.N31 DY 84.27002.N31 DIS
2ND = 84.27002.Y31 C848 2ND = 84.27002.Y31 C829
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2
2
A A
Wistron Corporation
Title
RT8202A_VGA CORE
A3
JV50-PU SB
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
HISTORY
A3 JV50-PU SB
5 4 3 2 1

JV50-PU Block Diagram: AMD Giffin CPU S1G2 (35W)

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JV50-PU Block Diagram: AMD Giffin CPU S1G2 (35W)

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5 4 3 2 1

Project code: 91.4CH01.001

667/800 MHz LCD S SYSTEM DC/DC

INT MIC 8,9,10

VDD48 CLKREQ3# CLKREQ4#

DY DY 27MHz non-spreading singled clock on pin 5

Place close to socket 1.5Amp

D1 VLDT_A0 HT LINK VLDT_B0 AE2

8 HT_NB_CPU_CAD_H0 E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CPU_NB_CAD_H0 8

8 HT_NB_CPU_CLK_H0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CPU_NB_CLK_H0 8

8 HT_NB_CPU_CTL_H0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CPU_NB_CTL_H0 8

The Processor has

LDT_STP#_CPU PWROK THERMTRIP#

10KR2J-3-GP RSVD3 RSVD8

LDT_PW ROK_G RSVD4 RSVD7

Near CPU PIN CPU_DBRDY 9 10

CPU_PW RGD_SVID_REG 1 2 LDT_PW ROK CPU_TRST# 17 18

ACPU1F VCC_CORE_S0_0 36A for VDD0&VDD1

D25 VSS50 VSS115 U12

F13 VSS54 VSS119 V2

HYPER TRANSPORT CPU I/F

4 HT_CPU_NB_CAD_H8 AC24 HT_RXCAD8P HT_TXCAD8P F21 HT_NB_CPU_CAD_H8 4

4 HT_CPU_NB_CLK_H0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_NB_CPU_CLK_H0 4

4 HT_CPU_NB_CTL_H0 M22 HT_RXCTL0P HT_TXCTL0P M24 HT_NB_CPU_CTL_H0 4

GFX_RX10P GFX_TX10P HDMI_DATA0- 21

11 ALINK_NBRX_SBTX_P0 AA8 AD7 ALINK_NBTX_SBRX_P0 C642 1 2 SCD1U16V2KX-3GP

R36 R37 R38 A18 GMCH_TXBOUT0- 19

G17 REDb TXOUT_U1N B17 GMCH_TXBOUT1- 19

1D8V_S0 GREENb TXOUT_U2N

20 GMCH_HSYNC A11 DAC_HSYNC TXCLK_LP B16 GMCH_TXACLK+ 19

20 GMCH_VSYNC B11 DAC_VSYNC TXCLK_LN A16 GMCH_TXACLK- 19

0R2J-2-GP SC1U10V2KX-1GP 715R2F-GP 2008/11/04 DAC_RSET 1D8V_S0_VDDLP18

TC1 220ohm 200mA C78 SYSREST# D8 C16 C652 DY C653

68.00119.111 DY C77 A10 C18 SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP

SC47U6D3V5MX-1-GP SCD1U10V2KX-4GP NB_ALLOW _LDTSTOP LDTSTOP# VSSLT5

C42 STRP_DATA B10 AD8 RS780_DXN3_1

A R19 <Core Design> A

VDDHTTX_11 VDDC_9 VSS13 VSSAPCIE31

2ND = 68.00216.161 DY DY T10 VDDA18PCIE_8 VDDC_20 U12 W15 VSS24

VDDA18PCIE_9 VDDC_21 VSS25 VSS1

C59 1 R320 2 +1.8V_RUN_VDD18_MEM AE11 H11

0R0603-PAD AD11 H12 +3.3V_RUN_VDD33 1 R30 2

PCI EXPRESS INTERFACE

220 ohm 2A C810 P25 R5

Place R <100mils form pins T25,T24 U5

M24 NB_HT_CLKP CBE0# W2

TP210 J20 AE3 INT_PIRQH# LPC_LAD[0..3]

2 2ND 1 = 82.30001.861 32K_X2 B3 X2 LFRAME# H25 LPC_LFRAME# 36,37

6 CPU_LDT_STOP# G25 LDT_STP# VBAT B2 1 2

6,52 CPU_LDT_RST# G24 R158 62.70001.011

9,42 NB_PW RGD 2 DY 1 NB_PW RGD_R ASB1D

ACPI / WAKE UP EVENTS

EC45 EC44 EC43 EC80 EC82 C24

R151 ACZ_RST#_R 15 B25

R439 R448 C23

TP147 1 IMC_GPIO5 E24 D18

C859 C857 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

PLACE SATA AC DECOUPLING

D C370 1 2SCD01U50V2KX-1GP SATA_TXP0_C AD9

AB12 SATA_TX2P IDE_D0/GPIO15 AD24

Very Close to SB700 AB16

SATA_X1 LAN_RST#/GPIO13 ROM_RST#

C786 C770 C772 AA15 >30mil Width H17 U14