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  • Schematics document for Hummingbird1_HR DIS/UMA/Muxless solutions

    Încărcat de

    Michael Vola
    116 vizualizări102 pagini
    This document provides a block diagram and specifications for the Hummingbird1_HR motherboard. It shows the Intel Sandy Bridge CPU connected to dual channel DDR3 memory and various voltage regulators that provide power to different subsystems from the main battery voltage input. Revisions and manufacturer information are also included at the bottom.

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    Titlu original

    7084d_acer_aspire_s3-951_wistron_hummingbird1_hr_intel_discrete_uma_rev_2_sch.pdf

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    This document provides a block diagram and specifications for the Hummingbird1_HR motherboard. It shows the Intel Sandy Bridge CPU connected to dual channel DDR3 memory and various voltage regulators that provide power to different subsystems from the main battery voltage input. Revisions and manufacturer information are also included at the bottom.

    Drepturi de autor:

    © All Rights Reserved
    Descărcați ca PDF, TXT sau citiți online pe Scribd
    Indicator pentru conținut neadecvat
    116 vizualizări102 pagini

    Schematics document for Hummingbird1_HR DIS/UMA/Muxless solutions

    Încărcat de

    Michael Vola
    This document provides a block diagram and specifications for the Hummingbird1_HR motherboard. It shows the Intel Sandy Bridge CPU connected to dual channel DDR3 memory and various voltage regulators that provide power to different subsystems from the main battery voltage input. Revisions and manufacturer information are also included at the bottom.

    Drepturi de autor:

    © All Rights Reserved
    Descărcați ca PDF, TXT sau citiți online pe Scribd
    Indicator pentru conținut neadecvat
    din 102

    5 4 3 2 1

    Hummingbird1_HR
    DIS/UMA/Muxless Schematics Document
    D

    Sandy Bridge D

    Intel PCH

    C C

    DY :None Installed ANNIE: ONLY FOR ANNIE solution.


    PSL: KBC795 PSL circuit for 10mW solution installed.
    DIS:DIS installed 10mW: External circuit for 10mW solution installed.
    DIS_Muxless :BOTH DIS or Muxless installed 65W: for 65W adaptor installed.
    DIS_PX:BOTH DIS or PX installed 90W: for 90W adaptor installed.
    DIS_PX_Muxless:DIS or PX or Muxless installed.
    Muxless: Muxless installed.(PX4.0)
    PX:MUX installed.(PX3.0)
    B PX_Muxless:BOTH PX or Muxless installed. B

    UMA:UMA installed
    UMA_Muxless:BOTH UMA or Muxless installed
    UMA_PX_Muxless:UMA or PX or Muxless installed

    <Variant Name>

    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Cover Page
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 1 of 102

    5 4 3 2 1
    5 4 3 2 1

    SYSTEM DC/DC CPU DC/DC


    APL5916KAI 48 NCP6131S52MNR 42~43
    Project code : 91.4QP01.001 INPUTS OUTPUTS INPUTS OUTPUTS
    PCB P/N : 1D05V_PWR 0D85V_S0 DCBATOUT VCC_CORE

    Revision : 2 Hummingbird1_HR Block Diagram SYSTEM DC/DC


    UP6128PQDD 45

    D
    INPUTS OUTPUTS D
    DCBATOUT 1D05V_VTT
    RAM x 8 RAM x 8
    SYSTEM DC/DC
    UP6183PQAG 41
    Intel CPU
    RAM x 8 RAM x 8 INPUTS OUTPUTS
    DDRIII 1066/1333 Channel A 5V_AUX_S5
    3D3V_AUX_S5
    DCBATOUT 5V_S5
    Sandy Bridge 3D3V_S5
    RAM x 8 RAM x 8
    FSB: 1066 MHz
    SYSTEM DC/DC
    RAM x 8 RAM x 8 UP6165BQKF 46
    INPUTS OUTPUTS
    1D5V_S3
    4,5,6,7,8,9,10,11,12,13 DCBATOUT 0D75V_S0
    DDR_VREF_S3

    SYSTEM DC/DC
    NCP5911MNTBG 44
    C
    FDIx4x2 C
    DMIx4 INPUTS OUTPUTS
    DCBATOUT VCC_GFXCORE_PWR

    HDMI VGA
    HDMI 92
    51 Intel PCI-E x1 RT8208BGQW
    USB x1 Mini-Card
    FPC 802.11a/b/g
    INPUTS OUTPUTS
    LVDS(Single Channel)
    LCD PCH MINI Board
    DCBATOUT VGA_CORE
    49
    Cougar Point SATA x1 M-SATA TI CHARGER
    FFC BQ24745RHDR 40
    14 USB 2.0/1.1 ports INPUTS OUTPUTS
    ETHERNET (10/100/1000Mb) Charger signal Charger Circuit
    DCBATOUT BT+
    High Definition Audio 26
    SATA ports (6) SYSTEM DC/DC
    RT9025 47
    PCIE ports (8)
    Left Side: INPUTS OUTPUTS
    USB x 2 LPC I/F
    B ACPI 1.1 3D3V_S0 1D8V_S0 B

    USB2.0 x 3
    Card Reader CardReader SYSTEM DC/DC
    FFC USB 2.0 x 1 RT9025-25PSP 93
    RTS5129
    SD/MMC
    Board
    17,18,19,20,21,22,23,24,25,26 INPUTS
    26 OUTPUTS
    1D5V_S3 1V_VGA_S0
    CAMERA 49
    3D3V_S5 1D8V_VGA_S0

    AZALIA
    Switches
    SPI

    SATA x1 HDD INPUTS OUTPUTS


    LPC Bus

    56 1D5V_S3 1D5V_VGA_S0
    3D3V_S0 3D3V_VGA_S0
    Internal Digital MIC Azalia Flash ROM LPC debug port
    CODEC 4MB 60 71
    PCB LAYER
    HP1
    ALC271X-VB3 KBC L1:Top L4:Signal
    SMBus L2:VCC L5:GND
    29 L3:Signal L6:Bottom
    A
    NUVOTON HR PX A
    NPCE795P 27

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.
    2CH SPEAKER Title
    Thermal
    Touch Int. ENE P2800 Block Diagram
    Fan Size Document Number Rev
    PAD KB 28 A3
    69 69 2528 Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 2 of 102
    5 4 3 2 1
    A B C D E
    PCH Strapping Huron River Schematic Checklist Rev.0_7 Processor Strapping Huron River Schematic Checklist Rev.0_7
    Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
    SPKR Reboot option at power-up 1 unless specified otherwise) Value
    Default Mode: Internal weak Pull-down.
    No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-kΩ CFG[2] PCI-Express Static 1: Normal Operation.
    - 10-kΩ weak pull-up resistor. Lane Numbers Reversed 15 -> 0, 14 -> 1, ... 1
    Lane Reversal 0:
    INIT3_3V# Weak internal pull-up. Leave as "No Connect".
    Disabled - No Physical Display Port attached to
    GNT3#/GPIO55 GNT[3:0]# functionality is not available on Mobile. CFG[4] 1: Embedded DisplayPort.
    4 GNT2#/GPIO53 Mobile: Used as GPIO only
    Enabled - An external Display Port device is
    0 4
    GNT1#/GPIO51 Pull-up resistors are not required on these signals. 0: connectd to the EMBEDDED display Port
    If pull-ups are used, they should be tied to the Vcc3_3power rail.
    CFG[6:5] PCI-Express 11 : x16 - Device 1 functions 1 and 2 disabled
    Enable Danbury: Connect to Vcc3_3 with 8.2-k? weak pull-up resistor. Port Bifurcation 10 : x8, x8 - Device 1 function 1 enabled ;
    SPI_MOSI function 2 disabled
    Straps 11
    Disable Danbury:Left floating, no pull-down required. 01 : Reserved - (Device 1 function 1 disabled ;
    function 2 enabled)
    00 : x8, x4, x4 - Device 1 functions 1 and 2
    Enable Danbury: Connect to +NVRAM_VCCQ with 8.2-kohm enabled
    weak pull-up resistor [CRB has it pulled up
    NV_ALE with 1-kohm no-stuff resistor] CFG[7] PEG DEFER TRAINING 1: PEG Train immediately following xxRESETB de assertion
    1
    0: PEG Wait for BIOS for training
    Disable Danbury:Leave floating (internal pull-down)

    NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
    Low (0) - Flash Descriptor Security will be overridden. Also,
    when this signals is sampled on the rising edge of PWROK
    then it will also disable Intel ME and its features. Voltage Rails
    HAD_DOCK_EN# High (1) - Security measure defined in the Flash Descriptor will be enabled. POWER PLANE VOLTAGE DESCRIPTION
    Platform design should provide appropriate pull-up or pull-down depending on ACTIVE IN
    /GPIO[33]
    3 the desired settings. If a jumper option is used to tie this signal to GND as 5V_S0
    3D3V_S0
    5V
    3.3V 3
    required by the functional strap, the signal should be pulled low through a weak 1D8V_S0 1.8V
    pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. 1D5V_S0 1.5V
    1D05V_VTT 1.05V
    Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal 0D85V_S0 0.95 - 0.85V
    pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for 0D75V_S0 0.75V
    strapping functions. VCC_CORE 0.35V to 1.5V
    VCC_GFXCORE 0.4 to 1.25V S0
    1D8V_VGA_S0 1.8V
    3D3V_VGA_S0 3.3V CPU Core Rail
    HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. 1V_VGA_S0 1V Graphics Core Rail

    HDA_SYNC Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
    Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no 5V_USBX_S3 5V
    GPIO15 1D5V_S3 1.5V S3
    confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher DDR_VREF_S3 0.75V
    suite with confidentiality
    Note : This is an un-muxed signal.
    BT+ 6V-14.1V AC Brick Mode only
    This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low. DCBATOUT 6V-14.1V
    Sampled at rising edge of RSMRST#. 5V_S5 5V All S states
    CRB has a 1-kohm pull-up on this signal to +3.3VA rail. 5V_AUX_S5 5V
    3D3V_S5 3.3V
    3D3V_AUX_S5 3.3V
    GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
    GPIO8 using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of 3D3V_LAN_S5 3.3V WOL_EN Legacy WOL
    RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
    enabled.
    2 Default = Do not connect (floating) 3D3V_AUX_KBC 3.3V DSW, Sx ON for supporting Deep Sleep states 2
    High(1) = Enables the internal VccVRM to have a clean supply for
    GPIO27 analog rails. No need to use on-board filter circuit.
    Low (0) = Disables the VccVRM. Need to use on-board filter Powered by Li Coin Cell in G3
    circuits for analog rails. 3D3V_AUX_S5 3.3V G3, Sx and +V3ALW in Sx

    USB Table
    Pair Device
    SMBus ADDRESSES
    PCIE Routing 0 Touch Panel / 3G SIM
    1 USB Ext. port 1 (HS) I 2 C / SMBus Addresses
    HURON RIVER ORB
    2 Fingerprint Device Ref Des Address Hex Bus
    LANE1 Mini Card2(WWAN)
    3 BLUETOOTH EC SMBus 1 BAT_SCL/BAT_SDA
    LANE2 Mini Card1(WLAN) SATA Table 4 Mini Card2 (WWAN) Battery BAT_SCL/BAT_SDA
    CHARGER BAT_SCL/BAT_SDA

    LANE3 Card Reader 5 CARD READER


    SATA EC SMBus 2
    6 X SML1_CLK/SML1_DATA
    PCH SML1_CLK/SML1_DATA
    LANE4 Onboard LAN Pair Device eDP
    7 X SML1_CLK/SML1_DATA
    1 <Variant Name>
    1
    0 HDD1 8 USB Ext. port 4 / E-SATA /USB CHARGER
    LANE5 USB3.0
    1 HDD2 9 USB Ext. port 2 PCH SMBus
    PCH_SMBDATA/PCH_SMBCLK
    Wistron Corporation
    SO-DIMMA (SPD) 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    LANE6 Intel GBE LAN 2 N/A 10 EDP CAMERA SO-DIMMB (SPD) PCH_SMBDATA/PCH_SMBCLK Taipei Hsien 221, Taiwan, R.O.C.
    Digital Pot PCH_SMBDATA/PCH_SMBCLK
    G-Sensor PCH_SMBDATA/PCH_SMBCLK Title
    LANE7 Dock 3 N/A 11 Mini Card1 (WLAN) MINI PCH_SMBDATA/PCH_SMBCLK
    4 ODD 12 CAMERA PCH_SMBDATA/PCH_SMBCLK Table of Content
    Size Document Number Rev
    LANE8 New Card 5 ESATA 13 New Card A3
    -2
    Hummingbird1_HR
    Tuesday, April 17, 2012
    Date: Sheet 3 of 102
    5 4 3 2 1
    SSID = CPU
    Signal Routing Guideline:
    PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
    PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.

    1D05V_VTT
    CPU1A 1 OF 9
    G3 PEG_IRCOMP_R R401 1 2 24D9R2F-L-GP
    PEG_ICOMPI
    19 DMI_TXN[3:0] PEG_ICOMPO G1
    D Note: DMI_TXN0
    DMI_TXN1
    M2
    P6
    DMI_RX#0 PEG_RCOMPO G4 D
    Intel DMI supports both Lane DMI_RX#1
    DMI_TXN2 P1
    Reversal and polarity inversion DMI_TXN3 P10
    DMI_RX#2
    H22
    but only at PCH side. This is DMI_RX#3 PEG_RX#0
    19 DMI_TXP[3:0] PEG_RX#1 J21
    enabled via a soft strap. DMI_TXP0 N3 B22
    DMI_RX0 PEG_RX#2

    DMI
    DMI_TXP1 P7 D21
    DMI_TXP2 DMI_RX1 PEG_RX#3
    P3 A19

    SANDYBRIDGE
    DMI_TXP3 DMI_RX2 PEG_RX#4
    P11 DMI_RX3 PEG_RX#5 D17
    19 DMI_RXN[3:0] PEG_RX#6 B14
    DMI_RXN0 K1 D13
    DMI_RXN1 DMI_TX#0 PEG_RX#7
    M8 DMI_TX#1 PEG_RX#8 A11
    DMI_RXN2 N4 B10
    DMI_RXN3 DMI_TX#2 PEG_RX#9
    R2 DMI_TX#3 PEG_RX#10 G8
    19 DMI_RXP[3:0] PEG_RX#11 A8
    DMI_RXP0 K3 B6
    DMI_RXP1 DMI_TX0 PEG_RX#12
    M7 DMI_TX1 PEG_RX#13 H8
    DMI_RXP2 P4 E5
    DMI_RXP3 DMI_TX2 PEG_RX#14
    T3 DMI_TX3 PEG_RX#15 K7

    PEG_RX0 K22
    PEG_RX1 K19
    19 FDI_TXN[7:0] PEG_RX2 C21
    FDI_TXN0 U7 D19
    FDI_TXN1 FDI0_TX#0 PEG_RX3
    W11 FDI0_TX#1 PEG_RX4 C19
    Note: FDI_TXN2 W1 D16
    FDI_TXN3 FDI0_TX#2 PEG_RX5
    Intel FDI supports both Lane AA6 FDI0_TX#3 PEG_RX6 C13
    FDI_TXN4 W6 D12
    Reversal and polarity inversion FDI_TXN5 FDI1_TX#0 PEG_RX7

    PCI EXPRESS -- GRAPHICS


    V4 FDI1_TX#1 PEG_RX8 C11
    but only at PCH side. This is
    C FDI_TXN6 Y2 FDI1_TX#2 PEG_RX9 C9 C

    Intel(R) FDI
    enabled via a soft strap. FDI_TXN7 AC9 F8
    FDI1_TX#3 PEG_RX10
    PEG_RX11 C8
    19 FDI_TXP[7:0] PEG_RX12 C5
    FDI_TXP0 U6 H6
    FDI_TXP1 FDI0_TX0 PEG_RX13
    W10 FDI0_TX1 PEG_RX14 F6
    FDI_TXP2 W3 K6
    FDI_TXP3 FDI0_TX2 PEG_RX15
    AA7 FDI0_TX3
    FDI_TXP4 W7 G22
    FDI_TXP5 FDI1_TX0 PEG_TX#0
    T4 FDI1_TX1 PEG_TX#1 C23
    FDI_TXP6 AA3 D23
    FDI_TXP7 FDI1_TX2 PEG_TX#2
    AC8 FDI1_TX3 PEG_TX#3 F21
    PEG_TX#4 H19
    19 FDI_FSYNC0 AA11 FDI0_FSYNC PEG_TX#5 C17
    Note: 19 FDI_FSYNC1 AC12 FDI1_FSYNC PEG_TX#6 K15
    Lane reversal does not apply to PEG_TX#7 F17
    19 FDI_INT U11 F14
    FDI sideband signals. FDI_INT PEG_TX#8
    A15
    PEG_TX#9
    19 FDI_LSYNC0 AA10 FDI0_LSYNC PEG_TX#10 J14
    19 FDI_LSYNC1 AG8 FDI1_LSYNC PEG_TX#11 H13
    PEG_TX#12 M10
    PEG_TX#13 F10
    PEG_TX#14 D9
    PEG_TX#15 J4
    1D05V_VTT R402 1 2 24D9R2F-L-GP DP_COMP AF3 EDP_COMPIO
    AD2 EDP_ICOMPO PEG_TX0 F22
    1 2 10KR2J-3-GP eDP_HPD AG11 EDP_HPD PEG_TX1 A23
    R403 D24
    PEG_TX2
    PEG_TX3 E21
    AG4 G19
    B AF4
    EDP_AUX#
    EDP_AUX
    PEG_TX4
    PEG_TX5 B18 B
    Signal Routing Guideline: PEG_TX6 K17
    DP
    EDP_ICOMPO keep W/S=12/15 mils and routing PEG_TX7 G17
    AC3 E14
    length less than 500 mils. AC4
    EDP_TX#0 PEG_TX8
    C15
    EDP_COMPIO keep W/S=4/15 mils and routing EDP_TX#1 PEG_TX9
    AE11 EDP_TX#2 PEG_TX10 K13
    length less than 500 mils. AE7 EDP_TX#3 PEG_TX11 G13
    PEG_TX12 K10
    AC1 EDP_TX0 PEG_TX13 G10
    AA4 EDP_TX1 PEG_TX14 D8
    AE10 EDP_TX2 PEG_TX15 K4
    NOTE. AE6 EDP_TX3
    Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.
    SANDYBRIDGE-1-GP-U-NF

    NOTE:
    Select a Fast FET similar to 2N7002E whose rise/
    fall time is less than 6 ns. If HPD on eDP interface is
    disabled, connect it to CPU VCCIO via a 10-kΩ pull-Up
    resistor on the motherboard.

    A <Core Design>
    A
    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    CPU (PCIE/DMI/FDI)
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 4 of 102
    5 4 3 2 Disabling Guidelines: 1
    SSID = CPU CPU1B 2 OF 9
    If motherboard only supports external graphics or without eDP:
    Connect DPLL_REF_SSCLK on Processor to GND through 1K +/- 5%
    J3 resistor.
    BCLK CLK_EXP_P 20
    BCLK# H2 CLK_EXP_N 20 Connect DPLL_REF_SSCLK# on Processor to VCCP through 1K +/- 5%

    CLOCKS
    MISC
    RN504 resistorpower (~15 mW) may be wasted.
    18 H_SNB_IVB# F49 SRN1KJ-7-GP
    PROC_SELECT# CLK_DP_P_R
    DPLL_REF_CLK AG3 1 4
    AG1 CLK_DP_N_R 2 3 1D05V_VTT
    1D05V_VTT DPLL_REF_CLK#
    C57 PROC_DETECT#
    R501 N59 DY
    H_PROCHOT# BCLK_ITP
    1 2 BCLK_ITP# N58
    D 62R2J-GP C49
    D
    CATERR#
    1

    SANDYBRIDGE
    SM_DRAMRST# 37

    THERMAL
    C502
    SC47P50V2JN-3GP
    2

    A48 AT30 2 1 R502


    22,27 H_PECI PECI SM_DRAMRST# 4K99R2F-L-GP

    R513 BF44 SM_RCOMP_0 R506 1 2 140R2F-GP


    CRB : 47pf 1 2 H_PROCHOT#_R C45
    SM_RCOMP0
    BE43 SM_RCOMP_1 R507 1 2 25D5R2F-GP
    27,42 H_PROCHOT# PROCHOT# SM_RCOMP1

    DDR3
    MISC
    CEKLT:43pf 56R2J-4-GP SM_RCOMP2 BG43 SM_RCOMP_2 R508 1 2 200R2F-L-GP

    Connect EC to PROCHOT# through inverting OD buffer.


    22,36 H_THERMTRIP# D45 THERMTRIP#
    Signal Routing Guideline:
    SM_RCOMP keep routing length less than 500 mils.
    PRDY# N53
    PREQ# N55

    TCK L56
    TMS L55

    PWR MANAGEMENT
    J58 XDP_TRST#
    TRST#

    JTAG & BPM


    19 H_PM_SYNC C48 PM_SYNC TDI M60
    L59 XDP_TDO
    TDO

    22,36,97 H_CPUPW RGD B46 UNCOREPWRGOOD


    K58 XDP_DBRESET#
    DBR#
    C R503 1 2 10KR2J-3-GP
    1D05V_VTT C
    19,37 PM_DRAM_PW RGD 1 R505 2 VDDPW RGOOD BE45 G58
    0R2J-2-GP SM_DRAMPWROK BPM#0 RN502
    DY BPM#1 E55
    37 VDDPW RGOOD E59 SRN51J-GP
    BPM#2 XDP_TDO
    BPM#3 G55 2 3
    G59 XDP_TRST# 1 4
    BUF_CPU_RST# BPM#4
    D44 RESET# BPM#5 H60
    BPM#6 J59
    BPM#7 J61

    3D3V_S0
    RN503
    SRN1K5J-1-GP
    XDP_DBRESET# 1 8 SANDYBRIDGE-1-GP-U-NF
    2 7
    3 6
    18,27,36,71,82,97 PLT_RST# 4 5 BUF_CPU_RST#

    B B

    A <Core Design>
    A
    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    CPU (THERMAL/CLOCK/PM )
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 5 of 102
    5 4 3 2 1

    SSID = CPU

    CPU1C 3 OF 9 CPU1D 4 OF 9

    M_A_DQ[63:0]
    14 M_A_DQ[63:0]
    M_A_DQ0 AG6 AL4
    M_A_DQ1 SA_DQ0 SB_DQ0
    AJ6 AU36 AL1 BA34

    SANDYBRIDGE
    D D
    M_A_DQ2 SA_DQ1 SA_CLK0 M_A_DIM0_CLK_DDR0 14 SB_DQ1 SB_CLK0
    AP11 AV36 AN3 AY34

    SANDYBRIDGE
    M_A_DQ3 SA_DQ2 SA_CLK#0 M_A_DIM0_CLK_DDR#0 14 SB_DQ2 SB_CLK#0
    AL6 SA_DQ3 SA_CKE0 AY26 M_A_DIM0_CKE0 14 AR4 SB_DQ3 SB_CKE0 AR22
    M_A_DQ4 AJ10 AK4
    M_A_DQ5 SA_DQ4 SB_DQ4
    AJ8 SA_DQ5 AK3 SB_DQ5
    M_A_DQ6 AL8 AN4
    M_A_DQ7 SA_DQ6 SB_DQ6
    AL7 SA_DQ7 AR1 SB_DQ7
    M_A_DQ8 AR11 AU4
    M_A_DQ9 SA_DQ8 SB_DQ8
    AP6 SA_DQ9 SA_CLK1 AT40 M_A_DIM0_CLK_DDR1 14 AT2 SB_DQ9 SB_CLK1 BA36
    M_A_DQ10 AU6 AU40 AV4 BB36
    M_A_DQ11 SA_DQ10 SA_CLK#1 M_A_DIM0_CLK_DDR#1 14 SB_DQ10 SB_CLK#1
    AV9 SA_DQ11 SA_CKE1 BB26 M_A_DIM0_CKE1 14 BA4 SB_DQ11 SB_CKE1 BF27
    M_A_DQ12 AR6 AU3
    M_A_DQ13 SA_DQ12 SB_DQ12
    AP8 SA_DQ13 AR3 SB_DQ13
    M_A_DQ14 AT13 AY2
    M_A_DQ15 SA_DQ14 SB_DQ14
    AU13 SA_DQ15 BA3 SB_DQ15
    M_A_DQ16 BC7 BE9
    M_A_DQ17 SA_DQ16 SB_DQ16
    BB7 SA_DQ17 SA_CS#0 BB40 M_A_DIM0_CS#0 14 BD9 SB_DQ17 SB_CS#0 BE41
    M_A_DQ18 BA13 BC41 BD13 BE47
    M_A_DQ19 SA_DQ18 SA_CS#1 M_A_DIM0_CS#1 14 SB_DQ18 SB_CS#1
    BB11 SA_DQ19 BF12 SB_DQ19
    M_A_DQ20 BA7 BF8
    M_A_DQ21 SA_DQ20 SB_DQ20
    BA9 SA_DQ21 BD10 SB_DQ21
    M_A_DQ22 BB9 BD14
    M_A_DQ23 SA_DQ22 SB_DQ22
    AY13 SA_DQ23 BE13 SB_DQ23
    M_A_DQ24 AV14 AY40 BF16 AT43
    M_A_DQ25 SA_DQ24 SA_ODT0 M_A_DIM0_ODT0 14 SB_DQ24 SB_ODT0
    AR14 SA_DQ25 SA_ODT1 BA41 M_A_DIM0_ODT1 14 BE17 SB_DQ25 SB_ODT1 BG47
    M_A_DQ26 AY17 BE18
    M_A_DQ27 SA_DQ26 SB_DQ26
    AR19 SA_DQ27 BE21 SB_DQ27
    M_A_DQ28 BA14 BE14
    M_A_DQ29 SA_DQ28 SB_DQ28
    AU14 SA_DQ29 BG14 SB_DQ29
    C M_A_DQ30 BB14 M_A_DQS#[7:0] 14 BG18 C
    M_A_DQ31 SA_DQ30 M_A_DQS#0 SB_DQ30
    BB17 SA_DQ31 SA_DQS#0 AL11 BF19 SB_DQ31 SB_DQS#0 AL3
    M_A_DQ32 BA45 AR8 M_A_DQS#1 BD50 AV3
    M_A_DQ33 SA_DQ32 SA_DQS#1 M_A_DQS#2 SB_DQ32 SB_DQS#1
    AR43 SA_DQ33 SA_DQS#2 AV11 BF48 SB_DQ33 SB_DQS#2 BG11
    M_A_DQ34 AW48 AT17 M_A_DQS#3 BD53 BD17
    M_A_DQ35 SA_DQ34 SA_DQS#3 M_A_DQS#4 SB_DQ34 SB_DQS#3
    BC48 SA_DQ35 SA_DQS#4 AV45 BF52 SB_DQ35 SB_DQS#4 BG51
    M_A_DQ36 BC45 AY51 M_A_DQS#5 BD49 BA59
    SA_DQ36 SA_DQS#5 SB_DQ36 SB_DQS#5
    DDR SYSTEM MEMORY A

    DDR SYSTEM MEMORY B


    M_A_DQ37 AR45 AT55 M_A_DQS#6 BE49 AT60
    M_A_DQ38 SA_DQ37 SA_DQS#6 M_A_DQS#7 SB_DQ37 SB_DQS#6
    AT48 SA_DQ38 SA_DQS#7 AK55 BD54 SB_DQ38 SB_DQS#7 AK59
    M_A_DQ39 AY48 BE53
    M_A_DQ40 SA_DQ39 SB_DQ39
    BA49 SA_DQ40 BF56 SB_DQ40
    M_A_DQ41 AV49 BE57
    M_A_DQ42 SA_DQ41 SB_DQ41
    BB51 SA_DQ42 BC59 SB_DQ42
    M_A_DQ43 AY53 AY60
    M_A_DQ44 SA_DQ43 SB_DQ43
    BB49 SA_DQ44 M_A_DQS[7:0] 14 BE54 SB_DQ44
    M_A_DQ45 AU49 AJ11 M_A_DQS0 BG54
    M_A_DQ46 SA_DQ45 SA_DQS0 M_A_DQS1 SB_DQ45
    BA53 SA_DQ46 SA_DQS1 AR10 BA58 SB_DQ46 SB_DQS0 AM2
    M_A_DQ47 BB55 AY11 M_A_DQS2 AW59 AV1
    M_A_DQ48 SA_DQ47 SA_DQS2 M_A_DQS3 SB_DQ47 SB_DQS1
    BA55 SA_DQ48 SA_DQS3 AU17 AW58 SB_DQ48 SB_DQS2 BE11
    M_A_DQ49 AV56 AW45 M_A_DQS4 AU58 BD18
    M_A_DQ50 SA_DQ49 SA_DQS4 M_A_DQS5 SB_DQ49 SB_DQS3
    AP50 SA_DQ50 SA_DQS5 AV51 AN61 SB_DQ50 SB_DQS4 BE51
    M_A_DQ51 AP53 AT56 M_A_DQS6 AN59 BA61
    M_A_DQ52 SA_DQ51 SA_DQS6 M_A_DQS7 SB_DQ51 SB_DQS5
    AV54 SA_DQ52 SA_DQS7 AK54 AU59 SB_DQ52 SB_DQS6 AR59
    M_A_DQ53 AT54 AU61 AK61
    M_A_DQ54 SA_DQ53 SB_DQ53 SB_DQS7
    AP56 SA_DQ54 AN58 SB_DQ54
    M_A_DQ55 AP52 AR58
    M_A_DQ56 SA_DQ55 SB_DQ55
    AN57 SA_DQ56 AK58 SB_DQ56
    M_A_DQ57 AN53 AL58
    M_A_DQ58 SA_DQ57 SB_DQ57
    AG56 SA_DQ58 AG58 SB_DQ58
    B M_A_DQ59 B
    AG53 SA_DQ59 AG59 SB_DQ59
    M_A_DQ60 AN55 AM60
    M_A_DQ61 SA_DQ60 M_A_A0 M_A_A[15:0] 14 SB_DQ60
    AN52 SA_DQ61 SA_MA0 BG35 AL59 SB_DQ61 SB_MA0 BF32
    M_A_DQ62 AG55 BB34 M_A_A1 AF61 BE33
    M_A_DQ63 SA_DQ62 SA_MA1 M_A_A2 SB_DQ62 SB_MA1
    AK56 SA_DQ63 SA_MA2 BE35 AH60 SB_DQ63 SB_MA2 BD33
    BD35 M_A_A3 AU30
    SA_MA3 M_A_A4 SB_MA3
    SA_MA4 AT34 SB_MA4 BD30
    AU34 M_A_A5 AV30
    SA_MA5 M_A_A6 SB_MA5
    SA_MA6 BB32 SB_MA6 BG30
    14 M_A_BS0 BD37 AT32 M_A_A7 BG39 BD29
    SA_BS0 SA_MA7 M_A_A8 SB_BS0 SB_MA7
    14 M_A_BS1 BF36 SA_BS1 SA_MA8 AY32 BD42 SB_BS1 SB_MA8 BE30
    14 M_A_BS2 BA28 AV32 M_A_A9 AT22 BE28
    SA_BS2 SA_MA9 M_A_A10 SB_BS2 SB_MA9
    SA_MA10 BE37 SB_MA10 BD43
    BA30 M_A_A11 AT28
    SA_MA11 M_A_A12 SB_MA11
    SA_MA12 BC30 SB_MA12 AV28
    14 M_A_CAS# BE39 AW41 M_A_A13 AV43 BD46
    SA_CAS# SA_MA13 M_A_A14 SB_CAS# SB_MA13
    14 M_A_RAS# BD39 SA_RAS# SA_MA14 AY28 BF40 SB_RAS# SB_MA14 AT26
    14 M_A_W E# AT41 AU26 M_A_A15 BD45 AU22
    SA_WE# SA_MA15 SB_WE# SB_MA15

    SANDYBRIDGE-1-GP-U-NF SANDYBRIDGE-1-GP-U-NF

    <Core Design>
    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    CPU (DDR)
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 6 of 102

    5 4 3 2 1
    5 4 3 2 1

    SSID = CPU
    CPU1E 5 OF 9 PEG Static Lane Reversal
    1: Normal Operation; Lane #
    CFG2 definition matches socket pin map definition
    B50 BE7

    SANDYBRIDGE
    CFG0 RSVD#BE7
    C51 CFG1 RSVD#BG7 BG7 0:Lane Reversed
    CFG2 B54 CFG2
    D53 CFG3

    1
    A51 CFG4 RSVD#N42 N42
    D R702 C53 L42 D
    CFG5 RSVD#L42
    DY 1KR2J-1-GP C55 CFG6 RSVD#L45 L45
    H49 CFG7 RSVD#L47 L47
    A55

    2
    CFG8
    H51 CFG9
    K49 CFG10 RSVD#M13 M13 Display Port Presence Strap
    K53 CFG11 RSVD#M14 M14
    F53 U14 CFG4 1: Disabled; No Physical Display Port
    CFG12 RSVD#U14
    G53 CFG13 RSVD#W14 W14 attached to Embedded Display Port
    L51 CFG14 RSVD#P13 P13
    F51 0: Enabled; An external Display Port device is
    CFG15
    D52 CFG16 connected to the Embedded Display Port
    L53 AT49

    RESERVED
    CFG17 RSVD#AT49
    RSVD#K24 K24

    H43 VCC_VAL_SENSE
    K43 VSS_VAL_SENSE RSVD#AH2 AH2
    RSVD#AG13 AG13
    RSVD#AM14 AM14
    H45 VAXG_VAL_SENSE RSVD#AM15 AM15
    K45 VSSAXG_VAL_SENSE
    PCIE Port Bifurcation Straps
    RSVD#N50 N50
    F48 VCC_DIE_SENSE
    B4:VREF_DQ CHA CFG[6:5] 11: x16 - Device 1 functions 1 and 2 disabled
    M_VREF_DQ_DIMM0_C H48 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
    M_VREF_DQ_DIMM1_C RSVD#H48 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
    K48 RSVD#K48
    D1:VREF_DQ CHB DC_TEST_A4 A4 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
    C C4 C
    DC_TEST_C4
    BA19 RSVD#BA19 DC_TEST_D3 D3
    3
    4

    AV19 RSVD#AV19 DC_TEST_D1 D1


    RN701 AT21 A58
    RSVD#AT21 DC_TEST_A58
    SRN1KJ-7-GP BB21 RSVD#BB21 DC_TEST_A59 A59
    BB19 RSVD#BB19 DC_TEST_C59 C59
    AY21 RSVD#AY21 DC_TEST_A61 A61 PEG DEFER TRAINING
    BA22 C61
    2
    1

    RSVD#BA22 DC_TEST_C61
    AY22 RSVD#AY22 DC_TEST_D61 D61
    AU19 RSVD#AU19 DC_TEST_BD61 BD61 CFG7 1: PEG Train immediately following xxRESETB de assertion
    AU21 BE61 0: PEG Wait for BIOS for training
    RSVD#AU21 DC_TEST_BE61
    BD21 RSVD#BD21 DC_TEST_BE59 BE59
    BD22 RSVD#BD22 DC_TEST_BG61 BG61
    BD25 RSVD#BD25 DC_TEST_BG59 BG59
    BD26 RSVD#BD26 DC_TEST_BG58 BG58
    BG22 RSVD#BG22 DC_TEST_BG4 BG4
    BE22 RSVD#BE22 DC_TEST_BG3 BG3
    BG26 RSVD#BG26 DC_TEST_BE3 BE3
    BE26 RSVD#BE26 DC_TEST_BG1 BG1
    BF23 RSVD#BF23 DC_TEST_BE1 BE1
    BE24 RSVD#BE24 DC_TEST_BD1 BD1

    SANDYBRIDGE-1-GP-U-NF

    B B

    <Core Design>
    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    CPU (RESERVED)
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 7 of 102

    5 4 3 2 1
    5 4 3 2 1

    SSID = CPU
    CPU1F 6 OF 9

    VCC_CORE AF46
    VCCIO
    AG48

    SANDYBRIDGE
    VCCIO
    VCCIO AG50
    A26 VCC VCCIO AG51
    A29 VCC VCCIO AJ17
    A31 VCC VCCIO AJ21 VCCIO Output Decoupling CAP Recommendation:
    D A34 VCC VCCIO AJ25 2 x 330 uF 10 x 10 uF (0603) D
    A35 AJ43
    A38
    VCC VCCIO
    AJ47
    26 x 1uF(0402)
    VCC VCCIO
    A39 VCC VCCIO AK50
    A42 AK51 1D05V_VTT
    VCC VCCIO
    C26 VCC VCCIO AL14 PROCESSOR VCCIO: 8.5A
    C27 VCC VCCIO AL15
    C32 VCC VCCIO AL16

    C853

    C854

    C856
    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP
    C34 VCC VCCIO AL20

    1
    C37 VCC VCCIO AL22
    C39 VCC VCCIO AL26
    C42 AL45

    2
    VCC VCCIO
    D27 VCC VCCIO AL48
    D32 VCC VCCIO AM16
    D34 VCC VCCIO AM17
    D37 VCC VCCIO AM21
    VCC_CORE
    PROCESSOR CORE POWER: 53A D39 VCC VCCIO AM43
    D42 VCC VCCIO AM47
    E26 VCC VCCIO AN20 Layout Note: 10u Cap place during CPU & VR
    E28 VCC VCCIO AN42
    E32 VCC VCCIO AN45
    E34 VCC VCCIO AN48
    E37 VCC
    E38 VCC

    CORE SUPPLY
    F25 VCC
    F26

    PEG AND DDR


    VCC
    F28 VCC
    F32 1D05V_VTT
    VCC
    F34 VCC
    F37 VCC VCCIO AA14

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP
    F38 VCC VCCIO AA15

    C857

    C858

    C859

    C860

    C861

    C862

    C863

    C864

    C866
    C F42 VCC VCCIO AB17 C

    1
    G42 VCC VCCIO AB20
    H25 VCC VCCIO AC13
    H26 AD16

    2
    VCC VCCIO
    H28 VCC VCCIO AD18
    H29 VCC VCCIO AD21
    H32 VCC VCCIO AE14
    H34 VCC VCCIO AE15 Layout Note: 1u Cap place under CPU
    H35 VCC VCCIO AF16
    H37 VCC VCCIO AF18

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP
    H38 VCC VCCIO AF20

    C883

    C884

    C885

    C886

    C887

    C878

    C880
    H40 VCC VCCIO AG15

    1
    J25 VCC VCCIO AG16
    J26 VCC VCCIO AG17
    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    J28 AG20

    2
    VCC VCCIO
    J29 VCC VCCIO AG21
    1

    1
    C821

    C822

    C823

    C824

    C825

    C826

    C827

    C828

    C829

    C830

    C831

    C832

    C833

    C834
    J32 VCC VCCIO AJ14
    J34 VCC VCCIO AJ15
    J35
    2

    VCC

    POWER
    J37 VCC
    J38 VCC
    J40 VCC
    J42 VCC
    K26 VCC VCCIO W16
    K27 VCC VCCIO W17
    Layout Note: 2.2u Cap place under CPU K29 VCC
    K32
    K34
    VCC Check Pull high ??
    VCC
    PROCESSOR 1.05V Quiet rail for DDR block (BGA only)
    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    SC2D2U6D3V2MX-GP

    K35 VCC
    K37 VCC
    1

    1
    C837

    C841

    C847

    C848

    K39 VCC +V1.05S_VCCPQE should be short to +V1.05S_VCCP_DDR_R on board


    B K42 VCC VCCIO_SEL BC22 H_VCCP_SEL_L 1 B
    L25 TP805
    2

    VCC
    L28 VCC
    L33 VCC For CRB VIDSOUT need to pull high 130 ohm closr to CPU and IMVP7
    L36 1D05V_VTT
    VCC For CRB VIDALERT# need to pull high 75 ohm close to CPU
    L40

    QUIET RAILS
    VCC R806
    N26 VCC
    N30 VCC VCCPQE AM25 +V1.05S_VCCPQE 1 2
    N34 AN22 1D05V_VTT
    VCC VCCPQE

    1
    N38 C877 0R0402-PAD
    VCC SC1U6D3V2KX-GP

    2
    2
    R804
    130R2F-1-GP

    VCC Output Decoupling CAP Recommendation:

    1
    A44 H_CPU_SVIDALRT# R803 1 2 43R2J-GP
    VIDALERT# VR_SVID_ALERT# 42
    B43 H_CPU_SVIDCLK
    SVID
    1. 1.9m ohm loadline design:(for SV) VIDSCLK
    C44 H_CPU_SVIDDAT H_CPU_SVIDCLK 42
    4 x 470 uF VIDSOUT H_CPU_SVIDDAT 42
    25 x 22 uF VCC_CORE
    35 x 2.2uF
    Place near processor

    1
    2. 2.9m ohm loadline design: (for ULV/LV) R801
    3 x 330uF 100R2F-L1-GP-U
    12 x 22uF

    2
    16 x 2.2uF F43
    SENSE LINES

    VCC_SENSE VCCSENSE 42
    VSS_SENSE G43 VSSSENSE 42

    1
    A R805 1 2 1D05V_VTT A
    10R2F-L-GP R802 <Core Design>
    100R2F-L1-GP-U
    VCCIO_SENSE AN16 DYVCCIO_SENSE 45
    AN17 VSSIO_SENSE 45 Wistron Corporation

    2
    VSS_SENSE_VCCIO
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    1

    Taipei Hsien 221, Taiwan, R.O.C.


    R807
    10R2F-L-GP Title
    SANDYBRIDGE-1-GP-U-NF
    DY CPU (VCC_CORE)
    2

    Size Document Number Rev


    Custom
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 8 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = CPU CPU1G 7 OF 9

    S3 power reduction DDR Vref schematic

    SANDYBRIDGE
    Refer to the latest Huron River Mainstream PDG
    AA46 VAXG (Doc# 438297) for more details
    AB47 VAXG
    Routing Guideline:
    AB50 VAXG Power from DDR_VREF_S3 and +V_SM_VREF_CNT
    AB51 AY43 +V_SM_VREF_CNT
    AB52
    VAXG SM_VREF +V_SM_VREF_CNT 37 should have 10 mils trace width.
    VAXG
    AB53 VAXG
    AB55 VAXG
    D AB56 VAXG D
    VCC_GFXCORE AB58 1D5V_S0
    VAXG
    AB59 VAXG VDDQ AJ28 PROCESSOR VDDQ: 10A
    AC61 VAXG VDDQ AJ33
    AD47 VAXG VDDQ AJ36
    AD48 VAXG VDDQ AJ40

    C930

    C931

    C932

    C933
    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP
    AD50 AL30

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP
    VAXG VDDQ

    1
    - 1.5V RAILS
    C919

    C940

    C941

    C942

    C943

    C949

    C950
    AD51 VAXG VDDQ AL34

    1
    AD52 VAXG VDDQ AL38
    AD53 AL42

    SCD1U50V3KX-GP
    2

    2
    VAXG VDDQ
    AD55 AM33
    2

    2
    VAXG VDDQ

    EC901
    AD56 VAXG VDDQ AM36
    AD58 VAXG VDDQ AM40
    AD59 VAXG VDDQ AN30
    AE46 VAXG VDDQ AN34
    N45 VAXG VDDQ AN38 Layout Note: Place during CPU & VR
    P47 VAXG VDDQ AR26

    POWER
    P48 VAXG VDDQ AR28
    P50 VAXG VDDQ AR30 Layout Note: Place under CPU
    P51 AR32
    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP
    VAXG VDDQ
    C911

    C912

    C913

    C914

    C915

    C916

    C917

    C918
    P52 AR34

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP
    DDR3
    VAXG VDDQ
    1

    C936

    C937

    C938

    C939

    C952

    C953

    C954

    C955

    C956
    P53 VAXG VDDQ AR36

    1
    P55 VAXG VDDQ AR40
    P56 AV41
    2

    2
    VAXG VDDQ
    P61 AW26

    2
    VAXG VDDQ
    T48 VAXG VDDQ BA40 Layout Note:

    GRAPHICS
    T58 BB28
    T59
    VAXG VDDQ
    BG33
    Place near SM_VREF pin
    VAXG VDDQ
    T61 VAXG
    C U46 C
    VAXG
    V47 VAXG
    VAXG Output Decoupling CAP Recommendation: V48 VAXG
    V50 VAXG
    1. 3.9m ohm loadline design:(for GT2) V51 VAXG
    VDDQ Output Decoupling Recommendation:
    V52 VAXG 1 x 330 uF 8 x 10uF (0603)
    2 x 470 uF 6 x 22 uF (0805) V53
    6 x 10 uF (0603) 11 x 1 uF (0402) V55
    VAXG 10 x 1 uF (0402)
    VAXG
    V56 VAXG
    V58
    2. 4.6m ohm loadline design:(for GT1) V59
    VAXG
    2 x 330 uF 5 x 22 uF (0805) VAXG
    W50 VAXG
    6 x 10 uF (0603) 6 x 1 uF (0402) W51 VAXG
    W52 VAXG
    VCC_GFXCORE W53 VAXG
    W55 VAXG
    W56 VAXG
    1

    W61 VAXG
    R906 Y48 VAXG
    10R2F-L-GP Y61 VAXG
    2

    1D5V_S0
    42 VCC_AXG_SENSE
    42 VSS_AXG_SENSE
    R909

    QUIET RAILS
    1

    LINES
    SENSE
    VCCDQ AM28 +1.5S_VCCD_Q 1 2
    R907 VCC_AXG_SENSE F45 AN26
    VAXG_SENSE VCCDQ

    1
    10R2F-L-GP VSS_AXG_SENSE G45 C948 0R0402-PAD
    VSSAXG_SENSE SC1U6D3V2KX-GP
    B B
    2

    2
    1D8V_S0
    1.8V RAIL

    PROCESSOR VCCPLL: 1.2A PROCESSOR DDR 1.5V QUIET RAIL (BGA only)
    BB3 VCCPLL
    BC1 +V1.5S_VCCD_Q should be short to +V1.5S_VCCDDQ on board
    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    VCCPLL
    C928

    C929

    VCCPLL Output Decoupling CAP BC4 VCCPLL


    1

    Recommendation:
    1 x 330 uF
    2

    2 x 1 uF (0402) BC43 TP_VDDQ_SENSE


    1
    VDDQ_SENSE
    BA43 TP_VDDQ_VSS 1 TP901 TPAD14-GP
    SENSE LINES

    VSS_SENSE_VDDQ TP902 TPAD14-GP


    L17 VCCSA

    1
    1D05V_VTT 0D85V_S0 L21 VCCSA R912 Notice:pull-high
    PROCESSOR VCCSA: 6A N16 VCCSA 100k or 10k
    N20 VCCSA 10R2J-2-GP
    SA RAIL

    N22 VCCSA
    C921

    C923

    P17
    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP

    R911

    2
    VCCSA
    1

    Celeron P20 U10 VCCSA_SENSE Delete off page VCCSA_SENSE SA


    VCCSA VCCSA_SENSE
    2 1 R16 VCCSA
    R18
    2

    VCCSA
    R21 VCCSA
    R910 0R5J-5-GP Celeron U15 VCCSA Delete off page H_FC_C22 SA
    2 1 V16 VCCSA
    V17 VID0 VCCSA_VID D48 H_FC_C22
    VCCSA VCCSA_SEL
    0R5J-5-GP V18 VCCSA
    VID1 VCCSA_VID D49 VCCSA_SEL 48
    A Layout Note: Place under CPU V21 VCCSA <Core Design> A
    R913 W20 VCCSA
    4
    3
    1

    1
    C927

    C951

    2 1 Celeron RN901
    SC1U10V2KX-1GP

    SC1U10V2KX-1GP

    SRN1KJ-11-GP-U Wistron Corporation


    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    2

    0R5J-5-GP SANDYBRIDGE-1-GP-U-NF Taipei Hsien 221, Taiwan, R.O.C.


    1
    2

    Title

    Power Delivery DG; #139028 CPU (VCC_GFXCORE)


    A 1-K pull-down resistor should be placed on the VCCSA_VID lines. Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 9 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = CPU CPU1H 8 OF 9

    CPU1I 9 OF 9
    SANDYBRIDGE
    A13 VSS VSS AM38
    A17
    A21
    VSS
    VSS
    VSS
    VSS
    AM4
    AM42 BG17 VSS
    SANDYBRIDGE VSS M4
    A25 VSS VSS AM45 BG21 VSS VSS M58
    A28 VSS VSS AM48 BG24 VSS VSS M6
    A33 VSS VSS AM58 BG28 VSS VSS N1
    D A37 VSS VSS AN1 BG37 VSS VSS N17 D
    A40 VSS VSS AN21 BG41 VSS VSS N21
    A45 VSS VSS AN25 BG45 VSS VSS N25
    A49 VSS VSS AN28 BG49 VSS VSS N28
    A53 VSS VSS AN33 BG53 VSS VSS N33
    A9 VSS VSS AN36 BG9 VSS VSS N36
    AA1 VSS VSS AN40 C29 VSS VSS N40
    AA13 VSS VSS AN43 C35 VSS VSS N43
    AA50 VSS VSS AN47 C40 VSS VSS N47
    AA51 VSS VSS AN50 D10 VSS VSS N48
    AA52 VSS VSS AN54 D14 VSS VSS N51
    AA53 VSS VSS AP10 D18 VSS VSS N52
    AA55 VSS VSS AP51 D22 VSS VSS N56
    AA56 VSS VSS AP55 D26 VSS VSS N61
    AA8 VSS VSS AP7 D29 VSS VSS P14
    AB16 VSS VSS AR13 D35 VSS VSS P16
    AB18 VSS VSS AR17 D4 VSS VSS P18
    AB21 VSS VSS AR21 D40 VSS VSS P21
    AB48 AR41 D43 P58
    AB61
    AC10
    VSS
    VSS
    VSS
    VSS
    VSS
    VSS
    AR48
    AR61
    D46
    D50
    VSS
    VSS
    VSS
    VSS VSS
    VSS
    VSS
    P59
    P9
    AC14 VSS VSS AR7 D54 VSS VSS R17
    AC46 VSS VSS AT14 D58 VSS VSS R20
    AC6 VSS VSS AT19 D6 VSS VSS R4
    AD17 VSS VSS AT36 E25 VSS VSS R46
    AD20 VSS VSS AT4 E29 VSS VSS T1
    AD4 AT45 E3 T47
    AD61
    AE13
    VSS
    VSS
    VSS
    VSS VSS
    VSS
    VSS
    AT52
    AT58
    E35
    E40
    VSS
    VSS
    VSS
    VSS
    VSS
    VSS
    T50
    T51
    C AE8 AU1 F13 T52 C
    VSS VSS VSS VSS
    AF1 VSS VSS AU11 F15 VSS VSS T53
    AF17 VSS VSS AU28 F19 VSS VSS T55
    AF21 VSS VSS AU32 F29 VSS VSS T56
    AF47 VSS VSS AU51 F35 VSS VSS U13
    AF48 VSS VSS AU7 F40 VSS VSS U8
    AF50 VSS VSS AV17 F55 VSS VSS V20
    AF51 VSS VSS AV21 G48 VSS VSS V61
    AF52 VSS VSS AV22 G51 VSS VSS W13
    AF53 VSS VSS AV34 G6 VSS VSS W15
    AF55 VSS VSS AV40 G61 VSS VSS W18
    AF56 VSS VSS AV48 H10 VSS VSS W21
    AF58 VSS VSS AV55 H14 VSS VSS W46
    AF59 VSS VSS AW13 H17 VSS VSS W8
    AG10 VSS VSS AW43 H21 VSS VSS Y4
    AG14 VSS VSS AW61 H4 VSS VSS Y47
    AG18 VSS VSS AW7 H53 VSS VSS Y58
    AG47 VSS VSS AY14 H58 VSS VSS Y59
    AG52 VSS VSS AY19 J1 VSS
    AG61 VSS VSS AY30 J49 VSS
    AG7 VSS VSS AY36 J55 VSS
    AH4 VSS VSS AY4 K11 VSS
    AH58 VSS VSS AY41 K21 VSS
    AJ13 VSS VSS AY45 K51 VSS NCTF_VSS_NCTF#A5 A5
    AJ16 VSS VSS AY49 K8 VSS NCTF_VSS_NCTF#A57 A57
    AJ20 VSS VSS AY55 L16 VSS NCTF_VSS_NCTF#BC61 BC61
    AJ22 VSS VSS AY58 L20 VSS VSS_NCTF BD3
    AJ26 VSS VSS AY9 L22 VSS VSS_NCTF BD59

    NCTF
    AJ30 VSS VSS BA1 L26 VSS VSS_NCTF BE4
    B B
    AJ34 VSS VSS BA11 L30 VSS VSS_NCTF BE58

    A5,A57,BC61,BG5,BG57,C3,E1,E61
    AJ38 VSS VSS BA17 L34 VSS NCTF_VSS_NCTF#BG5 BG5
    AJ42 VSS VSS BA21 L38 VSS NCTF_VSS_NCTF#BG57 BG57
    AJ45 VSS VSS BA26 L43 VSS NCTF_VSS_NCTF#C3 C3
    AJ48 VSS VSS BA32 L48 VSS VSS_NCTF C58
    AJ7 VSS VSS BA48 L61 VSS VSS_NCTF D59
    AK1 VSS VSS BA51 M11 VSS NCTF_VSS_NCTF#E1 E1
    AK52 VSS VSS BB53 M15 VSS NCTF_VSS_NCTF#E61 E61
    AL10 VSS VSS BC13
    AL13 VSS VSS BC5
    AL17 VSS VSS BC57
    AL21 BD12

    NCTF TEST PIN:


    VSS VSS
    AL25 VSS VSS BD16
    AL28 BD19 SANDYBRIDGE-1-GP-U-NF
    VSS VSS
    AL33 VSS VSS BD23
    AL36 VSS VSS BD27
    AL40 VSS VSS BD32
    AL43 VSS VSS BD36
    AL47 VSS VSS BD40
    AL61 VSS VSS BD44
    AM13 VSS VSS BD48
    AM20 VSS VSS BD52
    AM22 VSS VSS BD56
    AM26 VSS VSS BD8
    AM30 VSS VSS BE5
    AM34 VSS VSS BG13

    A <Core Design> A

    SANDYBRIDGE-1-GP-U-NF
    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    CPU (VSS)
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 10 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    Blanking
    C C

    B B

    HR PX

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    XDP
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 11 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    (Blanking)

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 12 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    (Blanking)

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 13 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = MEMORY
    1D5V_S3 1D5V_S3
    RAM1 1D5V_S3 RAM3 1D5V_S3
    RAM2 RAM4
    A2 B3 M_A_DQ1 A2 B3 M_A_DQ22
    VDD DQ0 M_A_DQ3 M_A_DQ15 VDD DQ0 M_A_DQ18 M_A_DQ31
    A9 C7 A2 B3 A9 C7 A2 B3
    VDD DQ1 M_A_DQ4 VDD DQ0 M_A_DQ12 VDD DQ1 M_A_DQ20 VDD DQ0 M_A_DQ30
    D7 C2 A9 C7 D7 C2 A9 C7
    VDD DQ2 M_A_DQ7 VDD DQ1 M_A_DQ14 VDD DQ2 M_A_DQ23 VDD DQ1 M_A_DQ25
    G2 C8 D7 C2 G2 C8 D7 C2
    VDD DQ3 M_A_DQ5 VDD DQ2 M_A_DQ8 VDD DQ3 M_A_DQ17 VDD DQ2 M_A_DQ29
    G8 E3 G2 C8 G8 E3 G2 C8
    VDD NF#E3/DQ4 M_A_DQ6 VDD DQ3 M_A_DQ10 VDD NF#E3/DQ4 M_A_DQ19 VDD DQ3 M_A_DQ27
    K1 E8 G8 E3 K1 E8 G8 E3
    VDD NF#E8/DQ5 M_A_DQ0 VDD NF#E3/DQ4 M_A_DQ9 VDD NF#E8/DQ5 M_A_DQ16 VDD NF#E3/DQ4 M_A_DQ28
    K9 D2 K1 E8 K9 D2 K1 E8
    VDD NF#D2/DQ6 M_A_DQ2 VDD NF#E8/DQ5 M_A_DQ11 VDD NF#D2/DQ6 M_A_DQ21 VDD NF#E8/DQ5 M_A_DQ26
    M1 E7 K9 D2 M1 E7 K9 D2
    VDD NF#E7/DQ7 VDD NF#D2/DQ6 M_A_DQ13 VDD NF#E7/DQ7 VDD NF#D2/DQ6 M_A_DQ24
    M9 M1 E7 M9 M1 E7
    VDD VDD NF#E7/DQ7 VDD VDD NF#E7/DQ7
    M9 M9
    VDD VDD
    B9 B7 B9 B7
    VDDQ DM/TDQS VDDQ DM/TDQS
    M_A_A[15:0] 6 C1 A7 B9 B7 C1 A7 B9 B7
    VDDQ NF#A7/TDQS# VDDQ DM/TDQS VDDQ NF#A7/TDQS# VDDQ DM/TDQS
    E2 C1 A7 E2 C1 A7
    VDDQ M_A_DQS0 VDDQ NF#A7/TDQS# VDDQ M_A_DQS2 VDDQ NF#A7/TDQS#
    E9 C3 E2 E9 C3 E2
    VDDQ DQS M_A_DQS#0 VDDQ M_A_DQS1 VDDQ DQS M_A_DQS#2 VDDQ M_A_DQS3
    M_A_DQ[63:0] 6 D3 E9 C3 D3 E9 C3
    DQS# VDDQ DQS M_A_DQS#1 DQS# VDDQ DQS M_A_DQS#3
    D3 D3
    M_A_A0 DQS# M_A_A0 DQS#
    K3 K3
    M_A_A1 A0 M_A_A0 M_A_A1 A0 M_A_A0
    L7 G1 K3 L7 G1 K3
    M_A_A2 A1 ODT M_A_DIM0_ODT0 6 M_A_A1 A0 M_A_A2 A1 ODT M_A_DIM0_ODT0 6 M_A_A1 A0
    M_A_DQS#[7:0] 6 L3 L7 G1 L3 L7 G1
    M_A_A3 A2 M_A_A2 A1 ODT M_A_DIM0_ODT0 6 M_A_A3 A2 M_A_A2 A1 ODT M_A_DIM0_ODT0 6
    K2 J8 DDR_VREF_S3 L3 K2 J8 DDR_VREF_S3 L3
    M_A_A4 A3 VREFCA M_A_A3 A2 M_A_A4 A3 VREFCA M_A_A3 A2
    M_A_DQS[7:0] 6 L8 E1 K2 J8 DDR_VREF_S3 L8 E1 K2 J8 DDR_VREF_S3
    D M_A_A5 A4 VREFDQ VRAM_CH_A_ZQ_1 M_A_A4 A3 VREFCA M_A_A5 A4 VREFDQ VRAM_CH_A_ZQ_3 M_A_A4 A3 VREFCA D
    L2 H8 L8 E1 L2 H8 L8 E1
    M_A_A6 A5 ZQ M_A_A5 A4 VREFDQ VRAM_CH_A_ZQ_2 M_A_A6 A5 ZQ M_A_A5 A4 VREFDQ VRAM_CH_A_ZQ_4
    M8 L2 H8 M8 L2 H8
    A6 A5 ZQ A6 A5 ZQ

    1
    M_A_A7 M2 M_A_A6 M8 M_A_A7 M2 M_A_A6 M8
    A7 A6 A7 A6

    1
    M_A_A8 N8 F1 R8802 M_A_A7 M2 M_A_A8 N8 F1 R8804 M_A_A7 M2
    M_A_A9 A8 NC#F1 240R2F-1-GP M_A_A8 A7 R8803 M_A_A9 A8 NC#F1 240R2F-1-GP M_A_A8 A7 R8805
    M3 F9 N8 F1 M3 F9 N8 F1
    M_A_A10 A9 NC#F9 M_A_A9 A8 NC#F1 240R2F-1-GP M_A_A10 A9 NC#F9 M_A_A9 A8 NC#F1 240R2F-1-GP
    H7 H1 M3 F9 H7 H1 M3 F9
    M_A_A11 A10/AP NC#H1 M_A_A10 A9 NC#F9 M_A_A11 A10/AP NC#H1 M_A_A10 A9 NC#F9
    M7 H9 H7 H1 M7 H9 H7 H1

    2
    M_A_A12 A11 NC#H9 M_A_A15 M_A_A11 A10/AP NC#H1 M_A_A12 A11 NC#H9 M_A_A15 M_A_A11 A10/AP NC#H1
    K7 J7 M7 H9 K7 J7 M7 H9

    2
    M_A_A13 A12/BC# NC#J7 M_A_A12 A11 NC#H9 M_A_A15 M_A_A13 A12/BC# NC#J7 M_A_A12 A11 NC#H9 M_A_A15
    N3 A3 K7 J7 N3 A3 K7 J7
    M_A_A14 A13 NC#A3 M_A_A13 A12/BC# NC#J7 M_A_A14 A13 NC#A3 M_A_A13 A12/BC# NC#J7
    N7 N3 A3 N7 N3 A3
    A14 M_A_A14 A13 NC#A3 A14 M_A_A14 A13 NC#A3
    N7 N7
    A14 A14
    B1 B1
    VSS VSS
    J2 D8 B1 J2 D8 B1
    6 M_A_BS0 BA0 VSS VSS 6 M_A_BS0 BA0 VSS VSS
    K8 F2 J2 D8 K8 F2 J2 D8
    6 M_A_BS1 BA1 VSS 6 M_A_BS0 BA0 VSS 6 M_A_BS1 BA1 VSS 6 M_A_BS0 BA0 VSS
    J3 F8 K8 F2 J3 F8 K8 F2
    6 M_A_BS2 BA2 VSS 6 M_A_BS1 BA1 VSS 6 M_A_BS2 BA2 VSS 6 M_A_BS1 BA1 VSS
    J1 J3 F8 J1 J3 F8
    VSS 6 M_A_BS2 BA2 VSS VSS 6 M_A_BS2 BA2 VSS
    J9 J1 J9 J1
    VSS VSS VSS VSS
    F7 L1 J9 F7 L1 J9
    6 M_A_DIM0_CLK_DDR0 CK VSS VSS 6 M_A_DIM0_CLK_DDR0 CK VSS VSS
    G7 L9 F7 L1 G7 L9 F7 L1
    6 M_A_DIM0_CLK_DDR#0 CK# VSS 6 M_A_DIM0_CLK_DDR0 CK VSS 6 M_A_DIM0_CLK_DDR#0 CK# VSS 6 M_A_DIM0_CLK_DDR0 CK VSS
    G9 N1 G7 L9 G9 N1 G7 L9
    6 M_A_DIM0_CKE0 CKE VSS 6 M_A_DIM0_CLK_DDR#0 CK# VSS 6 M_A_DIM0_CKE0 CKE VSS 6 M_A_DIM0_CLK_DDR#0 CK# VSS
    N9 G9 N1 N9 G9 N1
    VSS 6 M_A_DIM0_CKE0 CKE VSS VSS 6 M_A_DIM0_CKE0 CKE VSS
    A8 N9 A8 N9
    VSS VSS VSS VSS
    F3 A1 A8 F3 A1 A8
    6 M_A_RAS# RAS# VSS VSS 6 M_A_RAS# RAS# VSS VSS
    G3 F3 A1 G3 F3 A1
    6 M_A_CAS# CAS# 6 M_A_RAS# RAS# VSS 6 M_A_CAS# CAS# 6 M_A_RAS# RAS# VSS
    H3 B2 G3 H3 B2 G3
    6 M_A_WE# WE# VSSQ 6 M_A_CAS# CAS# 6 M_A_WE# WE# VSSQ 6 M_A_CAS# CAS#
    B8 H3 B2 B8 H3 B2
    VSSQ 6 M_A_WE# WE# VSSQ VSSQ 6 M_A_WE# WE# VSSQ
    6 M_A_DIM0_CS#0 H2 C9 B8 6 M_A_DIM0_CS#0 H2 C9 B8
    CS# VSSQ VSSQ CS# VSSQ VSSQ
    N2 D1 6 M_A_DIM0_CS#0 H2 C9 N2 D1 6 M_A_DIM0_CS#0 H2 C9
    37 DDR3_DRAMRST# RESET# VSSQ CS# VSSQ 37 DDR3_DRAMRST# RESET# VSSQ CS# VSSQ
    D9 N2 D1 D9 N2 D1
    VSSQ 37 DDR3_DRAMRST# RESET# VSSQ VSSQ 37 DDR3_DRAMRST# RESET# VSSQ
    D9 D9
    VSSQ VSSQ
    PCH_SMBDATA 20
    MT41J256M8HX-187E-D-GP MT41J256M8HX-187E-D-GP
    PCH_SMBCLK 20
    MT41J256M8HX-187E-D-GP MT41J256M8HX-187E-D-GP

    1D5V_S3
    RAM7 1D5V_S3
    RAM8
    A2 B3 M_A_DQ55
    1D5V_S3 1D5V_S3 VDD DQ0 M_A_DQ51 M_A_DQ63
    A9 C7 A2 B3
    RAM5 RAM6 VDD DQ1 M_A_DQ53 VDD DQ0 M_A_DQ57
    D7 C2 A9 C7
    VDD DQ2 M_A_DQ50 VDD DQ1 M_A_DQ58
    G2 C8 D7 C2
    M_A_DQ37 M_A_DQ46 VDD DQ3 M_A_DQ52 VDD DQ2 M_A_DQ61
    A2 B3 A2 B3 G8 E3 G2 C8
    VDD DQ0 M_A_DQ34 VDD DQ0 M_A_DQ44 VDD NF#E3/DQ4 M_A_DQ54 VDD DQ3 M_A_DQ59
    A9 C7 A9 C7 K1 E8 G8 E3
    VDD DQ1 M_A_DQ36 VDD DQ1 M_A_DQ45 VDD NF#E8/DQ5 M_A_DQ48 VDD NF#E3/DQ4 M_A_DQ60
    D7 C2 D7 C2 K9 D2 K1 E8
    VDD DQ2 M_A_DQ38 VDD DQ2 M_A_DQ41 VDD NF#D2/DQ6 M_A_DQ49 VDD NF#E8/DQ5 M_A_DQ62
    G2 C8 G2 C8 M1 E7 K9 D2
    VDD DQ3 M_A_DQ33 VDD DQ3 M_A_DQ47 VDD NF#E7/DQ7 VDD NF#D2/DQ6 M_A_DQ56
    G8 E3 G8 E3 M9 M1 E7
    VDD NF#E3/DQ4 M_A_DQ39 VDD NF#E3/DQ4 M_A_DQ42 VDD VDD NF#E7/DQ7
    K1 E8 K1 E8 M9
    VDD NF#E8/DQ5 M_A_DQ32 VDD NF#E8/DQ5 M_A_DQ43 VDD
    K9 D2 K9 D2 B9 B7
    VDD NF#D2/DQ6 M_A_DQ35 VDD NF#D2/DQ6 M_A_DQ40 VDDQ DM/TDQS
    M1 E7 M1 E7 C1 A7 B9 B7
    VDD NF#E7/DQ7 VDD NF#E7/DQ7 VDDQ NF#A7/TDQS# VDDQ DM/TDQS
    M9 M9 E2 C1 A7
    VDD VDD VDDQ M_A_DQS6 VDDQ NF#A7/TDQS#
    E9 C3 E2
    VDDQ DQS M_A_DQS#6 VDDQ M_A_DQS7
    B9 B7 B9 B7 D3 E9 C3
    VDDQ DM/TDQS VDDQ DM/TDQS DQS# VDDQ DQS M_A_DQS#7
    C1 A7 C1 A7 D3
    VDDQ NF#A7/TDQS# VDDQ NF#A7/TDQS# M_A_A0 DQS#
    E2 E2 K3
    C VDDQ M_A_DQS4 VDDQ M_A_DQS5 M_A_A1 A0 M_A_A0 C
    E9 C3 E9 C3 L7 G1 K3
    VDDQ DQS M_A_DQS#4 VDDQ DQS M_A_DQS#5 M_A_A2 A1 ODT M_A_DIM0_ODT0 6 M_A_A1 A0
    D3 D3 L3 L7 G1
    DQS# DQS# M_A_A3 A2 M_A_A2 A1 ODT M_A_DIM0_ODT0 6
    K2 J8 DDR_VREF_S3 L3
    M_A_A0 M_A_A0 M_A_A4 A3 VREFCA M_A_A3 A2
    K3 K3 L8 E1 K2 J8 DDR_VREF_S3
    M_A_A1 A0 M_A_A1 A0 M_A_A5 A4 VREFDQ VRAM_CH_A_ZQ_7 M_A_A4 A3 VREFCA
    L7 G1 L7 G1 L2 H8 L8 E1
    M_A_A2 A1 ODT M_A_DIM0_ODT0 6 M_A_A2 A1 ODT M_A_DIM0_ODT0 6 M_A_A6 A5 ZQ M_A_A5 A4 VREFDQ VRAM_CH_A_ZQ_8
    L3 L3 M8 L2 H8
    A2 A2 A6 A5 ZQ

    1
    M_A_A3 K2 J8 DDR_VREF_S3 M_A_A3 K2 J8 DDR_VREF_S3 M_A_A7 M2 M_A_A6 M8
    A3 VREFCA A3 VREFCA A7 A6

    1
    M_A_A4 L8 E1 M_A_A4 L8 E1 M_A_A8 N8 F1 R8808 M_A_A7 M2
    M_A_A5 A4 VREFDQ VRAM_CH_A_ZQ_5 M_A_A5 A4 VREFDQ VRAM_CH_A_ZQ_6 M_A_A9 A8 NC#F1 240R2F-1-GP M_A_A8 A7 R8809
    L2 H8 L2 H8 M3 F9 N8 F1
    M_A_A6 A5 ZQ M_A_A6 A5 ZQ M_A_A10 A9 NC#F9 M_A_A9 A8 NC#F1 240R2F-1-GP
    M8 M8 H7 H1 M3 F9
    A6 A6 A10/AP NC#H1 A9 NC#F9

    1
    M_A_A7 M2 M_A_A7 M2 M_A_A11 M7 H9 M_A_A10 H7 H1

    2
    M_A_A8 A7 R8806 M_A_A8 A7 R8807 M_A_A12 A11 NC#H9 M_A_A15 M_A_A11 A10/AP NC#H1
    N8 F1 N8 F1 K7 J7 M7 H9

    2
    M_A_A9 A8 NC#F1 240R2F-1-GP M_A_A9 A8 NC#F1 240R2F-1-GP M_A_A13 A12/BC# NC#J7 M_A_A12 A11 NC#H9 M_A_A15
    M3 F9 M3 F9 N3 A3 K7 J7
    M_A_A10 A9 NC#F9 M_A_A10 A9 NC#F9 M_A_A14 A13 NC#A3 M_A_A13 A12/BC# NC#J7
    H7 H1 H7 H1 N7 N3 A3
    M_A_A11 A10/AP NC#H1 M_A_A11 A10/AP NC#H1 A14 M_A_A14 A13 NC#A3
    M7 H9 M7 H9 N7
    2

    2
    M_A_A12 A11 NC#H9 M_A_A15 M_A_A12 A11 NC#H9 M_A_A15 A14
    K7 J7 K7 J7 B1
    M_A_A13 A12/BC# NC#J7 M_A_A13 A12/BC# NC#J7 VSS
    N3 A3 N3 A3 J2 D8 B1
    M_A_A14 A13 NC#A3 M_A_A14 A13 NC#A3 6 M_A_BS0 BA0 VSS VSS
    N7 N7 K8 F2 J2 D8
    A14 A14 6 M_A_BS1 BA1 VSS 6 M_A_BS0 BA0 VSS
    J3 F8 K8 F2
    6 M_A_BS2 BA2 VSS 6 M_A_BS1 BA1 VSS
    B1 B1 J1 J3 F8
    VSS VSS VSS 6 M_A_BS2 BA2 VSS
    J2 D8 J2 D8 J9 J1
    6 M_A_BS0 BA0 VSS 6 M_A_BS0 BA0 VSS VSS VSS
    K8 F2 K8 F2 F7 L1 J9
    6 M_A_BS1 BA1 VSS 6 M_A_BS1 BA1 VSS 6 M_A_DIM0_CLK_DDR0 CK VSS VSS
    J3 F8 J3 F8 G7 L9 F7 L1
    6 M_A_BS2 BA2 VSS 6 M_A_BS2 BA2 VSS 6 M_A_DIM0_CLK_DDR#0 CK# VSS 6 M_A_DIM0_CLK_DDR0 CK VSS
    J1 J1 G9 N1 G7 L9
    VSS VSS 6 M_A_DIM0_CKE0 CKE VSS 6 M_A_DIM0_CLK_DDR#0 CK# VSS
    J9 J9 N9 G9 N1
    VSS VSS VSS 6 M_A_DIM0_CKE0 CKE VSS
    F7 L1 F7 L1 A8 N9
    6 M_A_DIM0_CLK_DDR0 CK VSS 6 M_A_DIM0_CLK_DDR0 CK VSS VSS VSS
    G7 L9 G7 L9 F3 A1 A8
    6 M_A_DIM0_CLK_DDR#0 CK# VSS 6 M_A_DIM0_CLK_DDR#0 CK# VSS 6 M_A_RAS# RAS# VSS VSS
    G9 N1 G9 N1 G3 F3 A1
    6 M_A_DIM0_CKE0 CKE VSS 6 M_A_DIM0_CKE0 CKE VSS 6 M_A_CAS# CAS# 6 M_A_RAS# RAS# VSS
    N9 N9 H3 B2 G3
    VSS VSS 6 M_A_WE# WE# VSSQ 6 M_A_CAS# CAS#
    A8 A8 B8 H3 B2
    VSS VSS VSSQ 6 M_A_WE# WE# VSSQ
    F3 A1 F3 A1 6 M_A_DIM0_CS#0 H2 C9 B8
    6 M_A_RAS# RAS# VSS 6 M_A_RAS# RAS# VSS CS# VSSQ VSSQ
    G3 G3 N2 D1 6 M_A_DIM0_CS#0 H2 C9
    6 M_A_CAS# CAS# 6 M_A_CAS# CAS# 37 DDR3_DRAMRST# RESET# VSSQ CS# VSSQ
    H3 B2 H3 B2 D9 N2 D1
    6 M_A_WE# WE# VSSQ 6 M_A_WE# WE# VSSQ VSSQ 37 DDR3_DRAMRST# RESET# VSSQ
    B8 B8 D9
    VSSQ VSSQ VSSQ
    6 M_A_DIM0_CS#0 H2 C9 6 M_A_DIM0_CS#0 H2 C9
    CS# VSSQ CS# VSSQ MT41J256M8HX-187E-D-GP
    N2 D1 N2 D1
    37 DDR3_DRAMRST# RESET# VSSQ 37 DDR3_DRAMRST# RESET# VSSQ MT41J256M8HX-187E-D-GP
    D9 D9
    VSSQ VSSQ

    MT41J256M8HX-187E-D-GP MT41J256M8HX-187E-D-GP

    B B

    0D75V_S0
    1D5V_S3 Layout Note: Place these caps0D75V_S0
    SODIMM A DECOUPLING Place these Caps near close to VTT1 and
    SO-DIMMA. VTT2.

    C1520

    C1522
    SC1U6D3V2KX-GP

    SC1U6D3V2KX-GP

    SC1U6D3V2KX-GP

    SC1U6D3V2KX-GP
    1

    1
    SC56P50V2JN-2GP
    C1403

    C1404

    C1405

    C1406

    C1407

    C1419

    C1421
    1

    1
    DDR_VREF_S3
    C1408

    C1409

    C1410
    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP

    SCD1U50V3KX-GP

    SCD1U50V3KX-GP
    1

    C1440 C1441 C1442 C1443 C1444 1

    2
    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    C1516 C1518

    2
    SC4D7U6D3V3KX-GP

    SC4D7U6D3V3KX-GP

    SC4D7U6D3V3KX-GP

    SC4D7U6D3V3KX-GP

    SC4D7U6D3V3KX-GP
    2

    3D3V_S0
    1

    1
    C1445 C1446
    U201 C1412 C1414 C1411 C1413 C1426 C1415 C1428 C1427
    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SC4D7U6D3V3KX-GP

    SC4D7U6D3V3KX-GP
    C1416

    C1417

    C1420

    C1418

    C1423

    C1422

    C1425

    C1424

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP
    2

    2
    1

    1 8
    A0 VCC
    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    2 7 EC1501 EC1502 EC1503 EC1504 EC1505 EC1506


    A1 WP
    3 6
    2

    A2 SCL PCH_SMBCLK 20
    4 5 PCH_SMBDATA 20
    GND SDA
    2

    M_A_DIM0_CLK_DDR0
    2

    R1439 R1440
    AT24C02C-XHM-T-GP
    1K21R2F

    2
    1K21R2F
    DY
    1

    0D75V_S0 R1435
    1

    0D75V_S0 33R2F-3-GP
    DY R1407
    DY 1 2 M_A_DIM0_CKE0 R1419 C1432

    1
    2
    R1408 33R2F-3-GP 1 2 M_A_A0
    1 2 M_A_DIM0_CKE1 R1420 33R2F-3-GP C1430
    SPD Reserved 33R2F-3-GP
    M_A_DIM0_CKE1 6
    1 2 M_A_A1 SC12P50V2JN-3GP 1 2

    1
    R1421 33R2F-3-GP
    R1409 1 2 M_A_A2
    M_A_DIM0_ODT0 R1422 33R2F-3-GP SCD1U10V2KX-5GP
    1 2

    2
    R1410 33R2F-3-GP 1 2 M_A_A3
    1 2 M_A_DIM0_ODT1 R1423 33R2F-3-GP R1436
    M_A_DIM0_ODT1 6
    33R2F-3-GP 1 2 M_A_A4 33R2F-3-GP
    R1424 33R2F-3-GP
    R1411 1 2 M_A_A5 M_A_DIM0_CLK_DDR#0

    1
    1 2 M_A_DIM0_CS#0 R1425 33R2F-3-GP
    R1412 33R2F-3-GP 1 2 M_A_A6
    1 2 M_A_DIM0_CS#1 R1426 33R2F-3-GP 是是是是是下 or DY?
    M_A_DIM0_CS#1 6
    33R2F-3-GP 1 2 M_A_A7
    A R1427 33R2F-3-GP 6 M_A_DIM0_CLK_DDR1 M_A_DIM0_CLK_DDR1 A
    R1413 1 2 M_A_A8
    1 2 M_A_RAS# R1428 33R2F-3-GP
    R1414 33R2F-3-GP 1 2 M_A_A9

    2
    1 2 M_A_CAS# R1429 33R2F-3-GP
    R1415 33R2F-3-GP 1 2 M_A_A10 R1437
    1 2 M_A_WE# R1430 33R2F-3-GP 33R2F-3-GP
    33R2F-3-GP 1 2 M_A_A11
    R1431 33R2F-3-GP C1433

    1
    2
    1 2 M_A_A12
    R1432 33R2F-3-GP C1431
    R1416 1 2 M_A_A13 SC12P50V2JN-3GP 1 2

    1
    1 2 M_A_BS0 R1433 33R2F-3-GP
    R1417 33R2F-3-GP 1 2 M_A_A14
    M_A_BS1 R1434 33R2F-3-GP SCD1U10V2KX-5GP
    1 2 HR PX

    2
    R1418 33R2F-3-GP 1 2 M_A_A15
    1 2 M_A_BS2 33R2F-3-GP R1438
    33R2F-3-GP 33R2F-3-GP
    Wistron Corporation
    6 M_A_DIM0_CLK_DDR#1 M_A_DIM0_CLK_DDR#1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

    1
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    DDR3-SODIMM1
    Size Document Number Rev
    A1
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 14 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = MEMORY

    D D

    C C

    B B

    A A
    HR PX

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    DDR3-SODIMM2
    Size Document Number Rev
    Custom
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 15 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C (Blanking) C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    DDR3-SODIMM2
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 16 of 102
    5 4 3 2 1
    5 4 3 2 1

    3D3V_S0
    RN1703
    SRN2K2J-1-GP
    D 2 3 LVDS_DDC_CLK D
    1 4 LVDS_DDC_DATA

    RN1701 PCH1D 4 OF 10 3D3V_S0


    SRN2K2J-1-GP 27 PANEL_BLEN J47 AP43
    L_CTRL_DATA L_BKLTEN Cougar SDVO_TVCLKINN
    2 3 49 LCDVDD_EN M45 L_VDD_EN SDVO_TVCLKINP AP45
    1 4 L_CTRL_CLK
    L_DDC_DATA(PAGE17): 49 LBKLT_CTL P45 L_BKLTCTL
    Point SDVO_STALLN AM42

    4
    3
    SDVO_STALLP AM40
    This signal is on the LVDS interface. 49 LVDS_DDC_CLK T40 RN1706 DDI Port B Detect:(SDVO_CTRL_ DATA)
    L_DDC_CLK
    This signal needs to be left NC if eDP is 49 LVDS_DDC_DATA K47 L_DDC_DATA SDVO_INTN AP39 HDMI SRN2K2J-1-GP 1: Port B detected
    SDVO_INTP AP40
    RN1702 used for the local flat panel display L_CTRL_CLK T45 0: Port B not detected
    SRN100KJ-6-GP L_CTRL_DATA L_CTRL_CLK
    P39

    1
    2
    PANEL_BLEN L_CTRL_DATA
    1 4
    2 3 LCDVDD_EN LVDS_IBG AF37 P38
    LVD_IBG SDVO_CTRLCLK PCH_HDMI_CLK 51
    RN1704 AF36 M39
    LVD_VBG SDVO_CTRLDATA PCH_HDMI_DATA 51
    Place near PCH SRN0J-6-GP

    1
    1 4 LVDS_VREFH AE48
    R1701 LVDS_VREFL LVD_VREFH
    2 3 AE47 LVD_VREFL DDPB_AUXN AT49
    2K37R2F-GP AT47
    DDPB_AUXP
    DDPB_HPD AT40 HDMI_PCH_DET 51
    49 LVDSA_CLK# AK39

    LVDS
    2
    LVDSA_CLK# DDBP_DATA2# C1701 SCD1U10V2KX-5GP
    49 LVDSA_CLK AK40 LVDSA_CLK DDPB_0N AV42 HDMI 1 2 HDMI_DATA2_R# 51
    AV40 DDBP_DATA2 HDMI 1 2 C1702 SCD1U10V2KX-5GP HDMI_DATA2_R 51
    DDPB_0P DDBP_DATA1# C1703 SCD1U10V2KX-5GP
    49 LVDSA_DATA0# AN48 LVDSA_DATA#0 DDPB_1N AV45 HDMI 1 2 HDMI_DATA1_R# 51
    C
    49 LVDSA_DATA1# AM47 AV46 DDBP_DATA1 HDMI 1 2 C1704 SCD1U10V2KX-5GP HDMI_DATA1_R 51
    C

    Digital Display Interface


    LVDSA_DATA#1 DDPB_1P DDBP_DATA0# C1705 SCD1U10V2KX-5GP
    Impedance:90 ohm 49 LVDSA_DATA2# AK47 LVDSA_DATA#2 DDPB_2N AU48 HDMI 1 2 HDMI_DATA0_R# 51
    AJ48 AU47 DDBP_DATA0 HDMI 1 2 C1706 SCD1U10V2KX-5GP HDMI_DATA0_R 51
    LVDSA_DATA#3 DDPB_2P DDBP_CLK# C1707 SCD1U10V2KX-5GP
    DDPB_3N AV47 HDMI 1 2 HDMI_CLK_R# 51
    49 LVDSA_DATA0 AN47 AV49 DDBP_CLK HDMI 1 2 C1708 SCD1U10V2KX-5GP HDMI_CLK_R 51
    LVDSA_DATA0 DDPB_3P
    49 LVDSA_DATA1 AM49 LVDSA_DATA1
    49 LVDSA_DATA2 AK49 LVDSA_DATA2 Close to Connector side
    AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
    DDPC_CTRLDATA P42

    AF40 LVDSB_CLK#
    AF39 LVDSB_CLK DDPC_AUXN AP47
    3D3V_S0 AP49
    DDPC_AUXP
    AH45 LVDSB_DATA#0 DDPC_HPD AT38 Impedance:90 ohm TM request to change 85-ohm
    AH47 LVDSB_DATA#1
    AF49 LVDSB_DATA#2 DDPC_0N AY47
    AF45 LVDSB_DATA#3 DDPC_0P AY49
    DDPC_1N AY43
    AH43 LVDSB_DATA0 DDPC_1P AY45

    4
    3
    AH49 LVDSB_DATA1 DDPC_2N BA47
    RN1707 AF47 BA48
    SRN4K7J-8-GP LVDSB_DATA2 DDPC_2P
    AF43 LVDSB_DATA3 DDPC_3N BB47
    Close to PCH side DDPC_3P BB49

    1
    2
    N48 CRT_BLUE DDPD_CTRLCLK M43
    P49 CRT_GREEN DDPD_CTRLDATA M36
    T49 CRT_RED
    B B
    AT45

    CRT
    DDCCLK DDPD_AUXN
    T39 CRT_DDC_CLK DDPD_AUXP AT43
    DDCDATA M40 BH41
    CRT_DDC_DATA DDPD_HPD

    DDPD_0N BB43
    M47 CRT_HSYNC DDPD_0P BB45
    M49 CRT_VSYNC DDPD_1N BF44
    DDPD_1P BE44
    DDPD_2N BF42
    DAC_IREF_R T43 BE42
    DAC_IREF DDPD_2P
    T42 CRT_IRTN DDPD_3N BJ42
    1

    DDPD_3P BG42
    R1702
    1KR2D-1-GP COUGAR-GP-U2-NF
    Delete CRT pull down resistor
    2

    A <Variant Name> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    PCH (LVDS/CRT/DDI)
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 17 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = PCH DMI & FDI Termination Voltage


    PCH1E 5 OF 10
    RSVD AY7 Set to Vss when LOW
    Cougar RSVD AV7 NV_CLE
    Set to Vcc when HIGH
    BG26 TP1 RSVD AU3
    BJ26 TP2
    Point RSVD BG4
    BH25 TP3
    BJ16 AT10
    RN1801
    SRN8K2J-2-GP-U
    BG16
    TP4
    TP5
    RSVD
    RSVD BC8 CRB : 2.2K
    D AH38 TP6 D
    INT_PIRQF#
    INT_PIRQD#
    1
    2
    10
    9 USB30_SMI#
    3D3V_S0 AH37
    AK43
    TP7 RSVD AU2
    AT4
    CEKLT: 1K
    INT_PIRQC# INT_PIRQA# TP8 RSVD
    3 8 AK45 TP9 RSVD AT3
    INT_PIRQB# 4 7 INT_PIRQE# C18 AT1
    INT_PIRQH# TP10 RSVD
    3D3V_S0 5 6 N30 TP11 RSVD AY3
    H3 TP12 RSVD AT5
    AH12 AV3

    NVRAM
    TP13 RSVD
    AM4 TP14 RSVD AV1
    AM5 TP15 RSVD BB1
    Y13 BA3 1D8V_S0
    TP16 RSVD
    K24 TP17 RSVD BB5
    L24 TP18 RSVD BB3

    1
    AB46 TP19 RSVD BB7
    AB45 BE8

    RSVD
    TP20 RSVD R1808
    RSVD BD4
    BF6 2K2R2J-2-GP
    RSVD

    2
    B21 TP21 RSVD AV5
    M20 AY1 NV_CLE NV_CLE 1 2
    TP22 DF_TVS H_SNB_IVB# 5
    AY16 R1809
    A16 swap override Strap/Top-Block TP23 1KR2J-1-GP
    BG46 TP24 RSVD AV10
    Swap Override jumper
    RSVD AT8

    PCI_GNT#3 Low = A16 swap RN1803 BE28 TP25 RSVD AY5


    override/Top-Block SRN10KJ-5-GP BC30 BA2
    DGPU_HOLD_RST# TP26 RSVD
    Swap Override enabled 2 3 BE32 TP27
    DGPU_PW R_EN# 1 DY 4 BJ32 AT12
    C High = Default
    BC28
    TP28 RSVD
    BF3
    USB Ext. port 1 (HS) C
    TP29 RSVD
    BE30 TP30 External debug port use on Huron river platform
    BF32
    BG32
    AV26
    TP31
    TP32
    TP33
    USBP0N
    USBP0P
    C24
    A24
    USB Table
    BB26 TP34 USBP1N C25 USB_PN1 61
    BOOT BIOS Strap AU28 TP35 USBP1P B25 USB_PP1 61 Pair Device
    AY30 TP36 USBP2N C26
    GNT1#/GPIO51 SATA1GP/GPIO19 BOOT BIOS Location AU26 A26 0 Touch Panel / 3G SIM(DY)
    TP37 USBP2P
    AY26 TP38 USBP3N K28
    0 0 LPC AV28 TP39 USBP3P H28 1 USB Ext. port 1 (HS)
    AW30 TP40 USBP4N E28
    0 1 Reserved USBP4P D28 2 Fingerprint(DY)
    USBP5N C28 USB_PN5 82
    1 0 Reserved USBP5P A28 USB_PP5 82 3 BLUETOOT
    USBP6N C29
    1 1 SPI(Default) USBP6P B29 4 Mini Card2 (WWAN) (DY)
    INT_PIRQA# K40 N28
    INT_PIRQB# PIRQA# USBP7N
    K38 M28 5 CARD READER

    PCI
    INT_PIRQC# PIRQB# USBP7P
    H38 PIRQC# USBP8N L30
    INT_PIRQD# G38 K30 6 X
    PIRQD# USBP8P
    DGPU_HOLD_RST# USBP9N G30 USB_PN9 61
    DGPU_HOLD_RST# C46 E30 7 X

    USB
    REQ1#/GPIO50 USBP9P USB_PP9 61
    TPAD14-GP TP1806 1 DGPU_SELECT# C44 C30
    DGPU_PW R_EN# E40 REQ2#/GPIO52 USBP10N USB Ext. port 4 / E-SATA
    DGPU_PWR_EN# REQ3#/GPIO54 USBP10P A30 8
    Strap pin ,Internal PU /USB CHARGER
    USBP11N L32 USB_PN11 82
    D47 GNT1#/GPIO51 USBP11P K32 USB_PP11 82 9 USB Ext. port 2
    TPAD14-GP TP1804 1 DGPU_PW M_SELECT# E42 G32 USB_PN12 49
    GNT2#/GPIO53 USBP12N
    B
    F46 GNT3#/GPIO55 USBP12P E32 USB_PP12 49 10 EDP CAMERA(DY) B
    USBP13N C32
    USBP13P A32 11 Mini Card1 (WLAN)
    INT_PIRQE# G42
    INT_PIRQF# PIRQE#/GPIO2
    G40 PIRQF#/GPIO3 12 CAMERA
    USB30_SMI# C42 C33 USB_RBIAS 1 2
    INT_PIRQH# PIRQG#/GPIO4 USBRBIAS# R1811
    D44 PIRQH#/GPIO5 13 New Card(DY)
    22D6R2F-L1-GP
    USBRBIAS B33
    K10 PME# 3D3V_S5
    5,27,36,71,82,97 PLT_RST# C6 PLTRST# OC0#/GPIO59 A14
    OC1#/GPIO40 K20

    2
    OC2#/GPIO41 B17
    DEBUG Card 71 CLK_PCI_LPC R1804 1 2 22R2J-2-GP CLK_PCI_LPC_R H49 C16 R1820
    R1805 CLKOUT_PCI0 OC3#/GPIO42
    PCH 20 CLK_PCI_FB 1 2 22R2J-2-GP CLK_PCI_FB_R H43 CLKOUT_PCI1 OC4#/GPIO43 L16 10KR2J-3-GP
    KBC 27 CLK_PCI_KBC R1806 1 2 22R2J-2-GP CLK_PCI_KBC_R J48 A16
    CLKOUT_PCI2 OC5#/GPIO9
    K42 D14

    1
    CLKOUT_PCI3 OC6#/GPIO10 OC
    H40 CLKOUT_PCI4 OC7#/GPIO14 C14

    COUGAR-GP-U2-NF

    OC[3:0]# for Device 29 (Ports 0-7)


    OC[7:4]# for Device 26 (Ports 8-13)

    A <Variant Name> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    PCH (PCI/USB/NVRAM)
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 18 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = PCH 4
    4
    DMI_RXN[3:0]
    DMI_RXP[3:0] FDI_TXN[7:0] 4
    FDI_TXP[7:0] 4
    4 DMI_TXN[3:0]
    4 DMI_TXP[3:0]
    PCH1C 3 OF 10

    4 DMI_RXN0 BC24 DMI0RXN Cougar FDI_RXN0 BJ14 FDI_TXN0 4


    4 DMI_RXN1 BE20 DMI1RXN FDI_RXN1 AY14 FDI_TXN1 4

    D
    4 DMI_RXN2 BG18
    BG20
    DMI2RXN Point FDI_RXN2 BE14
    BH13
    FDI_TXN2 4
    D
    4 DMI_RXN3 DMI3RXN FDI_RXN3 FDI_TXN3 4
    Signal Routing Guideline: FDI_RXN4 BC12 FDI_TXN4 4
    DMI_ZCOMP keep W=4 mils and 4 DMI_RXP0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_TXN5 4
    4 DMI_RXP1 BC20 BG10 FDI_TXN6 4
    routing length less than 500 BJ18
    DMI1RXP FDI_RXN6
    BG9
    4 DMI_RXP2 DMI2RXP FDI_RXN7 FDI_TXN7 4
    mils. 4 DMI_RXP3 BJ20 DMI3RXP
    DMI_IRCOMP keep W=4 mils and FDI_RXP0 BG14 FDI_TXP0 4
    routing length less than 500 4 DMI_TXN0 AW24 DMI0TXN FDI_RXP1 BB14 FDI_TXP1 4
    4 DMI_TXN1 AW20 BF14 FDI_TXP2 4
    mils. BB18
    DMI1TXN FDI_RXP2
    BG13
    4 DMI_TXN2 DMI2TXN FDI_RXP3 FDI_TXP3 4
    AV18 BE12

    DMI
    FDI
    4 DMI_TXN3 DMI3TXN FDI_RXP4 FDI_TXP4 4
    FDI_RXP5 BG12 FDI_TXP5 4
    4 DMI_TXP0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TXP6 4
    4 DMI_TXP1 AY20 DMI1TXP FDI_RXP7 BH9 FDI_TXP7 4
    4 DMI_TXP2 AY18 DMI2TXP
    4 DMI_TXP3 AU18 DMI3TXP
    FDI_INT AW16 FDI_INT 4
    1D05V_VTT BJ24 AV12
    DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4 For platforms not supporting Deep S4/S5
    R1901 2 49D9R2F-GP DMI_COMP_R
    1 BG25 DMI_IRCOMP FDI_FSYNC1 BC10 FDI_FSYNC1 4 1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
    R1902 1 2 750R2F-GP RBIAS_CPY BH21 DMI2RBIAS FDI_LSYNC0 AV14 FDI_LSYNC0 4 2.DPWROK and RSMRST# will rise at the same time (connected on board)
    R1926 FDI_LSYNC1 BB10 FDI_LSYNC1 4 3.SLP_SUS# and SUSACK# are left as ‘no connect’
    10KR2J-3-GP 4.SUSWARN# used as SUSPWRDNACK/GPIO30
    1 DY 2 SYS_PW ROK
    A18 DSW ODVREN R1910
    C PW ROK DSWVRMEN 0R0402-PAD C
    1 2

    System Power Management


    R1904 1 2 PM_RSMRST#
    100KR2J-1-GP SUS_PW R_ACK C12 E22 PCH_DPW ROK 1 2
    SUSACK# DPWROK DY R1911
    RTC_AUX_S5
    10KR2J-3-GP
    3D3V_S0 1 2 SYS_RESET# K3 B9 PCIE_W AKE# 82
    R1905 SYS_RESET# WAKE#
    10KR2J-3-GP
    36 SYS_PW ROK P12 SYS_PWROK CLKRUN#/GPIO32 N3 PM_CLKRUN# 27

    27,42 S0_PW R_GOOD 2 1 PW ROK L22 G8


    R1924 PWROK SUS_STAT#/GPIO61
    0R0402-PAD
    L10 APWROK SUSCLK/GPIO62 N14 PCH_SUSCLK_KBC 27
    DSWODVREN - On Die DSW VR Enable

    5,37 PM_DRAM_PW RGD B13 DRAMPWROK SLP_S5#/GPIO63 D10 HIGH Enabled (DEFAULT)
    S0_PWR_GOOD after PM_SLP_S3# delay 200 ms PM_RSMRST# C21 H4 LOW Disabled
    RSMRST# SLP_S4# PM_SLP_S4# 27,46

    27 SUS_PW R_ACK K16 SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# F4 PM_SLP_S3# 27,29,36,37,47 RTC_AUX_S5

    27,97 PM_PW RBTN# E20 PWRBTN# SLP_A# G10


    R1917 1 2 330KR2J-L1-GP
    B B
    27 AC_PRESENT H20 ACPRESENT/GPIO31 SLP_SUS# G16
    DSW ODVREN R1918 1 2 330KR2J-L1-GP
    DY
    BATLOW # E10 AP14
    BATLOW#/GPIO72 PMSYNCH H_PM_SYNC 5

    PM_RI# A10 K14


    RI# SLP_LAN#/GPIO29

    COUGAR-GP-U2-NF

    R1919 3D3V_S0
    8K2R2J-3-GP

    PM_CLKRUN# 1 2
    3D3V_S5
    RN1901
    SRN10KJ-6-GP
    8 1 BATLOW #
    7 2 AC_PRESENT
    6 3 SUS_PW R_ACK
    5 4 PM_RI# 3D3V_AUX_S5
    R1909
    100KR2J-1-GP
    R1921 2 1
    10KR2J-3-GP
    PCIE_WAKE#
    2

    2 1 PCIE_W AKE#
    CRB : 1K R1916
    10KR2J-3-GP R1912
    A <Variant Name> A
    CEKLT: 10K 1KR2J-1-GP
    4 3 PM_RSMRST# 1 2 RSMRST#_KBC 27
    1

    PWRBTN# Wistron Corporation


    3V_5V_POK_# 5 2 3V_5V_POK 41
    This signal has an internal pull-up resistor 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    6 1 Q1901 Taipei Hsien 221, Taiwan, R.O.C.
    R1908 2N7002KDW -GP
    100KR2J-1-GP 84.2N702.A3F Title
    PM_RSMRST#
    PM_RSMRST# 2nd = 84.DM601.03F
    2 1
    CRB : PL 10K PCH (DM I/FDI/PM)
    Size Document Number Rev
    ANNIE : PL 100K A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 19 of 102
    5 4 3 2 1
    5 4 3 2 1

    3D3V_S5

    SSID = PCH SMB_CLK 4 1 RN2003


    SMB_DATA 3 2 SRN2K2J-1-GP

    SML0_DATA 3 2 RN2004
    PCH1B 2 OF 10 SML0_CLK 4 1 SRN2K2J-1-GP
    USB3.0 CLK BG34 PERN1 Cougar SML1_CLK 2 3 RN2005
    BJ34 E12 EC_SW I# 27 SML1_DATA 1 4 SRN2K2J-1-GP
    PERP1 SMBALERT#/GPIO11
    AV32 PETN1 Point SMB_CLK PCH_GPIO74
    AU32 PETP1 W-WAN SMBCLK H14 1 4 RN2006
    PCIE_CLK_REQ6# 2 3 SRN10KJ-5-GP
    D
    BE34 PERN2 SMBDATA C9 SMB_DATA DDR3 DIMM D

    3D3V_S0 RN2018 BF34


    SRN10KJ-5-GP PERP2 R2009
    BB32 PETN2 WLAN
    1 4 PCIE_CLK_RQ2# AY32 DRAMRST_CNTRL_PCH 1 2

    SMBUS
    PETP2
    2 3 CLK_PCIE_W LAN_REQ1# SML0ALERT#/GPIO60 A12 DRAMRST_CNTRL_PCH 37
    1KR2J-1-GP
    BG36 3D3V_S0 RN2007
    PERN3 SML0_CLK SRN2K2J-1-GP
    BJ36 PERP3 SML0CLK C8
    PCIECLKRQ1# and PCIECLKRQ2# AV34 PETN3 Card Reader 1 4
    AU34 G12 SML0_DATA 2 3
    PETP3 SML0DATA
    Support S0 power only
    BF36 PERN4
    BE36 PERP4
    check list: AY34 C13 PCH_GPIO74
    BB34
    PETN4 LAN SML1ALERT#/PCHHOT#/GPIO74
    A 10K-ohm PU still need to be used PETP4
    E14

    PCI-E*
    SML1CLK/GPIO58 SML1_CLK 27
    BG37
    BH37
    PERN5
    PERP5 SML1DATA/GPIO75 M16 SML1_DATA 27
    KBC SMB_DATA 6 1 PCH_SMBDATA 14
    AY36 PETN5 USB3.0
    BB36 PETP5 5 2
    Q2001
    BJ38 2N7002KDW -GP 4 3
    82 PCIE_RXN6 PERN6
    82 PCIE_RXP6 BG38 84.2N702.A3F

    Controller
    C2001 PERP6
    82 PCIE_TXN6 1 2 SCD1U10V2KX-5GP PCIE_TXN6_C AU36 PETN6 Intel GBE LAN CL_CLK1 M7 2nd = 84.DM601.03F
    C2002 1 2 SCD1U10V2KX-5GP PCIE_TXP6_C AV36
    82 PCIE_TXP6 PETP6

    Link
    PCH_SMBCLK 14
    BG40 PERN7 CL_DATA1 T11
    BJ40 SMB_CLK
    PERP7
    AY40 PETN7 Dock
    C BB40 P10 C
    PETP7 CL_RST1#
    For DIS_PX mode or MXM mode.
    BE38 PERN8
    BC38 PERP8 NEW CARD
    AW38 3D3V_S5 C2008
    PETN8 SC12P50V2JN-3GP
    AY38 PETP8 XTAL25_IN 2 1

    1
    PEG_A_CLKRQ#/GPIO47 M10 PEG_CLKREQ#_R

    2
    Y40 R2004 X2001
    CLKOUT_PCIE0N 10KR2J-3-GP R2006 XTAL-25MHZ-102-GP
    Y39
    WWAN CLK CLKOUT_PCIE0P
    CLKOUT_PEG_A_N AB37 1M1R2J-GP 82.30020.851

    CLOCKS
    CLK_PCIE_W W AN_REQ# J2 AB38 2nd = 82.30020.791

    1
    PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P PEG_CLKREQ#_R

    1
    XTAL25_OUT 2 1
    AB49 AV22 CLK_EXP_N 5
    WLAN CLK AB47
    CLKOUT_PCIE1N
    CLKOUT_PCIE1P
    CLKOUT_DMI_N
    CLKOUT_DMI_P AU22 CLK_EXP_P 5
    3D3V_S0 C2007
    SC12P50V2JN-3GP
    CLK_PCIE_W LAN_REQ1# M1 PCIECLKRQ1#/GPIO18
    CLKOUT_DP_N AM12
    CLKOUT_DP_P AM13

    3
    4
    AA48 CLKOUT_PCIE2N
    AA47 RN2010 UMA_DISCRETE#
    CLKOUT_PCIE2P CLK_BUF_EXP_N
    CLKIN_DMI_N BF18 SRN10KJ-5-GP UMA: 1 1
    PCIE_CLK_RQ2# V10 BE18 CLK_BUF_EXP_P
    PCIECLKRQ2#/GPIO20 CLKIN_DMI_P DIS :0 1
    SG(PX) : 0 0

    2
    1
    Y37 CLKOUT_PCIE3N CLKIN_GND1_N BJ30 CLK_BUF_CPYCLK_N 2 3 Optimus(Muxless) : 1 0
    Y36 BG30 CLK_BUF_CPYCLK_P 1 4
    CLKOUT_PCIE3P CLKIN_GND1_P
    B UMA_DIS# 22 B
    PCIE_CLK_LAN_RQ# A8 RN2008 DGPU_PRSNT#
    PCIECLKRQ3#/GPIO25 CLK_BUF_DOT96_N SRN10KJ-5-GP
    CLKIN_DOT_96N G24
    E24 CLK_BUF_DOT96_P
    CLKIN_DOT_96P
    Y43 CLKOUT_PCIE4N
    Y45 3D3V_S5
    CLKOUT_PCIE4P CLK_BUF_CKSSCD_N
    CLKIN_SATA_N AK7 Delete Pull down R
    USB3_PEGB_CLKREQ# L12 AK5 CLK_BUF_CKSSCD_P
    RN2012 PCIECLKRQ4#/GPIO26 CLKIN_SATA_P
    -SA Athero suggest PU 4.7K
    SRN0J-6-GP
    82 CLK_PCIE_W LAN# 2 3 CLK_PCH_SRC6_N V45 K45 CLK_BUF_REF14 1 R2003 2 PCIE_CLK_LAN_RQ#
    CLK_PCH_SRC6_P CLKOUT_PCIE5N REFCLK14IN 4K7R2J-2-GP
    82 CLK_PCIE_W LAN 1 4 V46 CLKOUT_PCIE5P

    82 CLK_PCIE_W LAN_REQ# PCIE_CLK_REQ5# L14 H45 CLK_PCI_FB 18 check list: 2 3 CLK_PCIE_W W AN_REQ#
    PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK USB3_PEGB_CLKREQ#
    A 10K-ohm PU still need to be used 1 4

    AB42 V47 XTAL25_IN RN2009 RN2001


    CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT SRN10KJ-L3-GP SRN10KJ-5-GP
    AB40 CLKOUT_PEG_B_P XTAL25_OUT V49
    CLK_BUF_REF14 1 10
    22 PEG_B_CLKRQ# PEG_B_CLKRQ# E6 CLK_BUF_CKSSCD_P 2 9 CLK_BUF_EXP_P RN2002
    PEG_B_CLKRQ#/GPIO56 CLK_BUF_CKSSCD_N CLK_BUF_EXP_N SRN10KJ-6-GP
    3 8
    XCLK_RCOMP Y47 XCLK_RCOMP 1 2 1D05V_VTT 4 7 CLK_BUF_DOT96_N 1 8 PCIE_CLK_REQ5#
    V40 R2007 5 6 CLK_BUF_DOT96_P 2 7 CLK_PCIE_NEW _REQ#
    CLKOUT_PCIE6N 90D9R2F-1-GP EC_SW I#
    V42 CLKOUT_PCIE6P 3 6
    4 5 PCH_GPIO24
    PCIE_CLK_REQ6# T13 need very close to PCH
    PCIECLKRQ6#/GPIO45
    V38 CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64 K43
    V37 PCH_GPIO24
    FLEX CLOCKS

    CLKOUT_PCIE7P PCH_GPIO24 22
    A F47 VRAM_SIZE3 VRAM_SIZE3 22 <Variant Name> A
    CLK_PCIE_NEW _REQ# CLKOUTFLEX1/GPIO65
    K12 PCIECLKRQ7#/GPIO46
    CLKOUTFLEX2/GPIO66 H47
    AK14
    AK13
    CLKOUT_ITPXDP_N
    CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67 K49 DGPU_PRSNT# Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.
    COUGAR-GP-U2-NF
    Title

    – Prioritize 27/14/24/48/25-MHz FLEX on FLEX1 and FLEX3 PCH (PCI-E/SMBUS/CLOCK/CL)


    Size Document Number Rev
    – Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0 and FLEX2 A3
    if more than 2 PCI clocks + PCI loopback are routed. Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 20 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = PCH RTC_AUX_S5

    RTC_X1 2 3 INTVRMEN- Integrated SUS


    1 4
    1 2 RTC_X2 1.05V VRM Enable

    1
    R2101 10MR2J-L-GP RN2104 C2103 High - Enable internal VRs
    SRN20KJ-GP-U SC1U6D3V2KX-GP
    X2101
    Low - Enable external VRs

    2
    X-32D768KHZ-34GPU
    82.30001.661
    D 2nd = 82.30001.B21 PCH1A 1 OF 10 D
    LPC_AD[0..3] 27,71
    1 4 RTC_X1 A20 C38 LPC_AD0
    RTCX1 Cougar FWH0/LAD0
    A38 LPC_AD1
    FWH1/LAD1

    LPC
    C2101 RTC_X2 C20 RTCX2 Point FWH2/LAD2 B37 LPC_AD2
    1

    1
    C37 LPC_AD3
    FWH3/LAD3
    SC5P50V2CN-2GP

    2 3 C2102 RTC_RST# D20


    SC5P50V2CN-2GP RTCRST#
    D36 LPC_FRAME# 27,71
    2

    2 FWH4/LFRAME#

    2
    1M1R2J-GP SRTC_RST# G22 SRTCRST#

    1
    C2104 G2101 R2104 E36
    LDRQ0#

    RTC
    SC1U6D3V2KX-GP GAP-OPEN 2 1 SM_INTRUDER# K22 K36
    INTRUDER# LDRQ1#/GPIO23 check list:8.2K PU

    2
    CL = 7pF RTC_AUX_S5 1 2 PCH_INTVRMEN C17 V5 INT_SERIRQ 27 CRB :10K PU

    1
    INTVRMEN SERIRQ
    Freq tolertance :+/- 20 ppm R2105
    R2122 330KR2F-L-GP AM3 SATA_RXN0 56
    33R2J-2-GP HDA_BITCLK SATA0RXN
    N34 AM1
    DY 1 HDA_SYNC RTC Reset HDA_BCLK SATA0RXP SATA_RXP0 56
    HDD1

    SATA 6G
    29 HDA_CODEC_SYNC 2 SATA0TXN AP7 SATA_TXN0 56
    2 1 HDA_SDOUT HDA_SYNC L34 AP5 SATA_TXP0 56
    29 HDA_CODEC_SDOUT R2123 HDA_SYNC SATA0TXP
    33R2J-2-GP T10 AM10

    HDA_RST#
    29 HDA_SPKR
    HDA_RST#
    SPKR SATA1RXN
    SATA1RXP AM8
    SATA_RXN1
    SATA_RXP1
    82
    82 M-SATA
    29 HDA_CODEC_RST# 1 4 K34 HDA_RST# SATA1TXN AP11 SATA_TXN1 82
    2 3 HDA_BITCLK AP10 SATA_TXP1 82
    29 HDA_CODEC_BITCLK SATA1TXP
    RN2102 29 HDA_SDIN0 E34 AD7
    SRN33J-5-GP-U HDA_SDIN0 SATA2RXN
    SATA2RXP AD5
    G34 HDA_SDIN1 SATA2TXN AH5
    SATA2TXP AH4
    C C34 C
    HDA_SDIN2

    IHDA
    SATA3RXN AB8
    A34 HDA_SDIN3 SATA3RXP AB10
    SATA3TXN AF3
    SATA3TXP AF1
    Flash Descriptor Security Overide 27 ME_UNLOCK 1 R2107 2 HDA_SDOUT A36 HDA_SDO
    1KR2J-1-GP

    SATA
    SATA4RXN Y7
    Low = Default SATA4RXP Y5
    HDA_SDOUT High = Enable C36 HDA_DOCK_EN#/GPIO33 SATA4TXN AD3
    SATA4TXP AD1
    +3VS_+1.5VS_HDA_IO N32 HDA_DOCK_RST#/GPIO13
    Y3
    1
    DY 2 HDA_SDOUT R2121 SATA5RXN
    Y1
    4K7R2J-2-GP SATA5RXP
    SATA5TXN AB3
    R2102 2 1 PCH_JTAG_TCK_BUF J3 AB1
    1KR2J-1-GP JTAG_TCK SATA5TXP
    H7 Y11 1D05V_VTT
    JTAG_TMS SATAICOMPO

    JTAG
    No Reboot Strap K5 Y10 SATA_COMP R2112 1 2 37D4R2F-GP
    JTAG_TDI SATAICOMPI
    Low = Default H1 1D05V_VTT
    JTAG_TDO
    HDA_SPKR High = No Reboot SATA3RCOMPO AB12

    AB13 SATA3_COMP R2113 1 2 49D9R2F-GP


    R2108 SATA3COMPI
    33R2J-2-GP
    27,60 SPI_CLK_R 1 2 PCH_SPI_CLK T3 SPI_CLK SATA3RBIAS AH1 RBIAS_SATA3 R2114 1 2 750R2F-GP
    PLL ODVR VOLTAGE
    27,60 SPI_CS0#_R 1 2 PCH_SPI_CS0# Y14 SPI_CS0#
    B R2109 B
    Low = 1.8V (Default)
    HDA_SYNC High = 1.5V 33R2J-2-GP T1
    +3VS_+1.5VS_HDA_IO SPI_CS1# SATA_LED# 22

    SPI
    R2103 P3 SATA_LED#
    1KR2J-1-GP SATALED#
    1 2 HDA_SYNC 27,60 SPI_SI_R 1 2 PCH_SPI_SI V4 V14 SATA_DET#0
    R2110 33R2J-2-GP SPI_MOSI SATA0GP/GPIO21
    This signal has a weak internal pull down. 27,60 SPI_SO_R U3 SPI_MISO SATA1GP/GPIO19 P1
    On Die PLL VR is supplied by 1.5V when Strap pin ,Internal PU
    sampled high, 1.8 V when sampled low. COUGAR-GP-U2-NF
    Needs to be pulled High for Huron River platform.
    co-operate with R2310
    71.COUGA.00U
    HDA_CODEC_BITCLK HDA_CODEC_SDOUT SPI_CS0#_R
    2

    EC2102 EC2103 EC2101


    3D3V_S0
    DY DY DY
    1

    1
    SC4D7P50V2CN-1GP

    SC4D7P50V2CN-1GP

    SC4D7P50V2CN-1GP

    SWAP pin from Page 22 RN2103


    SRN10KJ-6-GP
    22 S_GPIO S_GPIO 1 8
    5V_S0 22,27 PCH_TEMP_ALERT# PCH_TEMP_ALERT# 2 7
    R2124 INT_SERIRQ 3 6
    G 33R2J-2-GP SATA_DET#0 4 5

    D HDA_SYNC_R 1 2 HDA_SYNC

    HDA_CODEC_SYNC S
    A <Variant Name> A
    Q2101
    2N7002K-2-GP HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to
    84.2N702.J31
    2ND = 84.2N702.031 sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this Wistron Corporation
    signal on the board. Signal may have leakage paths via powered off devices (Audio 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.
    Codec) and hence contend with the external pull-up. A blocking FET is
    recommended in such a case to isolate HDA_SYNC from the Audio Codec device Title

    until after the Strap sampling is complete. PCH (SPI/RTC/LPC/SATA/IHDA)


    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 21 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = PCH
    3D3V_S0
    RN2203 Note:
    SRN10KJ-5-GP For PCH debug with XDP, need to NO STUFF R2218
    1 4 H_RCIN# PCH1F 6 OF 10
    2 3 H_A20GATE
    S_GPIO T7 C40 SATA_ODD_PW RGT 1 TP2205 TPAD14-GP
    21 S_GPIO BMBUSY#/GPIO0 Cougar TACH4/GPIO68
    GPIO27 has a weak[20K] internal pull up. EC_SMI# A42 Point B41 UMA_DIS# 20
    TACH1/GPIO1 TACH5/GPIO69
    To enable on-die PLL Voltage regurator,
    DGPU_HPD_INTR# H36 C41 VRAM_SIZE1
    should not place external pull down. TACH2/GPIO6 TACH6/GPIO70
    D D
    27 EC_SCI# E38 TACH3/GPIO7 TACH7/GPIO71 A40 VRAM_SIZE2

    ICC_EN# C10 GPIO8


    PCH_GPIO12 C4 LAN_PHY_PWR_CTRL/GPIO12
    PCH_GPIO15 G2 P4 H_A20GATE 27
    3D3V_S0 R2202 GPIO15 A20GATE
    10KR2J-3-GP AU16 H_PECI_R 1 R2203 2 H_PECI 5,27

    CPU/MISC
    SATA_ODD_PRSNT# PECI 0R2J-2-GP
    1 2 U2 SATA4GP/GPIO16
    P5 H_RCIN# 27
    DY
    RCIN#
    check list:

    GPIO
    if are unused,PU or PD TPAD14-GP TP2204 1 DGPU_PW ROK D40 TACH0/GPIO17 PROCPWRGD AY11 H_CPUPW RGD 5,36,97
    PCH_GPIO22 T5 AY10 PCH_THERMTRIP_R
    SCLOCK/GPIO22 THRMTRIP#

    20 PCH_GPIO24 PCH_GPIO24 E8 T14


    GPIO24/MEM_LED INIT3_3V#
    INTERNAL GFX EXTERNAL GFX TPAD14-GP TP2203 1 PCH_GPIO27 E16 GPIO27 PCH_THERMTRIP_R 1 R2204 2 H_THERMTRIP# 5,36
    R2205 DY 10K PLL_ODVR_EN P8 390R2F-2GP
    GPIO28
    TS_VSS1 AH8
    PSW _CLR# K1
    R2206 100K DY STP_PCI#/GPIO34
    TS_VSS2 AK11 design guide and CRB cirucit stuff 390-ohm
    FP_DET# K4 JE40_HR stuff 54.9-ohm
    GPIO35

    2
    TS_VSS3 AH10
    G2201 DMI_OVRVLTG V8
    GFX_CRB_DET GAP-OPEN SATA2GP/GPIO36
    TS_VSS4 AK10
    C FDI_OVRVLTG M5 C
    Pass Word Clear SATA3GP/GPIO37
    1

    P37

    1
    R2206 MFG_MODE NC_1
    N2 SLOAD/GPIO38
    100KR2J-1-GP
    GFX_CRB_DET M3 TS Signal Disable Guideline:
    SDATAOUT0/GPIO39
    2

    3D3V_S0 VRAM_SIZE4 V13 BG2 TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4


    RN2201 SDATAOUT1/GPIO48 NCTF_VSS#BG2
    SRN10KJ-6-GP PCH_TEMP_ALERT#
    should not float on the motherboard. They should
    21,27 PCH_TEMP_ALERT# V3 SATA5GP/GPIO49 NCTF_VSS#BG48 BG48
    EC_SMI# 1 8 be tied to GND directly.
    EC_SCI# 2 7 USB3_PW R_ON D6 BH3
    DGPU_HPD_INTR# GPIO57 NCTF_VSS#BH3
    3 6
    4 5 BH47 FDI_OVRVLTG
    NCTF_VSS#BH47
    FDI TERMINATION VOLTAGE OVERRIDE

    1
    A4 NCTF_VSS#A4 NCTF_VSS#BJ4 BJ4
    RN2202 R2208
    SRN10KJ-6-GP A44 BJ44 10KR2J-3-GP

    A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
    NCTF_VSS#A44 NCTF_VSS#BJ44
    PSW _CLR# 1 8 GPIO37 LOW - Tx, Rx terminated to same voltage
    FP_DET# 2 7 A45 BJ45 (FDI_OVRVLTG) (DC Coupling Model DEFAULT)

    2
    NCTF_VSS#A45 NCTF_VSS#BJ45

    BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
    SWAP pin from Page 20 MFG_MODE 3 6

    NCTF
    SATA_LED# 4 5 A46 BJ46

    NCTF TEST PIN:


    21 SATA_LED# NCTF_VSS#A46 NCTF_VSS#BJ46
    A5 NCTF_VSS#A5 NCTF_VSS#BJ5 BJ5
    DMI_OVRVLTG
    3D3V_S5 A6 BJ6 DMI TERMINATION VOLTAGE OVERRIDE
    NCTF_VSS#A6 NCTF_VSS#BJ6

    1
    RN2204
    SWAP pin from Page 20 SRN10KJ-6-GP B3 C2 R2210
    PEG_B_CLKRQ# NCTF_VSS#B3 NCTF_VSS#C2 10KR2J-3-GP
    20 PEG_B_CLKRQ# 8 1
    USB3_PW R_ON 7 2 B47 C48 GPIO36 LOW - Tx, Rx terminated to same voltage
    B PCH_GPIO12 NCTF_VSS#B47 NCTF_VSS#C48 B
    6 3 (DMI_OVRVLTG) (DC Coupling Model DEFAULT)

    2
    5 4 BD1 NCTF_VSS#BD1 NCTF_VSS#D1 D1

    D1,D49,E1,E49,F1,F49
    BD49 NCTF_VSS#BD49 NCTF_VSS#D49 D49

    BE1 NCTF_VSS#BE1 NCTF_VSS#E1 E1 Integrated Clock Enable functionality is achieved


    PCH_GPIO15 1 R2201 2
    1KR2J-1-GP BE49 E49
    via soft-strap. The default is integrated clock
    NCTF_VSS#BE49 NCTF_VSS#E49
    enable.
    BF1 NCTF_VSS#BF1 NCTF_VSS#F1 F1
    PLL ON DIE VR ENABLE
    BF49 F49 ICC_EN#
    NCTF_VSS#BF49 NCTF_VSS#F49
    VRAM Frequency NOTE:This signal has a weak internal pull-up 20K Integrated Clock Chip Enable

    1
    ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT
    Pull high: 800MHZ DISABLED -- LOW (R2212 STUFFED)
    COUGAR-GP-U2-NF R2211
    1KR2J-1-GP ICC_EN# HIGH (R2211 DY)- DISABLED [DEFAULT]
    Pull low :900MHZ

    2
    3D3V_S0 LOW (R2211)- ENABLED
    3D3V_S0
    GPIO8 has a weak[20K] internal pull up.
    3D3V_S0 Integrated Clock Enable functionality is achieved
    1

    via soft-strap. The default is integrated clock


    1

    R2218 MICRON_ELPIDA
    1

    10KR2J-3-GP 4G R2214 R2220 R2216 enable.


    ELPIDA_S/H R2230
    10KR2J-3-GP

    10KR2J-3-GP

    10KR2J-3-GP 10KR2J-3-GP
    10KR2J-3-GP

    DYRAM
    2

    A PLL_ODVR_EN <Core Design> A


    2

    (GPIO70 Pin2)

    1
    PCH_GPIO22 VRAM_SIZE1 VRAM_SIZE3 VRAM_SIZE3 20
    VRAM_SIZE4 VRAM_SIZE2 R2212
    Wistron Corporation
    1

    (GPIO48 Pin4) (GPIO71 Pin1) (GPIO65 Pin3) DY 1KR2J-1-GP


    1

    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


    DY R2219
    10KR2J-3-GP R2221 R2215 R2217
    R2231
    Taipei Hsien 221, Taiwan, R.O.C.

    2
    2G NANY_S/H MICRON_NANY RAM
    10KR2J-3-GP

    10KR2J-3-GP

    10KR2J-3-GP

    Title
    2

    PCH (GPIO/CPU)
    2

    Size Document Number Rev


    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 22 of 102
    5 4 3 2 1
    5 4 3 2 1

    1D05V_VTT
    PCH1G POWER 7 OF 10
    3D3V_S0
    6A(total) AA23
    Cougar
    U48 +VCCA_DAC_1_2 1
    R2315
    2
    AC23
    VCCCORE
    VCCCORE
    Point VCCADAC

    1
    CRT
    AD21 C2313 C2314 0R0402-PAD
    VCCCORE

    SCD01U16V2KX-3GP

    SCD1U10V2KX-5GP
    D C2301 C2302 C2303 C2304 AD23 U47 D
    VCCCORE VSSADAC

    SC10U6D3V5KX-1GP

    SC1U6D3V2KX-GP

    SC1U6D3V2KX-GP

    SC1U6D3V2KX-GP

    VCC CORE
    AF21

    2
    VCCCORE
    AF23

    2
    VCCCORE 3D3V_S0
    AG21 VCCCORE
    AG23 VCCCORE
    AG24 AK36 +3VS_VCCA_LVDS 2 1
    VCCCORE VCCALVDS 0R0603-PAD R2304
    AG26 VCCCORE
    AG27 VCCCORE VSSALVDS AK37
    AG29 VCCCORE
    AJ23

    LVDS
    VCCCORE
    AJ26 VCCCORE VCCTX_LVDS AM37
    AJ27 VCCCORE
    AJ29 AM38 R2305 1D8V_S0
    VCCCORE VCCTX_LVDS 0R5J-5-GP
    AJ31 VCCCORE
    AP36 +1.8VS_VCCTX_LVDS 1 2
    1D05V_VTT VCCTX_LVDS

    2
    AP37 C2316 C2317 C2318
    VCCTX_LVDS

    SCD01U16V2KX-3GP

    SCD01U16V2KX-3GP

    SC1U25V3KX-1-GP
    AN19 VCCIO DY

    1
    BJ22 VCCAPLLEXP
    1D05V_VTT
    V33

    HVCMOS
    VCC3_3
    AN16 VCCIO 3D3V_S0
    1

    1
    C2306 C2307 C2308 C2309 AN17 VCCIO
    SC1U6D3V2KX-GP

    SC1U6D3V2KX-GP

    SC1U6D3V2KX-GP

    SC1U6D3V2KX-GP
    DY VCC3_3 V34
    2

    1
    AN21 C2319
    C VCCIO SCD1U10V2KX-5GP C
    AN26 1D5V_S0

    2
    VCCIO
    AN27 VCCIO VCCVRM AT16
    170mA(Total)
    AP21 1D05V_VTT
    VCCIO
    AP23 VCCIO VCCDMI AT20

    DMI

    1
    AP24 C2320

    VCCIO
    VCCIO SC1U6D3V2KX-GP
    AP26 AB36

    2
    VCCIO VCCCLKDMI
    75mA
    AT24 L2303 1D05V_VTT
    VCCIO IND-10UH-218-GP
    +1.05VS_VCC_DMI_CCI 1 2
    AN33 VCCIO 68.10050.10Y

    1
    C2321 C2325 2nd = 68.10090.10B

    SC1U6D3V2KX-GP

    SC10U6D3V5KX-1GP
    AN34 VCCIO VccDFTERM AG16 DY
    3D3V_S0

    2
    230mA(Total)

    NAND / SPI
    BH29 VCC3_3 VccDFTERM AG17
    1

    C2310
    SCD1U10V2KX-5GP AJ16
    VccDFTERM 1D8V_S0
    2

    1D5V_S0 AP16 VCCVRM


    VccDFTERM AJ17

    1
    B C2326 C2322 B
    BG6 VCCAFDIPLL SCD1U10V2KX-5GP SCD1U10V2KX-5GP

    2
    1D05V_VTT AP17 VCCIO
    FDI

    VCCSPI V1

    1D05V_VTT AU20 VCCDMI


    3D3V_S5

    1
    COUGAR-GP-U2-NF C2323
    SC1U6D3V2KX-GP

    A <Variant Name> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    PCH (POWER1)
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 23 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = PCH PCH1J POWER 10 OF 10 1D05V_VTT

    AD49 VCCACLK Cougar VCCIO N26


    (1uFx1)

    1
    (0.1uFx1)
    0.002A Point VCCIO P26 C2423
    SC1U6D3V2KX-GP
    3D3V_S5 T16 VCCDSW3_3
    P28 3D3V_S5

    2
    VCCIO D2401
    (10uFx1)
    (1uFx1) V12 DCPSUSBYP VCCIO T27 CH751H-40PT-GP

    2
    3D3V_S0 83.R0304.A8F 5V_S5
    D
    VCCIO T29
    3D3V_S5
    2nd = 83.R2004.B8F D
    T38 VCC3_3
    0.097A (Totally current of VCCSUS3_3)

    1
    C2402 T23

    1
    SC1U10V2KX-1GP VCCSUS3_3
    BH23 VCCAPLLDMI2
    (0.1uFx1)

    1
    T24 C2424

    2
    VCCSUS3_3 SCD1U10V2KX-5GP
    1D05V_VTT (10uFx1) AL29 VCCIO
    V23 1 2

    USB

    2
    VCCSUS3_3 R2408
    AL24 V24 3D3V_S5 10R2J-2-GP (0.1uFx1)
    DCPSUS VCCSUS3_3

    1
    C2426
    P24 SCD1U10V2KX-5GP
    VCCSUS3_3
    (0.1uFx1)

    2
    1
    AA19 C2425
    VCCASW SCD1U10V2KX-5GP
    VCCIO T26 1D05V_VTT
    AA21

    2
    VCCASW 3D3V_S0
    +5VA_PCH_VCC5REFSUS
    0.001A D2402
    AA24 VCCASW V5REF_SUS M26
    CH751H-40PT-GP

    2
    5V_S0

    Clock and Miscellaneous


    AA26 VCCASW 83.R0304.A8F
    1D05V_VTT DCPSUS AN23 2nd = 83.R2004.B8F
    AA27 VCCASW DY
    1.01A (Total current of VCCASW) VCCSUS3_3 AN24 3D3V_S5
    AA29

    1
    VCCASW
    AA31 VCCASW
    2

    1
    C2403 C2404 C2406 C2407 C2408 0.001A
    Change to 0603 package +5VS_PCH_VCC5REF (1uFx1)
    DY AC26 VCCASW V5REF P34 1
    R2407
    2
    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP
    1

    2
    SC1U6D3V2KX-GP

    SC1U6D3V2KX-GP

    SC1U6D3V2KX-GP
    C AC27 10R2J-2-GP C
    VCCASW

    1
    N20 3D3V_S5 C2427
    VCCSUS3_3

    PCI/GPIO/LPC
    AC29 (1uFx1) SC1U10V2KX-1GP
    VCCASW
    N22

    2
    VCCSUS3_3
    AC31 VCCASW

    1
    P20 C2428
    VCCSUS3_3 SC1U6D3V2KX-GP
    AD29 VCCASW
    P22

    2
    VCCSUS3_3
    (1uFx1) AD31 VCCASW
    1D05V_VTT (220uFx1) (22uFx2_0603)
    L2402 (1uFx3) W21 AA16 3D3V_S0
    IND-10UH-218-GP VCCASW VCC3_3
    1 2 +1.05VS_VCCA_A_DPL W23 W16 (0.1uFx2)
    VCCASW VCC3_3
    68.10050.10Y
    1

    1
    2nd = 68.10090.10B C2409 W24 T34 C2430 C2431
    SC1U6D3V2KX-GP VCCASW VCC3_3 SCD1U10V2KX-5GP SCD1U10V2KX-5GP
    W26
    2

    2
    VCCASW
    W29 3D3V_S0
    L2403 VCCASW
    (1uFx1)
    IND-10UH-218-GP (220uFx1) W31 AJ2 (0.1uFx1)
    +1.05VS_VCCA_B_DPL VCCASW VCC3_3
    1 2

    1
    68.10050.10Y W33 C2429
    VCCASW
    1

    2nd = 68.10090.10B C2410 0.16A (Totally current of VCCVRM AF13 SCD1U10V2KX-5GP


    SC1U6D3V2KX-GP VCCIO

    2
    +VCCRTCEXT N16
    2

    DCPRTC 1D05V_VTT
    VCCIO AH13
    1

    C2411
    SCD1U10V2KX-5GP (0.1uFx1) 1D5V_S0 Y49 AH14 (1uFx1)
    B VCCVRM VCCIO B
    2

    1
    C2432
    AF14 SC1U6D3V2KX-GP
    +1.05VS_VCCA_A_DPL VCCIO
    BD47

    SATA

    2
    VCCADPLLA
    VCCAPLLSATA AK1
    +1.05VS_VCCA_B_DPL BF47 VCCADPLLB
    C2412 AF11 1D5V_S0
    SC1U6D3V2KX-GP VCCVRM
    1D05V_VTT AF17 VCCIO
    1D05V_VTT 1 2 (1uFx1) AF33 VCCDIFFCLKN
    AF34 VCCDIFFCLKN VCCIO AC16
    (1uFx1) 0.055A AG34 VCCDIFFCLKN
    AC17 1D05V_VTT
    VCCIO
    1

    C2414 C2413 0.095A


    1D5V_S0 SC1U6D3V2KX-GP SC1U6D3V2KX-GP JE40 modify AG33 AD17 (1uFx1)
    1D05V_VTT VCCSSC VCCIO
    1 2 (1uFx1)
    2

    1
    C2435 +3VS_+1.5VS_HDA_IO
    2 1 +VCCSST V16 SC1U6D3V2KX-GP
    DCPSST 1D05V_VTT
    (0.1uFx1)

    2
    C2415 1 2 3D3V_S5
    SCD1U10V2KX-5GP T17 T21 R2409 0R3J-0-U-GP
    DCPSUS VCCASW
    1

    (1uFx1) V19 DCPSUS


    MISC

    C2421 C2422 1 DY 2 1D5V_S0


    1D05V_VTT V21 R2415 0R3J-0-U-GP
    SCD1U16V2KX-3GP

    SCD1U16V2KX-3GP
    2

    VCCASW
    0.001A
    CPU

    BJ8 V_PROC_IO
    (0.1uFx2) VCCASW T19
    1

    (4.7uFx1_0603) C2417 C2418 C2419


    +3VS_+1.5VS_HDA_IO
    SC4D7U6D3V3KX-GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    A DY <Variant Name> A
    0.01A
    2

    RTC

    A22 P32
    HDA

    RTC_AUX_S5 VCCRTC VCCSUSHDA


    (0.1uFx1)
    Wistron Corporation
    1
    6uA C2433
    COUGAR-GP-U2-NF SCD1U10V2KX-5GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.
    2

    (0.1uFx2)
    1

    (1uFx1) Title
    DY C2420
    SC1U6D3V2KX-GP AFR suggest DY Cayp to prevent leakage current PCH (POWER2)
    2

    Size Document Number Rev


    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 24 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = PCH PCH1I 9 OF 10

    AY4 VSS Cougar VSS H46


    AY42 VSS VSS K18
    AY46 VSS Point VSS K26
    AY8 VSS VSS K39
    B11 VSS VSS K46
    B15 VSS VSS K7
    B19 VSS VSS L18
    B23 VSS VSS L2
    B27 VSS VSS L20
    D B31 VSS VSS L26 D
    PCH1H 8 OF 10 B35 L28
    VSS VSS
    H5 VSS B39 VSS VSS L36
    Cougar B7 VSS VSS L48
    AA17 VSS VSS AK38 F45 VSS VSS M12
    AA2 VSS Point VSS AK4 BB12 VSS VSS P16
    AA3 VSS VSS AK42 BB16 VSS VSS M18
    AA33 VSS VSS AK46 BB20 VSS VSS M22
    AA34 VSS VSS AK8 BB22 VSS VSS M24
    AB11 VSS VSS AL16 BB24 VSS VSS M30
    AB14 VSS VSS AL17 BB28 VSS VSS M32
    AB39 VSS VSS AL19 BB30 VSS VSS M34
    AB4 VSS VSS AL2 BB38 VSS VSS M38
    AB43 VSS VSS AL21 BB4 VSS VSS M4
    AB5 VSS VSS AL23 BB46 VSS VSS M42
    AB7 VSS VSS AL26 BC14 VSS VSS M46
    AC19 VSS VSS AL27 BC18 VSS VSS M8
    AC2 VSS VSS AL31 BC2 VSS VSS N18
    AC21 VSS VSS AL33 BC22 VSS VSS P30
    AC24 VSS VSS AL34 BC26 VSS VSS N47
    AC33 VSS VSS AL48 BC32 VSS VSS P11
    AC34 VSS VSS AM11 BC34 VSS VSS P18
    AC48 VSS VSS AM14 BC36 VSS VSS T33
    AD10 VSS VSS AM36 BC40 VSS VSS P40
    AD11 VSS VSS AM39 BC42 VSS VSS P43
    AD12 VSS VSS AM43 BC48 VSS VSS P47
    AD13 VSS VSS AM45 BD46 VSS VSS P7
    AD19 VSS VSS AM46 BD5 VSS VSS R2
    AD24 VSS VSS AM7 BE22 VSS VSS R48
    C AD26 AN2 BE26 T12 C
    VSS VSS VSS VSS
    AD27 VSS VSS AN29 BE40 VSS VSS T31
    AD33 VSS VSS AN3 BF10 VSS VSS T37
    AD34 VSS VSS AN31 BF12 VSS VSS T4
    AD36 VSS VSS AP12 BF16 VSS VSS W34
    AD37 VSS VSS AP19 BF20 VSS VSS T46
    AD38 VSS VSS AP28 BF22 VSS VSS T47
    AD39 VSS VSS AP30 BF24 VSS VSS T8
    AD4 VSS VSS AP32 BF26 VSS VSS V11
    AD40 VSS VSS AP38 BF28 VSS VSS V17
    AD42 VSS VSS AP4 BD3 VSS VSS V26
    AD43 VSS VSS AP42 BF30 VSS VSS V27
    AD45 VSS VSS AP46 BF38 VSS VSS V29
    AD46 VSS VSS AP8 BF40 VSS VSS V31
    AD8 VSS VSS AR2 BF8 VSS VSS V36
    AE2 VSS VSS AR48 BG17 VSS VSS V39
    AE3 VSS VSS AT11 BG21 VSS VSS V43
    AF10 VSS VSS AT13 BG33 VSS VSS V7
    AF12 VSS VSS AT18 BG44 VSS VSS W17
    AD14 VSS VSS AT22 BG8 VSS VSS W19
    AD16 VSS VSS AT26 BH11 VSS VSS W2
    AF16 VSS VSS AT28 BH15 VSS VSS W27
    AF19 VSS VSS AT30 BH17 VSS VSS W48
    AF24 VSS VSS AT32 BH19 VSS VSS Y12
    AF26 VSS VSS AT34 H10 VSS VSS Y38
    AF27 VSS VSS AT39 BH27 VSS VSS Y4
    AF29 VSS VSS AT42 BH31 VSS VSS Y42
    AF31 VSS VSS AT46 BH33 VSS VSS Y46
    AF38 VSS VSS AT7 BH35 VSS VSS Y8
    B B
    AF4 VSS VSS AU24 BH39 VSS VSS BG29
    AF42 VSS VSS AU30 BH43 VSS VSS N24
    AF46 VSS VSS AV16 BH7 VSS VSS AJ3
    AF5 VSS VSS AV20 D3 VSS VSS AD47
    AF7 VSS VSS AV24 D12 VSS VSS B43
    AF8 VSS VSS AV30 D16 VSS VSS BE10
    AG19 VSS VSS AV38 D18 VSS VSS BG41
    AG2 VSS VSS AV4 D22 VSS VSS G14
    AG31 VSS VSS AV43 D24 VSS VSS H16
    AG48 VSS VSS AV8 D26 VSS VSS T36
    AH11 VSS VSS AW14 D30 VSS VSS BG22
    AH3 VSS VSS AW18 D32 VSS VSS BG24
    AH36 VSS VSS AW2 D34 VSS VSS C22
    AH39 VSS VSS AW22 D38 VSS VSS AP13
    AH40 VSS VSS AW26 D42 VSS VSS M14
    AH42 VSS VSS AW28 D8 VSS VSS AP3
    AH46 VSS VSS AW32 E18 VSS VSS AP1
    AH7 VSS VSS AW34 E26 VSS VSS BE16
    AJ19 VSS VSS AW36 G18 VSS VSS BC16
    AJ21 VSS VSS AW40 G20 VSS VSS BG28
    AJ24 VSS VSS AW48 G26 VSS VSS BJ28
    AJ33 VSS VSS AV11 G28 VSS
    AJ34 VSS VSS AY12 G36 VSS
    AK12 VSS VSS AY22 G48 VSS
    AK3 VSS VSS AY28 H12 VSS
    H18 VSS
    COUGAR-GP-U2-NF H22 VSS
    H24 VSS
    A H26 VSS <Variant Name> A
    H30 VSS
    H32 VSS
    H34
    F3
    VSS
    VSS
    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    COUGAR-GP-U2-NF Title

    PCH (VSS)
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 25 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    Blanking C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Clock(colay)
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 26 of 102
    5 4 3 2 1
    3D3V_AUX_KBC
    5 SSID = KBC 4 3 PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR
    2
    VOLTAGE
    1
    3D3V_AUX_KBC SA 100.0K 10.0K 3.0V
    SB 100.0K 20.0K 2.75V

    1
    3D3V_S0 R2724 SC 100.0K 33.0K 2.48V
    76K8R2F-GP
    PCB VERSION -1 100.0K 47.0K 2.24V

    2
    -1M 100.0K 64.9K 2.0V

    1
    C2702 PCB_VER_AD
    SCD1U10V2KX-5GP -2 100.0K 76.8 1.87V

    1
    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    2
    C2704

    C2706

    C2707

    C2710
    R2726 -3 100.0K 100K 1.65V
    1

    1
    100KR2F-L1-GP
    C2701 -3M 100.0K 143.0K 1.358V
    SC2D2U10V3KX-1GP
    2

    2
    C2711 -1M For PCH B3 100.0K 174.0K 1.204V

    115

    102
    D SC220P50V2KX-3GP
    D

    19
    46
    76
    88

    4
    1 OF 2 1 2
    DY

    VCC
    VCC
    VCC
    VCC
    VCC

    AVCC

    VDD
    82 AD_IA
    104 7 PLT_RST#_EC 1 R2735 2 PLT_RST# 5,18,36,71,82,97
    C2714 VREF LRESET#
    1DY 2 SCD1U10V2KX-5GP 2 0R0402-PAD CLK_PCI_KBC 18
    LCLK
    97 3 LPC_FRAME# 21,71
    PCB_VER_AD GPIO90/AD0 LFRAME# LPC_AD3 U2701B
    98 1
    ADT_TYPE GPIO91/AD1 LAD3 LPC_AD2 NPCE795PA0DX-GP-U
    99 128 LPC_AD[0..3] 21,71
    GPIO92/AD2 LAD2 LPC_AD1
    28 T8_THERM 100 127
    GPIO93/AD3 LAD1 LPC_AD0 2 OF 2
    126 KCOL[0..15] 69
    LAD0
    82 HW_RF_Kill 101 125 INT_SERIRQ 21
    GPIO94/DA0 SERIRQ KCOL0
    105 8 PM_CLKRUN# 19 28 FAN_TACH1 31 53
    GPIO95/DA1 GPIO11/CLKRUN# GPIO56/TA1 KBSOUT0/JENK# KCOL1
    106 9 PANEL_BLEN 17 19,97 PM_PWRBTN# 117 52
    GPIO96/DA2 GPIO65/SMI# ECSCI#_KBC GPIO20/TA2 KBSOUT1/TCK KCOL2
    29 63 51
    ECSCI#/GPIO54 GPIO14/TB1 KBSOUT2/TMS KCOL3
    124 PCH_TEMP_ALERT# 21,22 19,29,36,37,47 PM_SLP_S3# 64 50
    GPIO10/LPCPD# ECSWI#_KBC GPIO01/TB2 KBSOUT3/TDI KCOL4
    19 SUS_PWR_ACK 79 123 49
    GPIO2 GPIO67/PWUREQ# KBSOUT4/JEN0# KCOL5
    95 121 H_A20GATE 22 82 CHARGE_LED 32 48
    GPIO3/AD6 GPIO85/GA20 GPIO15/A_PWM KBSOUT5/TDO KCOL6
    96 122 H_RCIN# 22 29 KBC_BEEP 118 47
    GPIO4/AD5 KBRST#/GPIO86 GPIO21/B_PWM KBSOUT6/RDY# KCOL7
    28 SYS_THRM 108 49 BRIGHTNESS 62 43
    EC_GPIO6 GPIO5/AD4 GPIO13/C_PWM KBSOUT7 KCOL8
    93 82 STOP_CHG# 65 42
    PSL_IN2#_GPIO6 GPIO32/D_PWM KBSOUT8 KCOL9
    37,42,48 ALL_POWER_OK 94 27 BLON_OUT 49 28 FAN1_PWM 81 41
    GPIO7/AD7 GPIO52/PSDAT3/RDY# GPIO66/G_PWM KBSOUT9/SDP_VIS# KCOL10
    82 DC_BATFULL 114 25 66 40
    GPIO16 GPIO50/PSCLK3/TDO STDBY_LED GPIO33/H_PWM KBSOUT10/P80_CLK KCOL11
    82 AD_OFF 6 11 82 STDBY_LED 22 39
    GPIO24 GPIO27/PSDAT2 GPIO45/E_PWM KBSOUT11/P80_DAT KCOL12
    65 GPI_SENSE 109 10 82 PWRLED 16 38
    GPIO30 GPIO26/PSCLK2 GPIO40/F_PWM KBSOUT12/GPIO64 KCOL13
    36,97 S5_ENABLE 14 71 TPDATA 69 37
    GPIO34/CIRRXL GPIO35/PSDAT1 KBSOUT13/GPIO63 KCOL14
    15
    GPIO36 GPIO37/PSCLK1
    72 TPCLK 69<------ TP
    KBSOUT14/GPIO62
    36
    82 BAT_IN# 80 ECRST# 85 35 KCOL15
    GPIO41 VCC_POR# KBSOUT15/GPIO61/XOR_OUT
    70 LID_CLOSE# 17 34
    GPIO42/TCK GPIO60/KBSOUT16
    19 RSMRST#_KBC 20 70 BAT_SCL 82
    <------ BATTERY / CHARGER 33
    GPIO43/TMS GPIO17/SCL1 GPIO57/KBSOUT17
    19,46 PM_SLP_S4# 21 69 BAT_SDA 82 82 E51_RxD 113 KROW[0..7] 69
    GPIO44/TDI GPIO22/SDA1 GPIO87/CIRRXM/SIN_CR KROW0
    Check KBC 21 ME_UNLOCK 23 67 SML1_CLK 20
    <------PCH / EDP 82 E51_TxD 111 54
    GPIO46/CIRRXM/TRST# GPIO73/SCL2 GPIO83/SOUT_CR/TRIST# KBSIN0 KROW1
    49 DBC_EN 26 68 SML1_DATA 20 55
    AC_IN# GPIO51 GPIO74/SDA2 AMP_MUTE# KBSIN1 KROW2
    82 AC_IN# 73 119 29 AMP_MUTE# 30 56
    PSL_IN1_GPIO70 GPIO23/SCL3 GPIO55/CLKOUT/IOX_DIN_DIO KBSIN2 KROW3
    74 120 19 PCH_SUSCLK_KBC 77 57
    EC_GPIO72 PSL_OUT_GPIO71 GPIO31/SDA3 PROCHOT_EC GPIO00/EXTCLK KBSIN3 KROW4
    75 24 58
    VBKUP GPIO47/SCL4 KBSIN4 KROW5
    82 WIFI_RF_EN 82 28 59
    GPIO75 GPIO53/SDA4 CHG_ON# 82 R2721 1 PECI KBSIN5 KROW6
    82 BLUETOOTH_EN 83 5,22 H_PECI 2 43R2J-GP 13 60
    GPO76/SHBM R2720 1 EC_VTT PECI KBSIN6 KROW7
    19,42 S0_PWR_GOOD 84 1D05V_VTT 2 12 61
    GPIO77 0R0402-PAD VTT KBSIN7
    91

    1
    GPIO81 C2716
    110
    C 61 USB_PWR_EN# GPO82/IOX_LDSH/TEST#
    C

    SCD1U16V2KX-3GP
    112 90 EC_SPI_CS#_C 2 R2736 1 33R2J-2-GP C2716 need very close to EC
    19 AC_PRESENT GPIO84/IOX_SCLK/XORTR# F_CS0# SPI_CS0#_R 21,60
    DISCRETE# 107 92 EC_SPI_CLK_C 2 R2719 1 33R2J-2-GP SPI_CLK_R 21,60

    2
    0604 Modify: GPIO97 F_SCK EC_SPI_DI_C
    86 2 R2737 1 0R2J-2-GP SPI_SO_R 21,60
    F_SDI/F_SDIO1 EC_SPI_DO_C
    RN2704 pull-Low 10K Resistor to DY 87 2 R2722 1 33R2J-2-GP SPI_SI_R 21,60
    KBC_VCORF F_SDIO/F_SDIO0
    on BLUETOOTH_EN. 44
    VCORF AGND
    GND
    GND
    GND
    GND
    GND
    GND
    1

    C2712
    18
    45
    78
    89
    116
    5

    103

    SC1U10V3ZY-6GP
    U2701A NOTE:
    2

    NPCE795PA0DX-GP-U Locate resistors R2719 and R2722 close


    to the NPCE791L.

    NOTE:
    3D3V_S0
    Connect GND and AGND planes via either
    0R resistor or one point layout connection.
    EC GPIO standard PH/PL
    3D3V_AUX_KBC PSL SOLUTION
    RN2701
    SRN4K7J-8-GP (Power Switch Control Logic)
    1 R2776 2 2 3 BAT_SCL
    FAN_TACH1 28
    10KR2J-3-GP 1 4 BAT_SDA
    3D3V_AUX_S5
    3D3V_AUX_KBC 3D3V_AUX_S5

    ECRST# U2702 R2775


    G690L293T73UF-GP 2 1 BAT_IN# 1 R2772 2
    SB LID_CLOSE# can not pull high, because push pull RN2709 74.00690.I7B 390KR2F-GP 0R0402-PAD
    1

    SRN10KJ-5-GP C2715 3D3V_AUX_S5


    suggest RN2708 Pin5 change FAN_TACH1
    E

    2 3 RN2705
    DY
    SC1U6D3V2KX-GP

    28,36 PURE_HW_SHUTDOWN# 1 4 PURE_HW_SHUTDOWN#_R B 1 DY SRN10KJ-5-GP


    2

    GND S5_ENABLE
    3 2 3
    PURE_HW_SHUTDOWN# VCC ECRST#
    2 1 4
    C

    RESET#
    Q2701 NO PSL SOLUTION
    MMBT3906-4-GP
    R2769
    B 84.T3906.A11
    2nd = 84.03906.F11 Prevent BIOS data loss 2 1 AC_IN#
    RTC_AUX_S5 1 R2756 2
    0R0402-PAD
    EC_GPIO72
    B
    100KR2J-1-GP

    3D3V_AUX_KBC RSMRST#_KBC
    3D3V_AUX_S5 1 DY 2

    R2760
    RN2707 EC_SPI_DI_C 0R2J-2-GP
    SRN100KJ-6-GP
    1

    1 4 CHG_ON# 1 DY 2 BLUETOOTH_EN
    2 3 STOP_CHG# R2773 R2777 1 R2758 2 ECSWI#_KBC
    20 EC_SWI#
    100KR2J-1-GP 100KR2J-1-GP 0R0402-PAD R2774
    10KR2J-3-GP
    R2770
    2

    1KR2J-1-GP 22 EC_SCI# 1 R2759 2 ECSCI#_KBC 0604 Modify:


    1 2 AD_OFF 0R0402-PAD RN2704 pull-Low 10K Resistor to DY
    on BLUETOOTH_EN.

    3D3V_AUX_S5

    2
    R2704
    330KR2J-L1-GP
    Delete DIS_UMA

    1
    29,82 KBC_PWRBTN# 2 1KBC_PWRBTN#R 2 1 EC_GPIO6
    0R0603-PAD R2780

    1
    3D3V_AUX_KBC R2757 C2717

    SC220P50V2KX-3GP
    G2701 470R2J-2-GP
    DY
    EC_GPIO47 High Active GAP-OPEN

    2
    1

    1
    10KR2J-3-GP

    2
    R2733 65W R2707 R2710

    100KR2F-L1-GP
    PROCHOT_EC G 0R0402-PAD

    D H_PROCHOT#_EC 1 2 H_PROCHOT# 5,42

    2
    1

    ADT_TYPE A/D(PIN99) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE ADT_TYPE


    R2732 S
    100KR2J-1-GP

    A Q2702
    65W N/A 100.0K 3.3V DISCRETE#
    A

    1
    2N7002K-2-GP 90W 100.0K N/A 0V
    2

    84.2N702.J31 R2708

    100KR2F-L1-GP
    2ND = 84.2N702.031 30W 10.0K 100.0K 0.3V 40W
    40W 20.0K 100.0K 0.55V HR PX
    65W_90W#

    2
    120W 33.0K 100.0K 0.82V High: 65W / Low 40W
    DISCRETE# Wistron Corporation
    Reserved 47.0K 100.0K 1.06V 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

    Reserved 64.9K 100.0K 1.3V High: UMA / Low: Discrete Taipei Hsien 221, Taiwan, R.O.C.

    Title

    KBC Nuvoton NPCE795


    Size Document Number Rev
    A2
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 27 of 102

    5 4 3 2 1
    5 4 3 2 1

    SSID = Thermal Thermal sensor P2800


    3D3V_S0
    3D3V_S0

    5V_S0
    *Layout* 15 mil

    1
    C2802

    1
    SCD1U10V2KX-5GP
    R2827

    1
    D DY 0R2J-2-GP C2809 C2808 D

    SC4D7U6D3V3KX-GP

    SCD1U10V2KX-5GP
    D2802
    CH551H-30PT-GP

    2
    83.R5003.C8F
    ADJ 2ND = 83.R5003.H8H

    1
    3rd = 83.5R003.08F
    -SA thermal

    1
    setting H/W shutdown 90-degree

    1
    R2804 C2805

    SCD1U10V2KX-5GP
    0R2J-2-GP DY

    2
    2
    Layout notice : DY
    Both DXN and DXP routing 10 mil 27 FAN_TACH1 1 2 FAN_TACH1_C
    FAN1
    trace width and 10 mil spacing.
    6
    D2801 27 FAN1_PW M 1 2 FAN1_PW M_R 4
    P2800_DXP 3D3V_S0 CH551H-30PT-GP R2806 3
    P2800EB0-GP 83.R5003.C8F 0R0402-PAD FAN_TACH1_C 2
    1

    2ND = 84.03904.P11 C2807 2ND = 83.R5003.H8H


    3

    84.03904.L06 C2806
    SC2200P50V2KX-2GP

    DY R2808Q2801 5 VCC TDR 4 SYS_THRM 27 3rd = 83.5R003.08F 5V_S0 1


    NTC-100K-8-GP

    1 SC470P50V3JN-2GP 6 3 T8_THERM 27 5
    2

    PMBS3904-1-GP DXP TDL


    7 DXN GND 2
    THERM_SYS_SHDN# 8 1 ADJ ACES-CON4-5-GP
    2

    P2800_DXN OTZ ADJ

    2.System Sensor, Put on palm rest U2801


    C
    2nd = 20.F1261.004 C
    74.02800.B71
    1.H/W T8 Shutdown For PWM FAN
    20.F0866.004
    [Rev B]

    3D3V_S0

    1
    R2809
    100KR2J-1-GP

    2
    B THERM_SYS_SHDN# B
    S

    27,36 PURE_HW _SHUTDOW N# D R2810


    0R2J-2-GP

    1
    G 1 DY 2 3D3V_S0

    1
    R2812 C2811

    10KR2J-3-GP
    DY DY Q2802 IMVP_PW RGD 36,42

    SCD1U10V2KX-5GP
    2N7002K-2-GP

    2
    84.2N702.J31

    2
    2ND = 84.2N702.031

    A HR PX A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Thermal P2800/Fan Controllor P2793


    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 28 of 102
    5 4 3 2 1
    5 4 3 2 1

    3D3V_S0 5V_S0

    5VA_S0 R2922 EMI ASK to change to 0R 0812


    2D2R3J-2-GP
    DY

    1
    -SA 1 2
    C2903 C2904 C2906 C2907 EC2905 EC2908 EC2917 EC2918 EC2923
    U2902

    SC10U6D3V3MX-GP

    SCD1U10V2KX-5GP

    SC10U6D3V3MX-GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP
    G2901

    2
    19,27,36,37,47 PM_SLP_S3# 1 EN NC#5 5 1 2
    2 GND
    5V_S5 3 4 GAP-CLOSE
    VIN VOUT
    G2903

    1
    C2928

    SC1U10V2KX-1GP
    D D

    SC10U10V5KX-2GP
    C2927
    1 G9090-475T12U-GP 1 2

    2
    GAP-CLOSE AUD_AGND 1st = 63.R0034.1DL
    74.09090.F3F 1st = 63.R0034.1DL
    2

    CLOSE TO PIN1 and 9 CLOSE TO PIN39 and 46


    AUD_AGND 1st = 63.R0034.1DL 1st = 63.R0034.1DL

    AUD_AGND
    1st = 63.R0034.1DL
    RN2901
    if use LDO,have to PVDD have been SRN47K-2-GP-U
    ramp up after AVDD,if not,might occur issue R2904
    AUDIO_PC_BEEP 2 1 AUDIO_BEEP 4 1 KBC_BEEP_1 1 0R0402-PAD
    2 KBC_BEEP 27
    PM_SLP_S3# driver strength is 3 2 SPKR_SB_1 1 2 HDA_SPKR 21
    R2925 3D3V_S0 C2921 R2905
    insufficient,if no stuff,waveform will

    1
    0R2J-2-GP SC1U6D3V2KX-GP 0R0402-PAD
    abnormally when S3 mode C2922 R2906
    1 2

    SC100P50V2JN-3GP
    21 HDA_SDIN0 1 R2915 2 4K7R2J-2-GP

    2
    22R2J-2-GP R2902 1D5V_S0
    0R2J-2-GP

    2
    21 HDA_CODEC_BITCLK 1 R2914 2 1 2 COMBO_MIC_JD#
    0R2J-2-GP DY
    21 HDA_CODEC_SDOUT

    D
    HDA_CODEC_SYNC 21
    Q2901
    EAPD 1 R2924 2 PD# HDA_CODEC_RST# 21 BSS138-8-GP

    ACZ_BITCLK_AUDIO_+
    84.00138.H31

    1
    C C2909 ESD protection: 2KV C
    180R2F-1-GP

    SC22P50V2JN-4GP
    R2926 DY
    0R2J-2-GP Max Vgs(th) 1.8V

    S
    10R2J-2-GP 2 DMIC_CLK_R

    AC97_DATIN
    AUD_3VD_R
    58 DMIC_CLK DMIC_DATA_R COMBO_MIC 1 R2919 2 COMBO_MIC_Q

    AUDIO_PC_BEEP
    58 DMIC_DATA 1 2 MIC2V Ref voltage is 2.5V
    R2930 22K1R2F-L-GP
    becasue Vgs(th)concern

    TVL-0402-01-AB1-GP
    cann't use 2N702 for desing

    2
    3D3V_S0
    C2915 AUD_AGND
    C2926

    SC10U6D3V5KX-1GP
    1

    83.00402.0A0
    2
    10
    11
    12
    1
    2
    3
    4
    5
    6
    7
    8
    9
    R2907 1 2 39K2R2F-L-GP AUD_HP1_JD# 58
    DIGITAL
    PD#

    RESET#
    DVDD-IO
    DVDD

    SDATA-IN

    SYNC
    GPIO0/DMIC-DATA
    GPIO1/DMIC-CLK

    BCLK
    DVSS

    PCBEEP
    SDATA-OUT

    AUD_AGND
    (include thermal pad) Spilt by DGND AUD_AGND
    49 GND Delete R/C Sa
    48 13 ALC268_SENSE_A MIC2V
    EAPD SPDIFO SENSE_A
    47 EAPD
    100mA
    LINE2-L/PORT-E-L 14

    2
    5V_S0 46 PVDD2 LINE2-R/PORT-E-R 15
    82 AUD_SPK_R+ 45 16 MIC2-L_PORT-B C2920 1 2 SC2D2U10V3KX-1GP R2917
    SPK-OUT-R+ MIC2-L/PORT-F-L MIC2-R_PORT-B C2919 1
    82 AUD_SPK_R- 44 SPK-OUT-R- MIC2-R/PORT-F-R 17 2 SC2D2U10V3KX-1GP 2K2R2J-2-GP
    43 1.3A 18 ALC268_SENSE_B 1 R2920 2 COMBO_MIC_JD#
    PVSS2 SENSE_B R2929
    42 100mA 19 20KR2F-L-GP CLOSE TO PIN18

    1
    PVSS1 JDREF COMBO_MIC_R
    82 AUD_SPK_L- 41 SPK-OUT-L- MONO-OUT 20 1 2 COMBO_MIC 58
    82 AUD_SPK_L+ 40 SPK-OUT-L+ MIC1-L/PORT-B-L 21
    HPOUT-R/PORT-I-R
    HPOUT-L/PORT-I-L

    5V_S0 39 PVDD1 MIC1-R/PORT-B-R 22 1KR2F-3-GP

    1
    5VA_S0 38 AVDD2 LINE1-L/PORT-C-L 23
    MIC1-VREFO-R

    B B
    MIC1-VREFO-L

    37 24 JDREF R2927
    AVSS2 LINE1-R/PORT-C-R
    1

    MIC2-VREFO

    C2910 22K1R2F-L-GP
    LDO-CAP

    ANALOG
    SCD1U10V2KX-5GP

    AUD_AGND CLOSE TO PIN19


    CPVEE

    AVDD1
    AVSS1
    2

    2
    1
    VREF
    CBN
    CBP

    R2909
    20KR2F-L-GP D2901
    U2901 BAW 56-5-GP AUD_AGND
    36
    35
    34
    33
    32
    31
    30
    29
    28
    27
    26
    25

    AUD_AGND 5VA_S0
    ALC271X-VB3-GR-GP 83.00056.Q11
    2

    CLOSE TO PIN38 2nd = 83.00056.K11


    MIC2V
    LDO_CAP_AUDIO
    VREF

    2
    71.00271.A03 PM_SLP_S3# 19,27,36,37,47
    AUD_CBN
    AUD_CBP

    CPVEE
    HP_OUT_R_AUD
    HP_OUT_L_AUD

    AUD_AGND
    1

    C2913 3
    SCD1U10V2KX-5GP

    CLOSE TO PIN35 1 AMP_MUTE#_R 1 R2928 2 0R2J-2-GP


    AMP_MUTE# 27
    2

    PD#
    2

    C2911 AUD_AGND D2902


    SC2D2U10V3KX-1GP C2916 1 2 AUD_AGND BAS16-6-GP
    SCD1U10V2KX-5GP 83.00016.K11
    1

    2ND = 83.00016.F11
    C2914 1
    CLOSE TO PIN34 1 2 SC10U6D3V3MX-GP AUD_AGND
    3 KBC_PW RBTN# 27,82
    2 1 C2912 <Variant Name>
    AUD_AGND
    SC2D2U10V3KX-1GP 2
    A A

    SRN47J-7-GP MIC2V
    58 AUD_HP1_JACK_R2 2 3 Wistron Corporation
    1 4 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    58 AUD_HP1_JACK_L2 Taipei Hsien 221, Taiwan, R.O.C.

    RN2904 Title

    Audio Codec
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 29 of 102
    5 4 3 2 1
    5 4 3 2 1

    AUDIO OP AMPLIFIER
    D D

    C C

    Blanking
    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Audio AMP
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 30 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    Blanking
    C C

    B B

    <Variant Name>
    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    AR8158
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 31 of 102

    5 4 3 2 1
    5 4 3 2 1

    D D

    C
    Card reader move to small board C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    RTS5159 (CARD READER)


    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 32 of 102
    5 4 3 2 1
    A B C D E

    4 4

    3
    (Blanking) 3

    2 2

    <Variant Name>

    1
    Wistron Corporation 1
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 33 of 102
    A B C D E
    5 4 3 2 1

    D D

    (Blanking)
    C C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 34 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    Blanking C

    B B

    A HR PX A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    USB 3.0 Controller


    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 35 of 102
    5 4 3 2 1
    5 4 3 2 1

    Power Sequence 5V_S0

    1
    EC3608 EC3609 EC3610 EC3611

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP
    2

    2
    5V_S5
    D D
    28,42 IMVP_PW RGD 1 R3614 2 SYS_PW ROK 19
    0R0402-PAD

    1
    C3612 EC3601 EC3602 EC3603 EC3604 EC3605 EC3606 EC3607
    R3614
    1 DY

    SCD01U50V2KX-1GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP
    CRB : 1K

    2
    19,27,29,37,47 PM_SLP_S3# 3

    2
    D3603
    BAS16-6-GP
    83.00016.K11
    2ND = 83.00016.F11

    Modify the MOS package for placement


    ANNIE Run Power 3D3V_S5
    5V_S0 5V_S5
    U3604
    C3607 1 S D 8
    SCD1U25V3KX-GP 2 S D 7
    C 1 DY2 3 S D 6 1 R3608 2 PS_S3CNTRL 37
    C
    RUN_ENABLE D 5 100KR2J-1-GP
    U3610 G
    G5938TL1U-GP FDMC7696-GP

    D
    4
    5V_S5 RUN_ENABLE
    74.05938.09P
    Q3606
    2N7002K-2-GP

    1
    6 1 C3606
    19,27,29,37,47 PM_SLP_S3# EN VCC 84.2N702.J31
    3D3V_S0 5 DC2 GND 2 DY 3D3V_S0

    SCD22U25V3KX-GP
    5V_S0 4 3 3D3V_S5 2ND = 84.2N702.031

    2
    DC1 HV
    U3607
    1 S D 8

    S
    2 S D 7
    3 S D 6
    D 5
    G 19,27,29,37,47 PM_SLP_S3#
    FDMC7696-GP

    4
    1D5V_S0 1D5V_S3
    U3605
    1 S D 8
    2 S D 7
    3 S D 6
    4 G D 5

    SIR460DP-T1-GE3-GP CPU 1D5V_S0 max power budget 10A


    B following JE40_HR selection B
    Low Rds(on)

    84.00460.037

    1D05V_VTT 2 R3622 1 H_THERMTRIP# 5,22

    56R2J-4-GP 2nd = 84.02222.X11


    84.02222.V11
    E

    MMBT2222A-3-GP
    84.02222.S11 is obsoleted
    5,22,97 H_CPUPW RGD 1 R3601 2 H_PW RGD_R B
    1KR2J-1-GP Q3601
    DY
    1

    C3602
    SCD1U10V2KX-5GP

    R3616
    2

    5,18,27,71,82,97 PLT_RST# 2 1
    4K7R2J-2-GP
    1

    R3632
    2K2R2J-2-GP

    A HR PX A
    2

    3 PURE_HW _SHUTDOW N# 27,28


    Wistron Corporation
    1 D3601 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    41 3V_5V_EN
    BAS16-6-GP Taipei Hsien 221, Taiwan, R.O.C.
    83.00016.K11
    200KR2J-L1-GP
    1

    2ND = 83.00016.F11 Title


    R3602

    DY Power Plane Enable


    Size Document Number Rev
    A3
    2 1 S5_ENABLE 27,97
    Hummingbird1_HR -2
    2

    2KR2F-3-GP R3603
    Date: Tuesday, April 17, 2012 Sheet 36 of 102
    5 4 3 2 1
    5 4 3 2 1

    Close to CPU
    D S3 Power Reduction Circuit Processor VREF_DQ Implementation D
    R3707
    0R2J-2-GP
    1 DY 2
    DDR_VREF_S3

    Q3708
    AO3418-GP
    +V_SM_VREF_CNT 9

    2
    D S
    R3705
    100KR2J-1-GP
    84.03418.031

    1
    package => SOT-23
    PM_SLP_S3# 19,27,29,36,47
    AO3468->Rds(on) <155-ohm
    2N702 Rds(on)->3-ohm

    Q3704

    36 PS_S3CNTRL G
    C D 0D75V_EN C

    2N7002K-2-GP
    84.2N702.J31
    2ND = 84.2N702.031

    3D3V_S0
    1.05VTT_PW RGD 45,48
    1

    R3712
    10KR2J-3-GP R3710
    DY 0R2J-2-GP
    Close to DIMM
    S3 Power Reduction Circuit SM_DRAMPWROK
    2

    0D75V_EN_R 2 R3711 1 0D75V_EN 46


    0R0402-PAD 0D75V_S0

    19,27,29,36,47 PM_SLP_S3# 2 DY 1

    1
    1

    R3716 C3705 R3703


    0R2J-2-GP 22R2J-2-GP
    DY SCD1U10V2KX-5GP
    2

    B B

    2
    Close to CPU

    PS_S3CNTRL_Q
    Close to CPU S3 Power Reduction Circuit SM_DRAMPWROK
    S3 Power Reduction Circuit SM_DRAMPWROK 1D5V_S3
    S3 Power Reduction Circuit
    3D3V_S5 1D5V_S3 SM_DRAMRST#

    1
    3D3V_S5 1D5V_S0 R3706
    1

    R3709 1KR2J-1-GP
    R3713 R3721 0R2J-2-GP Desing guide updated
    1

    200R2F-L-GP DY 200R2F-L-GP Rev 0.9 from 『0-ohm』 』 to 『1Kohm』


    』

    D
    2
    R3702 1 2
    200R2F-L-GP
    DY Q3701
    2

    5,19 PM_DRAM_PW RGD 1 IN B VCC 5 2N7002K-2-GP


    2

    27,42,48 ALL_POW ER_OK 1 R3701 2 0D75V_EN_1 2 IN A 84.2N702.J31


    0R2J-2-GP
    5 SM_DRAMRST# S 2ND = 84.2N702.031
    1

    3 4 VDDPW RGOOD_R 1 R3719 2 VDDPW RGOOD 5


    DY C3701 GND OUT Y
    D SM_DRAMRST#_D 1 2 DDR3_DRAMRST# 14

    S
    U3701 130R2F-1-GP R3718
    2

    1
    1 R3704 2 74VHC1G09DFT2G-GP G 1KR2J-1-GP
    SCD1U10V2KX-5GP

    45,48 1.05VTT_PW RGD


    2

    0R2J-2-GP DY C3702
    73.01G09.AAH R3720 SC100P50V2JN-3GP 36 PS_S3CNTRL
    DY Q3703

    2
    0R2J-2-GP 2ND = 84.2N702.031
    OD AND gate required DY 84.2N702.J31
    DRAMRST_CNTRL_PCH 20
    1

    2N7002K-2-GP
    A HR PX A

    For U3701 not OD AND gate C3703


    R3719 to 64.15015.6DL 2 1DRAMRST_CNTRL_PCH Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    R3720 to 64.75005.6DL SCD047U16V2KX-1-GP Taipei Hsien 221, Taiwan, R.O.C.
    R3702 to DY
    Title

    ADAPTER
    SM_DRAMPWROK must have a maximum of 15ns rise or fall time Size Document Number Rev
    A3
    over VDDQ * 0.55± 200mV and the edge must be monotonic Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 37 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    Move to small board

    B B

    HR PX

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    DCIN JACK
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 38 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    Move to small board

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    BATT CONN
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 39 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    Move to small board

    B B

    <Variant Name>
    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    CHARGER BQ24745
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 40 of 102

    5 4 3 2 1
    5 4 3 2 1

    SSID = PWR.Plane.Regulator_3p3v5v 3D3V_AUX_S5

    1
    PR4102
    100KR2J-1-GP

    2
    PWR_3D3V5V_ENTRIP

    PWR_5V_ENTRIP1

    1
    PQ4101 PC4105 DY PR4103
    2N7002K-2-GP SC18P50V2JN-1-GP 71K5R2F-1-GP

    4
    D PQ4102 D
    2N7002KDW-GP
    84.2N702.A3F

    S
    2nd = 84.DM601.03F

    3
    3V_5V_EN
    36 3V_5V_EN

    PWR_3D3V_ENTRIP2

    1
    SC18P50V2JN-1-GP

    1
    PR4107
    91KR2F-GP

    PC4108
    DY

    2
    DCBATOUT

    TPS51125 RT8205B
    DCBATOUT PR4108 DY ASM

    PC4129

    PC4131

    PC4128

    PC4117

    PC4112
    SC1KP50V2KX-1GP
    SC10U25V5KX-GP

    SC10U25V5KX-GP

    SC10U25V5KX-GP

    SCD1U50V3KX-GP
    1

    1
    DCBATOUT PT4104
    PR4108 ST22U25VDM-1-GP
    PWR_5V3D3V_EN0 1 2
    DY

    2
    PC4114 PC4115
    SC1KP50V2KX-1GP

    4
    SC10U25V5KX-GP

    SCD01U50V2KX-1GP
    820KR3J-GP FDMS3604S-GP
    SC10U25V5KX-GP
    SCD1U50V3KX-GP

    G1

    D1

    D1

    D1
    TPS51125 RT8205B
    PC4110

    PC4109

    PC4111

    PU4101 DY DY
    1

    PR4110 0R3J 4R7

    Q1
    2

    2
    TPS51125 RT8205B

    PHASE
    2

    8
    7
    6
    5 PR4109 0R3J 4R7 S1/D2
    9

    Q2 S2
    D
    D
    D
    D
    PU4104

    G2

    S2

    S2
    16
    FDMC8884-GP
    DY PU4103

    5
    Design Current = 15A

    VIN
    2nd = 84.00412.037 PC4113
    Design Current = 5A SCD1U25V3KX-GP SCD1U25V3KX-GP 25.1A<OCP< 29.3A
    S
    S
    S
    G

    PR4110
    84.08884.A37 PR4109 PC4118
    1
    2
    3
    4

    8.8A<OCP<10 A 2 1 PWR_3D3V_VBST2_1
    1 2PWR_3D3V_VBST2 9 22 PWR_5V_VBST11 2 PWR_5V_VBST1_1 1 2
    PL4101 VBST2 VBST1 0R3J-0-U-GP
    3D3V_S5 2D2R3J-2-GP
    PWR_3D3V_DRH2 5V_S5
    10 21 PL4103
    DRVH2 DRVH1
    C 2 1 PWR_3D3V_LL2 11 20 PWR_5V_LL1 1 2 C
    LL2 LL1
    COIL-2D2UH-26-GP PWR_3D3V_DRVL2 12 19 PWR_5V_DRVL1 IND-1UH-191-GP
    PU4107 DRVL2 DRVL1
    PT4103

    PT4101

    PT4102
    PC4119
    SCD1U10V2KX-5GP

    ST220U6D3VDM-20GP

    ST220U6D3VDM-20GP
    8
    7
    6
    5

    FDMC7696-GP TPS51125ARGER-GP
    2nd = 68.1R01E.10H

    1
    GAP-CLOSE-PWR-3-GP
    D
    D
    D
    D

    PWR_3D3V_VO2 7 24 PWR_5V_VO1
    2nd = 68.2R21C.10R
    1

    VO2 VO1
    PC4130

    PG4121 PT4105
    SCD1U10V2KX-5GP

    1
    GAP-CLOSE-PWR-3-GP

    PWR_3D3V_FB2 5 2 PWR_5V_FB1 PG4122 ST100U6D3VAM-3-GP


    68.1R010.20K
    ST220U6D3VBM-2-GP

    2
    VFB2 VFB1
    2

    4
    G

    68.2R210.20W
    2

    2PWR_5V3D3V_EN0 3V_5V_POK
    S
    S
    S

    1
    DY 13 23

    2
    PR4101 820KR2F-GP EN0 PGOOD
    1
    2
    3

    PWR_3D3V_ENTRIP2 6 1 PWR_5V_ENTRIP1
    51125_VREF ENTRIP2 ENTRIP1
    3 15
    VREF GND
    1
    SCD22U10V2KX-1GP

    PC4123

    PWR_5V3V_TONSEL4 25
    TONSEL GND 2nd = 77.C2271.00L 2nd = 77.C2271.00L
    84.07696.037
    2
    1

    PWR_5V3V_SKIPSEL
    14 18 PWR_5V3D3V_VLK

    1
    PR4114 SKIPSEL VCLK
    2nd = 77.22271.33L 2nd = 84.00406.037

    SC1KP50V2KX-1GP
    PC4102
    PR4113 DY 0R2J-2-GP VREG3 77.22271.27L 77.22271.27L

    VREG5
    6K65R2F-GP

    2
    2

    1 2

    1
    51125_FB2_R PR4115
    PC4125 0R2J-2-GP
    8

    17

    3D3V_AUX_S5
    77.C2271.39L DYSC18P50V2JN-1-GP 5V_AUX_S5 DY

    1
    3D3V_AUX_S5
    2

    13D3V_AUX_S5_5_51125

    PG4127 PR4116

    1 2
    1
    1 2 33KR2F-GP
    PWR_5V_FB1_R
    1

    PR4118 PR4119
    PR4117 GAP-CLOSE-PWR 100KR2J-1-GP PC4124 DY
    51125_VREF 2
    DY 1 DY

    2
    10KR2F-2-GP 0R2J-2-GP SC18P50V2JN-1-GP

    2
    PR4121

    2
    3D3V_AUX_S5 1 2 SA
    2

    0R0402-PAD

    1
    PR4122 PC4127 3V_5V_POK 19
    SC4D7U6D3V3MX-2GP

    PC4126

    51125_VREF 1 2 PR4120
    2

    21K5R2F-GP
    SC10U10V3MX-GP

    Close to VFB Pin (pin5) X01 2011_02_08 0R0402-PAD Change to 0603


    3D3V_AUX_S5 2
    DY PR4123
    1 Close to VFB Pin (pin2)
    2

    2
    B 0R2J-2-GP B

    2 PR4124
    1
    DY 0R2J-2-GP

    X01 2011_02_08
    TPS51125 RT8205B
    PR4118 DY ASM
    PR4121 ASM DY

    I/P cap:10U 25V K0805 X5R/ 78.10622.51L


    I/P cap: 10U 25V K0805 X5R/ 78.10622.51L Inductor: 1.50UH PCMC104T-1R5 Cyntec 3.8mohm/4.2mohm Isat =33Arms 68.1R510.10J
    Inductor: 2.2U PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =10Arms 68.2R210.20B O/P cap: ST220U6D3VDM-20GP 25mOhm / 77.22271.27L
    O/P cap: ST220U6D3VDM-20GP 25mOhm / 77.22271.27L SKIPSEL VREG3 or VREG5 VREF(2V) GND H/S: SIR172DP-T1-GE3-GP / 10.3mOhm/12.4mOhm@4.5Vgs / 84.00172.037
    H/S: FDMC8884-GP / 22mOhm/30mOhm@4.5Vgs / 84.08884.A37 Operating OOA Auto Skip Auto Skip L/S: SIR460DP-T1-GE3-GP / 4.9mOhm/6.1mOhm@4.5Vgs / 84.00460.037
    L/S: FDMC7692-GP / 9.5mOhm/11.5mOhm@4.5Vgs / 84.07692.A37 Mode PWM only

    EN0 Open 820kΩ to GND GND


    Operating
    Mode enable both enable both LDOs, disable all
    TPS51125: LDOs, VCLK on VCLK off and circuit
    DCBATOUT and ready to ready to turn on
    TONSEL CH1 CH2 turn on
    DCBATOUT
    switcher channels
    GND 200kHz 265kHz switcher
    2

    channels
    Vz=5.1V PD4105 VREF 245kHz 305kHz
    1

    PU4105 MMPZ5231BPT-GP
    PR4126 4 3 PWR_5V3D3V_EN0 VREG3 300kHz 375kHz
    40K2R2F-GP
    1

    5 2 PU4101_2 VREG5 365kHz 460kHz


    2

    A PU4101_5 0629 Modify A


    6 1
    0629 Modify
    PR4105
    1

    2N7002KDW-GP RT8205B:
    100KR2F-L1-GP
    PR4127
    750KR2F-GP TONSEL CH1 CH2
    2

    84.2N702.A3F GND 200kHz 250kHz


    <Variant Name>
    2

    VREF 300kHz 375kHz


    Wistron Corporation
    VREG3 365kHz 460kHz 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.
    VREG5 365kHz 460kHz
    Title

    TPS51125A_5V/3D3V
    Size Document Number Rev
    Custom

    Tuesday, April 17, 2012


    Hummingbird1_HR -2
    Date: Sheet 41 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = CPU.Regulator
    3D3V_S5 5V_S5
    1D05V_VTT 3D3V_S0

    1
    D PR4204 PR4205 D
    1R2F-GP 1R2F-GP

    1 PR4207

    1 PR4208

    1 PR4209

    1 PR4210
    2

    2
    PC4211

    PC4201
    SCD1U25V3KX-GP

    SCD1U25V3KX-GP
    1

    1
    1D05V_VTT

    2
    130R2F-1-GP

    10KR2F-2-GP

    10KR2F-2-GP
    54D9R2F-L1-GP
    GND_1316 GND_1316 PU4201
    1

    DYPR4215
    100R2F-L1-GP-U
    DYPR4216
    100R2F-L1-GP-U
    PW R_VCORE_VDD5 12 VDD5 DCMDRP1 18
    19
    PW R_VCORE_DCMDRP1
    PW R_VCORE_DCMDRP2
    DCMDRP2
    43 VDD3
    42 14 PW R_VCORE_SENSE1- PR4217 1 2 0R0402-PAD
    VSSSENSE 8
    2

    VDD3 SENSE1- PW R_VCORE_SENSE1+ PR4218 0R0402-PAD


    SENSE1+ 13 1 2 VCCSENSE 8
    15 PW R_VCORE_SENSE2- PR4219 1 2 0R0402-PAD
    SENSE2- VSS_AXG_SENSE 9
    16 PW R_VCORE_SENSE2+ PR4220 1 2 0R0402-PAD
    SENSE2+ VCC_AXG_SENSE 9
    PW R_VCORE_IMON1 21
    PW R_VCORE_IMON2 IMON1 PW R_VCORE_TEMP_SENSE1
    25 IMON2 TEMP_SENSE1 29
    TEMP_SENSE_GFX 1 PR4254 2 TEMP_SENSE_GFX_R 2H_PROCHOT#
    PC4213

    PC4214

    30 1
    SCD022U16V2KX-3GP

    SCD022U16V2KX-3GP

    C TEMP_SENSE2 0R0402-PAD C
    43 PW R_VCORE_DB0 37 DB10
    1

    36 40 PR4252 100KR2F-L1-GP
    43 PW R_VCORE_DB1 DB11 SPHASE1_0 PW R_VCORE_SPHASE_0 43
    1

    1
    PR4221 PR4222 35 39
    8K45R2F-2-GP 8K87R2F-2-GP 43 PW R_VCORE_DB2 DB12 SPHASE1_1 PR4255 PR4256
    44 DB0_GFX 33 DB20 SPHASE1_2 38
    32 34 61K9R2F-GP NTC-220K-5-GP
    2

    44 DB1_GFX DB21 SPHASE2 SPHASE_GFX 44


    31
    2

    44 DB2_GFX DB22
    5 H_CPU_SVIDCLK 8

    2
    PW R_VCORE_IDES1_N VCLK
    43 PW R_VCORE_IDES1_N 24 IDES1_N VDIO 4 H_CPU_SVIDDAT 8
    PW R_VCORE_IDES1_P 23 DY1 2 S0_PW R_GOOD 19,27
    NTCG104QH224HT
    43 PW R_VCORE_IDES1_P IDES1_P PR42571 PR4258 20R2J-2-GP
    44 IDES_N_GFX 27 IDES2_N VR_ENABLE 6 ALL_POW ER_OK 27,37,48
    28 10 0R0402-PAD
    44 IDES_P_GFX IDES2_P VR_TT# H_PROCHOT# 5,27
    GND_1316 8
    PW R_VCORE_R_OSC VR1_READY PW R_VCORE_VR2_DELAY IMVP_PW RGD 28,36
    1 2 41 R_OSC VR2_READY 9
    130KR2F-GP PR4225 1 2 PW R_VCORE_R_REF1 22 2010/06/23 Follow the standard schematics
    44K2R2D-GP PR4226 1 PW R_VCORE_R_REF2 R_REF1
    2 26 R_REF2 ALERT# 7 VR_SVID_ALERT# 8
    44K2R2D-GP PR4229
    PR4233
    1 2 PW R_VCORE_R_SEL0 2 17
    21KR2F-GP PR4231 PW R_VCORE_R_SEL1 R_SEL0 NC#17
    1 2 1 R_SEL1 NC#20 20 1 2PW R_VCORE_TEMP_SENSE1_R 1 2H_PROCHOT#
    27K4R2F-GP PR4232 1 2 PW R_VCORE_R_SEL2 48
    39K2R2F-L-GP PR4234 PW R_VCORE_R_SEL3 R_SEL2 5K76R2F-2-GP PR4251 100KR2F-L1-GP

    PC4218

    PC4219
    1 2 47

    SCD047U25V2KX-GP

    SCD047U25V2KX-GP
    R_SEL3

    1
    32K4R2F-1-GP PR4235 1 2 PW R_VCORE_R_SEL4 46 49
    27K4R2F-GP PR4236 PW R_VCORE_R_SEL5 R_SEL4 GND PR4239
    1 2 45 11

    43K2R2F-L-GP
    R_SEL5 GND

    1
    39K2R2F-L-GP PR4237 PW R_VCORE_R_SEL6 NTC-220K-5-GP

    PR4238
    1 2 44 R_SEL6 GND 3
    3K74R2F-GP PR4201

    2
    VT1316MAFQX-041-GP
    GND_1316 NTCG104QH224HT
    1 2
    PG4203 74.01316.F33
    B GAP-CLOSE-PW R B

    GND_1316
    GND_1316

    1D05V_VTT
    1D05V_VTT

    PW R_VCORE_DB1 DB1_GFX
    1

    PR4246
    PR4243 PR4244 PR4245
    78K7R2F-GP 324KR2F-GP 121KR2F-L-GP 383KR2F-1-GP
    2

    PW R_VCORE_DCMDRP1 PW R_VCORE_DCMDRP2
    1

    A PR4249 PC4228 A
    2K55R2F-GP <Variant Name>
    SC2200P50V2KX-2GP PR4250 PC4229
    2

    3K83R2F-GP SC2200P50V2KX-2GP
    2

    Wistron Corporation
    2

    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    GND_1316 GND_1316 VT1316+1317_CPU_CORE(1/3)


    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 42 of 102
    5 4 3 2 1
    5 4 3 2 1

    PR4302 PR4303 5V_S5 400mils or Copper Shape


    1 2 1 2

    5K9R2F-GP 9K09R2F-GP

    PC4316

    PC4317
    DY

    SC1U10V2KX-1GP

    SC1U10V2KX-1GP
    SC10U10V5KX-2GP

    SC10U10V5KX-2GP

    SC10U10V5KX-2GP

    SC10U10V5KX-2GP

    SCD1U10V2KX-5GP

    SCD1U10V2KX-5GP
    1

    PC4318

    FC4339
    1

    1
    2PW R_VCORE_IDES1_N_2 PC4303

    PC4310

    PC4311

    PC4313

    PC4314
    1
    PC4302 SC1KP50V2KX-1GP SC4700P50V2KX-1GP

    2
    5V_S5
    PW R_VCORE0_IDES_P_1

    D D

    1
    RF -1M

    1
    PR4306
    3K09R2F-1-GP
    DY PR4311 DY
    10R2J-2-GP VCC_CORE

    2
    PWR_VCORE_IDES0_P_1

    G4
    G5
    G6
    C6
    C5
    C4
    E4
    E5
    E6

    J4
    J5
    J6
    PU4302 PL4301

    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    PR4313 PR4314
    PW R_VCORE0_IDES_N A5 H1 PW R_VCORE_VX0 1 2
    PW R_VCORE0_IDES_P IDES_N VX#H1 IND-D1UH-26-GP
    1 2 1 2 A4 IDES_P VX#H2 H2
    VX#H3 H3
    5K9R2F-GP 9K09R2F-GP H4
    42 PW R_VCORE_DB0 A6 DB0
    VX#H4
    VX#H5 H5 1500mils or Copper Shape
    42 PW R_VCORE_DB1 A1 DB1 VX#H6 H6
    1 2 42 PW R_VCORE_DB2 B1 DB2 VX#D1 D1
    PC4312 SC1KP50V2KX-1GP D2
    VX#D2
    42 PW R_VCORE_SPHASE_0 B6 SPHASE VX#D3 D3
    VX#D4 D4
    VX#D5 D5
    A3 AVDD VX#D6 D6
    B3 AGND VX#F6 F6

    PU4202_AVDD
    B4 AGND VX#F5 F5
    B5 AGND VX#F4 F4
    VX#F3 F3
    VX#F2 F2

    AGND
    AGND
    F1

    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    VX#F1
    C C
    VT1317SFCX-001-GP

    A2
    B2

    E3
    E2
    E1
    C1
    C2
    C3
    J3
    J2
    J1
    G3
    G2
    G1
    1
    PC4315
    SCD1U25V3KX-GP

    2
    PG4301

    1 2

    GAP-CLOSE-PW R

    GND_1317S_1

    PW R_VCORE_IDES1_N
    42 PW R_VCORE_IDES1_N
    PW R_VCORE_IDES1_P
    42 PW R_VCORE_IDES1_P

    VCC_CORE

    B B

    PC4334 PC4335
    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP
    1

    1
    PC4319 PC4320 PC4321 PC4322 PC4323 PC4324 PC4325 PC4326 PC4327 PC4328 PC4329 PC4330 PC4331 PC4332 PC4333 PC4336 PC4337 PC4338

    SC22U4V3MX-GP

    SC22U4V3MX-GP
    2

    2
    A <Variant Name> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    VT1316+1317_CPU_CORE(2/3)
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 43 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    PR4402 PR4403 06/24


    42 IDES_N_GFX 1 2 1 2

    3K16R2F-GP 13K3R2F-L1-GP
    PC4414
    320mils or Copper Shape

    1
    5V_S5 VCC_GFXCORE
    PC4413 1 2 IDES_N_GFX_1 SC4700P50V2KX-1GP

    2
    SC2700P50V2KX-1-GP

    PC4415

    PC4416

    PC4417

    PC4418

    PC4419

    PC4420
    SC1U10V2KX-1GP

    SC1U10V2KX-1GP
    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP
    PW R_AXG_IDES_P_1 5V_S5

    1
    PC4421
    SCD1U10V2KX-5GP

    2
    1

    1
    PR4404
    3K09R2F-1-GP PR4401
    10R2J-2-GP

    0.12UH~0.15UH
    C C
    PC4422 1 2 IDES_P_GFX_1
    2

    G4
    G5
    G6
    C6
    C5
    C4
    SC2700P50V2KX-1-GP

    E4
    E5
    E6

    J4
    J5
    J6
    06/24 PU4401
    PL4401 2120mils or Copper Shape

    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    VDDH
    PR4406 PR4405
    PW R_AXG_IDES_N A5 H1 PW R_AXG_VX 1 2
    PW R_AXG_IDES_P A4 IDES_N VX#H1 IND-D1UH-26-GP

    PC4423

    PC4401
    42 IDES_P_GFX 1 2 1 2 IDES_P VX#H2 H2

    PC4424

    PC4425

    PC4426
    VX#H3 H3
    3K16R2F-GP 13K3R2F-L1-GP H4
    VX#H4

    1
    42 DB0_GFX A6 DB0 VX#H5 H5
    42 DB1_GFX A1 DB1 VX#H6 H6

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP
    42 DB2_GFX B1 D1

    2
    DB2 VX#D1
    VX#D2 D2
    42 SPHASE_GFX B6 SPHASE VX#D3 D3
    D4
    VX#D4
    D5
    DY
    VX#D5
    A3 AVDD VX#D6 D6
    B3 AGND VX#F6 F6
    B4 AGND VX#F5 F5
    B5 AGND VX#F4 F4
    F3
    1PWR_AXG_AVDD

    VX#F3
    F2
    VX#F2 2120mils or Copper Shape
    AGND
    AGND

    F1
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    VX#F1

    VT1317SFCX-001-GP
    A2
    B2

    E3
    E2
    E1
    C1
    C2
    C3
    J3
    J2
    J1
    G3
    G2
    G1

    PC4402

    PC4403

    PC4404

    PC4405

    PC4406

    PC4407

    PC4408

    PC4409

    PC4410

    PC4411

    PC4412
    1

    1
    B B
    PC4427
    SCD1U25V3KX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP
    2

    2
    DY
    DY
    1 2
    PG4401
    GAP-CLOSE-PW R

    GND_1317S_3

    A <Variant Name> A

    Wistron Corporation
    Change to 0603_4V 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    VT1316+1317_CPU_CORE(3/3)
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 44 of 102
    5 4 3 2 1
    5 4 3 2 1

    3D3V_S0

    2
    PR4716
    10KR2J-3-GP
    140mils or Copper Shape
    5V_S5
    PR4518

    1
    1 2 1.05VTT_PW RGD 37,48
    Delete the old version VT386F circuit

    SC1U10V2KX-1GP

    SC22U6D3V5MX-2GP

    SC22U6D3V5MX-2GP
    PC4504

    PC4505

    PC4503

    PC4502
    SCD1U10V2KX-5GP
    D Design Current = 12A D

    1
    DY 15.6A<OCP< 17.7A

    2
    PWR_1D05V_STAT_2
    1D05V_VTT
    PU4502 PL4502 400mils or Copper Shape
    B5 B2 PW R_1D05V_VX 1 2
    VDD VX#B2

    PC4506

    PC4523

    PC4509

    PC4510

    PC4511

    PC4512

    PC4513

    PC4516

    PC4517

    PC4530

    PC4529
    C5 VDD VX#B3 B3
    Diff pair B4 COIL-D20UH-GP
    VX#B4

    1
    2K74R2F-GP PW R_1D05V_VSENSE+ A2 C2
    SENSE+ VX#C2
    1 2 2 6K81R2F-1-GP
    1 PW R_1D05V_VSENSE- A3 SENSE- VX#C3 C3
    PR4503 PR4504 C4

    2
    PR4519 SM30 0629 VX#C4

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP
    1 2 PW R_1D05V_STAT A4 STAT
    PR4522 AGND A1
    PC4540 1 2 PW R_1D05V_OE A5
    150R2F-1-GP 46 RUNPW ROK OE
    1 2 1 2 B1 AGND_386
    DY 0R0402-PAD GND
    VCCIO_SENSE_1

    PR4530 SC3300P50V2KX-1GP GND C1

    PC4639
    SCD1U10V2KX-4GP
    PC4501 VT386FCX-ADJ-GP

    1
    1 2 PC4522

    PC4521
    SC4700P50V2KX-1GP SC2200P50V2KX-2GP DY
    1
    C C

    PC4518

    PC4519

    PC4525

    PC4520

    PC4526

    PC4527

    PC4528
    2

    1
    1

    1
    2

    SC22U4V3MX-GP
    2

    2
    1

    1D05V_VTT

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP
    PR4501 1 2
    DY
    39K2R2F-L-GP PG4505 DY DY DY
    GAP-CLOSE-PW R DY DY

    1
    2

    AGND_386 PR4515
    10R2F-L-GP

    2
    close output MLCC
    PR4510
    0R2J-2-GP
    VCCIO_SENSE_C 1 2 VCCIO_SENSE 8
    Change to 0603_4V
    VSENSE-TRACE DY
    ROUTED DIFFERENTIALLY
    PARALLEL TO VSENSE+ PR4517
    0R2J-2-GP DY
    1 2 VSSIO_SENSE 8
    B B

    close output MLCC


    1
    PR4520
    10R2F-L-GP Change 0R PAD to 0R and DY
    2

    <Variant Name>
    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    VT386_+1.05V_VTT
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 45 of 102

    5 4 3 2 1
    5 4 3 2 1

    SSID = PWR.Plane.Regulator_1p5v0p75v 1D5V_PW R 1D5V_S3

    PG4608
    1 2

    GAP-CLOSE-PW R
    5V_S5
    DCBATOUT PG4609
    1 2

    SC1U10V3KX-3GP
    D D
    GAP-CLOSE-PW R

    PC4601
    3D3V_S0
    PG4610

    1
    1 2

    SC10U25V5KX-GP

    SC10U25V5KX-GP

    SC10U25V5KX-GP

    SCD1U50V3KX-GP
    GAP-CLOSE-PW R

    2
    1

    PC4613
    PC4609

    PC4611

    PC4612
    1

    2
    PR4604
    PG4611
    20KR2J-L2-GP

    5
    6
    7
    8
    PU4602 DY 1 2

    1
    D
    D
    D
    D
    FDMC7696-GP PT4604

    1
    PU4601
    ST22U25VDM-1-GP GAP-CLOSE-PW R
    2

    PR4605_2
    20 12 PC4619
    45 RUNPW ROK PGOOD V5IN SCD1U25V3KX-GP

    2
    Design Current = 8A PG4612
    17 PR4605
    12A<OCP< 16A

    G
    37 0D75V_EN VTTEN PW R_1D5V_VBST1 4 1 2
    15 2 1 2

    S
    S
    S
    PW R_1D5V_EN VBST 2D2R3J-2-GP 2nd = 84.00406.037
    16 EN/PSV GAP-CLOSE-PW R

    3
    2
    1
    PW R_1D5V_VREF 6 14 PW R_1D5V_DRVH 84.07696.037 1D5V_PW R
    PG4613
    VREF DRVH
    1

    PR4603 PL4601 1 2
    10KR2F-2-GP 13 PW R_1D5V_SW 1 2
    SW GAP-CLOSE-PW R
    IND-1D5UH-23-GP
    PG4614
    2

    PT4603
    PW R_1D5V_REFIN 8 11 TPS51216_DRVL

    SCD1U10V2KX-4GP

    SE330U2VDM-L-GP

    1
    REFIN DRVL 2nd = 68.1R51A.10F

    1
    1 2

    5
    6
    7
    8

    PC4621
    SCD1U25V3KX-GP

    48D7KR2F-GP

    SC4D7U6D3V3KX-GP
    1

    1
    PG4607
    PR4612

    D
    D
    D
    D

    PC4620

    SCD1U50V3KX-GP
    10
    DY

    SCD1U50V3KX-GP
    PGND PU4603 GAP-CLOSE-PW R
    1

    PW R_1D5V_MODE 19 2D2R5F-2-GP
    68.1R510.10K
    SCD01U16V2KX-3GP

    2
    GAP-CLOSE-PWR-3-GP

    2
    MODE FDMC7672S-GP
    2

    EC4605
    PC4603

    PR4601

    EC4604
    200KR2F-L-GP

    PG4615

    2
    1

    C C
    2

    PW R_1D5V_TRIP 18 PW R_1D5V_VDDQS 1 2
    PC4602

    9
    1

    TRIP VDDQS
    PR4608

    G
    S
    S
    S

    PWR_1D5V_VDDQS
    GAP-CLOSE-PW R
    2

    82K5R2F-GP
    PR4601_1

    VTTIN 2

    1
    0D75V_S0

    4
    3
    2
    1
    PW R_1D5V_VTTREF5
    240R2F-1-GP

    PR4602

    VTTREF
    1

    3 DY PC4622
    1

    VTT
    1

    SC330P50V2KX-3GP
    PR4606

    1
    1

    2
    2nd = 77.C3371.051

    1
    PC4617
    SCD1U10V2KX-4GP

    PC4616
    PC4610

    PC4618
    1
    1

    PC4615
    SCD22U6D3V2KX-1GP VTTS
    2

    X01_2011_02_18

    SC10U6D3V3MX-GP
    21 GND

    SC10U6D3V3MX-GP

    SC10U6D3V3MX-GP
    2

    4 79.33719.L01

    2
    2
    2

    2
    VTTGND
    2
    7 GND 2nd = 84.00402.037
    TPS51216RUKR-GP
    74.51216.073 1D5V_PW R

    SC1U6D3V2KX-GP
    84.07672.B37

    PC4604
    1
    2
    I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
    Inductor: IND-1D5UH-23-GP 14mohm/15mohm Isat =18Arms 68.1R510.10K
    State S3 S5 VDDR VTTREF VTT O/P cap: SE330U2VDM-L-GP 9mOhm / 79.33719.L01
    H/S: SIS412DN-T1-GE3-GP / 24mOhm/30mOhm@4.5Vgs / 84.00412.037
    B S0 Hi Hi On On On L/S: SI7716ADN-T1-GE3-GP / 13.5mOhm/16.5mOhm@4.5Vgs / 84.07716.037
    B

    S3 Lo Hi On On Off(Hi-Z) DDR_VREF_S3
    S4/S5 Lo Lo Off Off Off
    PW R_1D5V_VTTREF 1 PR4611 2
    0R0603-PAD
    MODE
    PR5003 Frequency Discharge Mode
    200k ohm 400kHz
    Tracking Discharge
    100k ohm 300kHz
    68k ohm 300kHz
    Non-tracking Discharge
    47k ohm 400kHz

    <Variant Name>
    A A

    19,27 PM_SLP_S4# 1 PR4607 2 PW R_1D5V_EN


    0R0402-PAD
    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    1

    PC4606
    Taipei Hsien 221, Taiwan, R.O.C.
    DY SCD1U10V2KX-5GP
    Title
    2

    TPS51116_+1.5V_SUS
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 46 of 102

    5 4 3 2 1
    5 4 3 2 1

    SSID = PWR.Plane.Regulator_1p8v

    D 3D3V_S5 D
    2

    PG4701 PG4702
    GAP-CLOSE-PWR
    1

    GAP-CLOSE-PWR

    C 1D8V_PWR 1D8V_S0 C
    PU4701

    9 GND PL4701 PG4703


    TPS62060_VIN 8 1
    PVIN PGND TPS62060_SW
    7 AVIN SW 2 1 2 2 1
    TPS62060_MODE 6 3 IND-1UH-145-GP GAP-CLOSE-PWR
    MODE AGND TPS62060_FB CHIP IND 1UH VLS3015ET-1R0N PR4704
    19,27,29,36,37 PM_SLP_S3# 5 EN FB 4 1 2 383KR2F-1-GP PG4704
    2 1
    TPS62060DSGR-GP GAP-CLOSE-PWR
    1

    PC4703
    1 2 SC22P50V2JN-4GP
    PC4701 PR4702
    SC10U10V5KX-2GP 0R2J-2-GP
    2

    1
    PR4703 PC4704
    1

    187KR2F-GP SC10U6D3V3MX-GP

    2
    2
    B B

    <Variant Name>

    Wistron Corporation
    A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
    Taipei Hsien 221, Taiwan, R.O.C.

    Title
    DC CONVERTER_1D8V
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 47 of 102
    5 4 3 2 1
    5 4 3 2 1

    TPS51461 for VCCSA


    3D3V_S0

    5V_S5

    1
    PR4809
    NON_Celeron
    D D
    4K7R2J-2-GP

    1
    1
    PC4814

    2
    SC1U10V2KX-1GP

    NON_Celeron
    PR4806 1 PR4808 2 ALL_POW ER_OK 27,37,42

    2
    1R2F-GP 0R0402-PAD PR4812

    NON_Celeron 1 DY 2
    1KR2F-3-GP

    2
    NON_Celeron
    NON_Celeron

    SC2D2U10V3KX-1GP
    PW R_VCCSA_VID1 1 PR4804 2 VCCSA_SEL 9

    PWR_VCCSA_PGOOD
    0R0402-PAD

    1
    PW R_VCCSA_VID0 1 PR4805 2

    PC4816
    0R0402-PAD Set VID0 =low SA
    X01 2011_02_08
    NON_Celeron

    2
    PW R_VCCSA_EN 1 PR4801 2
    0R0402-PAD 1.05VTT_PW RGD 37,45

    NON_Celeron 68.R4710.10M
    Id=17.5~26A

    1
    PWR_VCCSA_V5DRV DY
    DCR=4~4.2mohm
    NON_Celeron Size=6.5X6.9X3

    2
    PU4801 PC4810

    18
    17
    16
    15
    14
    13
    SC1U6D3V2KX-GP
    Design Current = 4.2A

    VID1
    VID0
    PGOOD

    EN
    V5DRV
    V5FILT
    PC4811
    PCB Footprint = QFN24-G2D25H40 SCD1U25V3KX-GP 6.6A<OCP< 7.8A
    19 PGND
    5V_S5 20 12 PW R_VCCSA_BST 1 PR4807 2 PW R_VCCSA_BST_R 1 2 06/24
    C PGND BST 0R0402-PAD 0D85V_S0 C
    21 PGND SW#11 11 Change Choke size
    22 VIN SW#10 10
    NON_Celeron NON_Celeron PL4801
    23 VIN SW#9 9
    24 VIN SW#8 8
    1

    PC4807 PC4815 PC4813 PC4812 25 7 PW R_VCCSA_SW 1 2


    GND SW#7

    PC4808
    DY DY

    COMP

    MODE

    1
    SLEW
    VOUT
    SCD1U25V3KX-GP

    SC10U10V5KX-2GP

    SC10U10V5KX-2GP

    SC10U10V5KX-2GP

    SCD1U25V3KX-GP
    VREF
    NON_Celeron

    COIL-D47UH-9-GP

    PC4803

    PC4804

    PC4805

    PC4806
    GND
    2

    2
    NON_Celeron

    PR4803

    1
    2D2R5F-2-GP
    ULV_NON_CELERON DY
    NON_Celeron DY
    1
    2
    3
    4
    5
    6
    TPS51461RGER-GP PR4813

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP

    SC22U4V3MX-GP
    1PWR_VCCSA_SNUB
    2

    2
    PU4801_MODE 1 2
    74.51461.043

    NON_Celeron

    NON_Celeron
    NON_Celeron
    PWR_VCCSA_VREF 33KR2F-GP
    PWR_VCCSA_COMP

    NON_Celeron
    NON_Celeron PW R_VCCSA_VOUT 1 PR4811 2 0D85V_S0
    100R2F-L1-GP-U NON_Celeron
    PW R_VCCSA_SLEW

    2
    PC4801
    SCD01U50V2KX-1GP

    1
    VID0 VID1 VCCSA DY PC4809
    1

    SC560P50V-GP

    2
    PR4802 NON_Celeron
    L L 0.9V 4K99R2F-L-GP Change to 0603_4V
    NON_Celeron
    2 PWR_VCCSA_COMP_1

    0.8V(SV)
    L H
    B B
    0.85V(ULV)
    NON_Celeron

    0D85V_S0
    1

    PC4817
    SC3300P50V3KX-1GP
    2

    1
    TYPE PR4813 DY

    SCD1U50V3KX-GP
    2
    NON_Celeron

    EC4801
    2

    SV DY PC4802
    SCD22U10V2KX-1GP
    1

    ULV 33K

    <Variant Name>
    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title
    TPS51461_VCCSA
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 48 of 102

    5 4 3 2 1
    SSID = VIDEO
    Reverse the pin define becasue of cable issue

    LVDS CONNECTOR
    INVERTER POWER
    LCDVDD

    1
    C4902 F4901 DCBATOUT
    C4901 POLYSW -1D1A24V-GP-U
    SC1U6D3V2KX-GP SCD1U10V2KX-5GP DCBATOUT_LCD
    69.50007.A31

    2
    IPEX-CON30-4-GP-U
    2nd = 69.50007.A41
    34
    32 2 1
    30

    2
    29 C4906
    24V 1.1A

    SC1KP50V2KX-1GP

    SCD1U50V3KX-GP
    3D3V_S0 28 C4904 C4905

    SC1U25V3KX-1-GP
    27

    1
    17 LVDS_DDC_CLK 26
    17 LVDS_DDC_DATA 25
    17 LVDSA_DATA0# 24
    17 LVDSA_DATA0 23
    22
    17 LVDSA_DATA1# 21
    17 LVDSA_DATA1 20
    19
    17 LVDSA_DATA2# 18
    17 LVDSA_DATA2 17 Camera Power
    16
    17 LVDSA_CLK# 15 F4902
    17 LVDSA_CLK 14 FUSE-1D1A6V-4GP-U
    3D3V_S0 3D3V_CAMERA_S0
    13 69.50007.691
    DBC_EN_C 12 2ND = 69.50007.771
    1

    3D3V_CAMERA_S0 11 1 2
    R9407 2 1USB_CAMERA# 10
    18 USB_PN12
    0R0603-PAD2 R4908 1USB_CAMERA 9
    18 USB_PP12

    1
    0R0603-PAD R4909 8 EC4903
    7
    8V 1.1A C4903
    2

    SCD1U10V2KX-5GP
    0R2J-2-GP LCD_BRIGHTNESS

    SC10U10V3MX-GP
    17 LBKLT_CTL 1 2 6

    2
    33R2J-2-GP R4902 BLON_OUT_C 5
    4
    DCBATOUT_LCD 3
    2

    1
    31
    33
    LVDS1

    2nd = 20.F2056.030

    20.F1407.030
    sm30-1

    3D3V_S0
    1

    R4904
    10KR2J-3-GP

    DY DY
    SSID = VIDEO
    2

    DBC_EN_C 2 1 DBC_EN 27
    R4901
    33R2J-2-GP
    LCD POWER for ANNIE
    1

    For EMI request


    R4906 Close to LVDS connector -SA
    DY
    10KR2J-3-GP
    LCDVDD
    3D3V_S0 LCD_BRIGHTNESS R9406
    2

    0R2J-2-GP
    U4901 LVDSA_CLK 27 BRIGHTNESS 1 DY 2 LCD_BRIGHTNESS
    Layout 40 mil LVDSA_CLK#
    17 LCDVDD_EN 1 EN VIN#5 5
    1

    1
    2 27 BLON_OUT 1 2 BLON_OUT_C EC4904 EC4905 EC4902
    GND
    SC5D6P50V2CN-1GP

    SC5D6P50V2CN-1GP

    SC33P50V2JN-3GP
    3 VOUT VIN#4 4 R4903
    1KR2J-1-GP
    DY DY DY
    2

    2
    1

    1
    SC4D7U6D3V3KX-GP

    C4907
    1

    R4914 C4909 C4908 RT9724GB-GP


    100KR2J-1-GP

    100KR2J-1-GP

    SC100P50V2JN-3GP

    DY DY R4911 C4910
    SC56P50V2JN-2GP

    <Variant Name>
    2
    SC4D7U6D3V3KX-GP

    74.09724.09F
    2

    2
    2

    Wistron Corporation
    1

    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


    Taipei Hsien 221, Taiwan, R.O.C.

    -SA have PD on PCH side Title

    LCD Connector
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 49 of 102
    5 4 3 2 1

    Pull High 5V Design on CRT Board


    CRT DDCDATA & DDCCLK level shift

    D D

    C C

    B B

    A <Variant Name> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    CRT Connector
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 50 of 102
    5 4 3 2 1
    5 4 3 2 1

    HDMI1
    22

    SSID = VIDEO HDMI Level Shifter & CONNECTOR 20


    1

    2
    HDMI_DATA2_R

    3 HDMI_DATA2_R#
    4 HDMI_DATA1_R
    HDMI_CLK_R# 5
    17 HDMI_CLK_R# HDMI_CLK_R HDMI_DATA1_R#
    17 HDMI_CLK_R 6
    7 HDMI_DATA0_R
    HDMI_DATA0_R# 8
    17 HDMI_DATA0_R# HDMI_DATA0_R HDMI_DATA0_R#
    17 HDMI_DATA0_R 9
    D 10 HDMI_CLK_R D
    17 HDMI_DATA1_R# 11
    12 HDMI_CLK_R#
    17 HDMI_DATA1_R
    13
    HDMI_DATA1_R# 14 5V_S0
    17 HDMI_DATA2_R# HDMI_DATA1_R DDC_CLK_HDMI
    17 HDMI_DATA2_R 15
    16 DDC_DATA_HDMI
    HDMI_DATA2_R# 17
    HDMI_DATA2_R 18 2 1
    19
    21 F5101
    23 FUSE-1D1A6V-4GP-U
    Close to HDMI Connector 69.50007.691
    SKT-HDMI23-40-GP 2nd1.1A
    = 69.50007.771
    8V

    SCD1U10V2KX-5GP
    8
    7
    6
    5

    8
    7
    6
    5
    Intel desging suggestion Stuff 680-ohm,

    FC5101
    2nd = 22.10296.311

    1
    RN5114 RN5115 CRB board stuff 618-ohm
    HDMI SRN499F-GP
    HDMI SRN499F-GP TM said that following JE40_HR stuff 499-ohm
    3rd = 22.10296.501

    2
    1
    2
    3
    4

    1
    2
    3
    4
    22.10296.271

    HDMI_PLL_GND DY

    C C

    D
    Q5105
    2N7002K-2-GP
    84.2N702.J31

    HPD_HDMI_CON
    2ND = 84.2N702.031 HDMI 3D3V_S0

    G
    S
    5V_S0 84.03904.L06
    2ND = 84.03904.P11
    Q5102

    3
    5V_S0 PMBS3904-1-GP
    1
    HDMI 2HDMI_HPD_B 1
    R5111 HDMI
    150KR2J-L1-GP

    2
    1
    R5110
    HDMI_DET HDMI20R2J-2-GP
    R5128
    1
    200KR2J-L1-GP
    DY HDMI_PCH_DET 17

    4
    3

    2
    RN5101
    Close to Level Shift

    1
    3D3V_S0 SRN2K2J-1-GP
    HDMI
    HDMIR5112

    1
    2
    10KR2J-3-GP

    2
    B B

    4 3 DDC_CLK_HDMI
    17 PCH_HDMI_CLK
    DDC_DATA_HDMI
    17 PCH_HDMI_DATA
    5 2
    HDMI
    6 1

    Q5104
    2N7002KDW -GP
    84.2N702.A3F
    2nd = 84.DM601.03F

    A <Core Design> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    HDMI Level Shifter/Connector


    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 51 of 102
    5 4 3 2 1
    5 4 3 2 1

    LED BACKLIGHT CONVERTER POWER

    D D

    C C

    B B

    A HR PX A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    eDP
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 52 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C
    (Blanking) C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    S-VIDEO
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 53 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    (Blanking)

    C C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 54 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = User.Interface

    D
    ITP Connector D

    H_CPURST# use pull-up Resistor close


    ITP connector 500 mil ( max ),
    others place near CPU side.

    C C

    CPU ITP Connector


    TCK(PIN 5)
    TCK(PIN AC5)
    FBO(PIN 11)

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    ITP
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 55 of 102
    5 4 3 2 1
    HDD1

    SSID = SATA SATA HDD Connector 38

    39 31

    R5607 0R6J-3-GP 1
    5V_S0 1 2
    R5609 0R3J-0-U-GP R5608 0R6J-3-GP 2
    3D3V_S0 1 2 5V_S5 1 2 3 32

    R5610
    SSD 0R3J-0-U-GP
    4
    DY 5
    3D3V_S5 1 2 6
    5V_HDD 7

    SCD1U10V2KX-5GP
    DY 8

    1
    C5607 9
    10

    SC10U10V5ZY-1GP

    SCD1U10V2KX-5GP
    PS8520BTQFN20GTR-GP 11 33

    1
    C5605 C5606 12
    13
    SCD01U16V2KX-3GP2 1 C5609 SATA_TXP0_R 1 6 3D3V_REdriver_VDD 14

    2
    21 SATA_TXP0 SCD01U16V2KX-3GP2 A_INP VDD
    1 C5608 SATA_TXN0_R 2 A_INN VDD 16 15
    21 SATA_TXN0 SATA_TXP0_L 15 16
    SSD_NONSSD
    SATA_TXN0_L 14
    A_OUTP
    17
    SSD_NONSSD A_OUTN
    9 R5601 1 4K7R2J-2-GP
    2 18
    SATA_RXP0_L A_PRE0 R5602 1 4K7R2J-2-GP
    11 B_INP B_PRE0 8 2 19 34
    SATA_RXN0_L 12 19 R5603 1 4K7R2J-2-GP
    2 SATA_RXP0_L SCD01U16V2KX-3GP2 1 C5604 SATA_RXP0_C 20
    SCD01U16V2KX-3GP2 1C5614 SATA_RXP0_R 5
    B_INN A_PRE1
    17 R5604 1 DY
    4K7R2J-2-GP
    2 SATA_RXN0_L SCD01U16V2KX-3GP2 1 C5603 SATA_RXN0_C 21
    21 SATA_RXP0 SCD01U16V2KX-3GP2 1C5615 SATA_RXN0_R 4
    B_OUTP B_PRE1 SSD 22
    21 SATA_RXN0 B_OUTN DY SATA_TXN0_L SCD01U16V2KX-3GP2 1 C5602 SATA_TXN0_C 23
    SSD_NONSSD SSD SATA_TXP0_L SCD01U16V2KX-3GP2 1 C5601 SATA_TXP0_C
    SSD_NONSSD EN 7 DY 24
    TEST 18 R5605 1 4K7R2J-2-GP
    2 25
    3 GND REXT 20 R5606 1 22KR2F-3-GP 26

    SCD1U10V2KX-5GP
    13 GND SSD 27 35

    1
    21 10 C5610 28
    GND NC#10
    29
    30

    2
    U5601
    40 36
    RN5601 SRN0J-6-GP RN5603 SRN0J-6-GP
    SATA_RXP0_R 1 4 SATA_RXP0_B 1 4 SATA_RXP0_L 37
    SATA_RXN0_R 2 3 SATA_RXN0_B 2 3 SSDSATA_RXN0_L
    IPEX-CON30-7-GP-U
    RN5602 SRN0J-6-GP RN5604 SRN0J-6-GP
    SATA_TXN0_R 1 NON 4 SATA_TXN0_B 1 NON 4 SATA_TXN0_L 20.F1093.030
    SATA_TXP0_R 2
    SSD
    3 SATA_TXP0_B 2
    SSD
    3 SATA_TXP0_L

    NON SSD NON SSD

    ODD Connector

    Without ODD

    <Variant Name>

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    HDD/ODD
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 56 of 102
    5 4 3 2 1

    ESATA Power

    D D

    C C

    USB CHARGER
    B B

    A <Variant Name> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    E-SATA/USB CHARGER
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 57 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = AUDIO
    R5821
    LOUT1
    5 COMBO_MIC_C 2 1 COMBO_MIC COMBO_MIC 29 L5801
    D 3 AUD_HP1_JD# AUD_HP1_JD# 29 0R2J-2-GP BLM18BD601SN1D-GP D
    2 AUD_HP1_JACK_R1 2 1 AUD_HP1_JACK_R2 29
    68.00082.531
    1 AUD_HP1_JACK_L1 2 1 AUD_HP1_JACK_L2 29
    4 AUD_AGND L5802

    1
    EC5815 EC5813 BLM18BD601SN1D-GP
    AUDIO-JK290-GP 68.00082.531
    this symbol is not correct

    1st = 22.10270.D31

    MLVS0603M04-1-GP
    2

    2
    MLVS0603M04-1-GP
    AUD_AGND AUD_AGND

    C C

    3D3V_S0

    1
    3D3V_S0
    R5828 ACES-CON4-43-GP
    DMIC1 DY 0R2J-2-GP
    5
    5 3 1

    2
    29 DMIC_DATA DATA GND
    29 DMIC_CLK 4 CLK GND 1
    29 DMIC_DATA 2
    29 DMIC_CLK 3
    1

    3D3V_S0 6 POWER L/R 2 4


    R5829 6
    1

    C5810 0R2J-2-GP
    MICROPHONE-52-GP DMIC2
    SCD1U10V2KX-5GP
    2

    B 20.K0423.004 B

    DY

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Audio Jack
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 58 of 102
    5 4 3 2 1
    5 4 3 2 1

    1.route on bottom as differential pairs.


    2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
    3.No vias, No 90 degree bends.
    4.pairs must be equal lengths.
    5.6mil trace width,12mil separation.
    6.36mil between pairs and any other trace.
    D
    7.Must not cross ground moat,except D
    RJ-45 moat.

    Without LAN
    C C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    LAN CONNECTOR
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 59 of 102
    5 4 3 2 1
    5 4 3 2 1

    SPI FLASH ROM (4M byte) for PCH 3D3V_S5 SPI ROM Equal length need to less than 500mil
    SPI ROM Equal length need to less than 500mil
    SSID = Flash.ROM 3D3V_S5

    1
    C6002

    SCD1U10V2KX-5GP
    2
    8
    7
    6
    5
    RN6001
    D SRN4K7J-10-GP
    SYSTEM D

    SPI ROM

    1
    2
    3
    4
    SPI_HOLD_0#

    3D3V_S5

    21,27 SPI_CS0#_R 1 CE# VDD 8


    21,27 SPI_SO_R 1 2 SPI_SO 2 7
    R6001 SPI_W P# SO HOLD#
    3 WP# SCK 6 SPI_CLK_R 21,27
    33R2J-2-GP 4 5 SPI_SI_R 21,27
    VSS SI

    U6001
    SST25VF032B-80-4I-S2AF-GP

    2ND = 72.25P32.C01
    3rd = 72.25Q32.A01
    4th = 72.25320.C01

    C C

    Q6001
    SSID = RBATT CH715FPT-GP
    2nd = 83.00040.E81 +RTC_VCC
    RTC_AUX_S5 83.R0304.B81 R6002
    1KR2J-1-GP Change P1 to P2 to meet RTC battery pin define
    1 RTC_PW R 1 2
    RTC1
    3 Width=20mils 3
    1
    2
    2

    2
    C6003 DY 4
    SC1U6D3V2KX-GP
    1

    2
    ACES-CON2-17-GP
    R6003

    2nd = 20.F1686.002

    1KR2J-1-GP
    1
    20.F1621.002

    D6001
    BAS16-6-GP
    B B
    2ND = 83.00016.F11
    83.00016.K11
    1

    3D3V_AUX_S5

    RTC battery charger sircuit

    HR PX
    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Flash/RTC
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 60 of 102

    5 4 3 2 1
    5 4 3 2 1

    SSID = USB
    IO Board USB Power
    Change Main source
    5V_S5
    Support 2A 5V_USB1_S3
    U6101
    at least 80 mil
    D at least 80 mil 1 8 D

    ST220U6D3VDM-20GP
    GND VOUT#8

    TC6201
    2 VIN VOUT#7 7
    3 VIN VOUT#6 6

    1
    27 USB_PW R_EN# 4 EN# OC# 5
    1

    1
    C6101 C6102 EC6101 EC6102
    SCD1U10V2KX-5GP

    SCD1U10V2KX-4GP

    SCD1U10V2KX-4GP
    2

    2
    SC1U10V2KX-1GP

    77.22271.27L
    UP7534BRA8-20-GP
    2

    2
    1st = 74.02101.079

    2nd = 77.C2271.00L
    5V_USB1_S3 5V_USB1_S3

    W:6.6mm L: 6mm, H:5.4mm ->100uF 16V SM30 0628

    USB2
    USB1 FILTER-4P-6-GP 1
    FILTER-4P-6-GP USB_PN9_R VBUS
    1 VBUS 18 USB_PN9 4 3 2 D-
    18 USB_PN1 4 3 USB_PN1_R 2 18 USB_PP9 USB_PP9_R 3
    USB_PP1_R D- D+
    18 USB_PP1 3 D+ 1 2 4 GND
    1 2 4 GND 5 GND
    5 EL6102 6
    C EL6101 GND GND C
    6 GND 7 GND
    7 GND 8 GND
    8 GND SKT-USB8-10-GP-U
    SKT-USB8-10-GP-U
    Change USB connector PN
    2nd = 22.10321.D91
    2nd = 22.10321.D91 Change USB connector PN

    22.10321.211
    22.10321.211

    B B

    A <Variant Name> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    USB Power SW
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 61 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    Blanking

    B B

    A <Variant Name> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    USB 3.0 Port


    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 62 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = User.Interface
    Bluetooth Module conn.
    D D

    C C

    Without BT
    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Bluetooth
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 63 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    Finger printer

    JE40 delete FP function


    C C

    F/P
    1 8
    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    RESERVED
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 64 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = Wireless

    D
    C Sensor D

    3D3V_S5

    3D3V_S5
    2
    U6501
    R6501
    TP6501
    10KR2J-3-GP 1 OUT/TOUT/DATA 9
    GND CTRL
    2 8 TPAD14-GP
    VSS CTRL/POUT VREG
    3 VREG 7
    1

    CX NC#3
    4 CX NC#6 6
    27 GPI_SENSE VDD 5

    1
    C
    DY C
    STM8T143AU61TTR-GP CX

    74.8T143.0B3

    1
    C6502
    DY C6501

    2
    SCD1U10V2KX-4GP
    SC1U10V2KX-1GP

    DY
    DY
    CX CTRL VREG

    1
    C6503
    1 0R2J-2-GP
    C6504

    SC1U10V2KX-1GP
    C6505

    2
    R6502

    SCD1U10V2KX-4GP
    B SC2P50V-GP B
    2

    2
    DY
    DY

    DY
    DY

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    MINICARD(WLAN)/ITP CONN
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 65 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = Wireless

    D D

    C C

    Blanking
    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    WWAN Connector
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 66 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    Blanking
    C C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    M-SATA
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 67 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = User.Interface

    D D

    C C

    Move to power board

    B B

    for factory test

    <Variant Name>

    A A
    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    LED Bard/Power Button


    Size Document Number Rev
    Custom
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 68 of 102
    5 4 3 2 1
    5 4 3 2 1

    TOUCH PAD
    SSID = KBC 3D3V_S0
    Check the Voltage with KBC 3D3V_S0

    SC56P50V2JN-2GP
    2
    1

    1
    D RN6901 EC6901 D

    Internal KeyBoard SRN4K7J-8-GP

    2
    DY TPAD1

    Connector 8

    3
    4
    6
    5
    27 TPDATA 1 4 TP_DATA 4
    27 TPCLK 2 3 TP_CLK 3
    2
    RN6902
    SRN33J-5-GP-U 1
    26

    25
    7
    KB1
    ETY-CON24-4-GP ACES-CON6-28-GP
    20.K0422.006
    24
    23
    22
    21
    20
    19
    18
    17
    16
    15
    14
    13
    12
    11
    10
    9
    8
    7
    6
    5
    4
    3
    2

    1
    C C
    Change back to 1mm pin pitch connector
    KROW7

    KROW6
    KROW5

    KROW4

    KROW3

    KROW2
    KROW1

    KROW0 KROW[0..7] 27 Switch the pin order SA


    KCOL15
    KCOL14
    KCOL13
    KCOL12

    KCOL11
    KCOL10

    KCOL9

    KCOL8
    KCOL7
    KCOL6
    KCOL5
    KCOL4
    KCOL3

    KCOL2
    KCOL1
    KCOL0

    KCOL[0..15] 27

    MB 與 KB PIN to PIN

    1 K/B 26
    B B

    Change KB from 下下下 to 上下下


    KB Pin define need to check again

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Key Board/Touch Pad


    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 69 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    Change from 3D3V_AUX_KBC to 3D3V_AUX_S5

    3D3V_AUX_S5

    C C

    1
    C7002
    LID1
    SCD1U10V2KX-5GP APX9132HAI-TRG-GP

    2
    74.09132.C7B
    2ND = 74.05712.0BB
    1 VDD
    R7002 3
    100R2J-2-GP GND

    27 LID_CLOSE# 1 2 LID_CLOSE#_1 2 VOUT


    1

    C7001
    DY SCD047U16V2KX-1-GP
    2

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Hall Sensor
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 70 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    3D3V_S0

    1
    21,27 LPC_AD0 2
    21,27 LPC_AD1 3
    C 4 C
    21,27 LPC_AD2
    21,27 LPC_AD3 5
    21,27 LPC_FRAME# 6
    5,18,27,36,82,97 PLT_RST# 7
    8
    18 CLK_PCI_LPC 9
    10
    11
    12

    DB1
    MLX-CON10-7-GP
    20.D0183.110
    DY

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Dubug connector
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 71 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C
    (Blanking) C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 72 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    (Blanking)
    C C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 73 of 102
    5 4 3 2 1
    5 4 3 2 1

    SD/XD/MS Card Reader


    D D

    C C

    Card reader move to small board

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    CARD Reader CONN


    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 74 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = ExpressCard
    +1.5V_CARD Max. 650mA, Average 500mA.
    +3.3V_CARD Max. 1300mA, Average 1000mA
    +3.3V_CARDAUX Max. 275mA

    D D

    C C

    B B

    A <Variant Name> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    New Card
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 75 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C
    (Blanking) C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 76 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    (Blanking)

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 77 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C
    (Blanking) C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 78 of 102
    5 4 3 2 1
    5 4 3 2 1

    Note
    SSID = User.Interface - no via, trace, under the sensor (keep out area around 2mm)
    - stay away from the screw hole or metal shield soldering joints
    D
    - design PCB pad based on our sensor LGA pad size (add 0.1mm) D

    Free Fall Sensor - solder stencil opening to 90% of the PCB pad size
    - mount the sensor near the center of mass of the NB as possible as you can

    C C

    Delete G Sensor Function

    B B

    <Variant Name>

    Note Wistron Corporation


    A (1) Keep all signals are the same trace width. (included VDD, GND). 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A

    (2) No VIA under IC bottom. Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Free Fall Sensor


    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 79 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    (Blanking)
    C C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 80 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    (Blanking)

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Reserved
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 81 of 102
    5 4 3 2 1
    5 4 3 2 1

    Change the connection


    Change to 4 pin connector DCBATOUT
    PWRCN1
    SPK1
    5 9
    Q6802 5V_S5
    1 PWR1 3 FRONT_PWRLED#_Q 8
    AUD_SPK_L- 29 R1
    7 1 7
    SM30 0627 27 PWRLED
    2 1 2 27,29 KBC_PWRBTN# 6
    AUD_SPK_L+ 29 R2 CHARGE_LED#_Q
    3 AUD_SPK_R- 29 5
    DC_BATFULL#_Q

    EC8206

    EC8207

    EC8208

    EC8209

    EC8210

    EC8211

    EC8212

    EC8213
    4 2 LTC043ZUB-FS8-GP 4

    SCD1U50V3KX-GP

    SCD1U50V3KX-GP

    SCD1U50V3KX-GP

    SCD1U50V3KX-GP

    SCD1U50V3KX-GP

    SCD1U50V3KX-GP

    SCD1U50V3KX-GP

    SCD1U50V3KX-GP
    AUD_SPK_R+ 29

    1
    3 84.00043.011 STDBY_LED#_Q 3
    6 4 2nd = 84.00143.D1K FRONT_PWRLED#_Q 2
    5 3rd = 84.00143.E1K

    2
    6 1

    1
    D
    ACES-CON4-17-GP-U1 8 ED8201 ED8202 ED8203 ED8204 ED8205 D
    10

    1
    2nd = 20.F1686.004

    TVL-0402-01-AB1-GP

    TVL-0402-01-AB1-GP

    TVL-0402-01-AB1-GP

    TVL-0402-01-AB1-GP

    TVL-0402-01-AB1-GP
    ACES-CON6-40-GP
    EC8202 EC8201 EC8203 EC8204
    ACES-CON8-37-GP
    20.F1621.004 DY DY DY DY 2nd = 20.F0693.006

    MLVG0402220NV05BP-GP-U

    MLVG0402220NV05BP-GP-U
    MLVG0402220NV05BP-GP-U

    MLVG0402220NV05BP-GP-U

    2
    69.80024.011 69.80024.011

    2
    69.80024.011
    69.80024.011 20.F0818.006

    Battery LED2(DC_BATFULL)
    DY DY DY DY
    Q6806
    3 DC_BATFULL#_Q
    1 R1
    27 DC_BATFULL
    2
    R2
    LTC043ZUB-FS8-GP
    84.00043.011
    3D3V_S5 3D3V_S0 Modified power rail to 3.3V_AOAC 2nd = 84.00143.D1K
    3rd = 84.00143.E1K

    R8202
    1
    0R5J-5-GP
    2 3D3V_M_SATA
    Battery LED1(CHARGE)
    R8201 0R5J-5-GP
    1 2 MISC1
    DY 33 Q6809
    3D3V_AOAC 1 3 CHARGE_LED#_Q
    MINI1 1 R1
    27 CHARGE_LED
    15 2 2
    1 3 R2
    20 PCIE_RXN6
    4 LTC043ZUB-FS8-GP-SA
    20 PCIE_RXP6 2 19 PCIE_WAKE# 5 84.00043.011
    3 20 CLK_PCIE_WLAN_REQ# 6 2nd = 84.00143.D1K
    20 PCIE_TXN6
    4 1D5V_S0 7 3rd = 84.00143.E1K
    5 5V_S5 8
    20 PCIE_TXP6
    6 27 WIFI_RF_EN 9
    20 CLK_PCIE_WLAN# 7 5,18,27,36,71,97 PLT_RST# 10
    C
    20 CLK_PCIE_WLAN 8 11 C
    9 18 USB_PN11 12
    21 SATA_TXN1 SCD01U16V2KX-3GP 2 1 C8232 SATA_TXN1_C 10 18 USB_PP11 13
    21

    21
    SATA_TXP1

    SATA_RXP1
    SCD01U16V2KX-3GP 2

    SCD01U16V2KX-3GP 2
    1 C8233 SATA_TXP1_C

    1 C8230 SATA_RXP1_C
    11
    12
    13
    27
    27
    E51_RxD
    E51_TxD
    14
    15
    16
    Power STDBY_LED
    21 SATA_RXN1 SCD01U16V2KX-3GP 2 1 C8231 SATA_RXN1_C 14 27 BLUETOOTH_EN 17 Q6803
    16 18 3 STDBY_LED#_Q
    19 1 R1
    27 AD_IA 27 STDBY_LED
    ACES-CON14-13-GP 20 2
    27 AC_IN# R2
    27 CHG_ON# 21
    22 LTC043ZUB-FS8-GP
    27 STOP_CHG#
    27 AD_OFF 23 84.00043.011
    BI 24 2nd = 84.00143.D1K
    27 BAT_SCL 25 3rd = 84.00143.E1K
    Change PN to 20.K0637.014 27 BAT_SDA 26
    27 BAT_IN# 27
    28
    29
    30
    31
    3D3V_AUX_S5 32
    34

    ACES-CON32-GP-U

    Modified power rail to 3.3VS5

    RTC_AUX_S5
    AOAC circuit
    3D3V_S5 3D3V_AOAC
    U8201
    at least 80 mil
    at least 80 mil 1 8
    2

    GND VOUT#8
    2 7
    VIN VOUT#7
    3 6

    1
    1KR2F-3-GP VIN VOUT#6 C8221
    4 5

    1
    R8221 C8220 27 HW_RF_Kill EN# OC# EC8205

    SC4D7U10V3KX-GP
    SW1

    SCD1U10V2KX-5GP

    SCD1U10V2KX-4GP
    DY
    1

    2
    T4 T3 UP7534BRA8-20-GP

    2
    B B
    3D3V_S0
    T6 T5 1st = 74.02101.079

    T2 T1 CARD1

    EL8201 1 sm30-1
    SW-TACT-6P-GP USB_PN5_R PEN_CABLE_DET#
    18 USB_PN5 1 2 2
    USB_PP5_N PEN_SW#
    18 USB_PP5 3
    PEN_DET#
    4 3 4
    2nd = 62.40009.D51 PEN_LED#3
    5
    BI FILTER-4P-6-GP NC#5
    6
    GND
    7
    GND
    62.40009.B71 8
    GND

    ACES-CON6-19-GP-U

    2nd = 20.F1077.006
    sm30-1
    20.F1550.006

    Implement the battery reset function

    A A

    <Variant Name>

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    IO Board Connector
    Size Document Number Rev
    A2
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 82 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    <Core Design>

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    GPU_PCIE/STRAPPING(1/5)
    Size Document Number Rev
    A2
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 83 of 102

    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A
    <Core Design>

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    GPU Memory(2/5)
    Size Document Number Rev
    Custom
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 84 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    <Variant Name>

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    GPU_DP/LVDS/CRT/GPIO(3/5)
    Size Document Number Rev
    Custom
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 85 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    <Core Design>

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    GPU_POWER(4/5)
    Size Document Number Rev
    A1
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 86 of 102

    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    <Variant Name>
    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    GPU_DPPWR/GND(5/5)
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 87 of 102

    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A <Core Design> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    GPU-VRAM1,2 (1/4)
    Size Document Number Rev
    Custom
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 88 of 102

    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    <Core Design>
    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    GPU-VRAM3,4 (2/4)
    Size Document Number Rev
    Custom
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 89 of 102

    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A
    <Variant Name>

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    GPU-VRAM5,6 (3/4)
    Size Document Number Rev
    Custom
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 90 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    <Variant Name>
    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    GPU-VRAM7,8 (4/4)
    Size Document Number Rev
    Custom
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 91 of 102

    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    <Variant Name>

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    RT8208B_+VGA_CORE
    Size Document Number Rev
    Custom
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 92 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    Blanking
    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    DISCRETE VGA POWER


    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 93 of 102
    5 4 3 2 1
    5 4 3 2 1

    LVDS Channel A

    D D

    C C

    Blanking
    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    LVDS_Switch
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 94 of 102
    5 4 3 2 1
    5 4 3 2 1

    D D

    C
    Blanking C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    CRT_Switch
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 95 of 102
    5 4 3 2 1
    5 4 3 2 1

    SSID = SDIO

    D D

    C
    Blanking C

    B B

    <Variant Name>

    A
    Wistron Corporation A
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    TOUCH PANEL
    Size Document Number Rev
    A4
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 96 of 102
    5 4 3 2 1
    5 4 3 2 1

    Check test point


    3D3V_S0 1 AFTP1

    3D3V_AUX_S5 1 AFTP7

    3D3V_S5 1 AFTP8

    5V_S5 1 AFTP9
    H1 H2 H3
    D D
    HOLE237R95-GP HOLE237R95-GPHOLE237R95-GP H4 H5 H6 AFTP10
    1
    HOLE237R95-GP HOLE237R95-GP HOLE237R95-GP 19,27 PM_PW RBTN#
    5,22,36 H_CPUPW RGD 1 AFTP11

    1 AFTP12
    27,36 S5_ENABLE
    1

    1
    5,18,27,36,71,82 PLT_RST# 1 AFTP13

    1
    放放Dimm Door打
    Test Point放 打打打打打打

    TPAD14-GPTP9701
    TPAD14-GPTP9701 1 5V_AUX_S5
    HS1 HS2 HS3
    STF236R128H34-1-GP STF236R128H34-1-GPSTF236R128H34-1-GP

    C 1 C

    1
    SPR1
    1

    34.4QP10.001 34.4QP10.001 34.4QP10.001 SPRING-24-GP-U

    B B

    A <Variant Name> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    UNUSED PARTS/EMI Capacitors


    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 97 of 102
    5 4 3 2 1
    5 4 3 2 1

    (1) change U6001 to socket 62.10089.001

    (2) change SW_L1 and SW_R1 PN to 『62.40089.221』


    』
    -SA
    (3) KI.G6501.001 / IC BD82HM65 SLH9D MM#908753 B2 FCBGA 989
    KI.G6501.004 / IC BD82HM65 SLJ4P MM#914377 B3 FCBGA989P -SB
    D D

    (4)U3101 change PN to 71.08158.M02


    (5)DM2 1st -> change PN to 62.10024.G01
    (6) IMIC1 =>82.40012.001 -1
    (7) RJ1 =>22.10177.J71
    (8) CPU1 =>1st change PN to 62.10055.321
    (9) USB2 =>1st change PN to22.10218.G01 -> only Lab stage -2

    S01G ==>1st
    [Lab] S02G ==>2nd(NEC Cap)

    Coin Battery:
    C C
    1st:23.20068.001
    2nd:23.22063.001

    B B

    A <Variant Name> A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Change History
    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 98 of 102
    5 4 3 2 1
    5 4 3 2 1

    Intel-Power Up Sequence
    (AC mode) red word: KBC GPIO
    (DC mode) red word: KBC GPIO

    +RTC_VCC
    +RTC_VCC T1
    T1
    PCH_RTCRST#
    PCH_RTCRST#
    +PWR_SRC
    +PWR_SRC T2
    T2
    +3.3V_RTC_LDO
    +3.3V_RTC_LDO
    T3 KBC GPIO36 control
    S5_ENABLE KBC_PWRBTN_EC#
    Press Power button
    T4 KBC_PWRBTN_EC# GPIO3
    +5V_ALW EC_ENABLE# (GPIO51) keep low
    T5 T3
    +KBC_PWR
    +3.3V_ALW T4 KBC GPIO36 control
    T6
    S5_ENABLE
    +5VALW_PCH_VCC5REFSUS T5
    +5V_ALW
    D T6 +5V_ALW & +3.3V_ALW need meet 0.7V difference D
    +15V_ALW T7
    T8 TPS51125 to KBC GPIO46 +3.3V_ALW
    T7 +5V_ALW & +3.3V_ALW need meet 0.7V difference
    3V_5V_POK
    PCH to KBC GPI94 +5VALW_PCH_VCC5REFSUS
    SUS_PWR_DN_ACK T9
    KBC GPIO43 to PCH +15V_ALW T8
    T10 T9 TPS51125 to KBC GPIO46
    PCH_RSMRST#(EC Delay 40ms) >10ms
    T11 PCH to KBC GPIO00 3V_5V_POK
    T10 KBC GPO84 to PCH
    PCH_SUSCLK_KBC
    PM_PWRBTN#
    AC_PRESENT_EC T12 <200ms PCH to KBC GPI94
    SUS_PWR_DN_ACK T11
    KBC GPIO43 to PCH
    PCH_RSMRST# T12 >10ms
    T13 PCH to KBC GPIO01
    Press Power button PCH_SUSCLK_KBC
    AC KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3
    3V_5V_POK
    T13 KBC GPO84 to PCH DC PCH_RSMRST#
    AC PM_PWRBTN# T14

    PM_SLP_S4#
    AC PM_PWRBTN# T15
    T14 PM_SLP_S3# >30us
    T16 KBC GPO16 to LAN
    PM_LAN_ENABLE
    PM_SLP_S4# T17
    T15
    +3.3V_LAN
    PM_SLP_S3# >30us
    T16 KBC GPO16 to LAN +1.5V_SUS T18
    PM_LAN_ENABLE
    T17
    +V_DDR_REF(0.9V) T19
    +3.3V_LAN +5V_RUN & +3.3V_RUN need meet 0.7V difference
    +5V_RUN T20
    +1.5V_SUS T18
    +3.3V_RUN T21
    +V_DDR_REF(0.9V) T19 T22
    +5V_RUN & +3.3V_RUN need meet 0.7V difference
    +5VS_PCH_VCC5REF
    +5V_RUN T20
    +1.5V_RUN T23 H_PWRGD
    +3.3V_RUN T21 T25 >1ms
    T22
    +1.8V_RUN T24
    +5VS_PCH_VCC5REF KBC GPIO71 to RT8208B
    GFX_CORE_EN(Discrete only) T26
    +1.5V_RUN T23 H_PWRGD
    T25 >1ms T27
    +VGA_CORE(Discrete only)
    +1.8V_RUN T24 T28 KBC GPIO30 to APL5930
    KBC GPIO71 to RT8208B 1.0V_RUN_VGA_EN(Discrete only)
    GFX_CORE_EN(Discrete only)------Delay 5ms T26
    T29
    T27 +1.0V_RUN_VGA(Discrete only)
    +VGA_CORE(Discrete only) T30 KBC GPIO66 to APL5930
    T28 KBC GPIO30 to APL5930 1.8V_VGA_RUN_EN(Discrete only)
    1.0V_RUN_VGA_EN(Discrete only)------Delay 4ms
    T31
    C T29 +1.8V_RUN_VGA(Discrete only) C
    +1.0V_RUN_VGA(Discrete only) T32 KBC GPI95
    T30 KBC GPIO66 to APL5930 +3.3V_RUN_VGA_EN(Discrete only)-->DY reserved
    1.8V_VGA_RUN_EN(Discrete only)------Delay 5ms T33
    T31 +3.3V_RUN_VGA(Discrete only) -->Reserved for sequence
    +1.8V_RUN_VGA(Discrete only)
    T32 KBC GPI95
    +3.3V_RUN_VGA_EN(Discrete only)-->DY reserved RUNPWROK T34
    T33
    T35
    +3.3V_RUN_VGA(Discrete only) -->Reserved for sequence +1.05V_VTT
    T36 TPS51218 to KBC GPI34
    1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
    RUNPWROK T34
    T37
    T35 +0.75V_DDR_VTT
    +1.05V_VTT
    T36 TPS51218 to KBC GPI34 H_VTTPWRGD T38
    1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
    T37
    +0.75V_DDR_VTT

    H_VTTPWRGD T38
    +1.05V_VTT
    T39
    CPU to TPS51611
    GFX_VR_EN(UMA only)
    +1.05V_VTT UMA GFX CORE Power
    T39 +CPU_GFX_CORE(UMA only)
    T40
    CPU to TPS51611
    GFX_VR_EN(UMA only)
    T40 UMA GFX CORE Power
    +CPU_GFX_CORE(UMA only)
    1.5CPU_1.05VTT_PWRGD
    T41 ( >99ms )
    KBC GPO53 to ISL62883
    IMVP_VR_ON
    1.5CPU_1.05VTT_PWRGD T42
    T41 ( >99ms ) CPU CORE Power
    KBC GPO53 to ISL62883 +VCC_CORE <3ms
    IMVP_VR_ON
    T42 CLK_CPU_BCLK
    CPU CORE Power CLKIN_BCLK(from CK505) stable
    +VCC_CORE <3ms
    43 >1ms ISL62883 to CLOCKGEN
    CLK_CPU_BCLK
    CLKIN_BCLK(from CK505) stable CK_PWRGD
    >1ms
    ISL62884 to KBC GPO14
    IMVP_PWRGD
    T44
    43 >1ms ISL62883 to CLOCKGEN T45
    CK_PWRGD 1.5CPU_1.05VTT_PWRGD Delay 10ms
    ISL62884 to KBC GPO14 T46 >5ms
    T44 >1ms
    IMVP_PWRGD T45 KBC GPIO47 to PCH
    1.5CPU_1.05VTT_PWRGD Delay 10ms PM_PWROK 3ms< T47 <20ms
    T46 >5ms
    +1.5V_RUN_CPU
    T48 >1ms
    KBC GPIO47 to PCH T49 >100ns
    PM_PWROK 3ms< T47 <20ms PM_DRAM_PWRGD (for S3 Reduction)
    +1.5V_RUN_CPU
    T48 >1ms
    T49 >100ns
    H_VTTPWRGD
    PM_DRAM_PWRGD (for S3 Reduction) T50 >1ms

    B PM_PWROK B
    H_VTTPWRGD T51 >1ms
    T50 >1ms
    +VCC_CORE
    PM_PWROK 0.05ms< T52<650ms
    T51 >1ms
    H_PWRGD
    +VCC_CORE
    T53 KBC LRESET#
    0.05ms< T52<650ms PLT_RST# >1ms
    H_PWRGD
    T54 KBC GPIO45
    T53 KBC LRESET# PLTRST_DELAY#
    PLT_RST#
    T55
    >1ms
    T54 KBC GPIO45 H_CPURST#
    PLTRST_DELAY#
    T55
    H_CPURST#

    Power Sequence
    PU4601 PU4501 U4801

    PM_SLP_S4# 1D5V_S3 RUNPWROK 1D05V_S0 1.05VTT_PWRGD 0D85V_S0 0D85V_S0

    1D5V_S3
    1D05V_VTT ALL_POWER_OK
    0D75V_EN
    0D75V_S0

    PLT_RST#

    U? U? U?
    U?

    ALL_POWER_OK EC S0_PWR_GOOD PCH PM_DRAM_PWRGD AND GATE VDDPWRGOOD CPU H_CPU_SVIDCLK

    ALL_POWER_OK

    H_CPUPWRGD
    A A

    U?

    VCC_GFXCORE
    CPU_CORE
    SYS_PWROK
    VCC_CORE

    H_CPU_SVIDCLK U?

    IMVP_PWRGD AND GATE

    S0_PWR_GOOD HR PX

    Wistron Corporation
    21F, 88, Sec.1, Hs in Tai Wu Rd., Hs ichih,
    Taipei Hs ien 221, Taiwan, R.O.C.

    Title

    Power Sequence
    Size Docum ent Num ber Rev
    A0
    Hummingbird1_HR -2
    Date: Tues day, April 17, 2012 Sheet 99 of 102
    5 4 3 2 1
    5 4 3 2 1

    1D5V_VGA_S0 AO4468

    1V_VGA_S0 RT9025
    RT8208B VGA_CORE For Discrete

    D D
    DCBATOUT UP6165BQKF-1
    Adapter

    NCP6131S52MNR2G UP6128PQDD APL5916KAI


    AO4407A DDR_VREF_S3 0D75V_S0 1D5V_S3
    Charger
    BQ24745 VCC_CORE VCC_GFXCORE 1D05V_VTT 0D85V_S0
    +AD For UMA
    AO4468
    Battery

    UP6183PQAG 1D5V_S0

    For Discrete
    1D5V_DDR_S0

    C 3D3V_AUX_S5
    3D3V_S5 C
    5V_AUX_S5 5V_S5

    UP7534BRA8 UP7534BRA8 UP7534BRA8 AO4468


    SI2301CDS AO4468 RT9025

    5V_USB1_S3 5V_USB2_S3 5V_USB0_S5 5V_S0


    +KBC_PWR 3D3V_S0 3D3V_VGA_S0 1D8V_VGA_S0

    USB Power USB Power USB Charge Power For Discrete


    For Discrete
    G9091

    RT9025 G5285T11U-GP 3D3V_CARD_S0

    B
    3D3V_DAC_S0 B

    1D8V_S0 LCDVDD

    Power Shape

    Regulator LDO Switch

    HR PX
    A A

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Power Block Diagram


    Size Document Number Rev
    A3
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 100 of 102

    5 4 3 2 1
    A B C D E

    PCH SMBus Block Diagram 3D3V_S5 3D3V_S0 KBC SMBus Block Diagram
    5V_S0
    ‧ ‧
    3D3V_S0 ‧
    SRN2K2J-1-GP SRN2K2J-1-GP
    ‧
    DIMM 1 SRN10KJ-5-GP

    1 SMBCLK SMB_CLK
    ‧ ‧PCH_SMBCLK 1

    SMBDATA SMB_DATA
    ‧ ‧ PCH_SMBDATA
    SCL

    SDA
    TouchPad Conn.
    3D3V_S5
    PSDAT1 TPDATA
    ‧ TPDATA TPDATA

    SMBus Address:A0 PSCLK1 TPCLK


    ‧ TPCLK TPCLK
    2N7002SPT
    ‧ 3D3V_AUX_KBC
    SRN2K2J-8-GP

    ‧
    SML1CLK SML1_CLK
    SRN4K7J-8-GP
    SML1DATA SML1_DATA To KBC & eDP DIMM 2
    3D3V_S5 ‧PCH_SMBCLK SCL SRN100J-3-GP Battery Conn.
    SML0CLK SML0_CLK
    ‧ PCH_SMBDATA SDA
    GPIO17/SCL1 BAT_SCL BATA_SCL_1 CLK_SMB

    SML0DATA SML0_DATA GPIO22/SDA1 BAT_SDA BATA_SDA_1 DAT_SMB SMBus address:16


    ‧ SMBus Address:A4
    SRN2K2J-1-GP
    3D3V_S0 G-Sensor BQ24745
    ‧ XDP ‧PCH_SMBCLK SCLK
    KBC SCL

    SDA SMBus address:12


    PCH ‧ PCH_SMBDATA SDATA
    NPCE795
    SRN2K2J-1-GP
    UMA SMBus address:xx LCDVDD_eDP
    2 SCL 2

    SDA PCH
    SDVO_CTRLCLK PCH_HDMI_CLK Level DDC_CLK_HDMI
    ‧
    SDVO_CTRLDATA PCH_HDMI_DATA
    Shift DDC_DATA_HDMI Minicard LCDVDD_eDP
    UMA
    ‧PCH_SMBCLK
    WLAN ‧
    SRN2K2J-1-GP

    3D3V_S0
    ‧ PCH_SMBDATA
    SMB_CLK

    SMB_DATA
    eDP
    ‧ LCD_SMBCLK SCL
    SMBus address:XX
    ‧ ‧ LCD_SMBDATA SDA

    SRN2K2J-1-GP Minicard GPIO73/SCL2 SML1_CLK


    ‧ 2N7002DW-1-GP
    UMA SRN0J-6-GP
    PCH_SMBCLK
    W-WAN
    SMB_CLK
    GPIO74/SDA2 SML1_DATA
    ‧
    L_DDC_CLK LVDS_DDC_CLK_R
    PCH_SMBDATA
    L_DDC_DATA LVDS_DDC_DATA_R SMB_DATA

    UMA
    3D3V_VGA_S0
    CRT_DDC_CLK CRT_DDC_CLK

    CRT_DDC_DATA CRT_DDC_DATA
    ‧
    SRN2K2J-1-GP

    3
    DIS
    SRN0J-6-GP 3

    DDC1CLK GPU_LVDS_CLK LVDS_DDC_CLK CLK


    DDC1DATA GPU_LVDS_DATA LVDS_DDC_DATA DATA LCD CONN
    DIS SRN0J-6-GP
    DDC2CLK VGA_CRT_DDCCLK

    DDC2DATA VGA_CRT_DDCDATA

    3D3V_S0 DIS 5V_S0

    VGA ‧ ‧
    3D3V_S0
    SRN2K2J-1-GP SRN10KJ-6-GP
    UMA
    ‧
    SRN0J-6-GP UMA
    CRT_DDCCLK_CON

    CRT_DDCDATA_CON
    CRT CONN
    5V_S0
    3D3V_VGA_S0 UMA
    2N7002DW-1-GP
    ‧
    ‧
    4
    5V_S0 4
    SRN1K5J-GP
    SRN2K2J-1-GP
    DIS
    DDC2CLK GPU_HDMI_CLK DDC_CLK_HDMI
    <Variant Name>
    TSCBTD3305CPWR
    DDC2DATA GPU_HDMI_DATA DDC_DATA_HDMI
    HDMI CONN Wistron Corporation
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.
    SRN0J-6-GP
    Title

    SMBUS Block Diagram


    Size Document Number Rev
    A2
    Hummingbird1_HR -2
    DIS Date: Tuesday, April 17, 2012 Sheet 101 of 102
    A B C D E
    A B C D E

    Thermal Block Diagram Audio Block Diagram


    1 1

    SPKR_PORT_D_L-

    PAGE28 DXP P2800_DXP SPKR_PORT_D_R+ SPEAKER


    MMBT3904-3-GP
    SC2200P50V2KX-2GP

    DXN P2800_DXN
    UMA Place near CPU
    Codec
    Thermal PWM CORE
    92HD79B1
    P2800 HP1_PORT_B_L HP
    MMBT3904-3-GP HP1_PORT_B_R

    PAGE27 GPIO5 SYS_THRM TDR T8


    OUT
    2
    KBC GPIO92 CPU_THRM TDL

    OTZ THERM_SYS_SHDN#
    2N7002
    D
    PURE_HW_SHUTDOWN#
    EN 3V/5V 2

    NPCE795P S
    G
    IMVP_PWRGD PGOD
    VR
    Put under CPU(T8 HW shutdown)

    GPIO94 GPIO56
    GPIO4 VGA_THRM TDR
    PAGE28
    HP0_PORT_A_L MIC
    P2800_VGA_DXP HP0_PORT_A_R
    DXP THRMDA
    VREFOUT_A_OR_F IN
    FAN_TACH1

    SC2200P50V2KX-2GP SC2200P50V2KX-2GP
    VGA DXN
    P2800_VGA_DXN
    THRMDC
    VGA
    Thermal
    FAN1_DAC

    TACH Place near GPU(DISCRETE only).


    P2800
    FAN
    VIN
    MMBT3904-3-GP DMIC_CLK/GPIO1 Digital
    5V
    DMIC0/GPIO2
    3 MIC 3

    PH
    OTZ

    VSET VOUT
    VIN

    FAN CONTROL
    P2793 PORTC_L

    PAGE28 PORTC_R
    Analog
    VREFOUT_C MIC

    4 <Variant Name> 4

    Wistron Corporation
    21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
    Taipei Hsien 221, Taiwan, R.O.C.

    Title

    Thermal/Audio Block Diagram


    Size Document Number Rev
    Custom
    Hummingbird1_HR -2
    Date: Tuesday, April 17, 2012 Sheet 102 of 102
    A B C D E

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