Electronics Lab. Manual: June 2016

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PRINCESS SUMAYA UNIVERSITY FOR TECHNOLOGY
THE KING ABDULLAH II SCHOOL FOR ENGINEERING
ELECTRICAL ENGINEERING DEPARTMENT
ELECTRONICS LAB.
MANUAL
(EE21338)
PREPARED BY:
ENG. EYAD AL-KOUZ
JUNE 2016
PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

TABLE OF CONTENTS
Exp. No. Experiment Title:
1 The Diode:
I. Diode Characteristics.
II. Diode Circuits (Small Signal & Large Signal).
2 BJT Amplifiers:
I. Common Base Amplifier.
II. Common Collector Amplifier.
3 Common Emitter amplifier Design
4 Common Source MOSFET Transistor Amplifier
5 Op-Amp Amplifiers Design
6 Frequency Response of Common Emitter Amplifiers:
7 Multistage Amplifier:
I. Multistage Amplifier
II. Frequency Response of Multistage Amplifier.
8 Practical Exam
9 Direct Coupled Multistage Amplifier
10 Differential Amplifier.

Experiment (1):
THE DIODE
I. DIODE CHARACTERISTICS
1.I.1 REFERENCE
Sections 3.2-3.4, Electronic Devices and Circuits: The Diode as a Nonlinear Device, AC
and DC Resistance, Analysis or DC Circuits Containing Diodes.
1.I.2 OBJECTIVES
1. To become familiar with checking diodes using volt-ohm meters.
2. To investigate the forward and reverse-biased characteristics of diodes.
3. To learn how to determine the dc and ac resistance or a diode.
1.I.3 DISCUSSION
A diode is a semiconductor device that conducts current much more readily in one
direction than in the other. The voltage across the diode terminals determines whether or
not the diode will conduct. If the anode is more positive than the cathode, the diode will
conduct current and is said to be forward-biased. If the cathode is more positive than the
anode, the diode will conduct only an extremely small leakage current and is said to be
reverse-biased.
When forward-biased, the voltage drop across a typical silicon diode is about 0.7V
(germanium diodes drop about 0.3V). At forward voltages below this threshold, the diode
only permits a small current to flow. This threshold is known as the knee of the diode
characteristic curve. Since the relationship between voltage across and current through
the diode changes in this region, the diode's resistance changes. The following formula is
used to calculate the dynamic or ac resistance of the diode:
V
rD 
I
where:
ΔV: is the small change in voltage across the diode
ΔI: is the corresponding change in current through the diode
The static or dc resistance at any point along the characteristic curve is calculated using
Ohm's law:
V
RD 
I
where:
V: is the voltage across the diode
I: is the current through the diode

These relationships can be seen in the following characteristic curve diagram shown in
Figure 1.1:
Figure 1.I.1
1.I.4 PROCEDURE
1. To investigate the forward-biased characteristics of the diode, connect the
following circuit shown in Figure 1.I.2:
Figure 1.I.2.
2. Measure and record in Table 1.I.1, the diode voltage VD and the voltage VR across
the resistor for each increment of E.
3. To investigate the reverse-biased characteristics of the diode, connect the
following circuit shown in Figure 1.I.3:
4. Measure and record in Table 1.I.2 the diode voltage VD for each decrement of E.

Figure 1.I.3
1.I.5 QUESTIONS
1. Calculate and record the current values in Table 1.I.1; calculate the voltage VR
across the resistor and current values I in Table 1.I.2.
2. Using the values obtained for I and VD in Table 1.I.1, graph the forward I-V
characteristic curve of the diode. Plot I on the vertical axis and VD on the
horizontal axis.
3. Determine the static resistance of the diode at 0.1V, 0.5V, and 0.6V using the
values obtained for I and VD from Table 1.I.1.
4. Graphically determine the dynamic resistance of the diode at 0.1 V, 0.5V, and
0.6V using the I-V characteristic curve obtained in question 2.
5. Using the values obtained for I and VD from Table 1.I.2, calculate the static
resistance of the diode at -10V.
Table 1.I.1
E (Volts) VD (Volts) VR (Volts) I = VR/R
0.0
0.4
0.7
1.0
1.5
2.6

Table 1.I.2
E (Volts) VD (Volts) VR = E - VD I = VR/R

(Volts)
0.0
-6.0
-11
-16
-21
-27

Experiment (1):
THE DIODE
II. DIODE CIRCUITS
1.II.1 REFERENCE
Sections 3.5, Electronic Devices and Circuits: Analysis of Small-Signal Diode Circuits.
Section 3.6, Electronic Devices and Circuits: Analysis of large-Signal Diode Circuits.
1.II.2 OBJECTIVES
1. To determine the quiescent (Q) point of a small-signal diode circuit.
2. To analyze a small-signal diode circuit graphically and analytically.
3. To investigate the operation of half-wave rectifiers.
4. To demonstrate the function of diodes in basic logic circuits.
2.II.3 DISCUSSION
Small-signals are those whose total peak-to-peak variation is only a fraction of the dc
component. In small-signal diode circuits, the changes in current and voltage occur over a
very small portion of the characteristic curve of the diode. The diode is operated in its
forward-biased region, which is only linear above the knee or the characteristic. (In the
linear region, a small change in diode voltage yields a large change in diode current). In
order to use the linear portion of the diode's characteristic, the small-signal is added to a
dc voltage which shifts the operating region past the knee of the characteristic.
The following equation is used to find the current in a diode circuit having a series
resistance:
E  VD
I
R
where:
E: is the applied dc voltage
I: is the current through the diode
R: is the series resistance
VD: is the voltage across the diode
This is the equation of a line, commonly called the DC load line. Every possible
combination or current I and voltage VD is a point which lies on this line. The quiescent
current and voltage correspond to the point of intersection of the characteristic curve and
the load line. The name load line comes from the fact that the slope of the line is
inversely proportional to the series resistance, or load, in the circuit.

Figure 1.I.1 shows how the load line is altered when the input voltage has a small ac
component. When the ac component is zero, the diode current and voltage have their
quiescent values, IQ and VQ.
Figure 1.II.1
The ac resistance rd of the diode is the reciprocal of the slope of the characteristic at the Q
point.
V nVT 0.026
rd    ,n 1
I ID ID
where:
ΔVD: is the change in diode voltage
ΔI: is the change in diode current
The total diode current and diode voltage can be calculated analytically using the
following equations (assuming 0 .7V voltage drop across the diode):
E  0.7 A
i D (t )  I D  id (t )   sin t
R R  rd
 r 
v D (t )  0.7   d  A sin t
 R  rd 
where:
id (t): is the ac component of the diode current

A (sinωt): is the applied ac source voltage
Large-signal diode circuits are those in which the current and voltage variations occur
over a large range of the diode's characteristic, extending from the forward-biased region
into the reverse-biased region. Thus, in large-signal circuits, diode operation is not
confined to the linear region. This means that the diode resistance changes from a very
low value to a very high one. Consequently, the diode acts very much like a switch.
One or the most important applications of the diode in large-signal circuits is to perform
rectification, by which an alternating current is changed to a direct current. Thus, load
current will flow in one direction only. It is important to note, however, that the diode
will drop about 0.7V of the voltage applied to the circuit containing it. Therefore, the
applied voltage must be greater than 0.7V in order for any current to flow through the
load. A half-wave rectifier with graphs of applied voltage and resulting current is shown
in Figure 1.II.2.
Figure 1.II.2
Another important application of large signal diode circuits is that of performing digital
logic functions. Digital logic gates are circuits which perform logical functions such as
AND or OR. In the AND function, the output is true (a high voltage) only if both inputs
are true. In the OR function the output is true if either input is true. In a typical logic
circuit, an AND gate produces a 5V output only if inputs 1 and 2 are both 5V. The OR
gate produces a 5V output if either input 1 or input 2 is 5V.
1.II.4 PROCEDURE
1. Connect the following small-signal diode circuit shown in Figure 1.II.3:

Figure 1.II.3
2. To measure the quiescent values, or DC components, of the diode current and
voltage, set e(t) = 0V by replacing the generator with a short circuit to ground.
Measure and record the DC diode voltage VD and the dc resistor voltage VR. The
quiescent diode current can then be calculated using the relationship IQ = VR/R.
3. Reconnect the signal generator and set e(t) to 500mVp-p@1kHz. Using an
oscilloscope set for ac input coupling, observe and accurately sketch the ac
component of the voltage VD(t) across the diode.
4. To measure the ac voltage VR(t) across the resistor, it is necessary to interchange
the diode and the resistor as shown in Figure 2.II.4:
Figure 1.II.4
5. Using an oscilloscope set for ac input coupling, observe and accurately sketch the
ac component or the voltage VR(t) across the resistor. Having measured VR(t), the
ac component i(t) of the total diode current iD(t) can be calculated using the
V (t )
relationship i(t )  R .
R

6. To investigate the use of a diode in half-wave rectifier circuits, connect the circuit
shown in Figure 1.II.5:
Figure 1.II.5
7. With a dual-trace oscilloscope set for dc input coupling, measure the peak-to-peak
values of the input voltage e(t) and the output voltage VR(t). Sketch both
waveforms.
8. Reverse the diode terminals in Figure 1.II.5 and repeat procedure steps 2.
9. Change the input signal e(t) in Figure 1.II.5 to a 5Vp-p square wave and repeat
procedure step 2.
10. To investigate the use of diodes in simple digital logic gates, connect the
following circuit shown in Figure 1.II.6:
Figure 1.II.6
11. Measure and record the values of VO at each of the combinations of values of V1
and V2 in Table 1.II.1.
12. To investigate another useful logic gate, connect the following circuit shown in
Figure 1.II.7:

Figure 1.II.7
13. Repeat procedure step 6 for the values in Table 1.II.2 and the circuit of Figure
1.II.4.
2.II.5 QUESTIONS
1. Determine the equation for the dc load line of the circuit in Figure 1.II.2 and plot
it on the I-V characteristic. Note the quiescent point Q where the load line
intersects the characteristic curve. Compare this graphically obtained Q point with
the measured Q point from procedure step 2.
2. Using the measurements of procedure steps 2 and 5, write an expression for the
total diode current iD(t).
3. Using Figure 1.II.1 as a guideline, draw the peak (maximum and minimum) ac
load lines on the diode characteristic. Now draw the ac component of the diode
voltage VD(t) and determine the resulting current iD(t). Compare the graphically
obtained iD(t) with the results obtained analytically in question 2.
4. Using the results of procedure step 2, calculate the peak-to-peak values of the
current i(t) and sketch its waveform.
5. Repeat question 1 for the results of procedure step 3.
6. Calculate the peak-to-peak values of the current waveform i(t) in the circuit of
procedure step 4 and sketch its waveform.
7. For each set of voltages V1 and V2 in Tables 1.II.1 and 1.II.2 determine whether
each of the diodes D1 and D2 is forward or reverse-biased. Calculate VO, assuming
that each diode has a forward-biased voltage drop of 0.7V. Compare the
calculated values of VO with the measured values.
8. What digital logic function is performed by the circuit in Figure 1.II.6, and Figure
1.II.7?

Table 1.II.1
V1 (Volts) V2 (Volts) VO(Volts)
0 0
0 5
5 0
5 5
Table 1.II.2
V1 (Volts) V2 (Volts) VO(Volts)
0 0
0 5
5 0
5 5

Experiment (2):
BJT AMPLIFIERS
I. COMMON BASE AMPLIFIER
2.I.1 REFERENCE
Sections 5.1, 5.3, and 5.6, E1ectronic Devices and Circuits: Amplifier Fundamentals,
Amplifier Analysis using Small-Signal Models.
2.I.2 OBJECTIVES
1. To investigate the common base amplifier using voltage-divider bias.
2. To measure the open-circuit voltage gain, loaded voltage gain, input resistance,
and output resistance of the common base amplifier.
3. To evaluate the common base amplifier using the small-signal equivalent model.
2.I.3 DISCUSSION
Although it has a small input resistance, the common base amplifier can be used in some
applications requiring high voltage gain. As will be demonstrated in a later experiment,
the common base amplifier is also used in conjunction with FET amplifiers for high
frequency amplification.
When used as a small-signal amplifier; the input and output voltages and currents vary
over a small range of the transistor's characteristic curves. In this situation, the amplifier
is said to be operating in its linear region, i.e. the gain of the amplifier is the same for all
amplitude variations at the input and output.
Small-signal amplifiers are often analyzed using ac equivalent circuits. Figure 2.I.1
shows the small-signal ac equivalent circuit of the common base amplifier in Figure 2.I.3.
Notice that no capacitors or dc voltage sources appear in the equivalent circuit, because
they are assumed to be short-circuits to the ac signal. R1 and R2 in Figure 2.I.3 are
similarly shorted to ac ground.
The ratio of output voltage to input voltage when the amplifier is not loaded (RL= ∞, or
open) is called the open-circuit voltage gain. The open-circuit voltage gain of the
common base amplifier can be calculated using the following equation:
VO RC rc RC
AV   
Vin RE re re
where: RC: is the external collector resistor
rc: is the internal collector resistance
RE: is the external emitter resistor
0.026
re: is the internal emitter resistance: re  ,
IE
where: IE: is the dc emitter current.

Figure 2.I.1
The input resistance rin(stage) of the common base amplifier is the ac resistance looking
into the input of the amplifier stage. As can be seen in Figure 2.I.1:
rin( stage)  RE re  re
The output resistance ro(stage) of the common base amplifier is the ac resistance looking
back into the output of the amplifier stage. As can be seen in Figure 2.I.1:
rO( stage)  RC rc  RC
When a load resistor RL is connected across the output and a real signal source is
connected to the input, voltage divisions take place at both the input and output.
Therefore, the voltage gain from source to load is calculated as follows:
VL  rin ( stage)  
 AV  RL 


VS  rS  rin ( stage)  R r
  L O ( stage)


where: rS: is the internal resistance of the signal source
2.I.4 PROCEDURE
1. To measure the open-circuit voltage gain (Av), and the output resistance, rO(stage) of
a common base amplifier, connect the circuit in Figure 3.I.2. Measure the dc
voltage across RE. This value will be used to determine the bias current: IE= VE/RE,
and the internal emitter resistance: re ≈ 0.026/IE.
2. With the signal generator's frequency set to 10 kHz, and VS = 20mVp-p. Measure
and record the peak-to-peak output voltage VO (including the phase relationship
between Vin and VO). The open-circuit voltage gain AV is VO /Vin.

Figure 2.I.2
3. To measure the output resistance, ro(stage) of the common base amplifier, connect a
10kΩ potentiometer connected as a rheostat between the output coupling
capacitor and ground. Adjust this potentiometer until VO is (one-half of the
previous output). Remove the potentiometer and measure its resistance. By the
voltage divider rule, this resistance equals the output resistance of the common
base amplifier.
4. To measure the loaded voltage gain from source-to-load, VL /VS, of the common
base amplifier, connect the circuit shown in Figure 2.I.3.
Figure 2.I.3
and record the peak-to-peak output voltage VL and the phase relationship between
Vin and VL. The voltage gain from source to load is VL /VS.
6. Reconnect the circuit of Figure 2.I.3. Now increase the amplitude of the signal
source until the output voltage VL starts to distort. Measure the peak-to-peak value
of the output voltage at the point where it just starts to distort.

2.I.5 QUESTIONS
1. Using the measurements made in procedure step 1, calculate the quiescent current
IE, and the internal emitter resistance re.
2. Using the values obtained in question 1, and assuming that the internal collector
resistance is infinite, draw the small-signal ac equivalent circuit for the amplifier
of Figure 2.I.3.
3. Using the equivalent circuit from question 2, calculate the theoretical values for
AV, VL/VS, rin(stage) and rO(stage). Compare these with the measured values.
4. Explain the distortion observed in procedure step (6), Why does the output
waveform distort when the amplitude of the input is increased above a certain
value?

Experiment (2):
BJT AMPLIFIERS
II. COMMON COLLECTOR AMPLIFIER
2.II.1 REFERENCE
Sections 5.1, 5.3, and 5.6, Electronic Devices and Circuits: Amplifier Fundamentals,
Amplifier Analysis using Small-Signal Models, Improved Bias Methods for Discrete BJT
Circuits.
2.II.2 OBJECTIVES
1. To measure the open-circuit voltage gain, input resistance, and output resistance
of the common collector amplifier.
2. To evaluate the common collector amplifier using the small-signal equivalent
model.
3. To demonstrate the effectiveness of the common collector as a buffer between a
high impedance source and a low impedance load.
2.II.3 DISCUSSION
The last important small-signal amplifier configuration or the BJT is the common
collector, or emitter follower amplifier. It is extremely useful because it has very high
input resistance, high current gain, very small output resistance, and approximately unity
voltage gain. The high input resistance and low output resistance make the emitter
follower an ideal buffer between a high impedance source and a low impedance load. A
buffer is any circuit that keeps the source from being affected by a load. For example, a
common emitter amplifier with a 10kΩ output resistance could not provide very much
voltage gain to a 50Ω load resistor.
The following small-signal ac equivalent circuit that shown in Figure 2.II.1 can be used
to calculate the gain, input resistance, and output resistance of the common collector
amplifier of Figure 2.II.2. Note that the current-controlled current source in Figure 2.II.1
is pointing down, like that of the common emitter amplifier. However, the load in this
case is in parallel with the emitter resistor, so the output voltage is in phase with the input
voltage.
The open-circuit voltage gain, AV, of the emitter follower amplifier can be calculated
using the following equation (since RE is typically much larger than re, the equation can
be approximated as1):
RE
AV  1
re  RE
The input resistance, rin(stage) of the emitter follower amplifier can be calculated using the
following equation:

rin( stage)  R1 R2  (re  RE RL )
Figure 2.II.1
The output resistance, rO(stage) of the emitter follower amplifier can be calculated using the
following equation:
 R1 R2 rS 
rO ( stage)  RE  re  r
   e
 
2.II.4 PROCEDURE
1. Use Digital Multimeter (DMM) to measure the β's of the transistors.
2. To measure the open-circuit voltage gain (AV), of the common collector amplifier,
connect the following circuit shown in Figure 2.II.2:
and record the peak-to-peak output voltage VO and the phase relationship between
Vin and VO. These values can be used to calculate the open-circuit voltage gain
(AV).

Figure 2.II.2
2.II.5 QUESTIONS
1. Calculate the dc emitter current IE and the internal emitter resistance re for the
circuit of Figure 3.II.2.
2. Using the values obtained in question 1, draw the small-signal ac equivalent
circuit for the amplifier or Figure 2.II.2.
3. Using the equivalent circuit from question 2, calculate the theoretical values for
AV, rin(stage), and rO(stage).

Experiment (3):
COMMON EMITTER AMPLIFIER DESIGN

3.1 REFERENCES
1. Electronic Devices and Circuits by Salivahanan: Sections 5.1, 5.3, and 5.6.
2. Microelectronic Circuits by Sedra & Smith: Sections 4.8, and 4.10.
3.2 OBJECTIVES
1. To design a common emitter amplifier using bipolar junction transistor (BJT), and
to study the characteristics of the design amplifier.
2. To study the impact of various bypass and coupling capacitors on the overall
performance of the common emitter amplifier.
3.3 DISCUSSION
3.3.1 INTRODUCTION
The basic BJT amplifier circuit like the one shown in Figure 3.2 can be designed to
exhibit various desirable characteristics. An important decision involved in designing this
amplifier is the choice of the operating point (Q-point). This operating point refers to the
amount of DC bias current that flows through the transistor. It also refers to the resulting
DC voltage across its junctions. The Q-point of such a circuit can be placed anywhere on
the DC load line, depending on the choice of the DC equivalent circuit component values.
The location of the Q-point determines the distortion characteristics of the AC signal. By
properly locating the Q-point, the symmetrical peak-to-peak swing of the AC collector
current can be maximized. In general, the DC load line must bisect the AC load line in
order to allow the maximum amount of symmetrical swing of the collector current as well
as the maximum amount of undistorted voltage swing in the load resistor.
3.3.2 THEORY
The most important BJT small-signal configuration is the common emitter amplifier. It is
extremely useful because it has high voltage gain, high current gain, moderate input
resistance and moderate output resistance. The common emitter amplifier will be used as
the example in most general amplifier experiments in this book.
In many common emitter amplifiers, the emitter resistor is bypassed, by connecting a
capacitor in parallel with it. At high frequencies, the capacitor effectively shorts the
emitter resistor to ground, but at dc the capacitor is large impedance that does not affect
the dc biasing of the circuit. The purpose of the emitter bypass capacitor is to increase the
gain of the amplifier by eliminating ac degeneration. AC degeneration occurs when there
is a voltage present across the emitter resistor that is out of phase with the output voltage.
The small-signal ac equivalent circuit in Figure 3.1 can be used to calculate the gain,
input resistance, and output resistance of the common emitter amplifier of Figure 3.2.

The equivalent circuit does not show RE because it is assumed to be completely bypassed
(shorted to ground) by CE at the frequency of operation. Note that the current-controlled
current source in Figure 3.1 is pointing down, unlike that of the common base amplifier.
This means that the output voltage is negative with respect to the input voltage,
corresponding to a 180° phase shift. For this reason the common emitter amplifier is
referred to as an inverting amplifier.
The open-circuit voltage gain AV of the common emitter amplifier can be calculated using
the appropriate one of the following equations (the minus sign means that the common
emitter amplifier is an inverting amplifier):
rc
 RC
VO   RC
with RE bypassed: AV   
Vin re re
rc
 RC
VO   RC
with RE unbypassed: AV   
Vin re  RE RE
Figure 3.1
The input resistance rin(stage) of the common emitter amplifier can be calculated using the
appropriate one of the following equations:
with RE bypassed: rin( stage)  re R1 R2
with RE unbypassed: rin( stage)  ( (re  RE )) R1 R2
The output resistance, rO(stage) of the common emitter amplifier can be calculated using
the following equation:
r
rO ( stage)  RC c  RC


The loaded voltage gain from source-to-load VL/VS can be calcu1ated using the following
equation:
VL  rin ( stage)  
 AV  RL 


VS  rS  rin ( stage)  R r
  L O ( stage)


3.4 DESIGN WORK

3.4.1 DESIGN TOPIC
Design a Common Emitter Amplifier circuit by using four discrete resistors (R1, R2, RC
and RE), and either 2N3904 or 2N2222 NPN transistors.
3.4.2 DESIGN CONSTRAINTS

1. Assume the following constraints:
2. DC power Supply is +15 V.
3. VBE for NPN transistor = 0.7 V.
4. β for NPN transistor = 200.
5. Coupling and bypass capacitors are 10µF.
3.4.3 DESIGN SPECIFICATIONS

1. VE = 1.0 V.
2. IC = 1 mA.
3. VC = 0.68*VCC
4. Minimum open voltage gain bypassed is 100 V/V.

3.5 PROCEDURE
1. Connect the amplifier circuit you designed. Add Capacitors C1, C2, and CE each of
these capacitors is 10µF. Make sure the positive polarity of these capacitors are
connected to the higher positive voltage in the circuit.
2. Measure the DC bias voltages on the base, emitter and collector. Compare the
measured voltages with the design and calculation values. Tabulate the measured
versus the calculated bias voltages.
VB VE VC
Measured values
Design values
and record the peak-to-peak output voltage VO and the phase relationship between
Vin and VO. The open-circuit voltage gain AV is VO /Vin.
4. To measure the voltage gain from source-to-load, VL/VS of the common emitter
amplifier, connect RL = 1KΩ from output of the circuit to the ground.
and record the peak-to-peak output voltage VL and the phase relationship between
Vin and VL. The voltage gain from source to load is VL /VS.
6. Disconnect the emitter bypass capacitor CE from the circuit designed, and repeat
procedure steps 3 and 5.

Experiment (4):
COMMON-SOURCE MOSFET TRANSISTOR

AMPLIFIER
4.1 OBJECTIVE
To measure DC and AC voltages in common-source amplifier. To obtain measured
values of voltage amplification AV and frequency response.
4.2EQUIPMENT REQUIRED
4.2.1 Instruments
o Oscilloscope
o DMM
4.2.2 Components
o Transistor ( N-type MOSFET)
o Resistors: (1) 3.3kΩ, (2) 10kΩ, (1) 100KΩ and (1) 200KΩ.
o Variable Resistor (100KΩ)
o Capacitors: (3) 10µF.
4.2.3 Supplies
o Function Generator
o DC Power Supply
4.3 DISCUSSION
Three terminal devices can be used to implement a controlled source. This property
makes them suitable to be used in amplifiers. A transistor is an example of a device of
this kind. In particular, MOSFET (metal-oxide-semiconductor field-effect transistor) is a
widely used three terminal device.
The working principle of a MOSFET amplifier is controlling the current flowing through
drain terminal by setting the gate-to-source voltage. This property can be achieved by
operating the MOSFET in the saturation (active) region.
The common source is the most commonly used MOSFET amplifier. The name
“common source” comes from the fact that when the source terminal is grounded, it
becomes a common terminal for both drain and source terminals.
In order to cancel the nonlinear relationship of versus biasing techniques are used.
In this experiment voltage-divider bias technique will be implemented. In voltage divider
bias (see Figure 2.1), and can be found using Equation 1.

Equation (1)
Figure 4.1. Common-source MOSFET amplifier.
Transconductance of a transistor is an important characteristic of the transistor.

Transconductance can be explained simply as the deviation of drain current with respect
to the deviation of gate voltage. With the Equation 2 it can be seen that the
transconductance depends on the bias current ID.
Equation (2)
The gain can be calculated as:

Equation (3)
under the condition
Figure 4.2. Circuit to measure

4.4 PROCEDURE
4.4.1 Measuring
1. Connect the circuit of Figure 4.2 using the BS170 n-type MOSFET transistor. Set
your multimeter to its most sensitive range. Use the following components:
• R1 = 200KΩ
• R2 = 100KΩ pot.
• RD = 10kΩ
• RS = 3.3kΩ, Set VDD=15V.
2. Slightly change the DC voltage applied to the gate of the MOSFET from 0V by changing
the pot resistance value. Note the voltage when the current ID is nonzero.
4.4.2 DC Analysis
1. Connect the circuit of Figure 4.1 using the BS170 n-type MOSFET transistor. Use the
following resistances and capacitances (VDD=15V):
• R1 = 200KΩ
• R2 = 100KΩ
• RD = 10kΩ
• RS = 3.3kΩ
• RL = 10kΩ
• C1 = C2 = C3 = 10μF
2. Measure the DC values of VG, VS, VD, ID, VGS and VDS. Insert the results in Table 4.1.
Table 4.1: Measured Results.
BS170 VG VS VD VDS ID (mA) VGS
Measured
3. Calculate the transconductance (gm) using measured values of ID, VGS and Vt. (Hint: Use
Equation 2).
4.4.3 AC Analysis
1. Calculate the voltage gain of Figure 4.1 using Equation 3.
2. Apply 20mV p-p sinusoidal signal at 1 kHz to the circuit of Figure 4.1. Record your
measurement in Graph 2.1.
CH1: ……………, Volt/div = -----------------------------
CH2: ……………, Volt/div = -----------------------------

Graph 4.1.
3. What is the measured voltage gain?
4. Increase with 10mV steps. Try to find the level of where the output waveform
distorts. Record the waveform at this instant in Graph 4.2.
CH1: ……………, Volt/div = -----------------------------
CH2: ……………, Volt/div = -----------------------------
Graph 4.2.

Experiment (5):
OP-AMP AMPLIFIERS DESIGN

5.1 REFERENCE
1. Microelectronic Circuits by Sedra & Smith: Chapter 2.
2. Analog Electronics: Devices, Circuits, and Techniques by Williams, Gerald E,
Chapter 8. Minneapolis/St. Paul. West Publishing Company, 1996.
3. Electronic Devices and Circuits: Sections 14.1 and 14.3.
5.2 OBJECTIVES
1. To design and measure the ac characteristics of the non-inverting op amp
configuration.
2. To design and measure the ac characteristics of the inverting op-amp
configuration and to observe the 180° phase shift.
3. To design and demonstrate the use of operational amplifiers for performing
mathematical operations-summation.
5.3 DISCUSSION
The basic non-inverting op amp configuration is shown in Figure 5.1. The operational
amplifier itself, within the triangle, has a very large open loop voltage gain, a reasonably
high Rin and a fairly low RO.
These are all desirable characteristics. Resistors Rl and R2 are feedback resistors which
generally improve the amplifier's characteristics at the expensive of voltage gain. At the
same time, the voltage gain is stabilized to a particular value, which is also a desirable
characteristic.
The op amp with feedback will have characteristics determined mostly by the two
external resistors. The characteristics of the non-inverting op amp are given in Equations
5.1, 5.2 and 5.3.
Rin  .....................................Eq.5.1
RO  0......................................Eq.5.2
R2
AV  1  ...............................Eq.5.3
R1
Sometimes an additional resistor is connected from (+) to ground in order to set the input
resistance to a specific value. A very common configuration of the non-inverting op amp
is the "buffer" amplifier used to isolate stages. The buffer is made by replacing R2 in
Figure 5.1 with a short circuit, and replacing Rl with an open circuit. Equation 5.3 will
show that this will provide a voltage gain of exactly one.
Again, the characteristics are determined largely by the external biasing resistors. The
characteristics of the inverting op amp are given in Equations 5.4, 5.5 and 5.6.

Rin  R1 .......................................Eq.5.4
RO  0......................................Eq.5.5
 R2
AV  ..................................Eq.5.6
R1
When the first operational amplifiers were constructed, their primary function was to
perform mathematical operations in analog computers. These included summation,
subtraction, multiplication, division, integration, and differentiation. Figure 5.3 shows an
example of how an operational amplifier is connected to perform voltage summation. (In
this figure, an ac and a dc voltage are summed). In general:
R R 
VO   F Vin1  F Vin 2  ...etc 
 Rin1 Rin 2 
5.4 DESIGN PART

1. Design the Non-Inverting Amplifier shown in Figure 5.1. The voltage gain
needed for your design is 69V/V.
R1 R2
2. Design the Inverting Amplifier shown in Figure 5.2. The voltage gain needed for
your design is -25V/V.
R1 R2
3. Design the summer amplifier shown in Figure 5.3. The designed will be achieved
this equation:
VO = - (2.12*VS + 1*5VDC), where: VS=2Vp-p @ 1 KHz.
Rin1 Rin2 RF
5.5 PROCEDURE
5.5.1 Design the Non-Inverting Amplifier
1. Connect your designed circuit of Figure 5.1 using an 8-pin LM741 op-amp.
2. Complete the amplifier measurements required for Table 5.1. Use a generator
frequency of 1 kHz.

Figure 5.1
Table 5.1 Amplifier Measurements.

VG VOC VL Phase shift
200mVp-p
@1 KHz
5.5.2 Design the Inverting Amplifier

1. Connect your designed circuit of Figure 5.2. Using an 8-pin LM741 op-amp.
2. Complete the amplifier measurements required for Table 5.2. Use a generator
frequency of 1 kHz.
Figure 5.2

Table 5.2 Amplifier Measurements
VG VOC VO=VL Phase shift
200mVp-p
@1 KHz
5.5.3 Design the Summing Amplifier

1. Connect your designed circuit shown in Figure 5.3.
Figure 5.3
2. With VS adjusted to produce a 2Vp-p sine wave at 1 kHz, observe the output
voltage VO on an oscilloscope set to dc input coupling. Sketch the output
waveform. Be sure to note the dc level in the output.
3. Interchange the 5V dc power supply and the 2Vp-p signal generator. Repeat
procedure step 2.

Experiment (6):
FREQUENCY RESPONSE OF COMMON EMITTER

AMPLIFIER
6.1 REFERENCE
Sections 10.1-10.3, 10.6, Electronic Devices and Circuits: Definitions and Basic
Concepts, Decibels and Logarithmic Plots, Series Capacitance and Low Frequency
Response, Frequency Response or BJT Amplifiers.
6.2 OBJECTIVES
1. To measure the lower cutoff frequency of a common emitter amplifier.
2. To measure the lower cutoff frequencies due to each coupling and bypass
capacitor.
3. To measure the upper cutoff frequency of a common emitter amplifier.
4. To measure the upper cutoff frequencies due to shunt capacitances.
6.3 DISCUSSION
Since the impedance of coupling capacitors increase as frequency decreases, the voltage
gain or a BJT amplifier decreases as frequency decreases. At very low frequencies, the
capacitive reactance of the coupling capacitors may become large enough to drop some
of the input voltage or output voltage. Also, the emitter bypass capacitor may become
large enough that it no longer shorts the emitter resistor to ground.
The following equation can be used to determine the lower cutoff frequency, where the
voltage gain drops 3dB from its mid-band value (0.707 times the mid-band AV):
1
f1 (C1 ) 
2 (rin ( stage)  rS )C1
where:
f1(C1) = lower cutoff frequency due to C1
C1 = input coupling capacitance
rin(stage) = input resistance of the amplifier
rS = source resistance
1
f1 (C 2 ) 
2 (rO ( stage)  RL )C 2
where:
f1(C2) = lower cutoff frequency due to C2
C2 = output coupling capacitance
rO (stage) = output resistance of the amplifier
RL = load resistance
1
f1 (C E ) 
2 (rTH )C E

where:
f1(CE) = lower cutoff frequency due to CE
CE = emitter bypass capacitance
 R r 
rTH = Thevenin resistance parallel to the capacitor: rTH  RE  re  B S 

  
where:
RB = parallel combination of all the input bias resistors
Provided that f1(C1), f1(C2), and f1(CE) are not close in value, the actual lower cutoff
frequency is approximately equal to the largest of the three.
The capacitive reactance of a capacitor decreases as frequency increases. This fact can
lead to problems when an amplifier is used for high-frequency amplification. A transistor
has inherent shunt capacitances between each pair of its terminals. At high frequencies,
these capacitances effectively short (shunt) the ac signal voltage. Therefore, in high-
frequency amplifiers, shunt capacitance must be extremely small.
In this experiment, artificial shunt capacitors will be installed in the amplifier circuit
because it is extremely difficult to measure the actual interelectrode capacitances of the
transistor. It is equally difficult to measure stray shunt-capacitance due to the wiring of
the circuit. Since the artificial capacitors are much larger than the real capacitance already
present, the parallel combination of real capacitance and artificial capacitors is
approximately equal to the value of the artificial capacitors.
The objective is to investigate the high frequency response of the amplifier to gain insight
into the problems associated with shunt capacitance, and to obtain practice measuring the
upper cutoff frequency of an amplifier.
The upper cutoff frequency is the larger of the two frequencies where the voltage gain of
the amplifier is -3dB or 0.707 times the mid-band value (the lower cutoff frequency is the
other frequency where this occurs).
6.4 PROCEDURE
1. Use the DMM to measure the β of the transistor.
2. To measure the low frequency response of the common emitter amplifier, connect
the following circuit shown in Figure 6.1. The plus (+) signs show the polarities
or the electrolytic capacitors used in procedure- steps 5-8):
3. With VS = 50mV p-p@10kHz, measure and record VL. This value can be used to
determine the mid-band voltage gain VL/ VS.
4. Now decrease the frequency of the signal generator to each frequency in Table 6.1
measuring the value of VL at each frequency. Make sure the output voltage from
the signal generator is constant. These values will be used to plot the low
frequency response of the amplifier.
5. By making two capacitors very large, the effects of those capacitors on the lower
cutoff frequency can be made negligible. The cutoff frequency due to the third

capacitor can then be measured. With this in mind, reconnect the circuit of Figure
6.1 with the following capacitor values (observe polarities as shown in Figure 6.1):
C1= 0.1μf, C2 = 100μf, CE 100μf.
Figure 6.1
6. Making certain that VS remains at 50mVp-p, adjust the frequency of the signal
generator until the output voltage (and therefore the voltage gain) equals 0.707
times that measured in procedure step 3. The frequency where this occurs is f1(C1).
7. Repeat procedure steps 5 and 6 to determine f1(C2), using the following capacitor
values:
C1 = 100μf, C2=0.22μf, CE= 100μf
8. Repeat procedure steps 5 and 6 to determine f1(CE), using the following capacitor
values:
C1=100μf, C2=100μf, CE=4.7μf
6.5 QUESTIONS
1. Using the results obtained of step 1, of the β of the transistor. Determine re. Then
use these values to calculate the mid-band ac parameters of the circuit in Figure
6.1 ( rin(stage), rO(stage) , VL /VS).
2. Calculate the values for VL /VS at each frequency in Table 6.1. Then plot these
values on log-log graph paper. Include asymptotic lines which show the break
frequency due to each capacitor. From this graph of frequency response, obtain
the lower cutoff frequency (-3dB point) and label the graph accordingly.

3. Ca1culate f1(C1), f1(C2), and f1(CE) for the common emitter amplifier. Compare
these with the 1ower cutoff frequencies measured in procedure steps 5-8.
4. Which capacitor had the most effect on the lower cutoff frequency? Compare the
lower cutoff frequency due to this capacitor with the overall cutoff frequency
determined in Question 2. Comment and explain.
Table 6.1
Frequency VL AV=VL/VS AV(dB)
(Hz) (Vp-p) V/V =20log(AV)
50
100
200
250
500
750
900
1k
1.5k
2k
5k
7.5k
10k
20k
50k
75k
100k
250k
500k
600k
700k
750k
800k
850k
900k
950k
1M
5M
7.5M
10M
12M

Experiment (7):
PRACTICAL EXAM
IN EXPERIMENTS FROM 1 TO 6

Experiment (8):
MULTISTAGE AMPLIFIER
I. VOLTAGE GAIN
8.I.1 REFERENCE
Sections 11 .1-11.3, Electronic Devices and Circuits: Gain Relations in Multistage
Amplifiers, Methods of Coupling, RC Coupled BJT Amplifiers.
8.I.2 OBJECTIVES
1. To determine the overall voltage gain of cascaded common-emitter amplifiers.
2. To demonstrate the loading effect of cascading common-emitter amplifiers.
8.I.3 DISCUSSION
Often in electronic amplifier systems, several amplifiers are cascaded in order to furnish
adequate gain. It is easy to see that the resulting gain of two cascaded ideal amplifiers
would be the product of the individual gains. However, since voltage sources and
amplifiers have output resistance, and amplifiers and loads have input resistance, there
are voltage divisions taking place between these stages or amplification.
Figure 8.I.1 shows a two-stage amplifier. AO1 and AO2 are the open-circuit (un-loaded)
voltage gains of each stage:
Figure 8.I.1
To calculate the overall gain of the multistage amplifiers, the product of the individual
open-circuit gains of each stage is reduced by the voltage divider at the input and the
output of each stage. The following equation can be used to calculate the overall gain of a
two-stage amplifier.
VL  ri 1   ri 2   RL 
   AO1   AO 2  
VS  rS  ri1   rO1  ri 2   rO 2  RL 

8.I.4 PROCEDURE
1. Use DMM to measure the β's of two transistors.
2. To measure the open-circuit voltage gain of a single stage, connect the following
common emitter amplifier circuit shown in Figure 8.I.2.
Figure 8.I.2
3. With the signal generator set at 50mVp-p@1kHz, measure the no-load ac output
voltage VO as well as the phase shift of the output with respect to the input. This can be
used to determine the open-circuit unloaded voltage gain AO.
4. To demonstrate the effects on overall voltage gain of cascading two common emitter
amplifiers, make the following interconnection of two identical amplifiers (stages) shown
in Figure 8.I.3.
5. With the signal generator set at 50mV p-p at 1 kHz, measure the output voltage VL
across the load resistor, as well as the phase shift with respect to the input voltage VS.

Figure 8.I.3
8.I.5 QUESTIONS
1. Using the results of step 1, calculate the input resistance rin (stage), the output
resistance rO(stage), and the unloaded voltage gain (AO) of the two individual
common emitter amplifier stages. Compare the calculated voltage gain with the
actual measured voltage gain obtained in procedure step 3.
2. Using the results of question 1, calculate the overall gain from source-to-load
VL/VS. Compare the calculated gain with that measured in procedure step 5.
3. Explain the phase relationship of the output voltage VL with respect to the input
voltage VS as observed in procedure step 5.

Experiment (8):
MULTISTAGE AMPLIFIER
II. FREQUENCY RESPONSE OF MULTISTAGE AMPLIFIERS
8.II.1 REFERENCE
Sections 11.1-11.3, Electronic Devices and Circuits: Gain Relations in Multistage
Amplifiers, Methods of Coupling, RC Coupled BJT Amplifiers.
8.II.2 OBJECTIVES
1. To measure the low frequency response of a two-stage common emitter amplifier.
2. To measure the lower cutoff frequency due to each coupling capacitor of the two-
stage common emitter amplifier.
8.II.3 DISCUSSION
Whenever several amplifiers are RC coupled in order to furnish adequate gain, there will
be additional coupling capacitors affecting the lower frequency response. As was the case
with the single-stage amplifier, there is a lower cutoff frequency associated with each
coupling and bypass capacitor. The calculations for lower cutoff frequency are the same
as for the single-stage amplifier, except there are additional capacitors that must be taken
into account. In this experiment, no emitter-bypass capacitors will be used. This will
simplify the calculations for rin(stage) and VL/VS at mid-band, and it will reduce the number
of lower cutoff frequencies to be calculated.
Figure 8.II.1 shows the Thevenin equivalent of a two-stage amplifier. AO1 and AO2 are the
open-circuit (un-loaded) voltage gains of each stage. The capacitors C1, C2, and C3 are
coupling capacitors.
The following equations are used to calcu1ate the lower cutoff frequency due to each
coupling capacitor C1, C2, and C3. The lower cutoff frequency of a single-stage amplifier:
1
f1 (C1 ) 
2 (rS  ri1 )C1
1
f1 (C 2 ) 
2 (rO1  ri 2 )C 2
1
f1 (C3 ) 
2 (rO 2  RL )C3
where:
f1 (C1): is the cutoff frequency due to the input coupling capacitor.
f1 (C2): is the cutoff frequency due to the coupling capacitor
between the amplifier-stages.
f1 (C3): is the cutoff frequency due to the output coupling capacitor.

Figure 8.II.1
8.II.4 PROCEDURE
1. Use DMM to measure the β's of two transistors.
2. To measure the low frequency response of a two-stage RC coupled amplifier,
connect the following circuit shown in Figure 8.II.2 (the plus (+) signs show the
polarities of the electrolytic capacitors used in procedure steps 5-to-8):
3. With the signal generator set to 50mVp-p@15kHz, measure the ac output voltage
VL. This value can be used to determine the mid-band voltage gain from source-
to-load, VL/VS.
4. Now decrease the frequency of the signal generator until the output voltage V L is
0.707 times the level measured in procedure step 3. The frequency where this
occurs is the lower cutoff frequency of the amplifier. Make a sufficient number of
measurements from 15 kHz down to 50Hz as shown in Table 8.II.1 to use for
graphing the low frequency response of the amplifier.
5. By making two capacitors very large, the effects of those capacitors on the lower
cutoff frequency can be made negligible. The cutoff frequency due to the third
capacitor can then be measured. With this in mind, reconnect the circuit of Figure
8.II.2 with the following capacitor values (observe polarities as shown in Figure
8.II.2).
C1 = 0.1μf C2 = 100μf C3 = 100μf
6. Adjust the frequency of the signal generator until the output voltage (and
therefore the voltage gain) equals 0.707 times that measured in procedure step 3.
The frequency where this occurs is f1 (C1).
7. Repeat procedure steps 5 and 6 for f1 (C2), using the following capacitor values:
C1 = 100μf C2 = 0.0022μf C3 = 100μf
8. Repeat procedure steps 5 and 6 for f1 (C3), using the following capacitor values:
C1 = 100μF C2 = 100μF C3 = 0.01μF

Figure 8.II.2
8. II.5 QUESTIONS
1. Use the values of β to calculate the ac parameters of the amplifier (rin(stage1),
ro(stage1), rin(stage2), ro(stage2), and (VL/VS) of the entire two-stage common emitter
amplifier.
2. Calculate the value of VL/VS for each measurement made in procedure step 4. Plot
these values on log-log paper. Add asymptotic lines to this graph and show the
break frequency due to each coupling capacitor. Use the asymptotes to verify that
the gain falls off 6dB/octave after the first break, 12dB/octave after the second,
and 18dB/octave after the third.
3. Calculate the theoretical values of fl(C1), f1(C2), and f1(C3) for the two-stage
common emitter amplifier of Figure 9.II.2. Compare these with the lower cutoff
frequencies measured in procedure steps 5-8.

Table 8.II.1
Frequency (Hz) VL (Vp-p) AV=VL/VS AV (dB)
100
250
500
750
1k
5k
10k
50k
75k
100k
250k
500k
750k
1M
5M
7.5M
10M

Experiment (9):
DIRECT-COUPLED MULTISTAGE AMPLIFIERS

9.1 REFERENCE
Sections 11.1, 11.2, and 11.4, Electronic Devices and Circuits: Gain Relations in
Multistage Amplifiers, Methods of Coupling, Direct-Coupled BJT Amplifiers.
9.2 OBJECTIVES
1. To measure the open-circuit voltage gain of direct-coupled common emitter
amplifiers.
2. To measure the open-circuit voltage gain of direct-coupled complementary
common-emitter amplifiers.
3. To demonstrate the use of direct-coupled amplifiers to amplify dc.
9.3 DISCUSSION
In many applications a system must amplify either dc or a very low frequency input
voltage. For example, a measurement of outside temperature would show a nearly
sinusoidal variation with a positive peak in the early afternoon and a negative peak in the
early morning. A voltage waveform representing this variation would have a frequency of
about 11.6μHz. At a frequency this low, coupling capacitors would prevent any of the
waveform from passing through the amplifier. Therefore, direct-coupled amplifiers are
used.
The circuit shown in figure 9.1 is an example of a direct-coupled amplifier. Notice that
the dc collector voltage VC1 of the first stage is also the dc base voltage VB2 of the second
stage. Since the collector-to-base junction of an NPN transistor must be reverse-biased to
keep the collector voltage in the linear region of the output characteristics, the collector
voltage of Q2 must be more positive than the collector voltage of Q1, after several stages
of amplification, the collector voltage approaches the supply voltage and the voltage
swing of the output is limited.
To correct the problem of increasing collector voltages from one stage to the next, the
second stage can be changed to a complementary (PNP) device, as shown in
figure 8.2. Recall that the collector voltage of a PNP transistor must be more negative
than its base voltage. Therefore, the collector voltage of Q2 is less than the collector
voltage of Q1. Typically, direct-coupled amplifiers will consist of an NPN stage followed
by a PNP stage, etc.
For either the circuit in figure 9.1 or the circuit in figure 9.2, the no-load voltage gain is
calculated just as it is with RC coupled amplifiers. In this experiment, the large value of
RE2 in both circuits makes the loading effect of the second stage on the first negligible.
Therefore, the following approximation can be used for the circuits in figures 9.1 and 9.2
(the output voltage of the circuit in figure 9.2 will be inverted):

RC1 RC 2
AV 
R E1 R E 2
The following approximation can be used to calculate the loaded voltage gain VL/VS of
the circuits in figures 9.1 and 9.2:
VL  RL 
 AV  
VS  L
R  RC2 
9.4 PROCEDURE
1. To demonstrate the direct-coupled common emitter amplifier, connect the
following circuit shown in figure 9.1:
Figure 9.1
2. Adjust the variable dc power supply connected to the base of Q1 until the input
voltage, VB1, is 1.50V dc. Measure and record all quiescent voltages on both
transistors, including VC2.
3. Increase the variable dc power supply until the input voltage VB1 is 1.60V dc.
Measure and record the corresponding voltage VC2. Decrease the variable dc
power supply until the input voltage VB1 is 1.40V dc.
4. Measure and record the corresponding voltage VC2. The overall voltage gain AV
can be found from ΔVC2/ ΔVB1, where Δ means the change in.
5. Connect a 10kΩ load to the circuit in figure 9.1 between the collector of Q2 and
ground and repeat procedure steps 2 and 3. The values obtained from these
measurements can be used to calculate the loaded voltage gain VL/VS.

6. To demonstrate the complementary direct-coupled common emitter amplifier,
connect the following circuit shown in figure 9.2:
Figure 9.2
7. Repeat procedure steps 2-to-4 for the circuit of figure 9.2.
9.5 QUESTIONS
1. Calculate the theoretical quiescent values of VC1 and VC2 when VBl = 1.5V in
figure 9.1. Compare these values with those measured in procedure step 2.
2. Using the change in output voltage and the change in input voltage obtained from
procedure steps 2 and 3. Calculate the overall no-load voltage gain of the circuit
in figure 9.1. Compare this value to the theoretical no-load voltage gain AV,
described in the discussion section.
3. Using the results of procedure step 4, calculate the loaded voltage gain of the
circuit in figure 9.1. Compare this value to the theoretical loaded voltage gain,
VL/VS, described in the discussion section.
4. Repeat questions 1, 2, and 3 for the complementary direct-coupled amplifier in
figure 9.2. Be careful to note that the emitter resistor RE2, is at the top or the
figure.

Experiment (10):
DIFFERENTIAL AMPLIFIER
10.1 REFERENCE
Sections 12.2-12.4, Electronic Devices and Circuits, Differential Amplifier, Common
Mode Parameters, Practical Differential Amplifiers.
10.2 OBJECTIVES
1. To investigate the differential amplifier in the difference and common modes of
operation.
2. To determine the common mode rejection ratio (CMRR).
10.3 DISCUSSION
Operational amplifiers are the most widely used electronic devices for linear (non-digital)
applications. The input stage to an op-amp is a differential amplifier. Most differential
amplifiers are constructed as integrated circuit, but to facilitate experimentation, we will
investigate a discrete version of the same circuit.
Differential amplifiers can be operated in either of two manners: the input signals can be
different, or the input signals can be identical. If the input signals are different, the
amplifier is said to be operating in its difference mode. This means that the output voltage
will be proportional to the difference in the two input signals. If the input signals are the
same, or the inputs are tied together, the amplifier is said to be operating in its common
mode.
Figure 10.1 shows a differential amplifier with small external emitter resistors designed
to compensate for any differences in the values of re of the two transistors.
The single and double-ended difference mode gains of the ideal differential amplifier are:
VO1  RC
Single  ended  AV  
Vi1  Vi 2 re1  RE1  re 2  RE 2
VO1  VO 2  2 RC
Double  ended  AV  
Vi1  Vi 2 re1  RE1  re 2  RE 2
The differential input resistance is:
rid   (re1  RE1  re 2  RE 2 )
where:
rid: is the total ac resistance between the input terminals.
The following equations apply to operation of the differential amplifier in its common
mode when the two input signals are equal in magnitude and phase:

Figure 10.1
VO1 VO1
Single  ended  AV  
Vi1 Vi 2
VO1  VO 2 VO1  VO 2
Double  ended  AV  
Vi1 Vi 2
The most important benefit of the differential amplifier in common mode operation is the
elimination of noise that is present at both inputs. Ideally, any noise voltage that is
present at both inputs is cancelled out by the phase inversion of the two sides of the
amplifier. The common mode rejection ratio (CMRR) is a ratio of signal gain to noise
gain that is, how well the amplifier amplifies the wanted signal and cancels the unwanted
noise. The single ended. CMRR is a ratio of the single-ended difference mode voltage
gain to the single-ended common-mode voltage gain. The double-ended CMRR is a ratio
of the double-ended difference mode voltage gain to the double-ended common-mode
voltage gain. Typically, the CMRR is extremely high (75 to 100dB is not uncommon).
Ad
CMRR( dB)  20 log
Acm
where:
Ad: is the difference mode voltage gain
Acm: is the common mode voltage gain

10.4 PROCEDURE
1. To match two transistors, use DMM until two transistors are found with very
similar values of β.
2. Using the matched transistors for Q1, and Q2, connect the differential amplifier
circuit in Figure 10.2. Make sure that the two 10kΩ resistors connected to the
differential amplifier's collectors are closely matched also (no more than 5%
deviation). Also measure the maximum resistance of the potentiometer (across its
outer terminals).
Figure 10.2
3. With Vi1 and Vi2 set to 0V (grounded), connect a digital voltmeter between the
outputs VO1 and VO2 so it will read dc volts. Now adjust the 1kΩ potentiometer
until the voltmeter reads 0Vdc. This procedure is called balancing the differential
amplifier.
4. To determine the quiescent currents in the circuit, measure the dc voltage VRC
across each collector resistor and the voltage VRE across the emitter resistor of Q3.
5. Set Vi1 to 100mVp-p@1kHz and ground Vi2. Measure the ac voltage from the
center tap of the potentiometer to ground. Connect a dual-trace oscilloscope to
observe and measure the single-ended output voltages VO1 and VO2 with respect to
ground. If the oscilloscope has a difference mode setting, also measure the output
difference voltage (VO1-VO2). In each case note the phase relation with the input.

6. Set Vi2 to 100mVp-p@1kHz and ground Vil. Repeat the measurements of
procedure step 5.
7. Using a single function generator set both Vi1 and Vi2 to 2Vp-p@1kHz. Repeat the
measurements of procedure step 5. The inputs may have to be increased above
2Vp-p if the amplifier has an extremely small common mode voltage gain
because the output voltage may otherwise be too small to measure.
10.5 QUESTIONS
1. Using the dc voltage measurements made in procedure step 4, determine the
collector currents in each of the three transistors. Use these values to calculate the
internal emitter resistances re1 and re2 of Q1 and Q2, respectively.
2. Using the results of question 1, and the maximum resistance of the potentiometer
(which equals RE1+RE2), calculate the difference mode single-ended voltage gain
with Vi1 set to 100mVp-p@1kHz and Vi2 set to 0V. Also calculate the differential
voltage gain (or double-ended voltage gain) using the same inputs. Compare these
with the measured values obtained in procedure step 5.
3. Calculate the value of rid using the results of question 1 and the value for β.
4. Using the results of procedure step 7, calculate the differential common mode
gain and calculate the CMRR in dB.
5. What is the purpose of the common emitter stage which has the differential
amplifier in its collector circuit?
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Electronics Lab. Manual

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THE KING ABDULLAH II SCHOOL FOR ENGINEERING

ELECTRICAL ENGINEERING DEPARTMENT

ENG. EYAD AL-KOUZ

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

Exp. No. Experiment Title:

3 Common Emitter amplifier Design

4 Common Source MOSFET Transistor Amplifier

5 Op-Amp Amplifiers Design

6 Frequency Response of Common Emitter Amplifiers:

9 Direct Coupled Multistage Amplifier

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

E (Volts) VD (Volts) VR = E - VD I = VR/R

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

V1 (Volts) V2 (Volts) VO(Volts)

V1 (Volts) V2 (Volts) VO(Volts)

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

where: rS: is the internal resistance of the signal source

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

COMMON EMITTER AMPLIFIER DESIGN

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

with RE unbypassed: rin( stage)  ( (re  RE )) R1 R2

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

3.4 DESIGN WORK

3.4.2 DESIGN CONSTRAINTS

3.4.3 DESIGN SPECIFICATIONS

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

COMMON-SOURCE MOSFET TRANSISTOR

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

Figure 4.1. Common-source MOSFET amplifier.

Transconductance of a transistor is an important characteristic of the transistor.

The gain can be calculated as:

Figure 4.2. Circuit to measure

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

BS170 VG VS VD VDS ID (mA) VGS

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

OP-AMP AMPLIFIERS DESIGN

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

5.4 DESIGN PART

PSUT- KAIISE-Electrical Engineering Department ©Eng. Eyad J. Al-Kouz June, 2016

Table 5.1 Amplifier Measurements.

5.5.2 Design the Inverting Amplifier