ECS Transactions, 85 (7) 53-57 (2018)

10.1149/08507.0053ecst ©The Electrochemical Society

AlGaN/GaN High Electron Mobility Transistors with a p-Type GaN Cap Layer

H. C. Tsai, S. C. Fan Chiang, Y. N. Zhong, and Y. M. Hsin

Department of Electrical Engineering, National Central University, Taoyuan City 32001,

Taiwan

In this work, AlGaN/GaN HEMTs with different types of p-GaN

cap layers were fabricated and investigated. The p-GaN cap layer
used in this study was for passivation study instead of forming
enhancement-mode operation. The differences in p-GaN cap layers
were Mg-doping concentration (11019 and 31019 cm-3) and
thickness (5 and 8 nm). Device with p-GaN cap of 8-nm and Mg-
doping of 31019 cm-3 showed the lowest gate leakage current,
highest on/off current ratio (1.02×106), highest breakdown voltage
and least current collapse characteristics.

Introduction

In the past few years, GaN based materials on Si substrate are widely used for power
devices in power switching circuits and RF power amplifiers (1-2).Currently in the GaN
based power transistors, AlGaN/GaN high electron mobility transistors (HEMTs) with
high 2DEG channel concentration and high electron mobility show the low on-resistance
and high-frequency operation. Moreover, due to the wide band-gap characteristics in
GaN based materials, devices can be operated at high voltage and demonstrate good
Baliga figure of merit (3). Therefore, it is possible to replace silicon power devices with
high operation frequency (switching speed) and high power density.

However, these power devices have surface and buffer-related problems which
cause current collapse phenomenon. Publications with analysis based on the electron
trapping by surface states and epitaxial defects have been proposed (4-6). Suitable field-
plate design is necessary to reduce the high electric-field at the edge of gate electrode to
relieve the surface states issue and improve current collapse and breakdown voltage (7).
Other surface structures were investigated including in-situ SiN layer, AlN cap layer, and
LPCVD SiN layer (8-10). Although a thick p-GaN layer under gate region is usually used
to deplete the 2DEG channel under the gate for enhancement-mode operation; but p-GaN
cap devices have been reported (11-13). In this study, AlGaN/GaN HEMTs with different
p-GaN cap structures are used to replace undoped GaN cap layer and studied in the gate
leakage, breakdown voltage and dynamic on-resistance.

Device Structure and Fabrication

The epitaxial layers of AlGaN/GaN HEMTs on Si substrate were grown by MOCVD

including a ~3900-nm buffer layer, a 300-nm GaN channel layer, an 1-nm AlN spacer
layer, a 20-nm Al0.25Ga0.75N and a p-GaN cap layer. Three different p-GaN cap layers
were investigated in this study. In structure A, the Mg-doping concentration was 11019
cm-3 and thickness of p-GaN cap layer was 5-nm. In structure B, higher Mg-doping

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 ECS Transactions, 85 (7) 53-57 (2018)

concentration (31019 cm-3) but the same thickness (5-nm) of p-GaN cap was used. In
structure C, thicker p-GaN cap (8-nm) with Mg-doping concentration (31019 cm-3) was
used. To evaluate the effect of p-GaN cap layer on device performance, Schottky gate
devices with different p-GaN cap structures were fabricated simultaneously for
comparison. Before device fabricating, all samples were activated in nitrogen atmosphere
at 700°C for 15 minutes. After activation, mesa isolation was etched by ICP down to the
buffer layer. Both source and drain ohmic contacts were made by the deposition of
Ti/Al/Ni/Au (25/125/45/55 nm) metal stack and annealed at 875°C in a nitrogen
atmosphere for 40 s. Ni/Ti/Al/Ti/Au (30/25/250/25/200 nm) metal stack was used to form
Schottky gate. Finally, all devices were passivated by a 200-nm SiN deposited by plasma
enhanced chemical vapour deposition. Devices fabricated using structures A, B and C
were designated as device A, B and C, respectively. All the devices under testing had a
gate–source distance of 4 μm, a gate length of 2 μm, a gate width of 50 μm, and a gate–
drain distance of 10 μm.

Results and Discussion

The Hall measurement results in Table I shows that structure A has lowest sheet
resistance after 700°C/15 minutes activation. The values are similar to those obtained
from TLM measurement. The sheet resistances from TLM measurement were 269, 273,
and 307 /sq for the device A, B and C, respectively, after activation. Figure 1 shows the
measured output characteristics (drain current vs. drain voltage). The drain current (ID) of
device A is higher than the device B and device C at VDS = 5 V due to lower sheet
resistance and results in lowest on-resistance (RON). All devices show decreased ID at
higher VDS due to self-heating effect at high power density.

TABLE I. Characteristics of Hall measurement in structures with different p-GaN cap layers.
Structure
(Mg-doping/Thickness) Carrier Density Mobility Sheet Resistance
(cm-3/nm) (cm-2) (cm2/V-sec) (/sq)
19 13
A (110 / 5) 1.1810 1930 273.9
19 12
B (310 / 5) 9.8610 1930 328.4
C (31019 / 8) 8.621012 1950 372.1

600
Device A
Device B
500 Device C
@VGS = -6 V to 1 V
step = 1 V
400
ID(mA/mm)

300

200

100

0
0 2 4 6 8 10

VDS(V)

Figure 1. Measured ID-VDS characteristics of devices with different cap layers.

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 ECS Transactions, 85 (7) 53-57 (2018)

The measured transfer characteristics (ID-VGS) and gate leakage (IG-VGS) in Fig. 2
show the threshold voltage of three devices are -4.26 V,-4.23 V, -4.09 V, respectively,
which are determined at a drain current of 1 mA/mm. The off-state drain current is
dominated by the gate leakage current and the lowest leakage current is observed in
device C. Therefore, the highest on/off current ratio (1.02 × 106 ) is observed in device C.
Moreover, Fig. 3 shows the measured IG-VGS characteristics in Schottky gate diodes, the
turn-on voltages are 0.82, 1.02 and 1.74 V for device A, B, and C, respectively. A higher
turn-on voltage is observed in device C which could be due to thicker p-GaN cap layer.
The measured off-state breakdown characteristics of three devices at VGS = -6 V in Fig. 4
show lower leakage currents in device B and device C and thus higher breakdown
voltages are observed.
4 4
10 10
3 3
10 10
2 2
10 10
Device A-ID
1 1
10 Device B-ID 10
ID (mA/mm)

IG (mA/mm)
0 Device C-ID 0
10 10
Device A-IG
-1 -1
10 Device B-IG 10
-2
Device C-IG -2
10 @VDS = 10 V 10
-3 -3
10 10
-4 -4
10 10
-5 -5
10 10
-6 -5 -4 -3 -2 -1 0 1

VGS(V)

Figure 2. Measured ID-VGS and IG-VGS characteristics of devices with different cap layers.

0
10
-1 Device A
10 Device B
-2
10 Device C
-3 @VDS = 0 V
10
-4
10
-5
10
-6
10
IG(A)

-7
10
-8
10
-9
10
-10
10
-11
10
-12
10
-6 -4 -2 0 2

VGS(V)

Figure 3. Measured IG-VGS characteristics of Schottky gate diodes in devices with

different cap layers

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 ECS Transactions, 85 (7) 53-57 (2018)

0
10
Device A
Device B
-1 Device C
10
@LGD = 20 m
VGS = 6 V

ID(mA/mm)
-2
10

-3
10

-4
10
0 100 200 300 400 500 600

VDS(V)

Figure 4. Off-state breakdown characteristics of devices A, B, and C. (LGD = 20 µm)

In addition, pulsed IV measurement was utilized to analyze the effect of p-GaN cap
layer on current collapse from surface states. In the pulsed IV measurement, different
quiescent points with drain voltages up to 40 V were used to evaluate device
characteristics. Figure 5 shows the ratio of RON from IV curves (at VDS = 0.1V and VGS =
0V ) in various quiescent points to the value from quiescent point (VDS ,VGS) = (0 , 0). It
shows that device C clearly has the lowest RON ratio and thus least current collapse while
increasing VDS bias to 40 V. The possible reason is due to the increased turn-on voltage
in device C from thicker p-GaN cap layer. Since the gate leakage current is lowest in
device C and thus less electrons injection to the surface to form virtual gate while biasing
at higher drain voltages in the off-state conditions.

70
Device A
60 Device B
Device C
50
Ron,stress/Ron,no stress

40

30

20

10

(-6,0) (-6,10) (-6,20) (-6,30) (-6,40)

Quiescent point(VGS,VDS)(V)

Figure 5. RON ratios of three devices with different cap layers from pulsed I-V
measurement. (pulse width/period = 5 s / 1 ms).

Conclusion

AlGaN/GaN HEMTs with three different p-GaN cap layers were fabricated,
characterized, and compared. Device C with higher Mg-doping concentration and thicker

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 ECS Transactions, 85 (7) 53-57 (2018)

p-GaN cap layer demonstrated a lowest gate leakage current (off-state current), higher
on/off current ratio and higher turn-on voltage, though the drain current is slightly lower.
Based on the pulsed IV measurement, device C showed fewer problems in the current
collapse, which could be due to lower gate leakage current and less electrons injection to
the surface. The optimum combination of Mg-doping concentration and thickness in the
p-GaN cap layer is feasible to improve the surface state issue in GaN based devices.

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