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0 Specification
& UTD 1.4 Overview
June 8, 2009
SATA-IO would like to thank Finisar and
Tektronix for developing this training material!
Agenda
• Overview of SATA Revision 3.0
SATA 6Gb/s Naming Guidelines
Benefits of moving to 6Gb/s
New In SATA Revision 3.0
Additional Clarifications
Questions and Comments
• Overview of UTD 1.4
Logo Workgroup charter
Universal Test Definition (UTD) Rev.1.3
Test failure statistics
Overview of changes in UTD Rev. 1.4 to support SATA Rev. 3.0
Timeline for transition from UTD 1.3 to 1.4.
Questions and Comments
Overview of SATA Revision 3.0
• Introduces SATA 6Gb/s
Please do not use the terms “SATA 2”, “SATA III”, “SATA 3” or
“SATA 3.0.”
HDD
HDD
HBA PM
HDD
6Gb/S Link
HDD
Benefits of 6Gb/s
• Effort to eliminate storage system as bottlenecks
Asserted
Slumber
a
P ss
A
ted
c
e te
D
Ns
LIG
A
Send ALIGNs
Host/Device support for Auto Transition
Host Device
Completion Status
PMREQ_Pp / PMREQ_Sp
Host Initiated Request to Enter PM state
PMACK_p
Device To Partial
Host To Partial
New Features In SATA Revision 3.0
Normal Priority
PRIO = 00b
Isochronous – deadline
Device should complete the
based Priority ICC timer is set
request prior to the deadline
PRIO = 01b
NCQ Streaming Commands
• The host sends the time limit based on the intended
deadline for the completion of the command
• NCQ Clarifications
Agenda
Logo Working Group Charter
Universal Test Definition (UTD) Rev.1.3
Test failure statistics
Overview of changes in UTD Rev. 1.4 to support
SATA Rev. 3.0
Timeline for transition from UTD 1.3 to 1.4.
Questions and Comments
SATA-IO Logo group charter
• SATA-IO Logo: Develop and implement the policies
and procedures for the serial ATA specification
interoperability program and determine under what
conditions the SATA integrators list and the certified
SATA logo may be used by member companies.
• Currently 28 contributing companies with strong
participation from the T&M community.
• Present focus is on releasing the Unified Test
Definitions Revision 1.4 inline with the current SATA
Rev 3.0 spec.
• Always looking for more contributing members. Send
an Email to administration@sata-io.org with requests
for Logo participation.
Universal Test Definition (UTD) Rev.1.3
• Universal test definition 1.3 was completed at the end of
2008. IW#6 was the second pilot event for UTD 1.3 and
was where the final rounds of problems were resolved.
Test failure statistics (Physical)
IW#5 IW#6 Total
Test PASS FAIL PASS FAIL PASS FAIL % Pass
PHY-01a : Unit Interval - Gen 1 59 0 47 0 106 0 100%
PHY-01b : Unit Interval - Gen 2 50 0 39 0 89 0 100%
PHY-02 : Frequency Long Term Stability 47 0 38 0 85 0 100%
PHY-03 : Spread-Spectrum Modulation Frequency 15 0 9 1 24 1 96%
PHY-04a : Spread-Spectrum Modulation Max Deviation 15 0 10 0 25 0 100%
TSG-01a : Min Differential Output Voltage - Gen 1 LBP 57 0 46 2 103 2 98%
TSG-02a : Rise/Fall Time - Gen 1 rise 59 0 48 0 107 0 100%
TSG-03a : Differential Skew - Gen 1 HFTP 12 0 8 0 20 0 100%
TSG-04 : AC Common Mode Voltage 49 1 39 0 88 1 99%
TSG-05a : Rise/Fall Imbalance - HFTP TX+ r -> TX- f 48 2 30 8 78 10 89%
TSG-06a: Amplitude Imbalance - HFTP 49 1 38 1 87 2 98%
TSG-09a : Gen 1 TJ @ Connector, Clock, fBAUD/500 - HFTP 59 0 47 0 106 0 100%
TSG-10a : Gen 1 DJ at Connector, Clock, fBAUD/500 - HFTP 59 0 46 1 105 1 99%
TSG-11a : Gen 2 TJ at Connector, Clock, fBAUD/500 - HFTP 45 5 37 2 82 7 92%
TSG-12a : Gen 2 DJ at Connector, Clock, fBAUD/500 - HFTP 49 1 39 0 88 1 99%
RSG-01a: Gen1 Receive Jitter Test - 10 MHz 9 0 4 0 13 0 100%
01b: 33 MHz 9 0 4 0 13 0 100%
01c: 62 MHz 8 1 4 0 12 1 92%
01d: 5 MHz 8 1 4 0 12 1 92%
RSG-02a : Gen2 Receive Jitter Test 31 7 15 6 46 13 78%
02b: 33 MHz 32 6 16 5 48 11 81%
02c: 62 MHz 33 5 15 6 48 11 81%
02d: 5 MHz 33 5 16 5 49 10 83%
OOB-01a : OOB Signal Detection Threshold - Gen 1 ndet 24 0 12 1 36 1 97%
OOB-02 : UI During OOB Signaling 55 2 37 0 92 2 98%
OOB-03 : COMINIT/RESET and COMWAKE Transmit Burst Length 56 1 34 3 90 4 96%
OOB-04 : COMINIT/RESET Transmit Gap Length 57 0 34 3 91 3 97%
OOB-05 : COMWAKE Transmit Gap Length 54 3 34 3 88 6 94%
OOB-06a : COMWAKE Gap Detection Windows 103 det 55 3 35 1 90 4 96%
OOB-07a : COMINIT/RESET Gap Detection Windows - 306ns detect 58 0 36 1 94 1 99%
Test failure statistics (Digital)
IW#5 IW#6 Total
Test Pass Fail Pass Fail Pass Fail %Pass
GTR-01 : Software Reset 16 2 19 0 35 2 95%
GTR-02 : 3Gb/s Backwards Compatibility 11 0 15 0 26 0 100%
GTR-03 : DMA Protocol Support 16 2 18 1 34 3 92%
GTR-04 : Word 93 contents 18 0 17 2 35 2 95%
GTR-05 : Unrecognized FIS receipt 7 1.5 8.5 0.5 15.5 2 89%
NCQ-01 : Forced Unit Access 9 2 10 0 19 2 90%
NCQ-02 : Read Log Ext log page 10h support 12 0 9 0 21 0 100%
NCQ-03 : Intermix of Legacy and NCQ commands 8 3 9 0 17 3 85%
NCQ-04 : Device response to malformed NCQ command 7 4 9 0 16 4 80%
NCQ-05 : DMA Setup Auto-Activate 9 1 9 0 18 1 95%
ASR-01 : COMINIT response interval 9 0 10 0 19 0 100%
ASR-02 : COMINIT OOB interval 7 2 10 0 17 2 89%
ASR-03 : COMRESET OOB interval 4 2 6 3 10 5 67%
SSP-01 : Initialize Device Parameters 12 0 10 0 22 0 100%
SSP-02 : Read/Write Stream Error Log 2 0 0 0 2 0 100%
SSP-03 : Security Mode State 6 0 11 0 17 0 100%
SSP-04 : Set Address Max 8 0 11 0 19 0 100%
SSP-05 : Set Features – Write Cache Enable/Disable 10 0 10 0 20 0 100%
SSP-06 : Set Features – Set Transfer Mode 13 1 17 1 30 2 94%
SSP-07 : Set Features – Advanced Power Management 4 0 5 0 9 0 100%
SSP-08 : Set Features – Read Look-Ahead 10 0 10 0 20 0 100%
SSP-11 : Set Multiple Mode 12 0 12 0 24 0 100%
IPM-01 : Partial State exit latency (host-initiated) 15 1 17 1 32 2 94%
IPM-02 : Slumber State exit latency (host-initiated) 15 1 19 0 34 1 97%
IPM-03 : Speed matching upon resume (host-initiated) 15 1 19 1 34 2 94%
IPM-04 : Lack of IPM support 6 1 6 0 12 1 92%
IPM-05 : Response to PMREQ_P 12 7 14 5 26 12 68%
IPM-06 : Response to PMREQ_S 12 7 15 6 27 13 68%
IPM-07 : Device default setting for device initiated requests 9 1 8 2 17 3 85%
IPM-08 : Device Initiated Power Management Enable 8 1 12 6 20 7 74%
IPM-09 : Partial State exit latency (device-initiated) 9 4 14 1 23 5 82%
IPM-10 : Slumber State exit latency (device-initiated) 11 2 6 0 17 2 89%
IPM-11 : Speed matching upon resume (device-initiated) 12 1 14 0 26 1 96%
Overview of changes in UTD Rev. 1.4
• The Universal Test Definition is in lock-step
with the Serial ATA Revision 3.0
specification (just delayed slightly) in terms
of defining compliance test policy for the
current SATA spec version.
• The UTD 1.4 document has undergone a
great deal of refinement since UTD 1.3 and
now includes the required test additions
required to serve the 6Gb/sec applications.
• Changes equally span digital test sections to
physical layer tests.
Overview of UTD Rev. 1.4 PHY
Phy Transmit Signal Requirements SI General Requirements
TSG-01 : Differential Output Voltage SI-1:8 : Cable Characterization
TSG-02 : Rise/Fall Time SI-09 : Inter-Symbol Interference
TSG-03 : Differential Skew Phy General Requirements
TSG-04 : AC Common Mode Voltage PHY-01 : Unit Interval
TSG-05 : Rise/Fall Imbalance PHY-02 : Frequency Long Term Stability
TSG-06 : Amplitude Imbalance PHY-03 : Spread-Spectrum Modulation Frequency
TSG-07 : Gen1 (1.5Gb/s) TJ at Connector, Clock to Data, fBAUD/10 PHY-04 : Spread-Spectrum Modulation Deviation
TSG-08: Gen1 (1.5Gb/s) DJ at Connector, Clock to Data, fBAUD/10 Phy OOB Requirements
TSG-09 : Gen1 (1.5Gb/s) TJ at Connector, Clock to Data, fBAUD/500 OOB-01 : OOB Signal Detection Threshold
TSG-10 : Gen1 (1.5Gb/s) DJ at Connector, Clock to Data, fBAUD/500 OOB-02 : UI During OOB Signaling
TSG-11 : Gen2 (3Gb/s) TJ at Connector, Clock to Data, fBAUD/500 OOB-03 : COMINIT/RESET and COMWAKE Transmit Burst Length
TSG-12 : Gen2 (3Gb/s) DJ at Connector, Clock to Data, fBAUD/500 OOB-04 : COMINIT/RESET Transmit Gap Length
TSG-13: Gen3 (6Gb/s) Transmit Jitter w/wo CIC OOB-05 : COMWAKE Transmit Gap Length
TSG-14 : Gen3 (6Gb/s)TX Maximum Differential Voltage Amplitude Phy Receiver/Transmitter Channel Reqs
TSG-15 : Gen3 (6Gb/s) TX Minimum Differential Voltage Amplitude RX/TX-01 : Pair Differential Impedance
TSG-16 : Gen3 (6Gb/s) Tx AC Common Mode Voltage RX/TX-02 : Single-Ended Impedance (Obsolete)
Phy Receive Signal Requirement RX/TX-03 : Gen2 (3Gb/s) Differential Mode Return Loss
RSG-01 : Gen1 (1.5Gb/s) Receiver Jitter Tolerance Test (Normative) RX/TX-04 : Gen2 (3Gb/s) Common Mode Return Loss
RSG-02 : Gen2 (3Gb/s) Receiver Jitter Tolerance Test (Normative) RX/TX-05 : Gen2 (3Gb/s) Impedance Balance
RSG-03 : Gen3 (6Gb/s) Receiver Jitter Tolerance Test RX/TX-06 : Gen1 (1.5Gb/s) Differential Mode Return Loss
RSG-05 : Gen1 Asynchronous Receiver Stress Test at +350ppm RX/TX-07 : Gen3 (6Gb/s) Differential Mode Return Loss
RSG-06 : Gen1 Asynchronous Receiver Stress Test With SSC RX/TX-08 : Gen3 (6Gb/s) Impedance Balance
Legends:
No change from previous UTD 1.3 spec version
Revised methodology from UTD1.3 to UTD 1.4
New test definitions in UTD 1.4
Timeline for transition from UTD 1.3 to 1.4.
• All SATA test labs are currently certified at UTD
1.3.
• April 2009 IW#7 UTD dry run with key test
partners went well for first round of 6Gb/sec
product testing.
• IW#7 is the first IW event apart from April dry
run where UTD 1.4 testing will be occurring in
parallel with UTD 1.3 testing.
• IW#8 will be a UTD 1.4 only event.
• Test Labs will be certified on UTD 1.4 potentially
within months.
Review
Questions or Comments??
John.C.Calvin@Tektronix.com