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Trends in the ASIC Marketplace

Trends in the ASIC Marketplace A Third Party View of Soft Errors Source: Semico Research “Gate

A Third Party View of Soft Errors

Source: Semico Research “Gate Arrays Wane While Standard Cells Soar: ASIC Market Evolution Continues” Report: SC103-02 June 2002

Trends in the ASIC Marketplace

Trends in the ASIC Marketplace In a recent study, Semico Research identified 8 key trends in

In a recent study, Semico Research identified 8 key trends in the ASIC Marketplace:

! Trend # 1: Product Life Cycles Shrinking, Increasing Design Times

! Trend # 2: The Quality of IP is Improving

! Trend # 3: Complex Analog / Mixed Signal IP Becoming Available

! Trend # 4: Rapid Growth of Non-Recurring Engineering Charges

! Trend # 5: Increased Co-Dependency of Design Efforts

! Trend # 6: Silicon Foundries Implement SoC Initiatives

! Trend # 7: The SoC Market is Growing

! Trend # 8: Soft Error Rates A Growing Concern

Soft Errors

© 2002 Actel Confidential and Proprietary

October 2002

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Trend #8 Soft Error Rates*

Trend #8 Soft Error Rates* " “ As the feature size of semic onductors continues to

" As the feature size of semiconductors continues to decrease

they

become more susceptible to hits from Alpha particles and

thus experience increased soft error rates”

" “This trend has not been that noticeable until the industry

reached the 0.13µm process node”

" “As speed increases and silicon area and voltage decrease the performance continues to increase. Unfortunately, the System SER is increasing right along with global performance”

" “Several companies such as IBM, MoSys and iRoC Technologies are bringing the issue to the attention of designers”

* Source: Semico Research 6/02

Soft Errors

© 2002 Actel Confidential and Proprietary

October 2002

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System Soft Error Rate Trends

Soft Error Rate Trends in Very Dense & Ultra Dense Semiconductor Memory

10000 System SER 1000 100 10 1 0.25 um 0.18 um 0.13 um 0.09 um
10000
System SER
1000
100
10
1
0.25 um
0.18 um
0.13 um
0.09 um
0.05 um
System FITS (Non Linear Scale)

Soft Errors

© 2002 Actel Confidential and Proprietary

Soft Errors © 2002 Actel Confidential and Proprietary Very Dense < 0.18 µ m Ultra Dense

Very Dense < 0.18µm Ultra Dense < 0.09µm

Source: Semico Research 6/02

October 2002

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ta eRITFdeizlamroN

SER Impact by Market Segment Soft Error Rate Forecast 10000 2008 Networking Com puting Telecom
SER Impact by Market Segment
Soft Error Rate Forecast
10000
2008
Networking
Com puting
Telecom
1000
Critical Applications
(Space, Autom otive,
Smart Card)
2005
2001
100
2012
10
2003
1999
1.0
W ireless
PC Peripherals
P C
1997
Soft Error Rate Extracted from
AM D, Intel, Com paq
0.1
0.35um
0.30um
0.25um
0.20um
0.15um
0.10um
0.05um

Soft Errors

© 2002 Actel Confidential and Proprietary

Source:

iRoC Technologies Semico Research Corp June 2002

October 2002

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Soft Error Rate Summary

Soft Error Rate Summary " Soft errors are a real problem today! " SER problem getting

" Soft errors are a real problem today!

" SER problem getting worse with shrinks in geometry

" There is a growing awareness of this issue in the mainstream commercial marketplace – this is not just a “space market problem”

" The need to mitigate SER will affect designers in virtually every market segment

" Actel products offer immunity to Configuration soft errors because an SRAM element is not used to program the device configuration

Soft Errors

© 2002 Actel Confidential and Proprietary

October 2002

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