4 AMD RS780L+SB710 Block Diagram. AMD 45W - CPU AM3 - Athlon II. HyperTransport LINK AMD RS780L. HyperTransport LINK CPU I - F INTEGRATED GRAPHICS

8 7 6 5 4 3 2 1
SHEET AMD RS780L+SB710 PROJECT NAME:B305

Sheet 1 COVER PAGE Block Diagram BOARD VERSION: 1B
Sheet 2 POWER DELIVERY CHART
Sheet
Sheet
3
4
Clock MAP
RESET & POWER MAP DATE: 202 mm X 230 mm
Sheet 5 PWR Sequence and PCIRST# SO-DIMM1 DDR III 667/800/1066
AMD 45W /CPU
ICS9LPRS480AKLFT
Sheet 6 GPIO table AM3 -- Athlon II
D
Sheet 7 FAN/Screw Holes 200-PIN DDR3 SO-DIMM
941-Pin uFCPGA 941 EXTERNAL CLOCK
RJ45
D
Sheet 8 EXTERNAL CLOCK GENERATOR GENERATOR
Sheet 9 CPU HT INTERFACE SO-DIMM2 HyperTransport
OUT
IN
Sheet 10 CPU CNTL/STRAPS 1600 x 900 for 20" ;
LINK 16x16
Sheet 11 CPU MEM_A 1920 x 1080 for 21.5"

200-PIN DDR3 SO-DIMM 10/100 LAN
TV-In
Sheet 12 CPU MEM_B AMD RS780L PCI-E X1 LANE0 RTL8103EL
Sheet 13 CPU POWER/GND Panel LVDS
Scaler
Sheet 14 CPU DECOUPLING RTD2280L HyperTransport LINK CPU I/F
Sheet 15 RS780L-HT LINK0 I/F INTEGRATED GRAPHICS

USB 0
Sheet 16 RS780L-PCIE LINK I/F RGB 1 X16 PCIE I/F Mini-PCI-E
Sheet 17 RS780L-SYSTEM I/F & DDC Conn RGB Bom Option RGB
1 X4 A_LINK to SB TV-tunner
PCI-E X1 LANE1
Sheet 18 RS780L-POWER 4 X1 PCIE I/F
Sheet 19 NB 5th (Reserved) RGB

USB 1
Sheet 20 NB 6th (Reserved) ATI Cedar
Mini-PCI-E
Sheet 21 DDRIII-DIMM SLOT PCI-E X16 WiFi card
Sheet 22 MEM Terms & Deaps 512MB DDR3 LANE2
(half height)
C Sheet 23 SB710-PCIE/PCI/CPU/LPC C
Sheet 24 SB710-ACPI/GPIO/USB/AZALIA VIA

6 in 1 Reader
A_LINK
Sheet 25 SB710-SATA/IDE and IEEE 1394
Sheet 26 SB710-POWER & DECOUPLING X4 LANE3 VT6325
Sheet 27 SB710-STRAPS Side IO
Sheet 28 LVDS RTD22x0 USB 6 USB 2.0 AMD - SB710 USB 2.0 USB 3 BlueTooth
USB conn. KB/MS
Sheet 29 AUDIO CODEC ALC272 ACPI 1.1
USB 4
Sheet 30 Mini PCIE Slot USB 7 INT RTC
Camera 30Mpixel
Sheet 31 VGA Switch HW MONITOR
USB 5
Sheet 32 SATA Connector SATA (6) USB2.0 (12)
Multi-Touch
USB 8
Sheet 33 Rear USBX4 Conn
Sheet 34 Side USBx2 +RJ45 549-FCBGA
SATA1
Sheet 35 VT6325 1394/CARD READER USB 9 SATA LANE0
Sheet 36 USB device Rear IO AZALIA HD AUDIO

AZALIIA
Sheet 37 PS2 KB/MS CONN USB conn. SPI I/F LPC I/F
USB 10 LANE1
Sheet 38 AMP SATA2
Sheet 39 Fast 10/100 LAN RTL8103
S PI BU S
B
Sheet 40 HP/Mic Jack USB 11
B
Sheet 41 ITE 8758E

Sheet 42 Key_Pad/LED/PWRBTN
LPC Bus
Sheet 43 ADAPTER/PCIRST/SPI
Sheet 44 NCP1589 +12V_S0 SPI ROM
Sheet 45 RT8205A_3V&5V_EuP
Sheet 46 Run Time Power 2M/4M bytes
Sheet 47 Chipset Core Power Audio Codec
Sheet 48 DDR & Termination Power Realtek HeadPhone
Sheet 49 LDO & Other PWM ALC272
Sheet 50 VCORE_NCP5393 (1)
Sheet 51 VCORE_NCP5393 (2) MIC-IN
Sheet 52 RT8209E_1D5V_VRAM
Sheet 53 RT8208_VGA_CORE SYS FAN 1 SIO
Sheet 54 Cedar ( 1 of 5 ) PCIE ITE 8758E
Sheet 55 Cedar ( 2 of 5 ) IO AMP 3W Speaker
A Sheet 56 Cedar ( 3 of 5 ) POWER SYS FAN 2 X2 A
Sheet 57 Cedar ( 4 of 5 ) DP POWER

Sheet 58 Cedar ( 5 of 5 ) MEM/STRAP <Variant Name>
Sheet 59 VRAM Rank1 PS2 KB/MS

Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Sheet 60 VRAM Rank2 (Reserve) Hsichih, Taipei
Sheet 61 GPU POWER SEQUENCE DIAGRAM Title
Sheet 62 CTF/PPLAY Size

Block Diagram
Document Number Rev
Custom
Barbados 1B
Date: Saturday, April 24, 2010 Sheet 1 of 62
8 7 6 5 4 3 2 1
5 4 3 2 1
DC_IN
3D3V_EuP LDO 1D2V_S5
ADP_19V PWM +12V_S0
G9161 Imax=400mA
NCP1589 Imax=4A
SIO_PSON_N CPU AM3(45W)
3D3V_EuP
SIO_PSON_N
CPU VORE+CPU NB
(0.8~1.55V 34A)
D D
SI4128DY*1 3D3V_S5
SI4172DY*1 Imax=6A 5V_EuP
VDDR 1.2V 1.4A
PWM
RT8205A VCC5_USB
CPU VDDA 2.5V 110mA
SI4128DY*1 5V_S5 SLP_S4*
1.5V
SI4172DY*1 Imax=8A VDDIO 1.75A
3D3V_S0
SLP_S3* VLDT 1.2V 1.4A
Dual PWM Design
5V_S0 RS780L
VDDHT/RX 1.1V 1.2A
VDDHTTX 1.2V 0.5A
PWM NTD4809NT*1 1D1V_PWR V_1P1 VDDPCIE 1.1V 2A
RT8209A NTD4806NT*1 Imax=12.6A Imax=14A NB CORE VDDC
1P2V_PWRGD 1.1V 10A
VDDA18PCIE 1.8V 0.9A
PLLs 1.8V 0.1A
VDD18/VDD18_MEM
VRM_PWRGD 1.8V 0.01A
C
PWM SIR474DP*1 1D5V_PWR 1D5V_MEM LDO V_1D2V_PWR V_1P2 VDD_MEM 1.8V/1.5V 0.5A
C
RT8209A SIR840DP*2 Imax=20A Imax=20A APL5912 Imax=3A Imax=4.5A

SLP_S4* AVDD 3.3V 0.135A
SB710
X4 PCI-E 0.8A 1.2V(S0, S1)
V_SM_VTT
LDO ATA I/O 0.5A
0D75V_PWR / 0D75V_S3
V_VCORE_EN APL5336 ATA PLL 0.01A
Imax=1A
SIR474DP*1 V_CPU PCI-E PVDD 80mA
SIR840DP*2 Imax=34A SB CORE 0.6A
PWM CLOCK (S0, S1)
NCP5393M 2 Phase Design 1.2V S5 PW 0.22A
+MVDD 3.3V S5 PW 0.01A

SIR474DP*1 V_CPU_NB USB CORE I/O 0.2A
MVDD_EN Imax=8A
VDD_NB_EN SIR840DP*2 Imax=13A 3.3V I/O 0.45A
1 Phase Design
1D5V_S0
PWM SIR474DP*1 +VDDC SLP_S3* Imax=0.75A
B B
RT8208A SIR840DP*2 Imax=16A
VDDC_EN
3D3V_S0 LDO 1D8V(NB)

APL5930 Imax=1A
RTD2280L 3D3V_S0
PCIE x2 Mini Card Clock Generator
3D3V_S0
3D3V_S0 ICS9LPRS480AKLFT +3.3V 385mA PWRGD3V_150MS
+3.3V 3A 3D3V_S0
+12V_S0 +3.3V 0.33A
+12V 0.5A
1D5V_S0
+3.3VSB 0.375A
3D3V_S0 LDO 2D5V
RTL8103EL
APL5312 Imax=200mA
3D3V_S0
+3.3V 330mA
3D3V_S0
PWRGD3V_150MS
BIOS ROM(8Mb)
VT6325
3D3V_S0
+3.3V 67mA 3D3V_S0 3D3V_S0 LDO +1.8V_REG
+3.3V 120mA
APL5930 Imax=1.3A
8208A_PGOOD_VGA
ITE 8758E
CPU Fan System Fan
A
3D3V_S0 A
+3.3V 120mA
+12V_S0 0.5A +12V_S0 0.5A

3D3V_S0 LDO +1.0V_REG
<Variant Name>
APL5912 Imax=1.7A
+1.8V_REG Wistron Incorporated
SO-DIMM USB X2 Side USB X4 Rear USB X4 Device
DDR3 2GB V_SM Hsichih, Taipei
+1.5V 3A
VCC5_USB VCC5_USB VCC5_USB Title
V_SM_VTT POWER DELIVERY CHART
1.0A 2.0A 2.5A
+0.75V 1.2A Size Document Number Rev
C
Barbados 1B
5 4 3 2 1
5 4 3 2 1
HT REFCLK
AM3 CPU 1 PAIR CPU CLK
200MHZ 100MHz DIFF(RX780/RS780/RS880)
AM3 SOCKET
NB-OSCIN 14.318MHZ
OSCIN
AMD SB
D PCIE GPP CLK 100MHZ SB700/710 D
2 PAIR MEM CLK
AMD NB
2 PAIR MEM CLK

NB GFX PCIE CLK 100MHZ
GFX_CLK RX780/RS780/RS880
GPP_CLK
LPC CLK0
PCIE GPP CLK 100MHZ PCIE_RCLK/ SPI BIOS
NB_LNK_CLK 33MHZ
PCIE GFX CLK
100MHZ CEDAR PCI CLK3
EXTERNAL DEBUG POST
SLT_GFX_CLK 33MHZ
PCIE GPP CLK
CLK GEN. 100MHZ VT6325 CPU_HT_CLK
NB_HT_CLK
DIMM1 DIMM2 PCIE GPP CLK
MINI-PCI-E SLot 1 NB_DISP_CLK
100MHZ
GPP_CLK0
PCIE GPP CLK
100MHZ MINI-PCI-E SLot 2 GPP_CLK1
C C
PCIE GPP CLK GPP_CLK2
PCIE 10/100
100MHZ GPP_CLK3 SB_BITCLK
HD AUDIO CON
48MHZ
25MHZ OSC INPUT
SB-OSCIN 14.318MHZ
25M_48M_66M_OSC
USB CLK
USB_CLK
48MHZ
SATA
25MHz
32.768KHz
14.31818MHz
B B
SUPER IO
<Variant Name>
A A
Hsichih, Taipei
Title
CLOCK MAP
Size Document Number Rev
Custom
Barbados 1B
5 4 3 2 1
8 7 6 5 4 3 2 1
SIO_EUP_EN
5V_EuP &
5V_EuP 5-6 200 mS
MOS LDO 1D2V_S5
RT8205A 5V_S5 & 3D3V_EuP
Adapter 1 3D3V_S5
VIN
3D3V_S0 15
19.5V EN
MOS 13 5V_S0 & LDO 2D5V VCORE_EN
12V_PGOOD 3D3V_S0
14
D RT8209A LDO 1D8V D
VIN PGOOD 18 SB_PWRGD

V_1P2_PWRGD
EN V_1P1 5
3D3V_EuP 4 RSMRST#(45)
6
NCP1589 3VSB(2) PWRON#(33)
VIN PGOOD 12 3D3V_S5

SYS_3VSB(31) SIO
12V_PGOOD
SIO_PSON_N 11 EN ITE8758E
+12V_S0 PCIRST_OUT1#/GP11(97)
RT8105 POWER PCIRST_OUT2#/GP12(96)
VIN
PGOOD
ATI NB - RS780L BUTTON PCIRST_OUT3#/GP13(95)
SLP_S4* 10 2 PANSHW#(35) 5VSB_CTRL(8) 3

EN 1D5V_MEM 22 SYSRESET#(D8)
19 POWERGOOD(A10)
21
NCP1589
LDTSTOP#(C10)
7 SLP_S5#(37)
C VIN PGOOD
16 VRM_PWRGD
8 SLP_S3#(32) PSON#(36) 11SIO_PSON_N C
VCORE_EN 15 PWRGD_3V(34)
EN
V_CPU &
V_CPU_NB 13 3D3V_S0
AMD AM3 CPU PCI_RESET#(25) ATXPG (54)
RT8105 21 LDTSTOP_L(D8)
1D5V_MEM PGOOD 17 V_1P2_PWRGD
23 RESET_L(C7)
VIN 20 PWROK(C9)
VRM_PWRGD
EN V_1P2
B
ATI SB - SB710 22 PERST# B
PCIEX16 CEDAR
19 NB_PWRGD(B2) LDT_STP#(G25) 21
SB_PWRGD
18 PWR_GOOD(H1) LDT_RST#(G24) 23 22 PERST#
MINI PCI-E
CPU_PG(F22) 20
Battery 0 BAT(E1)
SLP_S5#(G1) 7 SLP_S5* 14A RCTRST#(10)
SLP_S4#(XX) 8 SLP_S4*
5 RSMRST#(D3) SLP_S3#(F5) 9 SLP_S3* 10/100
A_RST#(N2) 22 FAST LAN
SYS_RESET#(J2)
RTL8103L
6 PWR_BTN#(H2)
AZ_RST#(M4) RESET#(11)
AUDIO CODEC
AZALIA ALC272
A A
<Variant Name>
RESET/POWER GOOD MAP

Hsichih, Taipei
Title
RESET & POWER MAP
Custom
Barbados 1B
8 7 6 5 4 3 2 1
5 4 3 2 1
Solution 2
5V_S0 3D3V_S0
01/26 1
R875
2
33R2J-2-GP
RSMRST
V_1P1
NB&SB POWER GOOD
2
3D3V_EuP
R298
Solution 1
2
4K7R2J-2-GP
R276
01/26
2
10KR2J-3-GP
1
1
R291
R306 0R0402-PAD
1
6K8R2J-GP U21 (R)
V_VCC_SB_PG_N V_VCC_SB_PGD 1
B
1
D 5 V_PWRGD D
VCC
2
VRM_PWRGD 2 R283
A 4 SB_PWRGD_R 1 2 SB_PWRGD
D
Y
3
3 33R2J-2-GP
GND
1
V_VCC_SB_PG 1 Q38 Q35 (R)
BSS138-7F-GP 74LVC1G08GW-1-GP C268
Del Discrete RSMRST circuit
G
PMBS3904-1-GP
SC470P50V3JN-2GP
2
1
R301
2009/12/29
S
68KR2J-GP C282
SC1U10V2KX-1-LL-GP
2 AC IN
V_5SB / V_3SB /
V_1P2SB
V_5DIMM
VRM_PWRGD
49,50 VRM_PWRGD
V_1P5 SLP_S4* + DUAL_V
SB_PWRGD
24,50,61 SB_PWRGD
V_3P3 / V_12 / V_5
C
SLP_S3* + PWRGD_PS C
V_2P5 / V_1P8
V_3P3
V_CPU / V_CPU_NB
V_VCORE_EN
V_1P2
VRM_PWRGD
1P2V_PWRGD
PWRGD_PS AND
V_1P1 SB_PWRGD
V_1P2 AND
V_VCORE_EN
+ PWRGD_PS
B B
A A
<Variant Name>
Hsichih, Taipei
Title
PWR Sequence and PCIRST#
Custom
Barbados 1B
5 4 3 2 Date: Saturday, April 24,

1 2010 Sheet 5 of 62
8 7 6 5 4 3 2 1
SB700 GPI/O
GPIO Table
PIN POWER Default Enable
PIN# USAGE Type NOTES
D
NAME WELL Type Setting D
USB_OC0#/GPM0# RESUME OC*01 GPI VCC3_3SB LOW
USB_OC5#/DDR3_RST#/GPM5# RESUME OC*45 GPI VCC3_3SB LOW
USB_OC6#/GEVENT6# RESUME OC*6 GPI VCC3_3SB LOW
USB_OC7#/GEVENT7# RESUME NO USE GPI VCC3_3SB LOW
USB_OC8#/AZ_DOCK_RST#/GPM8# RESUME NO USE GPI VCC3_3SB High
USB_OC9#/SLP_S2#/GPM9# RESUME NO USE GPI VCC3_3SB
EXTEVENT0# RESUME A20GATE ----- VCC3_3SB -----
EXTEGEVENT1# MAIN KBRST* ----- 3.3V(5V -----
Tolerance)
GEVENT2# RESUME CPU_THERMTRIP# ----- VCC3_3SB -----
GEVENT3# RESUME LPC_PME* ----- VCC3_3SB -----
GEVENT4# RESUME NO USE ----- VCC3_3SB -----
GEVENT5# RESUME S3_STATE ----- VCC3_3SB -----
BLINK/GPM6# RESUME NO USE GPI VCC3_3SB LOW GPM
GPM7# RESUME FP_RESET* ----- VCC3_3SB -----
GEVENT8# RESUME WOL ----- VCC3_3SB -----
SCL0/GPOC0# MAIN SMBCLK 3.3V(5V -----
Tolerance)
SDA0/GPOC1# MAIN SMBDATA 3.3V(5V -----
C Tolerance) C
SCL1/GPOC2# RESUME ALERT_CLK VCC3_3SB -----
SDA1/GPOC3# ALERT_DATA VCC3_3SB -----
IMG_GPIO13 E20 CPU_SIC

IMG_GPIO14 E21 CPU_SID
IMG_GPIO16 D19 IMC_GPIO16
IMG_GPIO17 E18 IMC_GPIO17
SMBUS TABLE
SOURCE SIGNAL NAME LINKED DEVICES
NB
NB DACSCL0/DACSDA0
DACSCL1/DACSDA1
SB
SB SCLK0/SDATA0
SCLK1/SDATA1
B
Board ID GPIO50 B
MXM
SUPER I/O: ITE 8758E
1
UMA 0
SB
A A
<Variant Nam e>
Hsichih, Taipei
Title
GPIO Table
Size Docum ent Num ber Rev
Cus tom
Barbados 1B
8 7 6 5 4 3 2 1
CPU FAN ONLY FOR 4 PIN FAN CONTROL
CPU_FAN_CTRL
41 CPU_FAN_CTRL
CPU_FAN_TACH
41 CPU_FAN_TACH
Delete 3PIN CTRL Schematic
11/06
5V_S0 3D3V_S0
11/13
11/03
SYSTEM FAN 11/13
41 REAR_FAN_CTRL
REAR_FAN_CTRL Check Footprint
K
2
2
REAR_FAN_TACH
41 REAR_FAN_TACH
R319 R327 D7
2K2R2J-2-GP 2K2R2J-2-GP 1N4148W-1-GP
(R)
A
5V_S0
CPU_FAN_CTRL R328 1 2 CPU_FAN_CTRL_R
100R2J-2-GP
11/03
21.61168.104
3D3V_S0
GPU_FAN1
4 JWT-CON4-S17-GP
3
1
2
1
C310 (R) C309 CPU_FAN_CTRL_R 1 R342
SC10U10V5ZY -1GP SC10U10V5ZY -1GP 4K7R2J-2-GP
2
D8
CPU_FAN_TACH_1 K A CPU_FAN_TACH
1N4148W-1-GP
5V_S0 3D3V_S0
2nd FAN 11/03 Delete 3PIN CTRL Schematic

11/13
11/13
1
Check Footprint
K
2
R296
R287 2K2R2J-2-GP D6
2K2R2J-2-GP 1N4148W-1-GP
(R)
2
1
A
REAR_FAN_CTRL R293 1 2 REAR_FAN_CTRL_R
100R2J-2-GP 2/08 Rannie
5V_S0 11/03
SY S_FAN1
1 3D3V_S0
2
3 JWT-CON4-S6-GP
1
REAR_FAN_CTRL_R 4 (21.61323.104)
R270
4K7R2J-2-GP
1
C969 TC14
2
SC10U10V5ZY -1-LL-GP E100U25VM-6-GPU
D5
(R)
2
09.10712.M8L REAR_FAN_TACH_1 K A REAR_FAN_TACH
1N4148W-1-GP
Near SIO
CPU MOUNTING HOLE-PTH GPU MOUNTING HOLE-NPTH SB MOUNTING HOLE-PTH MINI PCIE 1 MOUNTING HOLE-PTH MINI PCIE 1 MOUNTING HOLE-PTH
H20 H21 H17 H18 H14 H13 H12
HOLE HOLE HOLE HOLE HOLE HOLE HOLE
(R)
Default
1
1
H18 H12 H21 H11
H14 H16 H20
H17 H13 H22 H15
PCB MOUNTING HOLES-PTH
H5 H6 H7 H8 H9 H23 H24 H10

3
4 4 4 4 4 4 4 4
1 1 1 1 1 1 1 1
5 8 5 8 5 8 5 8 5 8 5 8 5 8 5 8
6
GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A
<Variant Name>
Wis tron Incorporate d

Hsichih, Taipei
Title
FAN/LED
D
Barbados 1B
Date: Saturday , April 24, 2010 Sheet 7 of 62
5 4 3 2 1
D D
11/04
11/04
3D3V_S0
L79
3D3V_CLK_VDD 3.3V 500mA + 50mA 3D3V_S0
L23 Due to PLL issue on current clock chip, the SBlink clock
1 2 1 2 3D3V_48MPWR_S0 need to come from SRC clocks for RS740 and RS780.
CPU CLK HCB1608KF-181-GP
SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP
Future clock chip revision will fix this.
1
(68.00206.041) C317 C314 C335
HCB1608KF-181-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
CPUCLK C322 C875 C338 C315 C340 C337 C325 C319 SC2D2U6D3V3MX-1-GP
600 Ω @ 100 MHz
10 CPUCLK
CPUCLK# (68.00206.041)
10 CPUCLK#
2
Clock chip has internal serial terminations
SCD1U10V2KX-4-LL-GPSCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP
for differencial pairs, external resistors are 3D3V_S0
reserved for debug purpose.
11/04
11/11
2
PCIEx16 CLK 3D3V_S0
L78
3D3V_CLK_VDDIO
1 2
C PCIE_REFCLKP HCB1608KF-181-GP
2/08 Rannie R766
10KR2J-3-GP
R769
10KR2J-3-GP C
54 PCIE_REFCLKP
2
C899 1 2 SC8P250V2CC-GP
SC10U6D3V3MX-LL-GP
SC10U6D3V3MX-LL-GP
PCIE_REFCLKN (68.00206.041) C900 C870 C871 C901 C872 C339 C326 C874 (R) (R)
54 PCIE_REFCLKN
1
2
2
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
3D3V_CLK_VDD
2
R794 R796
1
U48 0R2-PT5-LILY-GP 10MR2J-L-GP X7
May use one 22uF instead? 3D3V_CLK_VDDIO (R) X-14D31818M-37GP CLKREQ1#
26 61 GEN_XTAL_IN CLKREQ2#
VDDATIG X1
1
25 62 GEN_XTAL_OUT C907 1 2 SC8P250V2CC-GP
VDDATIG_IO X2
CL=20pF±0.2pF
48
NB CLOCK INPUT TABLE 11/11 47 VDDCPU
VDDCPU_IO SMBCLK
2
3
CLK_SMBCLK R799 1
1
2 0R2-PT5-LILY-GP
2 0R2-PT5-LILY-GP
SMBCLK
NB CLOCKS RS780 CLK_SMBDAT R805 SMBDATA
SMBDAT
HT_REFCLKP
16
17 VDDSRC
VDDSRC_IO
12/29 For NB GFX
100M DIFF 3D3V_CLK_VDD 11 30 KG_NBGFX_CLKP_R R774 1 2 0R2-PT5-LILY-GP KG_NBGFX_CLKP
L22 VDDSRC_IO ATIG0T_LPRS 29 1 2
HT_REFCLKN 100M DIFF
1 2
3.3V 50mA 35 ATIG0C_LPRS 28
KG_NBGFX_CLKN_R
KG_GFX_CLKP_R
R777
R779 1 2
0R2-PT5-LILY-GP
0R2-PT5-LILY-GP
KG_NBGFX_CLKN
PCIE_REFCLKP
34 VDDSB_SRC ATIG1T_LPRS 27 KG_GFX_CLKN_R 1 2 PCIE_REFCLKN
LAN CLK REFCLK_P HCB1608KF-181-GP
VDDSB_SRC_IO ATIG1C_LPRS
R784 0R2-PT5-LILY-GP
For PCIEx16
1
14M SE (1.1V) (68.00206.041)
40
39 KG_GFX_CLKP
KG_GFX_CLKP
REFCLK_N vref
11/06 SC1U10V2KX-1-LL-GP C331
4 VDDSATA
VDD CLKREQ0#
23 CLKREQ0#
TP116 TPAD28
02/08 rannie
11/03
2
55 45 R767 1 2 0R2J-2-GP (R)
39 KG_GFX_CLKN
KG_GFX_CLKN GFX_REFCLK* 100M DIFF
Ryan suggest VDD_REF 56 VDDHTT
VDDREF
CLKREQ1#
CLKREQ2#
44
CLKREQ1#
CLKREQ2# R768 1 2 0R2J-2-GP (R)
MINI1_CLKREQ#
MINI2_CLKREQ#
CLKREQ# Internal
GPP_REFCLK 100M DIFF(OUT) 3D3V_48MPWR_S0 63
VDD48 CLKREQ3#
39
38
CLKREQ3#
CLKREQ4#
TP115 TPAD28 pull high
CLKREQ4# TP114 TPAD28
GPPSB_REFCLK 100M DIFF 3D3V_CLK_VDD
R775 2 1 10KR2J-3-GP PD# 51
NB HCLK PD#
CPUKG0T_LPRS
50
R771 (R) 261R2F-GP
CPUCLK
* the GFX_REFCLK input is required for all cases
1 2 22 CPUKG0C_LPRS
49
R795 2 1 10R2F-L-GP
CPUCLK#
11/14
17 KG_NBHT_CLKP
17 KG_NBHT_CLKN
KG_NBHT_CLKP
KG_NBHT_CLKN 11/03 Modify KG_NBREF_CLKP
KG_NBREF_CLKN
CLK_PCIE_MINI1
R787
R791 1
1
2
2
0R2-PT5-LILY-GP
0R2-PT5-LILY-GP
KG_NBREF_CLKP_R
KG_NBREF_CLKN_R
KG_PCIE1_CLKP_R
21
20
SRC0T_LPRS
SRC0C_LPRS 48MHZ_0
64 CLK_48 R798 2 1 10R2F-L-GP
SIO_CLK48
KG_CLK_48M_USB
SRC1T_LPRS
1
CLK_PCIE_MINI1# R793 1 2 0R2-PT5-LILY-GP KG_PCIE1_CLKN_R 19 2 1 EC3
CLK_PCIE_MINI2 1 2 KG_PCIE2_CLKP_R 15 SRC1C_LPRS 59 REF0
NB Ref CLK R808
1 2
0R2-PT5-LILY-GP
14 SRC2T_LPRS REF0/SEL_HTT66 58
SC4D7P50V2CN-1GP C876 C886
SC2P50V2CN-GP
SC2P50V2CN-GP
CLK_PCIE_MINI2# R804 0R2-PT5-LILY-GP KG_PCIE2_CLKN_R REF1 (R) (R)
SRC2C_LPRS REF1/SEL_SATA (R)
2
CLK_PCIE_CR_P R807 1 2 0R2-PT5-LILY-GP KG_PCIE3_CLKP_R 13 57 REF2 01/29
D27 1 2 12 SRC3T_LPRS REF2/SEL_27
B
17 KG_NBREF_CLKP
17 KG_NBREF_CLKN
KG_NBREF_CLKP
KG_NBREF_CLKN 1P2V_PWRGD K A PD#
CLK_PCIE_CR_N
KG_GFX_CLKP
R803
R806 1 2
0R2-PT5-LILY-GP
0R2-PT5-LILY-GP
KG_PCIE3_CLKN_R
KG_GBE_CLKP_R 9 SRC3C_LPRS
SRC4T_LPRS
Rannie : 11/04 3D3V_S0
B
KG_GFX_CLKN R802 1 2 0R2-PT5-LILY-GP KG_GBE_CLKN_R 8
SRC4C_LPRS
rise/fall issue
2
42 43
NB GFX CLK
RB751V-40-2-GP
To SB 12/29 Modify 41 SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
GNDSATA
GNDATIG
24 change to 10ohm
KG_SBALINK_CLKP R801 1 2 0R2-PT5-LILY-GP KG_SBALINK_CLKP_R 6 7 R782
KG_SBALINK_CLKN R800 1 2 0R2-PT5-LILY-GP KG_SBALINK_CLKN_R 5 SRC7T_LPRS/27MHZ_SS GND 52 10KR2J-3-GP
KG_NBGFX_CLKP SRC7C_LPRS/27MHZ_NS GNDHTT 60 (R)
17 KG_NBGFX_CLKP GNDREF
1
46
17 KG_NBGFX_CLKN
KG_NBGFX_CLKN
11/09 37
SB_SRC0T_LPRS
GNDCPU
GND48
1 11/04 REF2 1
R781
2 CLK14_SB
36 3D3V_S0
SB_SRC0C_LPRS
2
32 10 10R2F-L-GP
SB_SRC1T_LPRS GNDSRC
1
31 18
To SB SB_SRC1C_LPRS GNDSRC R788 R783 01/29
33 10KR2J-3-GP 10KR2J-3-GP
KG_SBALINK_CLKP SEL_SATA 1 100 MHz non-spreading differential SRC clock KG_NBHT_CLKP 54 GNDSB_SRC R786
(R) Rannie :
23 KG_SBALINK_CLKP HTT0T_LPRS/66M
1
23 KG_SBALINK_CLKN
KG_SBALINK_CLKN REF1 KG_NBHT_CLKN 53
HTT0C_LPRS/66M GND
65 REF1 2 1 rise/fall issue
2
0* 100 MHz spreading differential SRC clock
change to 10ohm
SEL_HTT66 1 66 MHz 3.3V single ended HTT clock ICS9LPRS480BKLFT-GP
22R2J-2-GP
SCH5147
Mini PCI-E CLK 1103 Modify REF0 R789 2 1 3.3V
0* 100 MHz differential HTT clock
* default
10KR2J-3-GP
CLK_PCIE_MINI1
30 CLK_PCIE_MINI1 2 1R790
CLK_PCIE_MINI1# REF0 150R2F-1-GP OSC_14M_NB
30 CLK_PCIE_MINI1#
CLK_PCIE_MINI2 75R2F-2-GP 1 2 R785
30 CLK_PCIE_MINI2
30 CLK_PCIE_MINI2#
CLK_PCIE_MINI2#
3/01 Rannie 1107
CLK_PCIE_CR_P
35 CLK_PCIE_CR_P
35 CLK_PCIE_CR_N
30 MINI2_CLKREQ#
CLK_PCIE_CR_N
MINI2_CLKREQ# Delete 14M for SIO
30 MINI1_CLKREQ#
MINI1_CLKREQ#
OSC_14M_NB
SMBCLK RS780 1.1V 158R/90.9R
21,24,28,30,41,55 SMBCLK
SMBDATA
21,24,28,30,41,55 SMBDATA
A A
SIO_CLK48
41 SIO_CLK48 KG_CLK_48M_USB
24 KG_CLK_48M_USB
OSC_14M_NB
17 OSC_14M_NB <Variant Name>
CLK14_SB 21F, 88, Hsin Tai Wu Rd
23 CLK14_SB
Hsichih, Taipei
Title
47,49 1P2V_PWRGD
1P2V_PWRGD
EXTERNAL CLOCK GENERATOR
C
Barbados 1B
5 4 3 2 1
HT Interface
HT_CLKIN1_P
15 HT_CLKIN1_P HT_CLKIN1_N
15 HT_CLKIN1_N
HT_CLKIN0_P
15 HT_CLKIN0_P
HT_CLKIN0_N
15 HT_CLKIN0_N
HT_CTLIN1_P
15 HT_CTLIN1_P HT_CTLIN1_N
15 HT_CTLIN1_N HT_CTLIN0_P
15 HT_CTLIN0_P HT_CTLIN0_N
15 HT_CTLIN0_N
HT_CLKOUT1_P
15 HT_CLKOUT1_P
HT_CLKOUT1_N U5A 1 OF 8
15 HT_CLKOUT1_N
HT_CLKOUT0_P
15 HT_CLKOUT0_P N6 AD5
HT_CLKOUT0_N HT_CLKIN1_P HT_CLKOUT1_P
15 HT_CLKOUT0_N HT_CLKIN1_N P6 L0_CLKIN_H1 L0_CLKOUT_H1 AD4 HT_CLKOUT1_N
HT_CLKIN0_P N3 L0_CLKIN_L1 L0_CLKOUT_L1 AD1 HT_CLKOUT0_P
HT_CTLOUT1_P HT_CLKIN0_N N2 L0_CLKIN_H0 L0_CLKOUT_H0 AC1 HT_CLKOUT0_N
OPTERON
15 HT_CTLOUT1_P HT_CTLOUT1_N L0_CLKIN_L0 L0_CLKOUT_L0
15 HT_CTLOUT1_N V4 Y6
HT_CTLOUT0_P HT_CTLIN1_P HT_CTLOUT1_P
15 HT_CTLOUT0_P HT_CTLOUT0_N HT_CTLIN1_N V5 L0_CTLIN_H1 L0_CTLOUT_H1 W6 HT_CTLOUT1_N
15 HT_CTLOUT0_N HT_CTLIN0_P U1 L0_CTLIN_L1 L0_CTLOUT_L1 W2 HT_CTLOUT0_P
HT_CTLIN0_N V1 L0_CTLIN_H0 L0_CTLOUT_H0 W3 HT_CTLOUT0_N
HT_CADIN7_P L0_CTLIN_L0 L0_CTLOUT_L0
15 HT_CADIN7_P HT_CADIN7_N
15 HT_CADIN7_N U6 Y5
HT_CADIN6_P HT_CADIN15_P HT_CADOUT15_P
15 HT_CADIN6_P HT_CADIN6_N HT_CADIN15_N V6 L0_CADIN_H15 L0_CADOUT_H15 Y4 HT_CADOUT15_N
15 HT_CADIN6_N HT_CADIN5_P HT_CADIN14_P T4 L0_CADIN_L15 L0_CADOUT_L15 AB6 HT_CADOUT14_P
15 HT_CADIN5_P T5 L0_CADIN_H14 L0_CADOUT_H14 AA6
HT_CADIN5_N HT_CADIN14_N HT_CADOUT14_N
15 HT_CADIN5_N HT_CADIN4_P HT_CADIN13_P R6 L0_CADIN_L14 L0_CADOUT_L14 AB5 HT_CADOUT13_P
15 HT_CADIN4_P T6 L0_CADIN_H13 L0_CADOUT_H13 AB4
15 HT_CADIN4_N HT_CADIN3_P HT_CADIN12_P P4 L0_CADIN_L13 L0_CADOUT_L13 AD6 HT_CADOUT12_P
15 HT_CADIN3_P P5 L0_CADIN_H12 L0_CADOUT_H12 AC6
15 HT_CADIN3_N L0_CADIN_L12 L0_CADOUT_L12
HT_CADIN2_P HT_CADIN11_P M4 AF6 HT_CADOUT11_P
15 HT_CADIN2_P HT_CADIN2_N HT_CADIN11_N M5 L0_CADIN_H11 L0_CADOUT_H11 AE6 HT_CADOUT11_N
15 HT_CADIN2_N HT_CADIN1_P HT_CADIN10_P L6 L0_CADIN_L11 L0_CADOUT_L11 AF5 HT_CADOUT10_P
15 HT_CADIN1_P HT_CADIN1_N HT_CADIN10_N M6 L0_CADIN_H10 L0_CADOUT_H10 AF4 HT_CADOUT10_N
15 HT_CADIN1_N HT_CADIN0_P HT_CADIN9_P K4 L0_CADIN_L10 L0_CADOUT_L10 AH6 HT_CADOUT9_P
15 HT_CADIN0_P K5 L0_CADIN_H9 L0_CADOUT_H9 AG6
15 HT_CADIN0_N J6 L0_CADIN_L9 L0_CADOUT_L9 AH5
HT_CADIN8_P HT_CADOUT8_P
HT_CADIN8_N K6 L0_CADIN_H8 L0_CADOUT_H8 AH4 HT_CADOUT8_N
HT_CADIN15_P L0_CADIN_L8 L0_CADOUT_L8
15 HT_CADIN15_P
HT_CADIN15_N HT_CADIN7_P U3 Y1 HT_CADOUT7_P
15 HT_CADIN15_N L0_CADIN_H7 L0_CADOUT_H7
HT_CADIN14_P HT_CADIN7_N U2 W1 HT_CADOUT7_N
HT LINK
15 HT_CADIN14_P R1 L0_CADIN_L7 L0_CADOUT_L7 AA2
HT_CADIN14_N HT_CADIN6_P HT_CADOUT6_P
15 HT_CADIN14_N T1 L0_CADIN_H6 L0_CADOUT_H6 AA3
HT_CADIN13_P HT_CADIN6_N HT_CADOUT6_N
15 HT_CADIN13_P R3 L0_CADIN_L6 L0_CADOUT_L6 AB1
15 HT_CADIN13_N HT_CADIN12_P HT_CADIN5_N R2 L0_CADIN_H5 L0_CADOUT_H5 AA1 HT_CADOUT5_N
15 HT_CADIN12_P HT_CADIN12_N HT_CADIN4_P N1 L0_CADIN_L5 L0_CADOUT_L5 AC2 HT_CADOUT4_P
15 HT_CADIN12_N P1 L0_CADIN_H4 L0_CADOUT_H4 AC3
15 HT_CADIN11_P L1 L0_CADIN_L4 L0_CADOUT_L4 AE2
15 HT_CADIN11_N M1 L0_CADIN_H3 L0_CADOUT_H3 AE3
15 HT_CADIN10_P L3 L0_CADIN_L3 L0_CADOUT_L3 AF1
15 HT_CADIN10_N L2 L0_CADIN_H2 L0_CADOUT_H2 AE1
15 HT_CADIN9_P HT_CADIN9_N HT_CADIN1_P J1 L0_CADIN_L2 L0_CADOUT_L2 AG2 HT_CADOUT1_P
15 HT_CADIN9_N K1 L0_CADIN_H1 L0_CADOUT_H1 AG3
15 HT_CADIN8_P HT_CADIN8_N HT_CADIN0_P J3 L0_CADIN_L1 L0_CADOUT_L1 AH1 HT_CADOUT0_P
15 HT_CADIN8_N HT_CADIN0_N J2 L0_CADIN_H0 L0_CADOUT_H0 AG1 HT_CADOUT0_N
L0_CADIN_L0 L0_CADOUT_L0
HT_CADOUT7_P
15 HT_CADOUT7_P
HT_CADOUT7_N OPTER
15 HT_CADOUT7_N HT_CADOUT6_P (62.10055.351)
15 HT_CADOUT6_P
HT_CADOUT6_N
15 HT_CADOUT6_N
HT_CADOUT5_P
15 HT_CADOUT5_P
HT_CADOUT5_N
15 HT_CADOUT5_N
HT_CADOUT4_P
15 HT_CADOUT4_P
HT_CADOUT4_N
15 HT_CADOUT4_N HT_CADOUT3_P
15 HT_CADOUT3_P HT_CADOUT3_N
15 HT_CADOUT3_N
HT_CADOUT2_P
15 HT_CADOUT2_P
HT_CADOUT2_N
15 HT_CADOUT2_N
HT_CADOUT1_P
15 HT_CADOUT1_P
HT_CADOUT1_N
15 HT_CADOUT1_N
HT_CADOUT0_P
15 HT_CADOUT0_N
HT_CADOUT15_P
15 HT_CADOUT14_P
HT_CADOUT14_N
15 HT_CADOUT13_P
HT_CADOUT13_N
15 HT_CADOUT13_N
HT_CADOUT12_P
15 HT_CADOUT12_P
HT_CADOUT12_N
15 HT_CADOUT12_N
HT_CADOUT11_P
15 HT_CADOUT11_P
HT_CADOUT11_N
15 HT_CADOUT11_N
HT_CADOUT10_P
15 HT_CADOUT10_P
HT_CADOUT10_N
15 HT_CADOUT10_N
HT_CADOUT9_P
15 HT_CADOUT9_P <Variant Name>
HT_CADOUT9_N
15 HT_CADOUT8_P Wistron Incorporated
HT_CADOUT8_N
15 HT_CADOUT8_N
Hsichih, Taipei
Title
CPU HT Interface
A3
Barbados 1B
CPU CNTL/STRAPS
2D5V
1104 11/04 11/04 Fix to S-VID
0.5A,0.25ohm,300ohm 1118
1 2 V2P5_VDDA
1D5V_MEM 1D5V_MEM
11/04 11/04 11/04
FCM1608KFG-301T05-GP
CPUCLK L52
8 CPUCLK
1
CPUCLK# C554 C566 C144 1D5V_MEM 1D5V_MEM 1D5V_MEM
8 CPUCLK#
C547
1
SCD22U6D3V2KX-1GP SC3300P50V2KX-1GP ST100U6D3VBM-7GP R668
2
CPUPWRGD SC4D7U6D3V3KX-GP R181 R179 R164 R569 300R2J-4-GP
23 CPUPWRGD
2
LDT_STOP# 300R2J-4-GP 300R2J-4-GP
17,23 LDT_STOP#
2
LDT_RST# 1KR2J-1-GP 1KR2J-1-GP R570
23 LDT_RST#
1KR2J-1-GP R324 R184
U5D
2
4 OF 8 300R2J-4-GP 300R2J-4-GP
CPU_SIC
24 CPU_SIC
1
CPU_SID C10
24 CPU_SID VDDA MISC.
1
D10
VDDA
CPUCLK 1 2 C537 CPU_CLKIN_SC_P A8 CPU_THERMTRIP#_SB
CPU_CLKIN_SC_N B8 CLKIN_H G5 CORE_TYPE
SC3900P50V2KX-2GP
12/29
OPTERON
CLKIN_L CORE_TYPE
1
CPU_CORE_FB R592 CPUPWRGD R163 1 2 0R2-PT5-LILY-GP CPU_ALL_PWROK C9 D2 TP_VID5_CPU 1
50 CPU_CORE_FB CPU_CORE_FB* LDT_STOP# R566 1 2 0R2-PT5-LILY-GP CPU_LDTSTOP# D8 PWROK VID5 D1 TP_VID4_CPU 1 TP22 TP-2
169R2F-GP
50 CPU_CORE_FB* LDTSTOP_L VID4 TP21 TP-2
LDT_RST# R661 1 2 0R2-PT5-LILY-GP CPU_HT_RESET# C7 C1 CPU_VID3/SVC
RESET_L SVC/VID3 E3 CPU_VID2/SVD
SVD/VID2
2
CPUCLK# 1 2 C541 R586 1 2 CPU_PRSNT* AL3 E2 CPU_VID1/SEL
SC3900P50V2KX-2GP 11/10 1D5V_MEM
10KR2J-3-GP CPU_PRESENT_L PVIEN/VID1
VID0
E1 TP_VID0_CPU 1
TP1 TP-2
CPU_SIC R183 1 2 0R2-PT5-LILY-GP CPU_SIC_R AL6 AG9
2009/12/23
SIC THERMDC CPU_THERMDC 41
CPU_SID R177 1 2 0R2-PT5-LILY-GP CPU_SID_R AK6 AG8
AK4 SID THERMDA AK7 CPU_THERMDA 41 CPU_THERMTRIP#
LAYOUT: PLACE 169 OHM WITHIN 0.5INCH OF CPU
11/0412/29
1D5V_MEM CPU_ALERT# AL4 SA0 THERMTRIP_L AL7 CPU_PROCHOT#_SB 1D5V_MEM
ALERT_L PROCHOT_L
ROUTE AS 100 ohm DIFF
1 CPU_TDI AL10 AK10 CPU_TDO 1
50 CPU_VID3/SVC TP-2 TP87 TDI TDO TP89 TP-2
2
1 AJ10
50 CPU_VID2/SVD
ROUTE AS A 15MIL TRACE 2 R636 1
TP-2 TP90 1
CPU_TRST_L
CPU_TCK AH10 TRST_L 1104
50 CPU_VID1/SEL 11/04 1KR2J-1-GP TP-2
TP-2
TP91
TP88
1 CPU_TMS AL9 TCK
TMS
1D5V_MEM R194
4K7R2J-2-GP
3
1D5V_MEM 1 CPU_DBREQ_L A5 B6 CPU_DBRDY 1 1 Q27
41 CPU_THERMDC TP-2 TP97 DBREQ_L DBRDY TP25 TP-2
1
V_1P2 PMBS3904-1-GP
41 CPU_THERMDA G2 AK11
CPU_CORE_FB CPU_VDDIO_SUS_FB_H R6111 2 0R2J-2-GP (R)
VDD_FB_H VDDIO_FB_H
2
CPU_THERMTRIP#_SB CPU_CORE_FB* G1 AL11 CPU_VDDIO_SUS_FB_L R6131 2 0R2J-2-GP (R)
24,49 CPU_THERMTRIP#_SB VDD_FB_L VDDIO_FB_L
1
CPU_PROCHOT#_SB G4 CPU_NB_FB_P
23 CPU_PROCHOT#_SB VDDNB_FB_H
1
1
R620 1 TP_M_VDDIO_PWRGD F3 G3 CPU_NB_FB_N
15R2F-2-GP TP-2 TP2 M_VDDIO_PWRGD VDDNB_FB_L
50 CPU_NB_FB_P
50 CPU_NB_FB_N
CPU_NB_FB_P
CPU_NB_FB_N
C624
SCD1U10V2KX-4-LL-GP
2
11/04
ROUTE AS DIFF PAIR
TP-2 TP40
1 TP_MEM_VTT_SENSE E12
VDDR_SENSE PSI_L
F1 CPU_PSI* 12/01 R590
44D2R2F-GP
10/5/10 10 CPU_THERMTRIP#
2
CPU_M_VREF_SUS F12 V8 CPU_HTREF1 PLACE WITHIN 1 INCH
50 CPU_PSI* M_VREF HTREF1
2
M_ZN AH11 V7 CPU_HTREF0 5MIL TRACE 10MIL SPACE
M_ZN HTREF0
1
1D5V_MEM M_ZP AJ11
M_ZP
1
2
C594 C584
R618
15R2F-2-GP 1D5V_MEM 11/04 A10
TEST25_H TEST29_H
C11 CPU_TEST29H 1 R607 2 R599
1
B10 D11
SCD1U10V2KX-4-LL-GP SC1KP50V2KX-1GP
TEST25_L TEST29_L
CPU_TEST29L 80D6R2F-L-GP 44D2R2F-GP
2/10 Rannie
2
2
R609 1 TP_TEST19 F10 Layout: Route as 80 ohms diff impedance.
TP-2 TP34 TEST19
2
39D2R2F-L-GP R172 1 TP_TEST18 E9 Keep trace to resistor < 1" from CPU pins
TP-2 TP32 TEST18
1
510R2J-1-GP AJ7
F6 TEST13 AK8 CPU_TEST24 1
TEST9 TEST24 TP30 TP-2
2
AH8 CPU_TEST23 1
TEST23 TP28 TP-2
1
CPU_TEST25 1 TP_TEST17 D6 AJ9 CPU_TEST22 1
CPU_TEST25* TP-2 TP24 1 TP_TEST16 E7 TEST17 TEST22 AL8 CPU_TEST21 1 TP35 TP-2
TP-2 TP26 TEST16 TEST21 TP31 TP-2
1
1 TP_TEST15 F8 AJ8 CPU_TEST20 1 CPU_TEST29H 1
TP-2 TP27 TEST15 TEST20 TP33 TP-2 TP39 TP-2
2
1 TP_TEST14 C5 CPU_TEST29L 1
R610
39D2R2F-L-GP R602
TP-2
TP-2
TP23
TP37
1 TP_TEST12 AH9 TEST14
TEST12 TEST28_H
J10 CPU_TEST28_H 1
TP38 TP-2
11/28 TP36 TP-2
1
510R2J-1-GP H9 CPU_TEST28_L 1 CPU_TEST24 2

R595 1 300R2J-4-GP
E5 TEST28_L AK9 CPU_TEST27 2 TP29 TP-2
1 300R2J-4-GP
C577 C578
TEST7 TEST27
R608 1D5V_MEM
11/28
2
AJ5 AK5 CPU_TEST26 2 1 300R2J-4-GP CPU_TEST22 2 1 300R2J-4-GP
SCD1U10V2KX-4-LL-GP SC1KP50V2KX-1GP
TEST6 TEST26
R175 R593
11/04
2
1
AH7 G7 CPU_TEST21 2
R596 1 300R2J-4-GP
AJ6 TEST3 TEST10 D4 2 1 300R2J-4-GP
LAYOUT: 5MIL TRACE 10 MIL SPACE TEST2 TEST8
CPU_TEST20 R594
LAYOUT: PLACE WITHIN 1 INCH OF CPU C18 L30

11/28
INT. MISC.
C20 RSVD#C18 RSVD#L30 L31
F2 RSVD#C20
RSVD#F2
RSVD#L31
RSVD#AD25
AD25 3D3V_S0 11/04
G24 AE24
T_ALERT# G25 RSVD#G24 RSVD#AE24 AE25
25 T_ALERT# H25 RSVD#G25
RSVD#H25
RSVD#AE25
RSVD#AJ18
AJ18 11/04
1
L25 AJ20
L26 RSVD#L25 RSVD#AJ20 AK3
OVT Alert circuit RSVD#L26 RSVD#AK3 1D5V_MEM
R667
4K7R2J-2-GP
D22
2
LDT_RST#_1 K A LDT_RST#_2 LDT_RST#_B R662 2 1 27KR2J-L1-GP
1D5V_MEM
OPTER
(62.10055.351)
11/04 RB751V-40-2-GP
2
1D5V_MEM 3D3V_EuP
(R) R652 (R) R653 (R) R656 (R) R655 R654(R)
1D5V_MEM
HDT1 11/04
1
1 2 Q71
1KR2J-1-GP 1KR2J-1-GP 1KR2J-1-GP 1KR2J-1-GP 300R2J-4-GP 3D3V_S0
2
1
3 4 3 2 LDT_RST#
1
R641 R643 CPUPWRGD 1 R669 2 CPUPWRGD_HDT 5 6
1KR2J-1-GP 4K7R2J-2-GP 0R2J-2-GP CPU_DBREQ_L 7 8 PMBS3904-1-GP
1
CPU_DBRDY 9 10
(R) CPU_TCK 11 12 R644
1
2
CPU_TMS 13 14 4K7R2J-2-GP
CPU_TDI 15 16
CPU_TRST_L 17 18
<Variant Nam e>
1
2
CPU_TDO 19 20
21 22
CPU_ALERT# 2 3 T_ALERT#_1 1 R642 2 T_ALERT# 23 24 Wistron Incorporated
0R2-PT5-LILY-GP 26 21F, 88, Hsin Tai Wu Rd
Q70
PMBS3904-1-GP SMC-CONN26A-FP
Hsichih, Taipei
(R) Title
CPU CNTL/STRAPS
Cus tom
Barbados 1B
MEM A
U5B
2 OF 8
1 TP_MEM_A_CLK7_P AG21 AE14 MEM_MA_DATA63

TP-2 TP66 1 MA_CLK_H7 MA_DATA63
MEM_MA0_CLK0_P TP_MEM_A_CLK7_N AG20 AG14 MEM_MA_DATA62
21 MEM_MA0_CLK0_P TP-2 TP56 1 MA_CLK_L7 MA_DATA62
MEM_MA0_CLK0_N TP_MEM_A_CLK6_P AE20 AG16 MEM_MA_DATA61
21 MEM_MA0_CLK0_N TP-2 TP57 1 TP_MEM_A_CLK6_N AE19 MA_CLK_H6 MA_DATA61 AD17 MEM_MA_DATA60
TP-21 TP47 TP_MEM_A_CLK5_P U27 MA_CLK_L6 MA_DATA60 AD13
OPTERON
MEM_MA_DATA59
MEM_MA0_CLK1_P TP-2 TP83 1 TP_MEM_A_CLK5_N U26 MA_CLK_H5 MA_DATA59 AE13 MEM_MA_DATA58
21 MEM_MA0_CLK1_P MEM_MA0_CLK1_N TP-2 TP77 MEM_MA0_CLK0_P V27 MA_CLK_L5 MA_DATA58 AG15 MEM_MA_DATA57
21 MEM_MA0_CLK1_N MA_CLK_H4 MA_DATA57
MEM_MA0_CLK0_N W27 AE16 MEM_MA_DATA56
1 TP_MEM_A_CLK3_P W26 MA_CLK_L4 MA_DATA56 AG17 MEM_MA_DATA55
MEM_MA0_CS_L1 TP-2 TP79 1 TP_MEM_A_CLK3_N W25 MA_CLK_H3 MA_DATA55 AE18 MEM_MA_DATA54
21 MEM_MA0_CS_L1 TP-2 TP73 U24 MA_CLK_L3 MA_DATA54 AD21
MEM_MA0_CS_L0 MEM_MA0_CLK1_P MEM_MA_DATA53
21 MEM_MA0_CS_L0 MEM_MA0_CLK1_N V24 MA_CLK_H2 MA_DATA53 AG22 MEM_MA_DATA52
MEM_MA0_ODT1 1 TP_MEM_A_CLK1_P G19 MA_CLK_L2 MA_DATA52 AE17 MEM_MA_DATA51
21 MEM_MA0_ODT1 MEM_MA0_ODT0 TP-2 TP51 1 TP_MEM_A_CLK1_N H19 MA_CLK_H1 MA_DATA51 AF17 MEM_MA_DATA50
21 MEM_MA0_ODT0 TP-2 TP52 1 TP_MEM_A_CLK0_P G20 MA_CLK_L1 MA_DATA50 AF21 MEM_MA_DATA49
TP-2 TP60 1 G21 MA_CLK_H0 MA_DATA49 AE21
TP_MEM_A_CLK0_N MEM_MA_DATA48
MEM_MA_RESET# TP-2 TP67 MA_CLK_L0 MA_DATA48 AF23 MEM_MA_DATA47
21 MEM_MA_RESET# MA_DATA47 AE23 MEM_MA_DATA46
MA_DATA46 AJ26 MEM_MA_DATA45
MEM_MA_CAS# MEM_MA0_CS_L1 AC25 MA_DATA45 AG26 MEM_MA_DATA44
21 MEM_MA_CAS# MEM_MA_WE# MEM_MA0_CS_L0 AA24 MA0_CS_L1 MA_DATA44 AE22 MEM_MA_DATA43
21 MEM_MA_WE# MA0_CS_L0 MA_DATA43 AG23
MEM_MA_RAS# MEM_MA_DATA42
21 MEM_MA_RAS# MEM_MA0_ODT1 AE28 MA_DATA42 AH25 MEM_MA_DATA41
MEM_MA0_ODT0 AC28 MA0_ODT1 MA_DATA41 AF25 MEM_MA_DATA40
MA0_ODT0 MA_DATA40 AJ28 MEM_MA_DATA39
21 MEM_MA_BANK[2..0] AD27 MA_DATA39 AJ29 MEM_MA_DATA38
MEM_MA_BANK2 AA25 MA1_CS_L1 MA_DATA38 AF29 MEM_MA_DATA37
MEM_MA_BANK1 MA1_CS_L0 MA_DATA37 AE26 MEM_MA_DATA36
MEM_MA_BANK0 AE27 MA_DATA36 AJ27 MEM_MA_DATA35
AC27 MA1_ODT1 MA_DATA35 AH27 MEM_MA_DATA34
MA1_ODT0 MA_DATA34 AG29 MEM_MA_DATA33
MEM_MA_CKE1 MEM_MA_RESET# E20 MA_DATA33 AF27 MEM_MA_DATA32
21 MEM_MA_CKE1 MA_RESET_L MA_DATA32
MEM_MA_CKE0 E29 MEM_MA_DATA31
21 MEM_MA_CKE0 AB25 MA_DATA31 E28
MEM_MA_CAS# MEM_MA_DATA30
MEM_MA_WE# AB27 MA_CAS_L MA_DATA30 D27 MEM_MA_DATA29
MEM_MA_RAS# AA26 MA_WE_L MA_DATA29 C27 MEM_MA_DATA28
21 MEM_MA_ADD[15..0] MA_RAS_L MA_DATA28 G26 MEM_MA_DATA27
MEM_MA_ADD15 MEM_MA_BANK2 N25 MA_DATA27 F27 MEM_MA_DATA26
MEM_MA_ADD14 MEM_MA_BANK1 Y27 MA_BANK2 MA_DATA26 C28 MEM_MA_DATA25
MEM_MA_ADD13 MEM_MA_BANK0 AA27 MA_BANK1 MA_DATA25 E27 MEM_MA_DATA24
MEM_MA_ADD12 MA_BANK0 MA_DATA24 F25 MEM_MA_DATA23
MEM_MA_ADD11 MEM_MA_CKE1 L27 MA_DATA23 E25 MEM_MA_DATA22
MEM_MA_ADD10 MEM_MA_CKE0 M25 MA_CKE1 MA_DATA22 E23 MEM_MA_DATA21
MEM_MA_ADD9 MA_CKE0 MA_DATA21 D23 MEM_MA_DATA20
MEM_MA_ADD8 MA_DATA20 E26 MEM_MA_DATA19
MEM_MA_ADD7 MEM_MA_ADD15 M27 MA_DATA19 C26 MEM_MA_DATA18
MEM_MA_ADD6 MEM_MA_ADD14 N24 MA_ADD15 MA_DATA18 G23 MEM_MA_DATA17
MEM CHA
MEM_MA_ADD5 MEM_MA_ADD13 AC26 MA_ADD14 MA_DATA17 F23 MEM_MA_DATA16
MEM_MA_ADD4 MEM_MA_ADD12 N26 MA_ADD13 MA_DATA16 E22 MEM_MA_DATA15
MEM_MA_ADD3 MEM_MA_ADD11 P25 MA_ADD12 MA_DATA15 E21 MEM_MA_DATA14
MEM_MA_ADD2 MEM_MA_ADD10 Y25 MA_ADD11 MA_DATA14 F17 MEM_MA_DATA13
MEM_MA_ADD1 MEM_MA_ADD9 N27 MA_ADD10 MA_DATA13 G17 MEM_MA_DATA12
MEM_MA_ADD0 MEM_MA_ADD8 R24 MA_ADD9 MA_DATA12 G22 MEM_MA_DATA11
MEM_MA_ADD7 P27 MA_ADD8 MA_DATA11 F21 MEM_MA_DATA10
MEM_MA_ADD6 R25 MA_ADD7 MA_DATA10 G18 MEM_MA_DATA9
MEM_MA_ADD5 R26 MA_ADD6 MA_DATA9 E17 MEM_MA_DATA8
21 MEM_MA_DQS_P[7..0] MEM_MA_DQS_P7 MEM_MA_ADD4 R27 MA_ADD5 MA_DATA8 G16 MEM_MA_DATA7
MEM_MA_DQS_P6 MEM_MA_ADD3 T25 MA_ADD4 MA_DATA7 E15 MEM_MA_DATA6
MEM_MA_DQS_P5 MEM_MA_ADD2 U25 MA_ADD3 MA_DATA6 G13 MEM_MA_DATA5
MEM_MA_DQS_P4 MEM_MA_ADD1 T27 MA_ADD2 MA_DATA5 H13 MEM_MA_DATA4
MEM_MA_DQS_P3 MEM_MA_ADD0 W24 MA_ADD1 MA_DATA4 H17 MEM_MA_DATA3
MEM_MA_DQS_P2 MA_ADD0 MA_DATA3 E16 MEM_MA_DATA2
MEM_MA_DQS_P1 MEM_MA_DQS_P7 AD15 MA_DATA2 E14 MEM_MA_DATA1
MEM_MA_DQS_P0 MEM_MA_DQS_N7 AE15 MA_DQS_H7 MA_DATA1 G14 MEM_MA_DATA0
MEM_MA_DQS_P6 AG18 MA_DQS_L7 MA_DATA0
MEM_MA_DQS_N6 AG19 MA_DQS_H6 J28 TP_MEM_A_DQS8 1
21 MEM_MA_DQS_N[7..0] MEM_MA_DQS_N7 MEM_MA_DQS_P5 AG24 MA_DQS_L6 MA_DQS_H8 J27 TP_MEM_A_DQS*8 1 TP85 TP-2
AG25 MA_DQS_H5 MA_DQS_L8 TP81 TP-2
MEM_MA_DQS_N6 MEM_MA_DQS_N5
MEM_MA_DQS_N5 MEM_MA_DQS_P4 AG27 MA_DQS_L5 J25 TP_MEM_A_DM8 1
MEM_MA_DQS_N4 MEM_MA_DQS_N4 AG28 MA_DQS_H4 MA_DM8 TP74 TP-2
MEM_MA_DQS_N3 MEM_MA_DQS_P3 D29 MA_DQS_L4 K25 TP_MEM_A_ECC7 1
C29 MA_DQS_H3 MA_CHECK7 J26 1 TP72 TP-2
MEM_MA_DQS_N2 MEM_MA_DQS_N3 TP_MEM_A_ECC6
MEM_MA_DQS_N1 MEM_MA_DQS_P2 C25 MA_DQS_L3 MA_CHECK6 G28 TP_MEM_A_ECC5 1 TP78 TP-2
D25 MA_DQS_H2 MA_CHECK5 G27 1 TP84 TP-2
MEM_MA_DQS_N0 MEM_MA_DQS_N2 TP_MEM_A_ECC4
MEM_MA_DQS_P1 E19 MA_DQS_L2 MA_CHECK4 L24 TP_MEM_A_ECC3 1 TP80 TP-2
MEM_MA_DQS_N1 F19 MA_DQS_H1 MA_CHECK3 K27 TP_MEM_A_ECC2 1 TP75 TP-2
21 MEM_MA_DM[7..0] MA_DQS_L1 MA_CHECK2 TP82 TP-2
MEM_MA_DQS_P0 F15 H29 TP_MEM_A_ECC1 1
G15 MA_DQS_H0 MA_CHECK1 H27 1 TP92 TP-2
MEM_MA_DM7 MEM_MA_DQS_N0 TP_MEM_A_ECC0
MA_DQS_L0 MA_CHECK0 TP76 TP-2
MEM_MA_DM6
MEM_MA_DM5 MEM_MA_DM7 AF15 W30 MEM_MA_EVENT_L
MEM_MA_DM4 MEM_MA_DM6 AF19 MA_DM7 MA_EVENT_L
MEM_MA_DM3 MEM_MA_DM5 AJ25 MA_DM6 1 R683 2
MEM_MA_DM2 MEM_MA_DM4 AH29
B29
MA_DM5
MA_DM4
1KR2J-1-GP
1D5V_MEM
11/04
MEM_MA_DM1 MEM_MA_DM3
MEM_MA_DM0 MEM_MA_DM2 E24 MA_DM3
MEM_MA_DM1 E18 MA_DM2
21 MEM_MA_DATA[63..0] MA_DM1
MEM_MA_DM0 H15
MEM_MA_DATA63 MA_DM0
MEM_MA_DATA62
MEM_MA_DATA61 OPTER
MEM_MA_DATA60 (62.10055.351)
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
<Variant Nam e>
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5 Wistron Incorporated
MEM_MA_DATA4 21F, 88, Hsin Tai Wu Rd
MEM_MA_DATA3
MEM_MA_DATA2
Hsichih, Taipei
MEM_MA_DATA1 Title
MEM_MA_DATA0
CPU MEM_A
21 MEM_MA_EVENT_L
MEM_MA_EVENT_L A2
Barbados 1B
MEM B
MEM_MB0_CLK0_P
21 MEM_MB0_CLK0_P MEM_MB0_CLK0_N U5C 3 OF 8
21 MEM_MB0_CLK0_N
1 TP_MEM_B_CLK7 AJ19 AH13 MEM_MB_DATA63
TP-2 TP49 1 AK19 MB_CLK_H7 MB_DATA63 AL13
MEM_MB0_CLK1_P TP_MEM_B_CLK7* MEM_MB_DATA62
21 MEM_MB0_CLK1_P MEM_MB0_CLK1_N TP-2 TP62 1 TP_MEM_B_CLK6 AL19 MB_CLK_L7 MB_DATA62 AL15 MEM_MB_DATA61
21 MEM_MB0_CLK1_N TP-2 TP59 1 AL18 MB_CLK_H6 MB_DATA61 AJ15
TP_MEM_B_CLK6* MEM_MB_DATA60
TP-21 TP50 TP_MEM_B_CLK5 U31 MB_CLK_L6 MB_DATA60 AF13 MEM_MB_DATA59
TP-2 TP9 1 U30 MB_CLK_H5 MB_DATA59 AG13
OPTERON
MEM_MB0_CS_L1 TP_MEM_B_CLK5* MEM_MB_DATA58
21 MEM_MB0_CS_L1 MEM_MB0_CS_L0 TP-2 TP10 MEM_MB0_CLK0_P W29 MB_CLK_L5 MB_DATA58 AL14 MEM_MB_DATA57
21 MEM_MB0_CS_L0 MEM_MB0_CLK0_N W28 MB_CLK_H4 MB_DATA57 AK15 MEM_MB_DATA56
MEM_MB0_ODT1 1 TP_MEM_B_CLK3 Y31 MB_CLK_L4 MB_DATA56 AL16 MEM_MB_DATA55
21 MEM_MB0_ODT1 MEM_MB0_ODT0 TP-2 TP105 1 TP_MEM_B_CLK3* Y30 MB_CLK_H3 MB_DATA55 AL17 MEM_MB_DATA54
21 MEM_MB0_ODT0 TP-2 TP101 MB_CLK_L3 MB_DATA54
MEM_MB0_CLK1_P V31 AK21 MEM_MB_DATA53
MEM_MB_RESET# MEM_MB0_CLK1_N W31 MB_CLK_H2 MB_DATA53 AL21 MEM_MB_DATA52
21 MEM_MB_RESET# 1 TP_MEM_B_CLK1 A18 MB_CLK_L2 MB_DATA52 AH15 MEM_MB_DATA51
MEM_MB_CAS# TP-2 TP8 1 TP_MEM_B_CLK1* A19 MB_CLK_H1 MB_DATA51 AJ16 MEM_MB_DATA50
21 MEM_MB_CAS# TP-2 TP7 1 C19 MB_CLK_L1 MB_DATA50 AH19
MEM_MB_WE# TP_MEM_B_CLK0 MEM_MB_DATA49
21 MEM_MB_WE# MEM_MB_RAS# TP-2 TP53 1 TP_MEM_B_CLK0* D19 MB_CLK_H0 MB_DATA49 AL20 MEM_MB_DATA48
21 MEM_MB_RAS# TP-2 TP55 MB_CLK_L0 MB_DATA48 AJ22 MEM_MB_DATA47
MEM_MB_CKE1 MB_DATA47 AL22 MEM_MB_DATA46
21 MEM_MB_CKE1 MB_DATA46 AL24
MEM_MB_CKE0 MEM_MB_DATA45
21 MEM_MB_CKE0 AE30 MB_DATA45 AK25
MEM_MB0_CS_L1 MEM_MB_DATA44
MEM_MB0_CS_L0 AC31 MB0_CS_L1 MB_DATA44 AJ21 MEM_MB_DATA43
MB0_CS_L0 MB_DATA43 AH21 MEM_MB_DATA42
21 MEM_MB_BANK[2..0] MEM_MB_BANK2 MEM_MB0_ODT1 AF31 MB_DATA42 AH23 MEM_MB_DATA41
MEM_MB_BANK1 MEM_MB0_ODT0 AD29 MB0_ODT1 MB_DATA41 AJ24 MEM_MB_DATA40
MEM_MB_BANK0 MB0_ODT0 MB_DATA40 AL27 MEM_MB_DATA39
AE29 MB_DATA39 AK27 MEM_MB_DATA38
AB31 MB1_CS_L1 MB_DATA38 AH31 MEM_MB_DATA37
21 MEM_MB_ADD[15..0] MB1_CS_L0 MB_DATA37
MEM_MB_ADD15 AG30 MEM_MB_DATA36
MEM_MB_ADD14 AG31 MB_DATA36 AL25 MEM_MB_DATA35
MEM_MB_ADD13 AD31 MB1_ODT1 MB_DATA35 AL26 MEM_MB_DATA34
MEM_MB_ADD12 MB1_ODT0 MB_DATA34 AJ30 MEM_MB_DATA33
MEM_MB_ADD11 MEM_MB_RESET# B19 MB_DATA33 AJ31 MEM_MB_DATA32
MEM_MB_ADD10 MB_RESET_L MB_DATA32 E31 MEM_MB_DATA31
MEM_MB_ADD9 MEM_MB_CAS# AC29 MB_DATA31 E30 MEM_MB_DATA30
MEM_MB_ADD8 MEM_MB_WE# AC30 MB_CAS_L MB_DATA30 B27 MEM_MB_DATA29
MEM_MB_ADD7 MEM_MB_RAS# AB29 MB_WE_L MB_DATA29 A27 MEM_MB_DATA28
MEM_MB_ADD6 MB_RAS_L MB_DATA28 F29 MEM_MB_DATA27
MEM_MB_ADD5 MEM_MB_BANK2 N31 MB_DATA27 F31 MEM_MB_DATA26
MEM_MB_ADD4 MEM_MB_BANK1 AA31 MB_BANK2 MB_DATA26 A29 MEM_MB_DATA25
MEM_MB_ADD3 MEM_MB_BANK0 AA28 MB_BANK1 MB_DATA25 A28 MEM_MB_DATA24
MEM_MB_ADD2 MB_BANK0 MB_DATA24 A25 MEM_MB_DATA23
MEM_MB_ADD1 MEM_MB_CKE1 M31 MB_DATA23 A24 MEM_MB_DATA22
MEM_MB_ADD0 MEM_MB_CKE0 M29 MB_CKE1 MB_DATA22 C22 MEM_MB_DATA21
MB_CKE0 MB_DATA21 D21 MEM_MB_DATA20
MB_DATA20 A26 MEM_MB_DATA19
21 MEM_MB_DQS_P[7..0] MEM_MB_DQS_P7 MEM_MB_ADD15 N28 MB_DATA19 B25 MEM_MB_DATA18
MEM_MB_DQS_P6 MEM_MB_ADD14 N29 MB_ADD15 MB_DATA18 B23 MEM_MB_DATA17
MEM CHB
MEM_MB_DQS_P5 MEM_MB_ADD13 AE31 MB_ADD14 MB_DATA17 A22 MEM_MB_DATA16
MEM_MB_DQS_P4 MEM_MB_ADD12 N30 MB_ADD13 MB_DATA16 B21 MEM_MB_DATA15
MEM_MB_DQS_P3 MEM_MB_ADD11 P29 MB_ADD12 MB_DATA15 A20 MEM_MB_DATA14
MEM_MB_DQS_P2 MEM_MB_ADD10 AA29 MB_ADD11 MB_DATA14 C16 MEM_MB_DATA13
MEM_MB_DQS_P1 MEM_MB_ADD9 P31 MB_ADD10 MB_DATA13 D15 MEM_MB_DATA12
MEM_MB_DQS_P0 MEM_MB_ADD8 R29 MB_ADD9 MB_DATA12 C21 MEM_MB_DATA11
MEM_MB_ADD7 R28 MB_ADD8 MB_DATA11 A21 MEM_MB_DATA10
21 MEM_MB_DQS_N[7..0] MEM_MB_DQS_N7 MEM_MB_ADD6 R31 MB_ADD7 MB_DATA10 A17 MEM_MB_DATA9
MEM_MB_DQS_N6 MEM_MB_ADD5 R30 MB_ADD6 MB_DATA9 A16 MEM_MB_DATA8
MEM_MB_DQS_N5 MEM_MB_ADD4 T31 MB_ADD5 MB_DATA8 B15 MEM_MB_DATA7
MEM_MB_DQS_N4 MEM_MB_ADD3 T29 MB_ADD4 MB_DATA7 A14 MEM_MB_DATA6
MEM_MB_DQS_N3 MEM_MB_ADD2 U29 MB_ADD3 MB_DATA6 E13 MEM_MB_DATA5
MEM_MB_DQS_N2 MEM_MB_ADD1 U28 MB_ADD2 MB_DATA5 F13 MEM_MB_DATA4
MEM_MB_DQS_N1 MEM_MB_ADD0 AA30 MB_ADD1 MB_DATA4 C15 MEM_MB_DATA3
MEM_MB_DQS_N0 MB_ADD0 MB_DATA3 A15 MEM_MB_DATA2
MEM_MB_DQS_P7 AK13 MB_DATA2 A13 MEM_MB_DATA1
MEM_MB_DQS_N7 AJ13 MB_DQS_H7 MB_DATA1 D13 MEM_MB_DATA0
21 MEM_MB_DM[7..0] MB_DQS_L7 MB_DATA0
MEM_MB_DM7 MEM_MB_DQS_P6 AK17
MEM_MB_DM6 MEM_MB_DQS_N6 AJ17 MB_DQS_H6 J31 TP_MEM_B_DQS8 1
AK23 MB_DQS_L6 MB_DQS_H8 J30 1 TP99 TP-2
MEM_MB_DM5 MEM_MB_DQS_P5 TP_MEM_B_DQS*8
MEM_MB_DM4 MEM_MB_DQS_N5 AL23 MB_DQS_H5 MB_DQS_L8 TP98 TP-2
MEM_MB_DM3 MEM_MB_DQS_P4 AL28 MB_DQS_L5 J29 TP_MEM_B_DM8 1
MEM_MB_DM2 MEM_MB_DQS_N4 AL29 MB_DQS_H4 MB_DM8 TP96 TP-2
MEM_MB_DM1 MEM_MB_DQS_P3 D31 MB_DQS_L4 K29 TP_MEM_B_ECC7 1
MB_DQS_H3 MB_CHECK7 TP86 TP-2
MEM_MB_DM0 MEM_MB_DQS_N3 C31 K31 TP_MEM_B_ECC6 1
MEM_MB_DQS_P2 C24 MB_DQS_L3 MB_CHECK6 G30 TP_MEM_B_ECC5 1 TP102 TP-2
MEM_MB_DQS_N2 C23 MB_DQS_H2 MB_CHECK5 G29 TP_MEM_B_ECC4 1 TP100 TP-2
21 MEM_MB_DATA[63..0] MB_DQS_L2 MB_CHECK4 TP94 TP-2
MEM_MB_DQS_P1 D17 L29 TP_MEM_B_ECC3 1
C17 MB_DQS_H1 MB_CHECK3 L28 1 TP95 TP-2
MEM_MB_DATA63 MEM_MB_DQS_N1 TP_MEM_B_ECC2
MEM_MB_DATA62 MEM_MB_DQS_P0 C14 MB_DQS_L1 MB_CHECK2 H31 TP_MEM_B_ECC1 1 TP93 TP-2
MEM_MB_DATA61 MEM_MB_DQS_N0 C13 MB_DQS_H0 MB_CHECK1 G31 TP_MEM_B_ECC0 1 TP104 TP-2
MEM_MB_DATA60 MB_DQS_L0 MB_CHECK0 TP103 TP-2
MEM_MB_DATA59 MEM_MB_DM7 AJ14 V29 MEM_MB_EVENT_L
MEM_MB_DATA58 MEM_MB_DM6 AH17 MB_DM7 MB_EVENT_L
MEM_MB_DATA57 MEM_MB_DM5 AJ23 MB_DM6 1 R682 2
MEM_MB_DATA56 MEM_MB_DM4 AK29
C30
MB_DM5
MB_DM4
1KR2J-1-GP
1D5V_MEM
11/04
MEM_MB_DATA55 MEM_MB_DM3
MEM_MB_DATA54 MEM_MB_DM2 A23 MB_DM3
MEM_MB_DATA53 MEM_MB_DM1 B17 MB_DM2
MEM_MB_DATA52 MEM_MB_DM0 B13 MB_DM1
MEM_MB_DATA51 MB_DM0
MEM_MB_DATA50
MEM_MB_DATA49
OPTER
MEM_MB_DATA48
MEM_MB_DATA47 (62.10055.351)
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
<Variant Nam e>
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0 Wistron Incorporated
Hsichih, Taipei
Title
21 MEM_MB_EVENT_L
MEM_MB_EVENT_L CPU MEM_B
A2
Barbados 1B
POWER V_CPU U5F
6 OF 8
V_CPU U5E 5 OF 8
T15 M12
B3 A3 T17 VDD VSS M14
C2 VDD VSS A7 T19 VDD VSS M16
C4 VDD VSS A9 T21 VDD VSS M18
D3 VDD VSS A11 T23 VDD VSS M20
VDD VSS VDD VSS
OPTERON
D5 B4 U8 M22 V_CPU_NB U5G 7 OF 8
OPTERON
E4 VDD VSS B9 U10 VDD VSS N4 U5H 8 OF 8
E6 VDD VSS B11 U12 VDD VSS N5 A4 AA11 V_1P2
F5 VDD VSS B14 U14 VDD VSS N7 A6 VDDNB VSS AA13 CPU_V_HT AJ1 H1
F7 VDD VSS B16 U16 VDD VSS N9 B5 VDDNB VSS AA15 AJ2 VLDT_A VLDT_B H2
OPTERON
G6 VDD VSS B18 U18 VDD VSS N11 B7 VDDNB VSS AA17 AJ3 VLDT_A VLDT_B H5
11/04 VDD VSS VDD VSS VDDNB VSS VLDT_A
OPTERON
VLDT_B
1
1D5V_MEM 1D5V_MEM G8 B20 U20 N13 C6 AA19 AJ4 H6
H7 VDD VSS B22 U22 VDD VSS N15 C8 VDDNB VSS AA21 C529 V_1P2 VLDT_A VLDT_B V_1P2
H11 VDD VSS B24 V9 VDD VSS N17 D7 VDDNB VSS AA23 SC4D7U10V5ZY-3-LL-GP
VDD VSS VDD VSS VDDNB VSS
2
H23 B26 V11 N19 D9 AB2 A12 AG12
J8 VDD VSS B28 V13 VDD VSS N21 E8 VDDNB VSS AB3 B12 VDDR VDDR AH12
J12 VDD VSS B30 V15 VDD VSS N23 E10 VDDNB VSS AB8 C12 VDDR VDDR AJ12
J14 VDD VSS C3 V17 VDD VSS P2 F9 VDDNB VSS AB10 D12 VDDR VDDR AK12
J16
J18
VDD
VDD
VSS
VSS
D14
D16
V19
V21
VDD
VDD
VSS
VSS
P3
P8
F11
G10
VDDNB
VDDNB
VSS
VSS
AB12
AB14
11/04 1D5V_MEM VDDR VDDR
VDDR
AL12
J20 VDD VSS D18 V23 VDD VSS P10 G12 VDDNB VSS AB16 M24
J22 VDD VSS D20 W4 VDD VSS P12 VDDNB VSS AB18 M26 VDDIO AF18
V_CPU V_CPU J24 VDD VSS D22 W5 VDD VSS P14 VSS AB20 M28 VDDIO VSS AF20
K7 VDD VSS D24 W8 VDD VSS P16 VSS AB22 M30 VDDIO VSS AF22
K9 VDD VSS D26 W10 VDD VSS P18 VSS AC7 P24 VDDIO VSS AF24
K11 VDD VSS D28 W12 VDD VSS P20 VSS AC9 P26 VDDIO VSS AF26
POWER/GND4
V_CPU_NB V_CPU_NB K13 VDD VSS D30 W14 VDD VSS P22 VSS AC11 P28 VDDIO VSS AF28
VDD VSS VDD VSS VSS VDDIO VSS
POWER/GND3
K15 E11 W16 R7 AC13 P30 AG10
K17 VDD VSS F4 W18 VDD VSS R9 VSS AC15 T24 VDDIO VSS AG11
K19 VDD VSS F14 W20 VDD VSS R11 VSS AC17 T26 VDDIO VSS AH14
K21 VDD VSS F16 W22 VDD VSS R13 VSS AC19 T28 VDDIO VSS AH16
K23 VDD VSS F18 Y2 VDD VSS R15 VSS AC21 T30 VDDIO VSS AH18
L4 VDD VSS F20 Y3 VDD VSS R17 VSS AC23 V25 VDDIO VSS AH20
L5 VDD VSS F22 Y7 VDD VSS R19 VSS AD8 V26 VDDIO VSS AH22
L12 VDD VSS F28 Y13 VDD VSS T8 VSS AD14 Y24 VDDIO VSS AH28
L14 VDD VSS F30 Y15 VDD VSS T10 VSS AD16 Y26 VDDIO VSS AH30
VDD VSS VDD VSS VSS VDDIO VSS
POWER/GND2
L16 G9 Y17 T12 AD20 Y28 AK2
L18 VDD VSS G11 Y19 VDD VSS T14 B2 VSS AD22 Y29 VDDIO VSS AK14
VDD VSS VDD VSS NP/RSVD VSS VDDIO VSS
POWER/GND1
L20 H8 Y21 T16 AD24 AB24 AK16
L22 VDD VSS H10 Y23 VDD VSS T18 VSS AE4 AB26 VDDIO VSS AK18
M2 VDD VSS H12 AA8 VDD VSS T20 H20 VSS AE5 AB28 VDDIO VSS AK20
M3 VDD VSS H14 AA10 VDD VSS T22 AE7 NP/VSS1 VSS AE11 AB30 VDDIO VSS AK22
M7 VDD VSS H16 AA12 VDD VSS U4 NP/VSS2 VSS AF2 AC24 VDDIO VSS AK24
M9 VDD VSS H18 AA14 VDD VSS U5 VSS AF3 AD26 VDDIO VSS AK26
M15 VDD VSS H28 AA20 VDD VSS U11 VSS AF12 AF30 VDDIO VSS AL5
M17 VDD VSS H30 AA22 VDD VSS U13 VSS AF14 VDDIO VSS
M19 VDD VSS J4 AB7 VDD VSS U15 VSS AF16
M21 VDD VSS J5 AB9 VDD VSS U17 VSS OPTER
M23 VDD VSS J7 AB11 VDD VSS U19
N8 VDD VSS J9 AB13 VDD VSS U21
OPTER (62.10055.351)
N10 VDD VSS J11 AB15 VDD VSS U23
N12 VDD VSS J13 AB17 VDD VSS V2 (62.10055.351)
N14 VDD VSS J15 AB19 VDD VSS V3
N20 VDD VSS J21 AC4 VDD VSS V14
N22 VDD VSS J23 AC5 VDD VSS V16
P7 VDD VSS K2 AC8 VDD VSS V18
P13 VDD VSS K10 AC14 VDD VSS W7
P23 VDD VSS K20 AD2 VDD VSS W17
R4 VDD VSS K22 AD3 VDD VSS W19
R10 VDD VSS K28 AD11 VDD VSS Y8
R12 VDD VSS K30 AD23 VDD VSS Y10
R14 VDD VSS L7 AE10 VDD VSS Y12
R16 VDD VSS L9 AE12 VDD VSS Y14
R18 VDD VSS L11 AF7 VDD VSS Y16
T2 VDD VSS L17 AG4 VDD VSS Y22
T3 VDD VSS L19 AG5 VDD VSS AA4
T7 VDD VSS L21 AG7 VDD VSS AA5
T9 VDD VSS L23 AH2 VDD VSS AA7
T11 VDD VSS M8 AH3 VDD VSS AA9
T13 VDD VSS M10 VDD VSS
VDD VSS
OPTER
OPTER
(62.10055.351) (62.10055.351)
<Variant Nam e>
Hsichih, Taipei
Title
CPU POWER/GND
A2
Barbados 1B
VDDR DECOUPLING CAP
V_1P2
VLDT DECOUPLING CAP VDDNB DECOUPLING CAP
PLACE NEAR CPU SOCKET SIDES V_1P2 V_CPU_NB
1
PLACE NEAR CPU SOCKET SIDES PLACE NEAR CPU SOCKET SIDES
1
C87 C804 C153 C612 C627
C156 C276 C585 C88 C90 C183 C181 C699 C698 C180
2
2
SC22U6D3V5MX-2GP SC10U6D3V5MX-3-LL-GP SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP
2
SC10U6D3V5MX-3-LL-GP SC10U6D3V5MX-3-LL-GP SC10U6D3V5MX-3-LL-GP SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC10U6D3V5MX-3-LL-GP SC10U6D3V5MX-3-LL-GP SC4D7U6D3V3KX-GP
1
1
C163 C168 C151 C152 C89
C526 C514 C523 C524 C553 C545 C530
2
2
SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP SC180P50V2JN-1LLGP SC180P50V2JN-1LLGP SC180P50V2JN-1LLGP
2
SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP SCD01U16V2KX-3GP SCD01U16V2KX-3GP
1
1
C521 C531 C158 C160 C149
SCD22U6D3V2KX-1GP
2
2
SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP
1
C575 C161 C154

2
SCD01U16V2KX-3GP SCD01U16V2KX-3GP SCD01U16V2KX-3GP
VDD DECOUPLING CAP BRIDGE-CAP

V_CPU 1D5V_MEM 1D5V_MEM VDDIO DECOUPLING CAP
PLACE NEAR CPU SOCKET SIDES Places these CAP location between the socket and DIMM, PLACE NEAR CPU SOCKET SIDES
1
1
C559 C558 C557 C562 C560 C857 C840 C843 C820 C796 C687 C680 C737 C685 C715
SCD22U16V2ZY-LL-GP
2
2
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
SC4D7U10V5ZY-3-LL-GP SC4D7U10V5ZY-3-LL-GP SC4D7U10V5ZY-3-LL-GP SC4D7U10V5ZY-3-LL-GP SC180P50V2JN-1GP
1
1
C601 C602 C598 C599 C600 C833 C776 C819 C759 C777 C716 C736 C686 C683 C727
2
2
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SCD22U6D3V2KX-1GP SC10U10V5ZY-1-LL-GP SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP SCD01U16V2KX-3GP
SC180P50V2JN-1GP SC180P50V2JN-1GP SC180P50V2JN-1GP SC180P50V2JN-1GP SC180P50V2JN-1GP
1
2
C603 C563 C561 C642 C643 C754 C798 C753 C758 C730 C707 C708
2
1
SC22U6D3V5MX-2GP SC10U6D3V5MX-3-LL-GP SC10U6D3V5MX-3-LL-GP SC10U6D3V5MX-3-LL-GP SC10U6D3V5MX-3-LL-GP SCD01U16V2KX-3GP SC180P50V2JN-1GP SC180P50V2JN-1GP
SC100P50V2JN-3-LL-GP SC100P50V2JN-3-LL-GP SC10P50V2JN-4GP SC10P50V2JN-4GP
1
C644 C645 C646 C648 C647

2
SC10U6D3V5MX-3-LL-GP SC10U6D3V5MX-3-LL-GP SC10U6D3V5MX-3-LL-GP SC4D7U10V5ZY-3-LL-GP SC4D7U10V5ZY-3-LL-GP
EMI OPTIONS
V_CPU V_CPU_NB
1
C604 C564 C565 C649 C605 C522

1
SC2D2U6D3V2MX-GP
2
SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP
2
SC4D7U10V5ZY-3-LL-GP SCD01U16V2KX-3GP SCD01U16V2KX-3GP

V_CPU
(R)
1D5V_MEM 11/04
(R)
C693 SC2D2U6D3V2MX-GP
1 1
2 2
C688 (R) SC2D2U6D3V2MX-GP

1
C606
SC180P50V2JN-1LLGP
2
SC22U6D3V5MX-2GP -- CHIP CAP C 22U 6.3V M0805 X5R

SC10U6D3V5MX-3-LL-GP -- CHIP CAP C 10U 6.3V M0805 X5R
SC4D7U10V5ZY-3-LL-GP -- CHIP CAP C 4.7U 10V Z0805 Y5V CHIP CAP C 4.7U 6.3V 0603 X5R 78.47520.5BL
SCD22U16V2ZY-1GP -- CHIP CAP C 0.22U 16V Z0402 Y5V CHIP CAP C .22U 6.3V 0402 X5R 78.22420.5FL
SCD01U16V2KX-3GP -- CHIP CAP0.01U16V K0402 X7R(ROH
<Variant Nam e>
SC180P50V2JN-1GP -- CHIP CAPACITOR C 180P 50V J0402 NPO Wistron Incorporated
SC100P50V2JN-3-LL-GP -- CHIP CAPACITOR C 100P 50V J0402 NPO 21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
CPU DECOUPLING
A2
Barbados 1B
5 4 3 2 1
HT_RXCAD0_P
9 HT_CADOUT0_P
HT_RXCAD0_N
9 HT_CADOUT0_N
HT_RXCAD1_P
9 HT_CADOUT1_P
D HT_RXCAD1_N D
9 HT_CADOUT1_N
HT_RXCAD2_P
9 HT_CADOUT2_P
HT_RXCAD2_N
9 HT_CADOUT2_N
HT_RXCAD3_P
9 HT_CADOUT3_P
HT_RXCAD3_N
9 HT_CADOUT3_N
HT_RXCAD4_P
9 HT_CADOUT4_P
HT_RXCAD4_N
9 HT_CADOUT4_N
HT_RXCAD5_P
9 HT_CADOUT5_P
HT_RXCAD5_N
9 HT_CADOUT5_N
HT_RXCAD6_P
9 HT_CADOUT6_P
HT_RXCAD6_N
9 HT_CADOUT6_N
HT_RXCAD7_P U6A 1 OF 6
9 HT_CADOUT7_P
HT_RXCAD7_N HT_RXCAD0_P Y25 D24 HT_TXCAD0_P
9 HT_CADOUT7_N HT_RXCAD0P HT_TXCAD0P
HT_RXCAD0_N Y24 D25 HT_TXCAD0_N
HT_RXCAD8_P HT_RXCAD1_P V22 HT_RXCAD0N HT_TXCAD0N E24 HT_TXCAD1_P
9 HT_CADOUT8_P HT_RXCAD1P HT_TXCAD1P
HT_RXCAD8_N HT_RXCAD1_N V23 E25 HT_TXCAD1_N
9 HT_CADOUT8_N V25 HT_RXCAD1N HT_TXCAD1N F24
HT_RXCAD9_P HT_RXCAD2_P HT_TXCAD2_P
HT_RXCAD9_N HT_RXCAD2_N V24 F25 HT_TXCAD2_N
9 HT_CADOUT9_N HT_RXCAD2N HT_TXCAD2N
HT_RXCAD10_P HT_RXCAD3_P U24 F23 HT_TXCAD3_P
HT_RXCAD10_N HT_RXCAD3_N U25 F22 HT_TXCAD3_N
HT_RXCAD11_P HT_RXCAD4_P T25 H23 HT_TXCAD4_P
9 HT_CADOUT11_P T24 HT_RXCAD4P HT_TXCAD4P H22
HT_RXCAD11_N HT_RXCAD4_N HT_TXCAD4_N
HT_RXCAD12_P HT_RXCAD5_P P22 J25 HT_TXCAD5_P
HT_RXCAD12_N HT_RXCAD5_N P23 J24 HT_TXCAD5_N
HT_RXCAD13_P HT_RXCAD6_P P25 K24 HT_TXCAD6_P
HT_RXCAD13_N HT_RXCAD6_N P24 K25 HT_TXCAD6_N
9 HT_CADOUT13_N N24 HT_RXCAD6N HT_TXCAD6N K23
HT_RXCAD14_P HT_RXCAD7_P HT_TXCAD7_P
HT_RXCAD14_N HT_RXCAD7_N N25 K22 HT_TXCAD7_N
HT_RXCAD15_P
9 HT_CADOUT15_P
HT_RXCAD15_N HT_RXCAD8_P AC24 F21 HT_TXCAD8_P
9 HT_CADOUT15_N HT_RXCAD8P HT_TXCAD8P
C HT_RXCAD8_N AC25 G21 HT_TXCAD8_N C
HT_RXCLK0_P HT_RXCAD9_P AB25 HT_RXCAD8N HT_TXCAD8N G20 HT_TXCAD9_P
9 HT_CLKOUT0_P HT_RXCAD9P HT_TXCAD9P
HT_RXCLK0_N HT_RXCAD9_N AB24 H21 HT_TXCAD9_N
9 HT_CLKOUT0_N HT_RXCAD9N HT_TXCAD9N
HT_RXCLK1_P HT_RXCAD10_P AA24 J20 HT_TXCAD10_P
9 HT_CLKOUT1_P HT_RXCAD10P HT_TXCAD10P
HT_RXCLK1_N HT_RXCAD10_N AA25 J21 HT_TXCAD10_N
9 HT_CLKOUT1_N HT_RXCAD10N HT_TXCAD10N
HT_RXCAD11_P Y22 J18 HT_TXCAD11_P
HT_RXCTL0_P HT_RXCAD11_N Y23 HT_RXCAD11P HT_TXCAD11P K17 HT_TXCAD11_N
9 HT_CTLOUT0_P HT_RXCAD11N HT_TXCAD11N
HT_RXCTL0_N HT_RXCAD12_P W21 L19 HT_TXCAD12_P
9 HT_CTLOUT0_N HT_RXCAD12P HT_TXCAD12P
HT_RXCTL1_P HT_RXCAD12_N W20 J19 HT_TXCAD12_N
9 HT_CTLOUT1_P HT_RXCAD12N HT_TXCAD12N
HT_RXCTL1_N HT_RXCAD13_P V21 M19 HT_TXCAD13_P
9 HT_CTLOUT1_N HT_RXCAD13P HT_TXCAD13P
HT_RXCAD13_N V20 L18 HT_TXCAD13_N
HT_RXCAD14_P U20 HT_RXCAD13N HT_TXCAD13N M21 HT_TXCAD14_P
HT_RXCAD14_N U21 HT_RXCAD14P HT_TXCAD14P P21 HT_TXCAD14_N
HT_RXCAD15_P U19 HT_RXCAD14N HT_TXCAD14N P18 HT_TXCAD15_P
HT_RXCAD15_N U18 HT_RXCAD15P HT_TXCAD15P M18 HT_TXCAD15_N
HT_RXCAD15N HT_TXCAD15N
HT_RXCLK0_P T22 H24 HT_TXCLK0_P
HT_RXCLK0_N T23 HT_RXCLK0P HT_TXCLK0P H25 HT_TXCLK0_N
HT_RXCLK1_P AB23 HT_RXCLK0N HT_TXCLK0N L21 HT_TXCLK1_P
HT_RXCLK1_N AA22 HT_RXCLK1P HT_TXCLK1P L20 HT_TXCLK1_N
HT_RXCLK1N HT_TXCLK1N
HT_TXCAD0_P HT_RXCTL0_P M22 M24 HT_TXCTL0_P
HT_CADIN0_P 9 HT_RXCTL0P HT_TXCTL0P
HT_TXCAD0_N HT_RXCTL0_N M23 M25 HT_TXCTL0_N
HT_CADIN0_N 9 HT_RXCTL0N HT_TXCTL0N
HT_TXCAD1_P HT_RXCTL1_P R21 P19 HT_TXCTL1_P
HT_CADIN1_P 9 HT_RXCTL1P HT_TXCTL1P
HT_TXCAD1_N HT_RXCTL1_N R20 R18 HT_TXCTL1_N
HT_CADIN1_N 9 HT_RXCTL1N HT_TXCTL1N
HT_TXCAD2_P
HT_CADIN2_P 9 1 R583 2 C23 B24 2 1
HT_TXCAD2_N HT_RXCALP HT_TXCALP R571
HT_CADIN2_N 9 HT_RXCALP HT_TXCALP
HT_TXCAD3_P 301R2F-GP HT_RXCALN A24 B25 HT_TXCALN 301R2F-GP
HT_CADIN3_P 9 HT_RXCALN HT_TXCALN
HT_TXCAD3_N
HT_CADIN3_N 9
HT_TXCAD4_P RS780L-GP
B HT_TXCAD4_N
HT_CADIN4_P 9 Place < 100 mils Place < 100 mils B
HT_CADIN4_N 9
HT_TXCAD5_P
HT_TXCAD5_N
HT_CADIN5_P 9 from C23 and A24 (71.RS780.M15) from B24 and B25
HT_CADIN5_N 9
HT_TXCAD6_P
HT_CADIN6_P 9
HT_TXCAD6_N
HT_CADIN6_N 9
HT_TXCAD7_P
HT_CADIN7_P 9
HT_TXCAD7_N
HT_CADIN7_N 9
HT_TXCAD8_P
HT_CADIN8_P 9
HT_TXCAD8_N
HT_CADIN8_N 9
HT_TXCAD9_P
HT_CADIN9_P 9
HT_TXCAD9_N RX780/RS740/RS780 difference table (HT LINK)
HT_CADIN9_N 9
HT_TXCAD10_P
HT_CADIN10_P 9
HT_TXCAD10_N SIGNALS RS740 RX780 RS780
HT_CADIN10_N 9
HT_TXCAD11_P
HT_CADIN11_P 9
HT_TXCAD11_N HT_RXCALP 49.9R (GND)
HT_CADIN11_N 9
HT_TXCAD12_P 1.21K 301R
HT_CADIN12_P 9
HT_TXCAD12_N HT_RXCALN 49.9R (VDDHT)
HT_CADIN12_N 9
HT_TXCAD13_P
HT_CADIN13_P 9
HT_TXCAD13_N HT_TXCALP
HT_CADIN13_N 9
HT_TXCAD14_P 100R 1.21K 301R
HT_CADIN14_P 9
HT_TXCAD14_N HT_TXCALN
HT_CADIN14_N 9
HT_TXCAD15_P
HT_CADIN15_P 9
HT_TXCAD15_N
HT_CADIN15_N 9
HT_TXCLK0_P
HT_CLKIN0_P 9
HT_TXCLK0_N
HT_CLKIN0_N 9
HT_TXCLK1_P
HT_CLKIN1_P 9
HT_TXCLK1_N
HT_CLKIN1_N 9
A HT_TXCTL0_P A
HT_CTLIN0_P 9
HT_TXCTL0_N
HT_CTLIN0_N 9 <Variant Name>
HT_TXCTL1_P
HT_CTLIN1_P 9
HT_TXCTL1_N
HT_CTLIN1_N 9 Wistron Incorporated
Hsichih, Taipei
Title
RS780L-HT LINK0 I/F
Custom
Barbados 1B
5 4 3 2 1
5 4 3 2 1
GFX_TX0P (M) C150 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP0

54 PEG_RXP[15..0] 54 PEG_RXN[15..0]
PEG_RXP0 PEG_RXN0
PEG_RXP1 PEG_RXN1 GFX_TX0N (M) C148 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN0
PEG_RXP2 PEG_RXN2
PEG_RXP3 PEG_RXN3 GFX_TX1P (M) C147 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP1
PEG_RXP4 PEG_RXN4 Place Close to
PEG_RXP6 PEG_RXN6
PCIEX16 Connector
PEG_RXP7 PEG_RXN7 GFX_TX2P (M) C145 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP2
PEG_RXP8 PEG_RXN8
PEG_RXP10 PEG_RXN10
D PEG_RXP11 PEG_RXN11 GFX_TX3P (M) C142 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP3 D
PEG_RXP12 PEG_RXN12 U6B 2 OF 6
PEG_RXP13 PEG_RXN13 PEG_RXN15 D4 A5 GFX_TX15N GFX_TX3N (M) C141 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN3
PEG_RXP14 PEG_RXN14 PEG_RXP15 C4 GFX_RX0P GFX_TX0P B5 GFX_TX15P
PEG_RXP15 PEG_RXN15 PEG_RXN14 A3 GFX_RX0N GFX_TX0N A4 GFX_TX14N GFX_TX4P (M) C140 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP4
PEG_RXP14 B3 GFX_RX1P GFX_TX1P B4 GFX_TX14P
PEG_RXN13 C2 GFX_RX1N GFX_TX1N C3 GFX_TX13N GFX_TX4N (M) C139 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN4
PEG_RXP13 C1 GFX_RX2P GFX_TX2P B2 GFX_TX13P
PEG_RXN12 E5 GFX_RX2N GFX_TX2N D1 GFX_TX12N GFX_TX5P (M) C138 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP5
PEG_RXP12 F5 GFX_RX3P GFX_TX3P D2 GFX_TX12P
PEG_RXN11 G5 GFX_RX3N GFX_TX3N E2 GFX_TX11N GFX_TX5N (M) C137 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN5
PEG_RXP11 G6 GFX_RX4P GFX_TX4P E1 GFX_TX11P
54 PEG_TXP[15..0] 54 PEG_TXN[15..0] GFX_RX4N GFX_TX4N
PEG_TXP0 PEG_TXN0 PEG_RXN10 H5 F4 GFX_TX10N GFX_TX6P (M) C136 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP6
PEG_TXP1 PEG_TXN1 PEG_RXP10 H6 GFX_RX5P GFX_TX5P F3 GFX_TX10P
PEG_TXP2 PEG_TXN2 PEG_RXN9 J6 GFX_RX5N GFX_TX5N F1 GFX_TX9N GFX_TX6N (M) C135 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN6
PEG_TXP3 PEG_TXN3 PEG_RXP9 J5 GFX_RX6P GFX_TX6P F2 GFX_TX9P
PEG_TXP4 PEG_TXN4 PEG_RXN8 J7 GFX_RX6N GFX_TX6N H4 GFX_TX8N GFX_TX7P (M) C134 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP7
PEG_TXP5 PEG_TXN5 PEG_RXP8 J8 GFX_RX7P GFX_TX7P H3 GFX_TX8P
PEG_TXP6 PEG_TXN6 PEG_RXN7 L5 GFX_RX7N GFX_TX7N H1 GFX_TX7N GFX_TX7N (M) C133 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN7
PEG_TXP7 PEG_TXN7 PEG_RXP7 L6 GFX_RX8P GFX_TX8P H2 GFX_TX7P
PEG_TXP8 PEG_TXN8 PEG_RXN6 M8 GFX_RX8N GFX_TX8N J2 GFX_TX6N GFX_TX8P (M) C131 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP8
PEG_TXP9 PEG_TXN9 PEG_RXP6 L8 GFX_RX9P GFX_TX9P J1 GFX_TX6P
PEG_TXP10 PEG_TXN10 PEG_RXN5 P7 GFX_RX9N GFX_TX9N K4 GFX_TX5N GFX_TX8N (M) C130 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN8
PEG_TXP11 PEG_TXN11 PEG_RXP5 M7 GFX_RX10P GFX_TX10P K3 GFX_TX5P
PEG_TXP12 PEG_TXN12 PEG_RXN4 P5 GFX_RX10N GFX_TX10N K1 GFX_TX4N GFX_TX9P (M) C128 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP9
PEG_TXP13 PEG_TXN13 PEG_RXP4 M5 GFX_RX11P GFX_TX11P K2 GFX_TX4P
PEG_TXP14 PEG_TXN14 PEG_RXN3 R8 GFX_RX11N GFX_TX11N M4 GFX_TX3N GFX_TX9N (M) C127 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN9
PEG_TXP15 PEG_TXN15 PEG_RXP3 P8 GFX_RX12P GFX_TX12P M3 GFX_TX3P
GFX_RX12N GFX_TX12N
PCIE I/F
PEG_RXN2 R6 M1 GFX_TX2N GFX_TX10P (M) C125 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP10
PEG_RXP2 R5 GFX_RX13P GFX_TX13P M2 GFX_TX2P
GFX
C PCIE_X1_RXP0 PEG_RXN1 P4 GFX_RX13N GFX_TX13N N2 GFX_TX1N GFX_TX10N (M) C124 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN10 C
30 PCIE_X1_RXP0 GFX_RX14P GFX_TX14P
PCIE_X1_RXN0 PEG_RXP1 P3 N1 GFX_TX1P
30 PCIE_X1_RXN0 GFX_RX14N GFX_TX14N
PEG_RXN0 T4 P1 GFX_TX0N GFX_TX11P (M) C122 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP11
PEG_RXP0 T3 GFX_RX15P GFX_TX15P P2 GFX_TX0P
GFX_RX15N GFX_TX15N GFX_TX11N (M) C120 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN11
PCIE_X1_TXP0 PCIE_X1_RXP0 AE3 AC1 GPP_TX0P_C C169 1 2 SCD1U10V2KX-4-LL-GP PCIE_X1_TXP0
PCIE_X1_TXP0 30 GPP_RX0P GPP_TX0P
PCIE_X1_TXN0 PCIE_X1_RXN0 AD4 AC2 GPP_TX0N_C C178 1 2 SCD1U10V2KX-4-LL-GP PCIE_X1_TXN0 GFX_TX12P (M) C119 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP12
PCIE_X1_TXN0 30 GPP_RX0N GPP_TX0N
PCIE_X1_RXP1 AE2 AB4 GPP_TX1P_C C164 1 2 SCD1U10V2KX-4-LL-GP PCIE_X1_TXP1
PCIE_X1_RXP1 PCIE_X1_RXN1 AD3 GPP_RX1P GPP_TX1P AB3 GPP_TX1N_C C166 1 2 SCD1U10V2KX-4-LL-GP PCIE_X1_TXN1 GFX_TX12N (M) C116 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN12
30 PCIE_X1_RXP1 GPP_RX1N GPP_TX1N
PCIE_X1_RXN1 AD1 AA2
30 PCIE_X1_RXN1 GPP_RX2P GPP_TX2P
AD2 PCIE I/F GPP AA1 GFX_TX13P (M) C107 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP13
PCIE_GLAN_RXP V5 GPP_RX2N GPP_TX2N Y1 GPP_TX3P_C C159 1 2 SCD1U10V2KX-4-LL-GP PCIE_GLAN_TXP
PCIE_GLAN_RXN W6 GPP_RX3P GPP_TX3P Y2 GPP_TX3N_C C162 1 2 SCD1U10V2KX-4-LL-GP PCIE_GLAN_TXN GFX_TX13N (M) C103 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN13
PCIE_X1_TXP1 U5 GPP_RX3N GPP_TX3N Y4
PCIE_X1_TXP1 30 GPP_RX4P GPP_TX4P
PCIE_X1_TXN1 U6 Y3 GFX_TX14P (M) C102 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP14
PCIE_X1_TXN1 30 GPP_RX4N GPP_TX4N
PCIE_RXP4 U8 V1 GPP_TX5P_C C155 1 2 SCD1U10V2KX-4-LL-GP PCIE_TXP4
PCIE_RXN4 U7 GPP_RX5P GPP_TX5P V2 GPP_TX5N_C C157 1 2 SCD1U10V2KX-4-LL-GP PCIE_TXN4 GFX_TX14N (M) C98 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN14
PCIE_GLAN_TXP
GPP_RX5N GPP_TX5N
PCIE_GLAN_TXP 39
PCIE_GLAN_TXN A_RX0P AA8 AD7 A_TX0P_C C170 1 2 SCD1U10V2KX-4-LL-GP A_TX0P GFX_TX15P (M) C97 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP15
PCIE_GLAN_TXN 39 SB_RX0P SB_TX0P
A_RX0N Y8 AE7 A_TX0N_C C171 1 2 SCD1U10V2KX-4-LL-GP A_TX0N
A_RX1P AA7 SB_RX0N SB_TX0N AE6 A_TX1P_C C173 1 2 SCD1U10V2KX-4-LL-GP A_TX1P GFX_TX15N (M) C95 1 2 SCD1U10V2KX-4-LL-GP PEG_TXN15
PCIE_GLAN_RXP A_RX1N Y7 SB_RX1P SB_TX1P AD6 A_TX1N_C C172 1 2 SCD1U10V2KX-4-LL-GP A_TX1N
39 PCIE_GLAN_RXP SB_RX1N SB_TX1N
PCIE_GLAN_RXN A_RX2P AA5 PCIE I/F SB AB6 A_TX2P_C C176 1 2 SCD1U10V2KX-4-LL-GP A_TX2P
39 PCIE_GLAN_RXN SB_RX2P SB_TX2P
A_RX2N AA6 AC6 A_TX2N_C C177 1 2 SCD1U10V2KX-4-LL-GP A_TX2N
A_RX3P W5 SB_RX2N SB_TX2N AD5 A_TX3P_C C174 1 2 SCD1U10V2KX-4-LL-GP A_TX3P
A_RX3N Y5 SB_RX3P SB_TX3P AE5 A_TX3N_C C175 1 2 SCD1U10V2KX-4-LL-GP A_TX3N
PCIE_TXP4 SB_RX3N SB_TX3N
PCIE_TXP4 35
PCIE_TXN4 AC8 NB_PCE_PCAL 1 R625 2 1K27R2F-L-GP V_1P1
PCIE_TXN4 35 PCE_CALRP AB8 NB_PCE_NCAL 1 2 2KR2F-3-GP
PCE_CALRN R622
B B
35 PCIE_RXP4
PCIE_RXP4 RS780L-GP Place < 100mils from pin AC8 and AB8
PCIE_RXN4
35 PCIE_RXN4
23 A_RX0P A_RX0P (71.RS780.M15) VCC_NB=VCC1D1V

23 A_RX0N A_RX0N
23 A_RX1P A_RX1P
23 A_RX1N A_RX1N
23 A_RX2P A_RX2P
23 A_RX2N A_RX2N RX780/RS740/RS780 GPP difference table
23 A_RX3P A_RX3P RS780 RS740/RS780 GPP Routing table
A_RX3N RS740 RS780
23 A_RX3N
GPP1 RS740
PCE_CALRP 562R (GND) 1.27K (GND)
GPP X1 CONNECTOR GPP1
GPP4 NC GPP4
A_TX0P GIGABIT ETHERNET GPP3
23 A_TX0P
A_TX0N GPP5 NC GPP5
23 A_TX0N
A_TX1P
23 A_TX1P
A_TX1N
23 A_TX1N
A_TX2P
23 A_TX2P
A_TX2N
23 A_TX2N
A_TX3P
23 A_TX3P
A_TX3N
23 A_TX3N
RS780 Display Port Support (muxed on GFX)
GFX_TX0,TX1,TX2 and TX3

DP0
AUX0 and HPD0
A A
<Variant Name>
GFX_TX4,TX5,TX6 and TX7
DP1
AUX1 and HPD1 Wistron Incorporated
Hsichih, Taipei
Title
RS780L-PCIE LINK I/F

Custom
Barbados 1B

5 4 3 2 1
5 4 3 2 1
11/16
3.3V 110mA
3D3V_S0 AVDD 68.00082.311
2 1 300ohmΩ/100MHz, 0.25Ω,0.5A
68.00082.311 L49
FCM 1608KFG-301T 05-GP C504
300ohmΩ/100MHz, 0.25Ω,0.5A
SC2D2U6D3V3M X-1-GP
V_1P1 1.8V 65mA 1D8V 11/16
2 1 PLLVDD
L10
FCM 1608KFG-301T 05-GP 1.8V 20mA U6C 3 OF 6
11/07 Delete TMDS interface
C101 2 1 F12 A22
L51 E12 AVDD TXOUT_L0P B22
AVDD TXOUT_L0N
1
SC2D2U6D3V3M X-1-GP FCM 1608KFG-301T 05-GP AVDD_18 F14 A21
G15 AVDDDI TXOUT_L1P B21
C534
H15 AVSSDI TXOUT_L1N B20
AVDDQ TXOUT_L2P
2
SCD1U10V2KX-4-LL-GP H14 A20
AVDDQ AVSSQ TXOUT_L2N A19
D D
E17 TXOUT_L3P B19
F17 RESERVED#E17 TXOUT_L3N
F15 RESERVED#F17 B18
VGA_RED RESERVED#F15 TXOUT_U0P A18
31 VGA_RED
31 VGA_RED
NOTE: CONNECT CLOSE TO HF DECOUPLING CAPs
G18
RED
TXOUT_U0N
TXOUT_U1P
A17 11/04
VGA_GREEN G17 B17
31 VGA_GREEN E18 RED# TXOUT_U1N D20
31 VGA_BLUE
VGA_BLUE 1D8V 11/04AVDDQ 31 VGA_GREEN F18 GREEN
GREEN#
TXOUT_U2P
TXOUT_U2N
D21 1.8V 15mA 1D8V
E19 D18
31 VGA_BLUE F19 BLUE TXOUT_U3P D19
1.8V 4mA BLUE# TXOUT_U3N
L7
2 1 2 1
1
L46 HSYNC_NB A11 B16
DAC_HSYNC TXCLK_LP
1
B11 A16
SCD1U10V2KX-4-LL-GP
C94
SC2D2U6D3V3MX-1-GP
C93
SC10U10V5ZY-1-LL-GP
C92
NB_RST # FCM 1608KFG-301T 05-GP C502 R605 R587 R585 VSYNC_NB FCM 1608KFG-301T 05-GP
23 NB_RST #
CRT I/F
NB_PWRGD_IC 150R2F-1-GP 150R2F-1-GP VGA_PCH_DDCSCL F8 DAC_VSYNC TXCLK_LN D16
140R2F-GP
24 NB_PWRGD_IC LDT _ST OP# VGA_PCH_DDCSDA E8 DAC_SCL TXCLK_UP D17
10,23 LDT _ST OP# 1% 1% 1% DAC_SDA TXCLK_UN
2
ALLOW_LDT ST OP
23 ALLOW_LDT ST OP
2
R601 1 2 715R2F-GP RS485M _RSET G14
KG_NBHT _CLKP DAC_RSET A13 LPVDD18
8 KG_NBHT _CLKP KG_NBHT _CLKN A12 VDDLTP18 B13
8 KG_NBHT _CLKN
PLLVDD18
SC2D2U6D3V3M X-1-GP PLLVDD
PLLVDD18
D14 PLLVDD
PLLVDD18
VSSLTP18 R563 11/14
OSC_14M _NB B12 A15 LVDDR18D 1 (R) 2
8 OSC_14M _NB PLLVSS VDDLT18 B15
1.8V 20mA VDDLT18
2 1 H17 A14 VDDLT 33
KG_NBGFX_CLKP L9 VDDA18HT PLL VDDA18HTPLL VDDLT33 B14 0R2J-2-GP 1D8V 11/04
8 KG_NBGFX_CLKP
8 KG_NBGFX_CLKN
KG_NBGFX_CLKN FCM 1608KFG-301T 05-GP C100 11/30 VDDA18PCIEPLL
D7
VDDA18PCIEPLL
VDDLT33 T P4 T PAD30
11/04
E7 C14 1.8V 300mA
11/18 VDDA18PCIEPLL VSSLT
VSSLT
D15 2
L48
1 +1.8V_D D S
D8 C16
LVTM
V_1P1 23 NB_RST # NB_PWRGD_IC A10 SYSRESET# VSSLT C18 +12V_S0
FCM 1608KFG-301T 05-GP
KG_NBREF_CLKP NB_LDT _ST OP# R155 1 2 0R2-PT 5-LILY-GP LDT _ST OP#_NB C10 POWERGOOD VSSLT C20 Q68
8 KG_NBREF_CLKP LDTSTOP# VSSLT
G
1
KG_NBREF_CLKN SC2D2U6D3V3M X-1-GP R332 1 2 0R2-PT 5-LILY-GP ALLOW_LDT ST OP_NB C12 E20 2N7002-11-GP
8 KG_NBREF_CLKN 23 ALLOW_LDT ST OP ALLOW_LDTSTOP VSSLT C22
R600
R780 1 2 0R2-PT 5-LILY-GP KG_NBHT _CLKP_R C25 VSSLT
150R2F-1-GP 8 KG_NBHT _CLKP HT_REFCLKP
1
R778 1 2 0R2-PT 5-LILY-GP KG_NBHT _CLKN_R C24
11/07 Delete TMDS interface 8 KG_NBHT _CLKN HT_REFCLKN C506 C516
2
R582 1 2 0R2-PT 5-LILY-GP REFCLK_INP E11
11/04 8 OSC_14M _NB REFCLK_P
2
1D8V REFCLK_INN F11 E9 SC4D7U6D3V3KX-GP SCD1U10V2KX-4-LL-GP
VDDA18HT PLL REFCLK_N GPIO3 F7
GPIO2 Check MXM HPD
1
1.8V 20mA T2 G12
8 KG_NBGFX_CLKP T1 GFX_REFCLKP GPIO4
R604
2 1 8 KG_NBGFX_CLKN GFX_REFCLKN
150R2F-1-GP
CLOCKs
L47 NB_GPP_CLK_T EST P U1
FCM 1608KFG-301T 05-GP C501 FOR ONLY RX780 T PAD30 T P44
T PAD30 T P43
NB_GPP_CLK_T EST N U2 GPP_REFCLKP
GPP_REFCLKN
2
SC2D2U6D3V3M X-1-GP 3D3V_S0
V4
8 KG_NBREF_CLKP GPPSB_REFCLKP
2
V3
8 KG_NBREF_CLKN GPPSB_REFCLKN R562
B9
11/18 A9 I2C_CLK
I2C_DATA
MIS.
TMDS_HPD
D9
8K2R2J-3-GP
(M )
B8 D10 PCIEX16_HPDET IN_1 R558 1 2 0R2-PT 5-LILY-GP PCIEX16_HPDET IN
DDC_DATA0/AUX0N HPD
1
2
C A8 C
B7 DDC_CLK0/AUX0P D12 SUS_ST AT E# R559
A7 DDC_CLK1/AUX1P SUS_STAT# T P58
T P64 8K2R2J-3-GP
DDC_DATA1/AUX1N AE8 NBT HERND_P (UM A)
ST RP_DAT A B10 THERMALDIODE_P AD8 NBT HERND_N
T PAD30 T P3 STRP_DATA THERMALDIODE_N
1
1D8V 11/04 G11
RESERVED#G11 TESTMODE
D13 T EST _EN T PAD30
T PAD30
1
VDDA18PCIEPLL
1.8V 120mA RS780_AUX_CAL C8 R567
AUX_CAL 1K8R2-GP
1
2 1 RS780L-GP
L45 R156
2
FCM 1608KFG-301T 05-GP C503 150R2F-1-GP
SC2D2U6D3V3M X-1-GP (71.RS780.M15)
2
Place close to C8
STRAP
STRAP_DEBUG_BUS_GPIO_ENABLE
VSYNC_NB *1
Enables the Test Debug Bus using GPIO.
:Disable 0 : Enable
1D5V_M EM
Enables Side port memory
1D8V
HSYNC_NB *1 :Disable 0 : Enable
11/26
2
VGA_PCH_DDCSCL
31 VGA_PCH_DDCSCL
31 VGA_PCH_DDCSDA VGA_PCH_DDCSDA R153
1
Selects Loading of STRAPS From EEPROM

1KR2J-1-GP R154
4K7R2J-2-GP SUS_STAT# *0
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
1 1
HSYNC_NB
31 HSYNC_NB VSYNC_NB : I2C Master can load strap values from EEPROM if connected,
31 VSYNC_NB
2
or use default values if not connected

LDT _ST OP# 2 3 NB_LDT _ST OP#
Q24
PM BS3904-1-GP
24 SUS_ST AT E# SUS_ST AT E# 3D3V_S0 11/04 3D3V_S0 11/04 3D3V_S0 11/04
1
R564 R139 R151
8K2R2J-3-GP 3KR2J-2-GP 3KR2J-2-GP
B B
SUS_ST AT E# HSYNC_NB VSYNC_NB
2
2
1
R565 R138 R150
8K2R2J-3-GP 3KR2J-2-GP 3KR2J-2-GP
(R) (R) (R)
2
A A
<Variant Nam e>
21F, 88, Hs in Tai Wu Rd
Hs ichih, Taipei
T itle
780L-SYSTEM I/F & DDC
Custom
Barbados 1B
5 4 3 2 1
5 4 3 2 1
U6D 4 OF 6
AB12
MEM_A0 MEM_DQ0
AA18 (71.RS780.M15)
AE16 AA20
V11 MEM_A1 MEM_DQ1 AA19
AE15 MEM_A2 MEM_DQ2 Y19
RS740/RX780/RS780 POWER DIFFERENCE TABLE
AA12 MEM_A3 MEM_DQ3 V17
MEM_A4 MEM_DQ4
AE14
AB16 AA17 PIN NAME RS740 RX780 RS780 PIN NAME RS740 RX780 RS780
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
M11
D11
E14
E15
K14
MEM_A5 MEM_DQ5
L15
J15
J12
W1
W2
W4
W7
W8
AB14 AA15
M6
G1
G2
G4
G8
A2
B1
D3
D5
E4
H7
R7
N4
P6
R1
R2
R4
V7
U4
V8
V6
Y6
L1
L2
L4
L7
J4
AD14 MEM_A6 MEM_DQ6 Y15 VDDHT NC +1.1V +1.1V IOPLLVDD +1.2V NC +1.1V
AD13 MEM_A7 MEM_DQ7 AC20 U6F
6 OF 6
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D AD15 MEM_A8 MEM_DQ8 AD19 VDDHTRX NC +1.1V +1.1V AVDD +3.3V NC +3.3V D
RS780L-GP
AC16 MEM_A9 MEM_DQ9 AE22
AE13 MEM_A10 MEM_DQ10 AC18 VDDHTTX +1.2V +1.2V +1.2V AVDDDI +1.8V NC +1.8V
AC14 MEM_A11 MEM_DQ11 AB20
Y14 MEM_A12 MEM_DQ12 AD22 VDDA18PCIE NC +1.8V +1.8V AVDDQ +1.8V NC +1.8V
MEM_A13 MEM_DQ13 AC22
AD16 MEM_DQ14 AD21 VDD18 +1.8V +1.8V +1.8V PLLVDD +1.2V NC +1.1V
AE17 MEM_BA0 MEM_DQ15
AD17 MEM_BA1 Y17
GROUND
VDD18_MEM NC NC +1.8V PLLVDD18 +1.8V NC +1.8V
W12
MEM_BA2 MEM_DQS0P
MEM_DQS0N
W18
AD20
11/04
VDDPCIE +1.2V +1.1V +1.1V VDDA18PCIEPLL +1.2V +1.8V +1.8V
Y12 MEM_RAS# MEM_DQS1P AE21
AD18 MEM_CAS# MEM_DQS1N 1D8V V_1P1 VDDC +1.2V +1.1V +1.1V VDDA18HTPLL +1.8V +1.8V +1.8V
MEM_WE#
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
AB13 W17 1.8V 15mA
AB18 MEM_CS# MEM_DM0 AE19 R631 VDD_MEM +1.8V NC +1.8V(DDR2) VDDLTP18 +1.8V NC +1.8V
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V14 MEM_CKE MEM_DM1 0R0402-PAD +1.5V(DDR3)
MEM_ODT AE23 1D8V_IOPLL 1 2 VDD33 +3.3V NC +3.3V VDDLT18 +1.8V NC +1.8V
V15 IOPLLVDD18 AE24 1D1V_IOPLLVDD 1 2
MEM_CKP IOPLLVDD
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
W14 R630 IOPLLVDD18 +1.8V NC +1.8V VDDLT33 +3.3V NC NC
MEM_CKN AD23 0R0402-PAD
AE12 IOPLLVSS
MEM_COMPP 1.1V 26mA
AD12 AE18
MEM_COMPN MEM_VREF
RS780L-GP
(71.RS780.M15) 11/30
V_1P1
VDDHT
C
1.1V 600mA V_1P1 C
L57 U6E 5 OF 6 300mil Width 1.1V 2.5A L56
1 2 J17 A6 VCC_NB_PCIE 1 2
VDDHT VDDPCIE
1
K16 B6
SC4D7U6D3V3KX-GP
PBY201209T-221Y-N-GP PBY201209T-221Y-N-GP
VDDHT VDDPCIE
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
1
1
L16 C6
SC1U10V2KX-1-LL-GP
SC1U10V2KX-1-LL-GP
C634 C556 C595 C518 C525 C528 C583
M16 VDDHT VDDPCIE D6
2ND = 68.00216.161 C569 C626
VDDHT VDDPCIE
C982
2
P16 E6 SC1KP50V2KX-1-LL-GP
VDDHT VDDPCIE
2
2
V_1P1 R16 F6
SC4D7U6D3V3KX-GP SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP T16 VDDHT VDDPCIE G7 2/10 Rannie
VDDHTRX VDDHT VDDPCIE H8
VDDPCIE
L8 1.1V 700mA H18
VDDHTRX VDDPCIE
J9
1 2 G19 K9
PBY201209T-221Y-N-GP F20 VDDHTRX VDDPCIE M9
VDDHTRX VDDPCIE
1
E21 L9
VDDHTRX VDDPCIE
1
2ND = 68.00216.161 C99 C519 C513 C505 D22 P9

B23 VDDHTRX VDDPCIE R9
VDDHTRX VDDPCIE +NB_VCORE
2
2
A23 T9
VDDHTRX VDDPCIE
2
SC4D7U6D3V3KX-GP SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP V9

V_1P2 AE25 VDDPCIE U9 V_1P1
VDDHTTX AD24 VDDHTTX VDDPCIE
L59 1.2V 400mA VDDHTTX 1.1V 13A
1 2 AC23 K12
PBY201209T-221Y-N-GP AB22 VDDHTTX VDDC J14 C551 C568 C574 C582 C579 C592 C675 C640 C684
VDDHTTX VDDC
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SC10U6D3V5MX-3-LL-GP
SC10U6D3V5MX-3-LL-GP
1
1
C667 AA21 U16
Y20 VDDHTTX VDDC J11
2ND = 68.00216.161 C633 C650 C655 C661
VDDHTTX VDDC
W19 K15
VDDHTTX VDDC
2
2
V18 M12
SC4D7U6D3V3KX-GP SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP U17 VDDHTTX VDDC L14
SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP T17 VDDHTTX VDDC L11
R17 VDDHTTX VDDC M13
P17 VDDHTTX VDDC M15
11/04 1D8V VDDA18PCIE M17 VDDHTTX
VDDHTTX
VDDC
VDDC
N12
B L15 80mil Width 1.8V 700mA N14 B
1 2 J10 VDDC P11
VDDA18PCIE VDDC
POWER
P10 P13
SC4D7U6D3V3KX-GP
PBY201209T-221Y-N-GP
VDDA18PCIE VDDC
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
1
1
K10 P14
SC4D7U6D3V3KX-GP
C666 C179 C682 C677 C167 C690

M10 VDDA18PCIE VDDC R12
2ND = 68.00216.161 VDDA18PCIE VDDC
L10 R15
VDDA18PCIE VDDC
2
2
W9 T11
H9 VDDA18PCIE VDDC T15
T10 VDDA18PCIE VDDC U12
R10 VDDA18PCIE VDDC T14
Y9 VDDA18PCIE VDDC J16
AA9 VDDA18PCIE VDDC
AB9 VDDA18PCIE AE10 VDD_MEM 1 R189 2
AD9 VDDA18PCIE VDD_MEM AA11 0R0603-PAD
AE9 VDDA18PCIE VDD_MEM Y11
U10 VDDA18PCIE VDD_MEM AD10
11/04
1.8V 10mA 1D8V R568 VDD18_1 VDDA18PCIE VDD_MEM
VDD_MEM
AB10
1 2 F9 AC10
G9 VDD18 VDD_MEM VDD33_1 3D3V_S0
3.3V 60mA
VDD18 11/04
1
C510 VDD18_MEM_1 AE11 H11 1 2

0R0805-PAD VDD18_MEM VDD33
1
SC1U10V2KX-1-LL-GP AD11 H12 L50
VDD18_MEM VDD33
1
2
1.8V 25mA RS780L-GP C536 C538
2
SCD1U16V2ZY-2LLGP
11/04 R191
2
1D8V SCD1U16V2ZY-2LLGP
1 2 (71.RS780.M15)
1
C165
SC1U10V2KX-1-LL-GP
0R0805-PAD
2
A A
<Variant Name>
Hsichih, Taipei
Title
RS780L-POWER
Custom
Barbados 1B

5 4 3 2 1
5 4 3 2 1
D D
C
RESERVED C
B B
<Variant Name>
A A
Hsichih, Taipei
Title
RS760 (RESERVED)
A
Barbados 1B
5 4 3 2 1
5 4 3 2 1
D D
C RESERVED C
B B
<Variant Name>
A A
Hsichih, Taipei
Title
RS760 (RESERVED)
A
Barbados 1B
5 4 3 2 1
5 4 3 2 1
Height ?
Standard or Reverse ?
Lotes 22.10244.K41(Blue) and
MEM_A0 MEM_B0 22.10244.K31(Black)
Tyco 22.10244.K21(Blue) and
22.10244.K51(Black)
SO-DIMM 9.2mm
D D
11 MEM_MA_DATA[63..0] MEM_MA_DATA63
12 MEM_MB_DATA[63..0] MEM_MB_DATA63
MEM_MB_DATA62
SO-DIMM 5.2mm
MEM_MA_DATA62 MEM_MB_DATA61 DIMM2
MEM_MA_DATA61 MEM_MB_DATA60 DIMM1
MEM_MA_DATA60 MEM_MB_DATA59 MEM_MA_ADD0 98 NP1 SMB_MEM BUS ADDRESS
MEM_MA_DATA59 MEM_MB_DATA58 MEM_MA_ADD1 97 A0 NP1 NP2 MEM_MB_ADD0 98 NP1
MEM_MA_DATA58 MEM_MB_DATA57 MEM_MA_ADD2 96 A1 NP2 MEM_MB_ADD1 97 A0 NP1 NP2
DIMM 9.2mm A 2
MEM_MA_DATA57 MEM_MB_DATA56 MEM_MA_ADD3 95 A2 110 MEM_MA_RAS# MEM_MB_ADD2 96 A1 NP2
MEM_MA_DATA56 MEM_MB_DATA55 MEM_MA_ADD4 92 A3 RAS# 113 MEM_MA_WE# DIMM 5.2mm A 95 A2 110
4 MEM_MB_ADD3 MEM_MB_RAS#
MEM_MA_DATA55 MEM_MB_DATA54 MEM_MA_ADD5 91 A4 WE# 115 MEM_MA_CAS# MEM_MB_ADD4 92 A3 RAS# 113 MEM_MB_WE#
MEM_MA_DATA54 MEM_MB_DATA53 MEM_MA_ADD6 90 A5 CAS# MEM_MB_ADD5 91 A4 WE# 115 MEM_MB_CAS#
MEM_MA_DATA53 11/04 3D3V_S0 3D3V_S0 MEM_MB_DATA52 MEM_MA_ADD7 86
89
A6
A7 CS0#
114
121
MEM_MA0_CS_L0 MEM_MB_ADD6 90
86
A5
A6
CAS#
114
MEM_MA_DATA52 MEM_MB_DATA51 MEM_MA_ADD8 MEM_MA0_CS_L1 MEM_MB_ADD7 MEM_MB0_CS_L0
11/04 MEM_MA_DATA51 MEM_MB_DATA50 MEM_MA_ADD9 85
107
A8
A9
CS1#
73
MEM_MB_ADD8 89
85
A7
A8
CS0#
CS1#
121 MEM_MB0_CS_L1
3D3V_S0 3D3V_S0 MEM_MA_DATA50 MEM_MB_DATA49 MEM_MA_ADD10 MEM_MA_CKE0 MEM_MB_ADD9
MEM_MA_DATA49 1D5V_MEM 1D5V_MEM MEM_MB_DATA48 MEM_MA_ADD11 84 A10/AP CKE0 74 MEM_MA_CKE1 MEM_MB_ADD10 107 A9 73 MEM_MB_CKE0
MEM_MA_DATA48 MEM_MB_DATA47 MEM_MA_ADD12 83 A11 CKE1 MEM_MB_ADD11 84 A10/AP CKE0 74 MEM_MB_CKE1
MEM_MA_DATA47 MEM_MB_DATA46 MEM_MA_ADD13 119 A12 101 MEM_MA0_CLK0_P MEM_MB_ADD12 83 A11 CKE1
1D5V_MEM 1D5V_MEM MEM_MA_DATA46
V_SM_VTT V_SM_VTT
MEM_MB_DATA45 MEM_MA_ADD14 80
78
A13
A14
CK0
CK0#
103 MEM_MA0_CLK0_N 11/04 1D5V_MEM MEM_MB_ADD13 119
80
A12
A13 CK0
101
103
MEM_MB0_CLK0_P
MEM_MA_DATA45 MEM_MB_DATA44 MEM_MA_ADD15 MEM_MB_ADD14 MEM_MB0_CLK0_N
MEM_MA_DATA44 MEM_MB_DATA43 MEM_MA_BANK2 79 A15 102 MEM_MA0_CLK1_P MEM_MB_ADD15 78 A14 CK0#
A16/BA2 CK1 A15
1
MEM_MA_DATA43 MEM_MB_DATA42 104 MEM_MA0_CLK1_N MEM_MB_BANK2 79 102 MEM_MB0_CLK1_P
V_SM_VTT V_SM_VTT MEM_MA_DATA42 MEM_MB_DATA41 MEM_MA_BANK0 109 CK1# R809 A16/BA2 CK1 104 MEM_MB0_CLK1_N
MEM_MA_DATA41 MEM_MB_DATA40 MEM_MA_BANK1 108 BA0 11 MEM_MA_DM0 121R2F-GP MEM_MB_BANK0 109 CK1#
MEM_VREFCA
BA1 DM0 28 108 BA0 11
MEM_MA_DATA40 MEM_MB_DATA39 MEM_MA_DM1 MEM_MB_BANK1 MEM_MB_DM0
MEM_MA_DATA39 MEM_MB_DATA38 MEM_MA_DATA0 5 DM1 46 MEM_MA_DM2 BA1 DM0 28 MEM_MB_DM1
DQ0 DM2 DM1
2
MEM_MA_DATA38 MEM_MB_DATA37 MEM_MA_DATA1 7 63 MEM_MA_DM3 MEM_VREFCA MEM_MB_DATA0 5 46 MEM_MB_DM2
MEM_MA_DATA37 MEM_MB_DATA36 MEM_MA_DATA2 15 DQ1 DM3 136 MEM_MA_DM4 MEM_MB_DATA1 7 DQ0 DM2 63 MEM_MB_DM3
DQ2 DM4 DQ1 DM3
1
MEM_MA_DATA36 MEM_MB_DATA35 MEM_MA_DATA3 17 153 MEM_MA_DM5 MEM_MB_DATA2 15 136 MEM_MB_DM4
DQ3 DM5 DQ2 DM4
1
MEM_MA_DATA35 MEM_MB_DATA34 MEM_MA_DATA4 4 170 MEM_MA_DM6 R797 MEM_MB_DATA3 17 153 MEM_MB_DM5
MEM_MA_DATA34 MEM_MB_DATA33 MEM_MA_DATA5 6 DQ4 DM6 187 MEM_MA_DM7 121R2F-GP MEM_MB_DATA4 4 DQ3 DM5 170 MEM_MB_DM6
C892 C890 C906 C910
16 DQ5 DM7 6 DQ4 DM6 187
MEM_MA_DATA33 MEM_MB_DATA32 MEM_MA_DATA6 MEM_MB_DATA5 MEM_MB_DM7
DQ6 DQ5 DM7
2
MEM_MA_DATA32 MEM_MB_DATA31 MEM_MA_DATA7 18 200 SMBDATA SCD1U10V2KX-4-LL-GP SC1KP50V2KX-1GP SCD1U10V2KX-4-LL-GP SC1KP50V2KX-1GP MEM_MB_DATA6 16
DQ7 SDA DQ6
2
MEM_MA_DATA31 MEM_MB_DATA30 MEM_MA_DATA8 21 202 SMBCLK MEM_MB_DATA7 18 200 SMBDATA
23 DQ8 SCL 21 DQ7 SDA 202
MEM_MA_DATA30 MEM_MB_DATA29 MEM_MA_DATA9 MEM_MB_DATA8 SMBCLK
MEM_MA_DATA29 MEM_MB_DATA28 MEM_MA_DATA10 33 DQ9 198 MEM_MA_EVENT_L 3D3V_S0 MEM_MB_DATA9 23 DQ8 SCL
MEM_MA_DATA28 MEM_MB_DATA27 MEM_MA_DATA11 35 DQ10 EVENT# 3D3V_S0 MEM_MB_DATA10 33 DQ9 198 MEM_MB_EVENT_L 3D3V_S0
MEM_MA_DATA27 MEM_MB_DATA26 MEM_MA_DATA12 22 DQ11 199 MEM_MB_DATA11 35 DQ10 EVENT#
DQ12 VDDSPD
Places the CAP close to SO-DIMM 2 Places the CAP close to SO-DIMM 1 DQ11
MEM_MA_DATA26 MEM_MB_DATA25 MEM_MA_DATA13 24 MEM_MB_DATA12 22 199
MEM_MA_DATA25 MEM_MB_DATA24 MEM_MA_DATA14 34 DQ13 197 MEM_MB_DATA13 24 DQ12 VDDSPD
MEM_MA_DATA24 MEM_MB_DATA23 MEM_MA_DATA15 36 DQ14 SA0 201 MEM_MB_DATA14 34 DQ13 197
39 DQ15 SA1 36 DQ14 SA0 201
MEM_MA_DATA23 MEM_MB_DATA22 MEM_MA_DATA16 MEM_MB_DATA15
MEM_MA_DATA22 MEM_MB_DATA21 MEM_MA_DATA17 41 DQ16 77 MEM_MB_DATA16 39 DQ15 SA1
C MEM_MA_DATA21 MEM_MB_DATA20 MEM_MA_DATA18 51 DQ17 NC#1 122 GND MEM_MB_DATA17 41 DQ16 77 C
53 DQ18 NC#2 125 51 DQ17 NC#1 122
MEM_MA_DATA20 MEM_MB_DATA19 MEM_MA_DATA19 MEM_MB_DATA18 GND
MEM_MA_DATA19 MEM_MB_DATA18 MEM_MA_DATA20 40 DQ19 NC#/TEST 1D5V_MEM MEM_MB_DATA19 53 DQ18 NC#2 125
MEM_MA_DATA18 MEM_MB_DATA17 MEM_MA_DATA21 42 DQ20 75 MEM_MB_DATA20 40 DQ19 NC#/TEST 1D5V_MEM
MEM_MA_DATA17 MEM_MB_DATA16 MEM_MA_DATA22 50
52
DQ21
DQ22
VDD1
VDD2
76
81
11/04 1D5V_MEM MEM_MB_DATA21 42
50
DQ20
DQ21 VDD1
75
76
MEM_MA_DATA15 MEM_MB_DATA14 MEM_MA_DATA24 57 DQ23 VDD3 82 MEM_MB_DATA23 52 DQ22 VDD2 81
DQ24 VDD4 DQ23 VDD3
1
MEM_MA_DATA14 MEM_MB_DATA13 MEM_MA_DATA25 59 87 MEM_MB_DATA24 57 82
67 DQ25 VDD5 88 59 DQ24 VDD4 87
MEM_MA_DATA13 MEM_MB_DATA12 MEM_MA_DATA26 R776 MEM_VREFDQ MEM_MB_DATA25
MEM_MA_DATA12 MEM_MB_DATA11 MEM_MA_DATA27 69 DQ26 VDD6 93 121R2F-GP MEM_MB_DATA26 67 DQ25 VDD5 88
58 DQ28 VDD8 99 56 DQ27 VDD7 94
DQ29 VDD9 DQ28 VDD8
2
MEM_MA_DATA9 MEM_MB_DATA8 MEM_MA_DATA30 68 100 MEM_VREFDQ MEM_MB_DATA29 58 99
DQ31 VDD11 DQ30 VDD10
1
1
MEM_MA_DATA6 MEM_MB_DATA5 MEM_MA_DATA33 131 111 R772 MEM_MB_DATA32 129 106
MEM_MA_DATA5 MEM_MB_DATA4 MEM_MA_DATA34 141 DQ33 VDD13 112 C862 121R2F-GP MEM_MB_DATA33 131 DQ32 VDD12 111
C889 C864 C863
2
MEM_MA_DATA3 MEM_MB_DATA2 MEM_MA_DATA36 130 118 SCD1U10V2KX-4-LL-GP SC1KP50V2KX-1GP SCD1U10V2KX-4-LL-GP SC1KP50V2KX-1GP MEM_MB_DATA35 143 117
2
MEM_MA_DATA0 MEM_MA_DATA39 142 DQ38 VDD18 MEM_MB_DATA38 140 DQ37 VDD17 124
MEM_MA_DATA40 147 DQ39 2 MEM_MB_DATA39 142 DQ38 VDD18
MEM_MA_DATA41 149 DQ40 VSS 3 MEM_MB_DATA40 147 DQ39 2
DQ41 VSS
Places the CAP close to SO-DIMM 2 Places the CAP close to SO-DIMM 1 DQ40 VSS
MEM_MA_DATA42 157 8 MEM_MB_DATA41 149 3
159 DQ42 VSS 9 157 DQ41 VSS 8
MEM_MA_DATA43 MEM_MB_DATA42
MEM_MA_DATA44 146 DQ43 VSS 13 MEM_MB_DATA43 159 DQ42 VSS 9
11 MEM_MA_ADD[15..0] 160 DQ46 VSS 20 158 DQ45 VSS 19
MEM_MA_ADD15 MEM_MA_DATA47 MEM_MB_DATA46
MEM_MA_ADD14 12 MEM_MB_ADD[15..0] MEM_MB_ADD15 MEM_MA_DATA48 163 DQ47 VSS 25 MEM_MB_DATA47 160 DQ46 VSS 20
165 DQ48 VSS 26 163 DQ47 VSS 25
MEM_MA_ADD13 MEM_MB_ADD14 MEM_MA_DATA49 MEM_MB_DATA48
MEM_MA_ADD12 MEM_MB_ADD13 MEM_MA_DATA50 175 DQ49 VSS 31 MEM_MB_DATA49 165 DQ48 VSS 26
166 DQ52 VSS 38 164 DQ51 VSS 37
MEM_MA_ADD9 MEM_MB_ADD10 MEM_MA_DATA53 MEM_MB_DATA52
194 DQ62 VSS 66 192 DQ61 VSS 65
MEM_MB_ADD0 MEM_MA_DATA63 MEM_MB_DATA62
DQ63 VSS 71 MEM_MB_DATA63 194 DQ62 VSS 66
MEM_MA_DQS_N0 10 VSS 72 DQ63 VSS 71
11 MEM_MA_DM[7..0] MEM_MA_DM7 12 MEM_MB_DM[7..0] MEM_MB_DM7 MEM_MA_DQS_N1 27 DQS0# VSS 127 MEM_MB_DQS_N0 10 VSS 72
B
MEM_MA_DM6 MEM_MB_DM6 MEM_MA_DQS_N2 45 DQS1# VSS 128 MEM_MB_DQS_N1 27 DQS0# VSS 127 B
MEM_MA_DM5 MEM_MB_DM5 MEM_MA_DQS_N3 62 DQS2# VSS 133 MEM_MB_DQS_N2 45 DQS1# VSS 128
DQS7# VSS 145 186 DQS6# VSS 144
MEM_MA_DM0 MEM_MB_DM0 MEM_MB_DQS_N7
MEM_MA_DQS_P0 12 VSS 150 DQS7# VSS 145
11 MEM_MA_DQS_P[7..0] MEM_MA_DQS_P7 12 MEM_MB_DQS_P[7..0] MEM_MB_DQS_P7 MEM_MA_DQS_P1 29 DQS0 VSS 151 MEM_MB_DQS_P0 12 VSS 150
MEM_MA_DQS_P6 MEM_MB_DQS_P6 MEM_MA_DQS_P2 47 DQS1 VSS 155 MEM_MB_DQS_P1 29 DQS0 VSS 151
MEM_MA_DQS_P0 MEM_MB_DQS_P0 DQS7 VSS 172 MEM_MB_DQS_P7 188 DQS6 VSS 168
MEM_MA0_ODT0 116 VSS 173 DQS7 VSS 172
11 MEM_MA_DQS_N[7..0] 12 MEM_MB_DQS_N[7..0] MEM_VREFDQ 120 ODT0 VSS 178 116 VSS 173
MEM_MA_DQS_N7 MEM_MB_DQS_N7 MEM_VREFCA MEM_MA0_ODT1 MEM_MB0_ODT0
MEM_MA_DQS_N6 MEM_MB_DQS_N6 ODT1 VSS 179 MEM_MB0_ODT1 120 ODT0 VSS 178
MEM_MA_DQS_N5 MEM_MB_DQS_N5 MEM_VREFCA 126 VSS 184 ODT1 VSS 179
MEM_MA_DQS_N4 MEM_MB_DQS_N4 MEM_VREFDQ 1 VREF_CA VSS 185 MEM_VREFCA 126 VSS 184
MEM_MA_DQS_N3 MEM_MB_DQS_N3 VREF_DQ VSS 189 MEM_VREFDQ 1 VREF_CA VSS 185
30 VSS 190 VREF_DQ VSS 189
MEM_MA_DQS_N2 MEM_MB_DQS_N2 MEM_MA_RESET#
MEM_MA_DQS_N1 MEM_MB_DQS_N1 11/04 V_SM_VTT RESET# VSS
VSS
195
196
MEM_MB_RESET# 30
RESET#
VSS
VSS
190
195
MEM_MA_DQS_N0 MEM_MB_DQS_N0
203 VSS 205 VSS 196
12 MEM_MB_BANK[2..0] MEM_MB_BANK2 204 VTT1 VSS 206 V_SM_VTT 203 VSS 205
11 MEM_MA_BANK[2..0] MEM_MA_BANK2 MEM_MB_BANK1 VTT2 VSS 204 VTT1 VSS 206
MEM_MA_BANK1 MEM_MB_BANK0 VTT2 VSS
MEM_MA_BANK0
DDR3-204P-42-GP GND
1
DDR3-204P-48-GP GND
1
C909 C878
SC4D7U6D3V3KX-GP SC4D7U10V3KX-GP
2
SMBCLK SMBCLK
8,24,28,30,41,55 SMBCLK 8,24,28,30,41,55 SMBCLK
2
SMBDATA SMBDATA
8,24,28,30,41,55 SMBDATA 8,24,28,30,41,55 SMBDATA
GND
MEM_MA0_CLK0_P MEM_MB0_CLK0_P GND
11 MEM_MA0_CLK0_P MEM_MA0_CLK0_N 12 MEM_MB0_CLK0_P MEM_MB0_CLK0_N
11 MEM_MA0_CLK0_N MEM_MA0_CLK1_P 12 MEM_MB0_CLK0_N MEM_MB0_CLK1_P
11 MEM_MA0_CLK1_P MEM_MA0_CLK1_N 12 MEM_MB0_CLK1_P MEM_MB0_CLK1_N
11 MEM_MA0_CLK1_N 12 MEM_MB0_CLK1_N
MEM_MA0_CS_L1 MEM_MB0_CS_L1
11 MEM_MA0_CS_L1 MEM_MA0_CS_L0 12 MEM_MB0_CS_L1 MEM_MB0_CS_L0
11 MEM_MA0_CS_L0 12 MEM_MB0_CS_L0
MEM_MA0_ODT1 MEM_MB0_ODT1
11 MEM_MA0_ODT1 MEM_MA0_ODT0 12 MEM_MB0_ODT1 MEM_MB0_ODT0
11 MEM_MA0_ODT0 12 MEM_MB0_ODT0
A MEM_MA_CKE1 MEM_MB_CKE1 A
11 MEM_MA_CKE1 MEM_MA_CKE0 12 MEM_MB_CKE1 MEM_MB_CKE0
11 MEM_MA_CKE0 12 MEM_MB_CKE0
MEM_MA_CAS# MEM_MB_WE#
11 MEM_MA_CAS#
11 MEM_MA_WE#
MEM_MA_WE# 12 MEM_MB_WE#
12 MEM_MB_RAS#
MEM_MB_RAS# 10/29
MEM_MA_RAS# MEM_MB_CAS#
11 MEM_MA_RAS# MEM_MA_EVENT_L 12 MEM_MB_CAS# MEM_MB_EVENT_L
11 MEM_MA_EVENT_L MEM_MA_RESET# 12 MEM_MB_EVENT_L MEM_MB_RESET#
11 MEM_MA_RESET# 12 MEM_MB_RESET#
<Variant Name>
21F, 88, Hsin T ai Wu Rd
Hsichih, T aipei
Title
DDRIII-DIMM SLOT1
Custom
Barbados 1B
5 4 3 2 1
5 4 3 2 1
D D
1D5V_MEM 11/04 Place near DIMM Slot
1
C896 C902 C903 C905 C897 C895 C894 C883
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
2
2
1
1
C880 C881 C882 C861 C858 C860 C859 C724
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
SCD1U16V2ZY-2LLGP
C C
2
2
Place near DIMM Slot 1 Place near DIMM Slot 2
V_SM_VTT V_SM_VTT
1
1
C879 C866 C898 C904
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
B B
A A
<Variant Name>
Hsichih, Taipei
Title
MEM TERMS & DECAPS
C
Barbados 1B
5 4 3 2 1
5 4 3 2 1
32.768K 12.5P10PPM
Close to SB710 12/30

32K_X2
32K_X1 PLACE PCIE CAPS

CLOSE TO THE SB450
R330 1 2 20M_5% U19A 1 OF 5
X3 Debug
0603 I
A_RST# N2 P4 PCI_CLK0 R292 1 2 22R2J-2-GP CLK33_DBP
A_RST# PCICLK0 P3 R297 1 2 22R2J-2-GP
A_RX0P C271 1 2 SCD1U10V2KX-4-LL-GP A_RX0P_C V23 PCICLK1 P1
PCI_CLK1
PCI_CLK2
CLK_PCI_SIO
SIO
PCI CLKS
1 4 A_RX0N C270 1 2 SCD1U10V2KX-4-LL-GP A_RX0N_C V22 PCIE_TX0P PCICLK2 P2 PCI_CLK3
D D
C296 C297 A_RX1P C275 1 2 SCD1U10V2KX-4-LL-GP A_RX1P_C V24 PCIE_TX0N PCICLK3 T4 PCI_CLK4
PCIE_TX1P PCICLK4
1
1102 Modify 18pF_50V
NPO
18pF_50V
NPO
A_RX1N
A_RX2P
C273
C280
1
1
2
2
SCD1U10V2KX-4-LL-GP
SCD1U10V2KX-4-LL-GP
A_RX1N_C
A_RX2P_C
V25
U25 PCIE_TX1N
PCIE_TX2P
PCICLK5/GPIO41
T3 PCI_CLK5
0603 2 3 0603 A_RX2N C278 1 2 SCD1U10V2KX-4-LL-GP A_RX2N_C U24

PCIE_TX2N
2
A_RX3P C285 1 2 SCD1U10V2KX-4-LL-GP A_RX3P_C T23
A_RX3N C283 1 2 SCD1U10V2KX-4-LL-GP A_RX3N_C T22 PCIE_TX3P N1 TP_PCIRST# TP11
PCIE_TX3N PCIRST#
A_RX0P A_TX0P U22
16 A_RX0P U21 PCIE_RX0P U2
PCI EXPRESS INTERFACE

A_RX0N A_TX0N
16 A_RX0N U19 PCIE_RX0N AD0 P7
A_RX1P 32.768KHZ_12.5pF A_TX1P
16 A_RX1P V19 PCIE_RX1P AD1 V4
A_RX1N SMD A_TX1N
16 A_RX1N PCIE_RX1N AD2
16
16
A_RX2P
A_RX2N
A_RX2P
A_RX2N
CRITICAL
I
A_TX2P
A_TX2N
R20
R21
R18
PCIE_RX2P
PCIE_RX2N
AD3
AD4
T1
V3
U1
11/09 Debug Header
A_RX3P A_TX3P
16 A_RX3P R17 PCIE_RX3P AD5 V1
A_RX3N A_TX3N
16 A_RX3N PCIE_RX3N AD6 V2
R307 1 2 562R2F-GP SB_PCIE_CALRP T25 AD7 T2
A_TX0P R717 1 2 2K05R2F-GP SB_PCIE_CALRN T24 PCIE_CALRP AD8 W1
16 A_TX0P PCIE_VDDR PCIE_CALRN AD9
A_TX0N 1.2V, 30mA L72 T9
16 A_TX0N AD10
16 A_TX1P
A_TX1P R715 2 1 0R0402-PAD 2 1 PCIE_PVDD_1P8V P24 R6 DEBUGH1
A_TX1N V_1P2 PCIE_PVDD AD11 R7 CLK33_DBP 1 2 V_3P3_DBP R3221 2 4K7R2J-2-GP
16 A_TX1N Q81 AD12 3D3V_S0
A_TX2P FCM1608KFG-301T05-GP P25 R5
16 A_TX2P 2N7002-11-GP PCIE_PVSS AD13
A_TX2N 68.00082.311 U8 PLTRST*_SIO 3 4
16 A_TX2N AD14 3D3V_S0
A_TX3P U5 LPC_LAD0 5 6
16 A_TX3P
A_TX3N D S VCC_SB_S 300ohmΩ/100MHz, 0.25Ω,0.5A AD15 Y7 LPC_LAD1 7 8
16 A_TX3N AD16 5V_S0
W8 LPC_LAD2 9 10
AD17 X
1
(R) C794 V9 LPC_LAD3 11 12
C793 SC1U10V2KX-1-LL-GP AD18 Y8 LPC_LFRAME# 13 14
AD19
VCC5_G G
SC1U10V2KX-1-LL-GP AA8
AD20
2
1103 5V_S0 AD21
AD22
Y4
Y3
DVD-CONN14D-SFP5-GP
(21.62733.207)
KG_SBALINK_CLKP Y2 PCI_AD23
8 KG_SBALINK_CLKP R696 AD23
KG_SBALINK_CLKN AA2 PCI_AD24
8 KG_SBALINK_CLKN AD24
1 2 AB4 PCI_AD25
KG_SBALINK_CLKP N25 AD25 AA1 PCI_AD26
C C
PCIE_RCLKP/NB_LNK_CLKP AD26
1
KG_SBALINK_CLKN N24 AB3 PCI_AD27

100KR2J-1-GP PCIE_RCLKN/NB_LNK_CLKN AD27
10 CPUPWRGD
CPUPWRGD (R)
C781
SC1U10V2KX-1-LL-GP K23
NB_DISP_CLKP
AD28
AD29
AB2
AC1
PCI_AD28
PCI_AD29 11/04
2
LDT_STOP# (R) K22 AC2 PCI_AD30 3D3V_S0

10,17 LDT_STOP# NB_DISP_CLKN AD30 AD1
LDT_RST#
10 LDT_RST# M24 AD31 W2
0710 M25 NB_HT_CLKP CBE0# U7 LDRQ#1_SB R243 1
(R)
2 10KR2J-3-GP
ALLOW_LDTSTOP NB_HT_CLKN CBE1# AA7
17 ALLOW_LDTSTOP Fine tune the timing P17 CBE2# Y1
PCI INTERFACE
CPU_PROCHOT#_SB (R)
10 CPU_PROCHOT#_SB M18 CPU_HT_CLKP CBE3# AA6 LDRQ*0 R321 1 2 10KR2J-3-GP
CPU_HT_CLKN FRAME# W5
NB_RST# M23 DEVSEL# AA5
17 NB_RST# M22 SLT_GFX_CLKP IRDY# Y5
SLT_GFX_CLKN TRDY# U6
PLTRST*_SIO J19 PAR W6
41 PLTRST*_SIO J18 GPP_CLK0P STOP# W4
GPP_CLK0N PERR# V7
PLTRST*_LAN L20 SERR# AC3
39 PLTRST*_LAN L19 GPP_CLK1P REQ0# AD4
GPP_CLK1N REQ1# AB7
M19 REQ2# AE6 FP_DETECT
GPP_CLK2P REQ3#/GPIO70
27 LPC_CLK0
LPC_CLK0
M20
GPP_CLK2N REQ4#/GPIO71
GNT0#
AB6
AD2 1102 Modify
LPC_CLK1 N22 AE4
27 LPC_CLK1 GPP_CLK3P GNT1# BT1
P22 AD5
CLOCK GENERATOR
GPP_CLK3N GNT2# AC6 1 2
LPC_LAD0 CLK14_SB L18 GNT3#/GPIO72 AE5
VBAT1
41 LPC_LAD0 25M_48M_66M_OSC GNT4#/GPIO73
LPC_LAD1 AD6
41 LPC_LAD1 CLKRUN# BAT-KB6615BP5L-GP
LPC_LAD2 V5
41 LPC_LAD2 LOCK#
LPC_LAD3 J21 (22.70034.021)
41 LPC_LAD3 14M_X1
LPC_LFRAME# AD3 WEBCAM_DET#
41 LPC_LFRAME# INTE#/GPIO33
2
AC4
INTF#/GPIO34 AE2 R323
J20 INTG#/GPIO35 AE3 3D3V_EuP
B INT_SERIRQ 14M_X2 INTH#/GPIO36 1KR2J-1-GP B
41 INT_SERIRQ
1
1104 LPCCLK0
G22 LPC_CLK0
1
E22 LPC_CLK1
1D8V LPCCLK1
1104
VBAT1_R
32K_X1 A3 H24 LPC_LAD0 R338
CLK_PCI_SIO X1 LAD0 H23 LPC_LAD1 220R3J-1-GP
41 CLK_PCI_SIO PCI_CLK2 LAD1 J25 LPC_LAD2
27 PCI_CLK2 LAD2
2
PCI_CLK3 J24 LPC_LAD3

27 PCI_CLK3 LAD3
2
B3 H25
LPC
RTC XTAL
PCI_CLK4 R331 32K_X2 LPC_LFRAME#
27 PCI_CLK4 PCI_CLK5 X2 LFRAME# H22 LDRQ*0
27 PCI_CLK5 LDRQ0#
1
1KR2J-1-GP AB8 LDRQ#1_SB R244 3D3V_S0
LDRQ1#/GNT5#/GPIO68 AD7 SB_BMREQ# 1 2
BMREQ#/REQ5#/GPIO65
1
R261 CLOSE TO SB F23

SERIRQ
V15 INT_SERIRQ 10KR2J-3-GP
U23
VBAT
1102 Modify
ALLOW_LDTSTOP 3D3V_EuP
CPU_PROCHOT#_SB F24 ALLOW_LDTSTP C3 RTC_CLK 1 R741 2
PROCHOT# RTCCLK
3
CLK14_SB CPUPWRGD F22 C2 INTRUDER# TP113 10KR2J-3-GP BAS40-05-GP
RTC
8 CLK14_SB LDT_STOP# G25 LDT_PG INTRUDER_ALERT# B2 VBAT_SB (R)
CPU
LDT_RST# G24 LDT_STP# VBAT
R852 1 2 33R2J-2-GP MXMRST# LDT_RST#
CLR_CMOS1
2 1 VBAT_SB1 1
SB710-1-GP-U R354
1
R709 1 2 33R2J-2-GP PLTRST*_LAN 510R2F-L-GP 2
1
C850 C849 C847 3
27 PCI_AD28
1
27 PCI_AD27
Note: AMD C294
2
27 PCI_AD26
A_RST# R713 1 2 33R2J-2-GP NB_RST# C295 DVD-CON3-9-GP
SC1U10V2KX-1-LL-GP
2
27 PCI_AD25
recommend 510 ohm
2
27 PCI_AD24 (R) SCD1U16V2ZY-2LLGP
27 PCI_AD23 R706 1 2 33R2J-2-GP PLTRST*_SIO
27 PCI_AD29
27 PCI_AD30 SCD1U16V2ZY-2LLGP
1
C779 (R) SCD1U16V2ZY-2LLGP SC10U10V5ZY-1-LL-GP SC1U10V2KX-1-LL-GP VBAT_SB1

R712
1
8K2R2J-3-GP C802 (R) SCD1U16V2ZY-2LLGP

2
(R) C783(R)
A WEBCAM_DET# SCD1U16V2ZY-2LLGP A
36 WEBCAM_DET#
2
2/10 Rannie
<Variant Name>
FP_DETECT
42 FP_DETECT
MXMRST#
54,62 MXMRST# Hsichih, Taipei
Title
SB710-PCIE/PCI/CPU/LPC
Custom
Barbados 1B
5 4 3 2 1
5 4 3 2 1
USB 2.0
34
34
USBP11P
USBP11N
10/30
GPIO/Multi function please refer page 28.29
34 USBP10P
34 USBP10N CHECK PH for PCI/LAD/OD signal
33 USBP9P
33 USBP9N
U19D 4 OF 5
33 USBP8P 1 2 10KR2J-3-GP
R316 TEST2
33 USBP8N
(R)
33 USBP7P 1 2 10KR2J-3-GP TEST1 E1
R727
33 USBP7N E2 PCI_PME#/GEVENT4# C8 KG_CLK_48M_USB
(R)
R308 1 2 10KR2J-3-GP TEST0 H7 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC
33 USBP6P SLP_S3* F5 SLP_S2/GPM9# G8 SB_USB_RCOMP 1 2
(R) R732 11K8R2F-GP
D 33 USBP6N SLP_S4* G1 SLP_S3# USB_RCOMP D
SIO_PWNBTN_N H2 SLP_S5#
ACPI / WAKE UP EVENTS

36 USBP5P H1 PWR_BTN#
(R) SB_PWRGD
36 USBP5N SUS_STATE# 1 R299 2 TP_SUS_STATE# K3 PWR_GOOD
USB MISC
0R2J-2-GP (R) R317 1 2 2K2R2J-2-GP TEST2 H5 SUS_STAT# E6 USB_FSD13P
36 USBP4P TEST2 USB_FSD13P
R725 1 2 2K2R2J-2-GP TEST1 H4 E7 USB_FSD13N
36 USBP4N 11/02 3D3V_EuP (R)
(R) R312 1 2 2K2R2J-2-GP TEST0 H3 TEST1
TEST0
USB_FSD13N
TP-2
TP-2
TP109
TP112
KA20GATE Y15 F7 USB_FSD12P
USB 1.1
36 USBP3P W15 GA20IN/GEVENT0# USB_FSD12P E8
KBRCIN# USB_FSD12N TP-2 TP108
36 USBP3N LPC_PME_N K4 KBRST#/GEVENT1# USB_FSD12N TP-2 TP111
LPC_SMI* K24 LPC_PME#/GEVENT3# H11 USBP11P
TP12 S3_STATE F1 LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
USB_HSD11P
USB_HSD11N
J10 USBP11N 10/30
FP_RESET* J2
Check power good timming WAKE_EVENT# H6 SYS_RESET#/GPM7# E11 USBP10P
30 USBP1P F2 WAKE#/GEVENT8# USB_HSD10P F11
TEST0,1=00 normal operation BLINK USBP10N
30 USBP1N J6 BLINK/GPM6# USB_HSD10N
CPU_THERMTRIP#_SB
NB_PWRGD_IC W14 SMBALERT#/THRMTRIP#/GEVENT2# A11 USBP9P
30 USBP0P 3D3V_EuP NB_PWRGD USB_HSD9P B11 USBP9N
30 USBP0N D3 USB_HSD9N
3D3V_S0 RSMRST#_SIO
1 2 10KR2J-3-GP RSMRST# C10
HDA BUS FP_RESET* R305
11/02 2009/12/23 USB_HSD8P
USBP8P
2
D10 USBP8N
R310 USB_HSD8N
29 ACZ_BITCLK_AUDIO AE18 G11 USBP7P
29 ACZ_SDATAOUT_AUDIO
10/30 LPC_PME_N R731 2
(R)
1 4K7R2J-2-GP
10KR2J-3-GP
AD18 SATA_IS0#/GPIO10
CLK_REQ3#/SATA_IS1#/GPIO6
USB_HSD7P
USB_HSD7N
H12 USBP7N
TP_DET# AA19
SMARTVOLT1/SATA_IS2#/GPIO4
1
W17 E12 USBP6P
29 ACZ_SDATAIN1 WAKE_EVENT# R734 1 (R) 2 10KR2J-3-GP SMBUS_ISP V17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E14 USBP6N
W20 CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N
29 ACZ_SYNC_AUDIO W21 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40 C12
HAVE INTERNAL RES 10/30 ACZ_SPKR
AA18 SPKR/GPIO2 USB_HSD5P D12
USBP5P
USB 2.0
SMBCLK USBP5N
27 AZ_RST# W18 SCL0/GPOC0# USB_HSD5N
2009/12/29 SMBDATA
SMBCLK_S5 K1 SDA0/GPOC1# B12 USBP4P
29 ACZ_RST#_AUDIO SMBDATA_S5 K2 SCL1/GPOC2# USB_HSD4P A12 USBP4N
DDC1_SCL AA20 SDA1/GPOC3# USB_HSD4N
TP106 DDC1_SCL/GPIO9
Y18 G12 USBP3P
C1 DDC1_SDA/GPIO8 USB_HSD3P G14 USBP3N
S3_STATE 1 (R) 2 10KR2J-3-GP 11/03 Y19 LLB#/GPIO66 USB_HSD3N
GPIO
R318
G5 SMARTVOLT2/SHUTDOWN#/GPIO5 H14
SMBUS DDR3_RST#/GEVENT7# USB_HSD2P
USB_HSD2N
H15
ACZ_SPKR
C 29 ACZ_SPKR
8,21,28,30,41,55 SMBCLK
SMBCLK 10/30 (R)
R339
USB_HSD1P
A13 USBP1P C
1 2 B13
8,21,28,30,41,55 SMBDATA
SMBDATA
(R) 11/02 3D3V_S0 USB_HSD1N
USBP1N
1 2 10KR2J-3-GP B14
12/30 Delete 2009/12/29
LPC_SMI* R315 10KR2J-3-GP
OC*6 B9
USB_OC6#/IR_TX1/GEVENT6#
USB_HSD0P
USB_HSD0N
A14
USBP0P
USBP0N
OC*67 B8
A8 USB_OC5#/IR_TX0/GPM5# A18
USB OC A9 USB_OC4#/IR_RX0/GPM4# KSO_16 B18
USB OC
OC*89
E5 USB_OC3#/IR_RX1/GPM3# KSO_17 F21
F8 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 D21
11/02 2009/12/29 OC*1011
E4 USB_OC1#/GPM1# SCL2/IMC_GPIO11 F19
USB_OC0#/GPM0# SDA2/IMC_GPIO12 E20 CPU_SIC
33 OC*67 M1 SCL3_LV/IMC_GPIO13 E21
AZ_BIT_CLK CPU_SID
R348 AZ_SDATA_OUT M2 AZ_BITCLK SDA3_LV/IMC_GPIO14 E19
34 OC*1011 1 2 J7 AZ_SDOUT IMC_PWM1/IMC_GPIO15 D19
PCIE_WAKE# WAKE_EVENT# IMC_GPIO16
(R) ACZ_SDATAIN1 J8 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 E18 IMC_GPIO17
33 OC*89 L8 AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17
0R2J-2-GP
M3 AZ_SDIN2/GPIO44 G20
AZ_SYNC_R L6 AZ_SDIN3/GPIO46 KSI_0 G21
Strap pin for define SPI or LPC ROM
R417 1 2 M4 AZ_SYNC KSI_1 D25
HD AUDIO
WOL AZ_RST#_R
0R2-PT5-LILY-GP AZ_DOCK_TP L5 AZ_RST# KSI_2 D24
TP107 AZ_DOCK_RST#/GPM8# KSI_3 C25
KSI_4 C24
KSI_5 B25
KSI_6
INTEGRATED uC
C23
KSI_7
INTEGRATED KSO_0
B24
B23
10 CPU_SIC KSO_1 A23
10 CPU_SID 10/30 KSO_2
KSO_3
C22
A22
27 IMC_GPIO16 KSO_4 B22
27 IMC_GPIO17 KSO_5 B21
KSO_6 A21
H19 KSO_7 D20
HDA BUS H20 PS2_DAT
PS2_CLK
KSO_8
KSO_9
C20
H21 A20
USB MISC R705
SPI_CS2#/IMC_GPIO2 KSO_10
INTEGRATED uC
ACZ_BITCLK_AUDIO 1 2 AZ_BIT_CLK F25 B20
IDE_RST#/F_RST#/IMC_GPO3 KSO_11
1
B19
8 KG_CLK_48M_USB KSO_12
1
22R2J-2-GP R708 D22 A19

B C805 E24 PS2KB_DAT KSO_13 D18 B
10KR2J-3-GP PS2KB_CLK KSO_14
SC18P-GP (R) E25 C18
PS2M_DAT KSO_15
2
(R) D23
PS2M_CLK
2
11/04 3D3V_S0
ACPI /WAKE UP EVENTS ACZ_SDATAIN1
SB710-1-GP-U
<F7>
1
1
R728 R241
10KR2J-3-GP 2K2R2J-2-GP
(R)
41,46 SLP_S3*
36,41,46,48 SLP_S4*
2
2
SMBCLK
41 SIO_PWNBTN_N 11/04 SMBCLK 8,21,28,30,41,55
5,50,61 SB_PWRGD 11/04 3D3V_S0
1D8V
1
ACZ_SDATAOUT_AUDIO R703 1 2 33R2J-2-GP AZ_SDATA_OUT
41 KA20GATE NB_PWRGD_IC 1 2 300R2J-4-GP
R698 R242
41 KBRCIN#
41 LPC_PME_N 2K2R2J-2-GP
ACZ_SYNC_AUDIO R724 1 2 33R2J-2-GP AZ_SYNC_R
41 LPC_SMI*
2
SMBDATA
39 WOL SMBDATA 8,21,28,30,41,55
10,49 CPU_THERMTRIP#_SB
17 NB_PWRGD_IC 11/04 3D3V_EuP
3D3V_EuP
AZ_RST# 1 R718 2 AZ_RST#_R NB_PWRGD_IC

41 RSMRST#_SIO
1
0R2-PT5-LILY-GP
To Strap R295
42 BLINK
2
2K2R2J-2-GP
R247
TP117
10KR2J-3-GP 2009/12/30
2
SMBCLK_S5
SUS_STATE# Q79
17 SUS_STATE#
1
ACZ_RST#_AUDIO R721 1 2 33R2J-2-GP 2N7002-11-GP 3D3V_Eup
G
11/03
SB_PWRGD_2
1
S
A TP_DET# R302 A
36 TP_DET#
2K2R2J-2-GP
SMBUS_ISP
28 SMBUS_ISP TP118
2
SMBDATA_S5
D
<Variant Name>
Q80
R314 2N7002-11-GP
SB_PWRGD 2 1 SB_PWRGD_1 G Wistron Incorporated
10KR2J-3-GP Hsichih, Taipei
S
Title
SB710-ACPI/GPIO/USB/AZALIA
PCIE_WAKE#
30 PCIE_WAKE# Custom
Barbados 1B
5 4 3 2 1
5 4 3 2 1
PLACE SATA AC COUPLING

CAPS CLOSE TO S600
11/10 U19B 2 OF 5
D AD9 AA24 D
SATA_TXP0_C
32 SATA_TXP0_C AE9 SATA_TX0P IDE_IORDY AA25
SATA_TXN0_C
32 SATA_TXN0_C SATA_TX0N IDE_IRQ Y22
SATA_RXN0_C AB10 IDE_A0 AB23
32 SATA_RXN0_C SATA_RX0N IDE_A1
SATA_RXP0_C AC10 Y23
32 SATA_RXP0_C SATA_RX0P IDE_A2 AB24
SATA_TXP1_C AE10 IDE_DACK# AD25
32 SATA_TXP1_C SATA_TX1P IDE_DRQ
SATA_TXN1_C AD10 AC25
32 SATA_TXN1_C SATA_TX1N IDE_IOR# AC24
SATA_RXN1_C AD11 IDE_IOW# Y25
32 SATA_RXN1_C SATA_RX1N IDE_CS1#
AE11 Y24
11/03 32 SATA_RXP1_C
SATA_RXP1_C
SATA_RX1P IDE_CS3#
AB12 AD24 TV_EN
AC12 SATA_TX2P IDE_D0/GPIO15 AD23 WIFI_RF_EN
SATA_TX2N IDE_D1/GPIO16 AE22 WEBCAM_EN
IDE_D2/GPIO17
ATA 66/100/133
AE12 AC22 AUTO_COLOR_SIO
AD12 SATA_RX2N IDE_D3/GPIO18 AD21 AUTO_COLOR_SIO 28
LVDS_GPIOTOSB1
T_ALERT# SATA_RX2P IDE_D4/GPIO19 AE20 LVDS_GPIOTOSB2
10 T_ALERT# IDE_D5/GPIO20
AD13 AB20
AE13 SATA_TX3P IDE_D6/GPIO21 AD19
SATA_TX3N IDE_D7/GPIO22 AE19
AB14 IDE_D8/GPIO23 AC20
AC14 SATA_RX3N IDE_D9/GPIO24 AD20
SERIAL ATA
SATA_RX3P IDE_D10/GPIO25 AE21
AE14 IDE_D11/GPIO26 AB22
NOTE: AD14 SATA_TX4P IDE_D12/GPIO27 AD22
PLACE SATA_CAL DSG-215SB600-10.pdf, page 17 SATA_TX4N IDE_D13/GPIO28
IDE_D14/GPIO29
AE23 11/02
AD15 AC23
RES & CAP VERY AE15 SATA_RX4N IDE_D15/GPIO30
CLOSE TO BALL When NOT using the serial ATA SATA_RX4P 3D3V_EuP
OF U27 interface: AB16
a. Leave the SATA transmit and receive AC16 SATA_TX5P
SATA_TX5N
1
G6
NOTE: pairs unconnected AE16 SPI_DI/GPIO12 D2
SPI_DATAIN
SPI_DATAOUT R337
R528 IS 1K 1% FOR 25MHz b. Leave the SATA_ACT#, SATA_CAL, AD16 SATA_RX5N SPI_DO/GPIO11 D1 SPI_CLK 1KR2J-1-GP
SATA_RX5P SPI_CLK/GPIO47 F4
XTAL, 4.99K 1% FOR 100MHz and SATA_X2 balls unconnected. 1KR2F-3-GP
SPI_HOLD#/GPIO31
SPI_HOLD TP110
1 R697 2SATA_CAL V12 F3
SPI ROM
INTERNAL CLOCK c. Connect SATA_X1 ball to GND. SATA_CAL SPI_CS1#/GPIO32
2
C SPI_CS# C
ICH_SATA_LED* SATA_X1 Y12 U15 3D3V_S0
42 ICH_SATA_LED* SATA_X1 LAN_RST#/GPIO13 J1
SATA_X2 AA12 ROM_RST#/GPIO14
SATA_X2 3/12
1
TV_EN M8 LVDS_LED_CTRL
30 TV_EN ICH_SATA_LED* W11 FANOUT0/GPIO3 M5 WLAN_LED#_CTRL R701
WIFI_RF_EN SATA_ACT#/GPIO67 FANOUT1/GPIO48 M7 GPU_WP#
30 WIFI_RF_EN 1.2V, 60mA FANOUT2/GPIO49
10KR2J-3-GP
(M)
AA11 P5 BOARD_ID
PLLVDD_ATA PLLVDD_SATA FANIN0/GPIO50
1 2
P8
11/03 XTLVDD_ATA
W12
XTLVDD_SATA
FANIN1/GPIO51
FANIN2/GPIO52
R8 TPA2008_SD#
12/30 HIGH: MXM / Low: UMA
C6 R8691 2 10KR2J-3-GP
SATA PWR
R702 (UMA)
TEMP_COMM 3D3V_S0
WEBCAM_EN B6 10KR2J-3-GP
36 WEBCAM_EN TEMPIN0/GPIO61 A6
TEMPIN1/GPIO62
2
A5
TEMPIN2/GPIO63 B5
TEMPIN3/TALERT#/GPIO64 T_ALERT# 10
1118 Modify VIN0/GPIO53
A4
B4
BT_PWR_EN
BT_RESET_DET1 1
BT_PWR_EN 36
68.00082.311 68.00082.311 R898 2
HW MONITOR
VIN1/GPIO54 BT_RESET_DET 42
C4 SPI_WP# 0R0402-PAD
300ohmΩ/100MHz, 0.25Ω,0.5A 300ohmΩ/100MHz, 0.25Ω,0.5A VIN2/GPIO55 D4 LAN_100LED_CTRL
VIN3/GPIO56 D5 LAN_LINKLED_CTRL
3D3V_S0 XTLVDD_ATA V_1P2 PLLVDD_ATA VIN4/GPIO57 D6
1.2V, 60mA VIN5/GPIO58 A7
2
L71
1
3.3V, 60mA 2
L68
1 VIN6/GPIO59 B7
VIN7/GPIO60
BT_LED_PWR_CTRL
3/12 11/02
11/07
1
1
TPA2008_SD# FCM1608KFG-301T05-GP FCM1608KFG-301T05-GP AVDD_HWM 3D3V_EuP
38 TPA2008_SD#
1
11/03 C789
SC1U10V2KX-1-LL-GP
C762
SC2D2U6D3V3MX-1-GP
C769
SC22U6D3V5MX-2GP
AVDD
F6 1
G21
2
2
2
(R)
11/02
2
1
G7 C829 C830 GAP-CLOSE-PWR
AVSS SCD1U16V2ZY-2LLGP
2009/12/23 (R) (R) G20
2
SB710-1-GP-U HWM_AGND 1 2 3D3V_EuP
LVDS_GPIOTOSB2 <F7>
28 LVDS_GPIOTOSB2 LVDS_GPIOTOSB1 SC2D2U6D3V3MX-1-GP
28 LVDS_GPIOTOSB1
GAP-CLOSE-PWR
B B
1
1102 Modify R362
1KR2J-1-GP 11/02
1).PLACE GX CLOSE TO U27
2
2).HWM_AGND TRACE AT LEAST 3D3V_EuP
25MHz XTAL
10MIL WIDE
SATA_X1
XTAL-25MHZ-96GP
X2 1 2 SATA_X2
1
LAN_100LED_CTRL
34 LAN_100LED_CTRL
R359 C321
LAN_LINKLED_CTRL 10KR2J-3-GP
34 LAN_LINKLED_CTRL R245 U24
2
WLAN_LED#_CTRL 1 2
42 WLAN_LED#_CTRL
2
SPI_CS# 1 8 SCD1U16V2ZY-2LLGP
LVDS_LED_CTRL SPI_DATAIN R358 1 2 0R2-PT5-LILY-GP 2 CS# VCC 7 SPI_HOLD_N
42 LVDS_LED_CTRL 10MR2J-L-GP SPI_WP# 3 SO/SIO1 HOLD# 6 SPI_CLK
WP# SCLK
1
BT_LED_PWR_CTRL C251 C250 4 5 SPI_DATAOUT
42 BT_LED_PWR_CTRL SC12P50V2JN-3-LL-GP SC12P50V2JN-3-LL-GP GND SI/SIO0
1
GPU_WP#
55 GPU_WP#
2
R361 MX25L8006EM2I-12G-GP
4K7R2J-2-GP
3/12 Rannie modify
In current design, the SATA interface is not2/08
(R)
2
Rannie SPISKT1
implemented. AMD recomment to tie the 1

2
3
4
8
7
6
5
PLLVDD_SATA to GND directly.(*) SKT-G6179-GP-U
A A
1. Main Source: 72.25X80.A01(Winbond 8Mb) <Variant Nam e>
2. 2nd Source: 72.25805.001 (MXIC 8Mb) Wistron Incorporated

3. 3ns source: 72.26081.001 (ATMEL 8Mb) 21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
SB710-SATA/IDE
Cus tom
Barbados 1B
5 4 3 2 1
5 4 3 2 1
11/02
V_1P2_R V_1P2
3D3V_S0 V_3P3_SB
3.3V 150mA
R690 V_3P3_SB
1.2V 0.5A
U19C 3 OF 5 (R) (R) 2 R707 1
1 2 SC1U10V2KX-1-LL-GP V_1P2_R
L9 L15 0R0805-PAD
VDDQ VDD
1
M9 M12 C799 C816 C812 C817 C818 C808
0R0805-PAD VDDQ VDD
1
C771 C792 C780 C800 C806 T15 M14 SC1U10V2KX-1-LL-GP SC1U10V2KX-1-LL-GP
C772 U9 VDDQ VDD N13
VDDQ VDD
2
1
SC22U6D3V5MX-2GP U16 P12
CORE S0
VDDQ VDD
2
SCD1U16V2ZY-2LLGP U17 P14 C814 SCD1U16V2ZY-2LLGP SCD1U16V2ZY-2LLGP
SC4D7U10V5ZY-3-LL-GP V8 VDDQ VDD R11 SC10U10V5ZY-1-LL-GP SCD1U16V2ZY-2LLGP
VDDQ VDD
2
SCD1U16V2ZY-2LLGP SCD1U16V2ZY-2LLGP W7 R15 SC1U10V2KX-1-LL-GP
D Y6 VDDQ VDD T16
PCI/GPIO I/O
D
VDD33_18 VDDQ VDD
11/02 1D8V
AA4
AB5 VDDQ U19E 5 OF 5
(R) AB21 VDDQ
1 R693 2 VDDQ
VDD33_18 A2
+1.2CLK_VDD +1.2CLK_VDD V_1P2 VSS
11/02 3D3V_S0
0R3J-0-U-GP
VSS
A25
1
C778 C773 C768 3.3V 0.5A B1
VSS
SC4D7U10V5ZY-3-LL-GP
C756 Y20 L21 D7
1 R691 2 AA21 VDD33_18 CKVDD_1_2V L22 2 R729 1 T10 VSS F20
VDD33_18 CKVDD_1_2V AVSS_SATA VSS
2
SCD1U16V2ZY-2LLGP AA22 L24 U10 G19
VDD33_18 CKVDD_1_2V AVSS_SATA VSS
IDE/FLSH I/O
CLKGEN I/O
1
0R3J-0-U-GP SCD1U16V2ZY-2LLGP SCD1U16V2ZY-2LLGP AE25 L25 0R0805-PAD U11 H8
VDD33_18 CKVDD_1_2V C822 C824 U12 AVSS_SATA VSS K9
(R) V11 AVSS_SATA VSS K11
IDE(3.3V)/Flash(1.8V) mode AVSS_SATA VSS
2
SC1U10V2KX-1-LL-GP V14 K16
SCD1U16V2ZY-2LLGP (R) W9 AVSS_SATA VSS L4
Y9 AVSS_SATA VSS L7
Internal clock no use Y11 AVSS_SATA VSS L10
Y14 AVSS_SATA VSS L11
2009/12/23 POWER Y17 AVSS_SATA VSS L12
PCIE_VDDR AA9 AVSS_SATA VSS L14
V_1P2
1.2V, 600mA 11/02 AVSS_SATA VSS
L74 AB9 L16
2 1 P18 AB11 AVSS_SATA VSS M6
PCIE_VDDR 3.3V, 20mA 11/04 AVSS_SATA VSS
P19 AB13 M10
PCIE_VDDR 3D3V_EuP AVSS_SATA VSS
1
FCM1608KFG-301T05-GP P20 AB15 M11
C811 C809 C810 C803 P21 PCIE_VDDR A17 AB17 AVSS_SATA VSS M13
SC4D7U10V5ZY-3-LL-GP SC1U10V2KX-1-LL-GP SCD1U16V2ZY-2LLGP SCD1U16V2ZY-2LLGP R22 PCIE_VDDR S5_3_3V A24 1D2V_S5 AC8 AVSS_SATA VSS M15
PCIE_VDDR S5_3_3V AVSS_SATA VSS
1
R24 B17 AD8 N4
A-LINK I/O
R25 J4 C292 C291 AE8 N12
2
J5 N14
S5_3_3V VSS
2
L1 R341 P6
S5_3_3V L2 VSS P9
0R0805-PAD
S5_3_3V VSS
CORE S5 3.3V_S5 I/O

1.2V, 300mA SC2D2U6D3V3MX-1-GP P10
C
SC2D2U6D3V3MX-1-GP A15 VSS P11 C
AVSS_USB VSS
1
+1.2V_ATA
AA14 1.2V, 80mA B15 P13
AB18 AVDD_SATA C14 AVSS_USB VSS P15
11/02 68.00082.311 AA15 AVDD_SATA
AVDD_SATA
+1.2VALW D8 AVSS_USB
AVSS_USB
VSS
VSS
R1
AA17 G2 D9 R2
300ohmΩ/100MHz, 0.25Ω,0.5A AC18 AVDD_SATA S5_1_2V G4 D11 AVSS_USB VSS R4
3D3V_EuP +1.2V_ATA AD17 AVDD_SATA S5_1_2V D13 AVSS_USB VSS R9
AVDD_SATA AVSS_USB VSS
SATA I/O
V_1P2
1
L21 AE17 1.2V, 80mA D14 R10
GROUND
2 1 AVDD_SATA C299 C298 C300 D15 AVSS_USB VSS R12
FCM1608KFG-301T05-GP A10 +1.2V_USB_PHY_R E15 AVSS_USB VSS R14
USB_PHY_1_2V AVSS_USB VSS
2
1
1
C253 C757 C763 C761 B10 F12 T11
SCD1U16V2ZY-2LLGP C770 USB_PHY_1_2V SCD1U16V2ZY-2LLGP F14 AVSS_USB VSS T12
AVSS_USB VSS
1
C856 SC22U6D3V5MX-2GP SCD1U16V2ZY-2LLGP SCD1U16V2ZY-2LLGP SCD1U16V2ZY-2LLGP SC10U10V5ZY-1-LL-GP G9 T14

AVSS_USB VSS
2
C852 C823 C813 SC1U10V2KX-1-LL-GP H9 U4
H17 AVSS_USB VSS U14
SC4D7U10V5ZY-3-LL-GP (R) SC1U10V2KX-1-LL-GP
11/04 AVSS_USB VSS
2
5V_S0 J9 V6
R233 J11 AVSS_USB VSS Y21
SCD1U16V2ZY-2LLGP
11/02 5V, 10mA AVSS_USB VSS
SCD1U16V2ZY-2LLGP A16 AE7 V5_VREF 2 1 J12 AB1
B16 AVDDTX V5_VREF 3D3V_S0 J14 AVSS_USB VSS AB19
C16 AVDDTX J16 J15 AVSS_USB VSS AB25
3D3V_EuP AVDDTX AVDDCK_3_3V AVDDCK_3.3V 3.3V, 10mA 1KR2J-1-GP
AVSS_USB VSS
3.3V, 658mA D16 K10 AE1
AVDDTX D4 AVSS_USB VSS
L76 D17 K17 AVDDCK_1.2V 1.2V, 40mA K12 AE24
AVDDTX AVDDCK_1_2V AVSS_USB VSS
PLL
1 2 AVDD_USB E17 K A K14
AVDDTX AVSS_USB
PBY201209T-221Y-N-GP F15 E9 3.3V, 20mA K15
USB I/O
AVDDRX AVDDC +3.3V_AVDDC AVSS_USB
1
F17 P23
F18 AVDDRX RB751V-40-2-GP PCIE_CK_VSS R16
2ND = 68.00216.161 C835 C841
AVDDRX PCIE_CK_VSS
1
G15 C248 R19
AVDDRX PCIE_CK_VSS
2
G17 SC1U10V2KX-1-LL-GP T17
SCD1U16V2ZY-2LLGP G18 AVDDRX PCIE_CK_VSS U18
AVDDRX PCIE_CK_VSS
2
SCD1U16V2ZY-2LLGP H18 U20
J17 PCIE_CK_VSS PCIE_CK_VSS V18
SB710-1-GP-U J22 PCIE_CK_VSS PCIE_CK_VSS V20
K25 PCIE_CK_VSS PCIE_CK_VSS V21
B <F7>
11/02 PCIE_CK_VSS PCIE_CK_VSS
B
1
C831 C827 M16 W19
SC1U10V2KX-1-LL-GP C844 C839 M17 PCIE_CK_VSS PCIE_CK_VSS W22
M21 PCIE_CK_VSS PCIE_CK_VSS W24
PCIE_CK_VSS PCIE_CK_VSS
2
+3.3V_AVDDC 3D3V_EuP P16 W25
SC1U10V2KX-1-LL-GP L77 11/04 PCIE_CK_VSS PCIE_CK_VSS
SC10U10V5ZY-1-LL-GP 2 1 F9 L17
AVSSC AVSSCK
1D2V_S5
1
SC10U10V5ZY-1-LL-GP FCM1608KFG-301T05-GP
C842 C838 68.00082.311 SB710-1-GP-U
SCD1U16V2ZY-2LLGP <F7>
300ohmΩ/100MHz, 0.25Ω,0.5A
2
SC2D2U6D3V3MX-1-GP R309
0R0603-PAD
+1.2VALW
11/04
1
3D3V_S0 AVDDCK_3.3V
L75
1 2
1
PBY201209T-221Y-N-GP C290 C287 (R) (R)
1
SC1U10V2KX-1-LL-GP C289 C288
C836
2
SC2D2U6D3V3MX-1-GP SC1U10V2KX-1-LL-GP SCD1U16V2ZY-2LLGP
2
SCD1U16V2ZY-2LLGP
V_1P2_R AVDDCK_1.2V
L73
1 2
PBY201209T-221Y-N-GP
1
C826
A A
SC2D2U6D3V3MX-1-GP
2
<Variant Name>
Hsichih, Taipei
Title
SB710 POWER & DECAP
Custom
Barbados 1B
5 4 3 2 1
5 4 3 2 1
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
11/04 11/02 11/02 11/02 11/02 11/02
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_EuP 3D3V_EuP 3D3V_EuP 3D3V_EuP 3D3V_EuP
1
R290 R285 R273 R284 R326 R334 R719 R742 R745
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 2K2R2J-2-GP 2K2R2J-2-GP
(R) (R) (R) (R) (R) (R) (R) (R) (R)
2
23 PCI_CLK2
D 23 PCI_CLK3 D
23 PCI_CLK4
23 PCI_CLK5
23 LPC_CLK0
23 LPC_CLK1
24 AZ_RST#
24 IMC_GPIO17
24 IMC_GPIO16
1
R286 R289 R268 R288 R329 R333 R300 R739 R744
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 2K2R2J-2-GP 2K2R2J-2-GP
(R) (R) (R)
2
REQUIRED STRAPS
23 PCI_CLK2
23 PCI_CLK3 PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 LPC_CLK0 LPC_CLK1 AZ_RST# IMC_GPIO17 IMC_GPIO16
23 PCI_CLK4
23 PCI_CLK5 ROM TYPE:
23 LPC_CLK0 WATCHDOG TIMER USE RESERVED RESERVED ENABLE PCI CLKGEN IMC
23 LPC_CLK1 PULL ON NB_PWRGD DEBUG MEM BOOT ENABLED ENABLED H, H = Reserved
24 AZ_RST# HIGH ENABLED STRAPS
24 IMC_GPIO17
NC, L = SPI ROM DEFAULT
2009/12/23
24 IMC_GPIO16
C C
WATCHDOG TIMER IGNORE DISABLE PCI CLKGEN IMC L, H = LPC ROM

PULL ON NB_PWRGD DEBUG MEM BOOT DISABLED DISABLED
LOW DISABLED STRAPS DEFAULT L, L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT
23 PCI_AD28
23 PCI_AD27
23 PCI_AD26
23 PCI_AD25
23 PCI_AD24
23
23
PCI_AD23
PCI_AD29
OVERLAP COMMON PADS WHERE
23 PCI_AD30 POSSIBLE FOR DUAL-OP RESISTORS.
DEBUG STRAPS 11/04
SB700 HAS 15K INTERNAL PU FOR PCI_AD[30:23]

3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0
2
2
B R253 R252 R256 R680 R257 R272 R688 R681 B
2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP
(R) (R) (R) (R) (R) (R) (R) (R)
1
1
23 PCI_AD28
23 PCI_AD27
23 PCI_AD26
23 PCI_AD25
23 PCI_AD24
23 PCI_AD23
23 PCI_AD29
23 PCI_AD30
2
2
R255 R254 R263 R686 R264 R269 R692 R685
2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP
(R) (R) (R) (R) (R) (R) (R) (R)
1
1
PCI_AD29
PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD30
USE USE PCI USE ACPI USE IDE USE DEFAULT BOOTFAILTIMER
PULL LONG PLL BCLK PLL PCIE STRAPS DISABLED
HIGH RESET
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT RESERVED
A A
PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM BOOTFAILTIMER

LOW SHORT PCI PLL ACPI PLL PCIE STRAPS ENABLED
<Variant Name>
RESET BCLK
Hsichih, Taipei
Title
SB710 STRAPS
Custom
Barbados 1B

5 4 3 2 1
5 4 3 2 1
2 1 LVDS_LDO_CTL
R102(R) 1KR2J-1-GP
5VDDCCLK_CON 1 R62 2 ISP_CLK
31 5VDDCCLK_CON
100R2J-2-GP SMBUS_ISP H Simutaneous Mode
1 R41 2
31 5VDDCDA_CON
5VDDCDA_CON ISP_DAT
SMBUS_ISP L Isolate Mode Q21 INVERTER BOARD CONNECTOR
B
100R2J-2-GP BC869-25-GP
VSY NC_5V_CON L6
31 VSY NC_5V_CON 1 R149 2 BJTVCC_1 E C 1 2
31 HSY NC_5V_CON
HSY NC_5V_CON
3D3V_S0 3D3V_S0 11/03 3D3V_S0
0R0402-PAD
BJTVCC
Core_DVCC PSU: +12V
RED_CONN DCBATOUT
31 RED_CONN
1
GREEN_CONN C36 C41 L14
31 GREEN_CONN
1
1 R148 2 1 2
31 BLUE_CONN
BLUE_CONN
12/29 SC1U10V3ZY -6GP SCD1U16V2ZY -2GP DCBATOUT_INV
B
R54 R46 0R0402-PAD Q90 (R) LCD1
2
10KR2J-3-GP 10KR2J-3-GP MMBT2907ALT3G-GP 31 HCB2012KF-600T30-GP
2
(R) (R) E C TXO0- 1 C193 (68.00206.071)
C187 C182 SC1KP50V2KX-1GP
2
ISP_CLK TXO0+ 2 SCD1U25V3ZY -1-LL-GP
SC10U25V6KX-1GP (R)
1
B
Q91 (R) LVDS_GND LVDS_GND TXO1- 3
LVDS_GPIOTOSB2 ISP_DAT MMBT2907ALT3G-GP L3 TXO1+ 4
25 LVDS_GPIOTOSB2
25 LVDS_GPIOTOSB1
LVDS_GPIOTOSB1 2009/12/23 0126 Rannie modify E C 1 2
ADC_REF TXO2-
TXO2+
5
6
7
1
LVDS_LED C19 TXOC- 8
42 LVDS_LED
1
D
C14
SC1U10V3ZY -6GP
SCD1U16V2ZY -2GP TXOC+ 9
10
INVERTER BOARD CONNECTOR D
42 KEY _PAD
KEY _PAD
Firmware update by SMBUS R539 C5 TXO3-
2
VSY NC_5V_CON 1 2 AVS SC22U6D3V5MX-2GP TXO3+ 11
2
100R2F-L1-GP-U TXE0- 12
ISP_CLK 3D3V_S0 3D3V_S0 TXE0+ 13 DCBATOUT_INV
37 ISP_CLK
1
14
1
ISP_DAT R540 C473 LVDS_GND LVDS_GND TXE1- 15
37 ISP_DAT
2KR2J-1-GP SC22P50V2JN-4-LL-GP TXE1+ 16
1
17 INV_CN1
2
SMBCLK R900 R901 TXE2- 18 2 1
8,21,24,30,41,55 SMBCLK
2
4K7R2J-2-GP 4K7R2J-2-GP TXE2+ 19
SMBDATA FCM1608KFG-301T05 TXOC- 20 4 3
8,21,24,30,41,55 SMBDATA
TXOC+ 21 6 5 LCD_ID_2
Z=300 ohm,Rdc=0.35 ohm
G
SMBUS_ISP TXE3- 22 LCD_ID_1 8 7 LCD_ID_0
24 SMBUS_ISP I=0.5A ,0603 23 10 9
LVDS_GND R538 LVDS_GND TXE3+ BKLT_EN BKLT_ADJ
SMBCLK S D ISP_CLK1 D S ISP_CLK HSY NC_5V_CON 1 2 AHS L1 24
1 2 25
100R2F-L1-GP-U
11/03 3D3V_S0
ADC_VDD
VCC5_PANEL
26
DVD-CONN10D-S9-GP
1
27 (21.61175.205)
Q95 Q96
1
R537 C472 C18 C16 28
2N7002-11-GP 2N7002-11-GP 2KR2J-1-GP SC12P50V2JN-3-LL-GP SC10U10V5ZY -1GP SCD1U16V2ZY -2GP 29
2
SMBUS_ISP 30
2
3D3V_S0 32
SC10U10V5ZY-1GP
2
SCD1U16V2ZY-2GP
1
C660
PTWO-CON30-3-GP-U
G
C676
1
C4 L4 2 1 0R0402-PAD PVCC (20.K0304.030)
2
SMBDATA S D ISP_DAT1 D S ISP_DAT LVDS_GND LVDS_GND
1
2
C47
Q97 Q98
SCD1U16V2ZY -2GP Odd: channel A
2
2N7002-11-GP 2N7002-11-GP Even: channel B
SC10U10V5ZY -1GP 0210 Rannie modify LVDS_GND
0126 Rannie modify R68 1 2 11/03

0R0402-PAD
1 2
R31
11/03 3D3V_S0
3/16 Modify LVDS VCC power for LED 21" panel
11/03 3D3V_S0
0R0402-PAD
TP16
VCC5_PANEL
1
R89 1 2 C474 (R)
3D3V_S0 0R0402-PAD SC1U10V3ZY -6GP
1
C668 C621 C638
PVCC
Core_DVCC
Core_DVCC
ADC_VDD
2
1
LVDS_SPICLK
LVDS_RESET
LVDS_SDOUT
5V_S0
LVDS_RESET
NC_SCAR_4
1 2
LVDS_SDIN
SC1U10V3ZY-6GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
R546 R542 R541 R77
2
LVDS_CE
2
4K7R2J-2-GP 4K7R2J-2-GP 4K7R2J-2-GP 0R0402-PAD
U42 R550 (R)
C C
4K7R2J-2-GP
2
1
1 8 C984
2 A0 VCC 7 LVDS_WPPRO R32 1 2 DCBATOUT SC4D7U10V5ZY -3GP
A1 WP
1
3 6 LVDS_EESCL 0R0402-PAD
51
53
30
24
21
22
23
54
2
A2 SCL
4
4 5 LVDS_EESDA U41
GND SDA
PVDD33
DVDD12
DVDD12
ADC_VDD33
SPI_SDO
SPI_CE
SPI_SCL
SPI_SDI
RST
REXT
1
1
AT24C16BN-SH-T-GP 5V_S0 5V_S5 R923

C475 47KR2J-2-GP U861
SCD1U10V2KX-4-LL-GP LVDS_GND B- 7 40 TXE0- 1 D D 6 VCC5_PANEL
2
B+ 8 B- TXE0- 39 TXE0+ 2 D 5 L84

72.24C16.S01, ST B+ TXE0+ Odd: channel A D
2
1
1
G- 9 38 TXE1- 3 G S 4 V_5_LCD1 1 2
72.24C16.U01, ATMEL G+ 10 G- TXE1- 37 TXE1+ R924 R925
R- 12 G+ TXE1+ 36 TXE2- Even: channel B 10KR2J-3-GP 10KR2J-3-GP AO6402A-GP HCB2012KF-600T30-GP
R+ 13 R- TXE2- 35 TXE2+
R+ TXE2+ Main: 84.06402.B3D (68.00206.071)
34 TXE3- 5V_S0 Alt: 84.00655.B3D
2
TXE3-
2
LVDS_SOG 11 33 TXE3+
TP17 SOG0 TXE3+
11/03 3D3V_S0 11/03 3D3V_S0

TXO0-
50 TXO0-
LCD_ENAVDD_GATE1 R926
330R3J-L-GP
PANEL_ON 64 49 TXO0+
P1_1 TXO0+
1
48 TXO1-
TXO1-
1
2
C3 LVDS_EESDA 63 47 TXO1+ R927

P3_2 TXO1+
1
R547 (R) SC1U10V3ZY -6GP 55 46 TXO2- 10KR2J-3-GP
P3_3 TXO2-
1
10KR2J-3-GP U43 LVDS_BL_EN 25 45 TXO2+ Q101 R928 C985 5V_S5_LCD_DOWN
2
26 P3_6/I2C_MDA_1 TXO2+ 42 TXO3- Q100 2N7002-11-GP 470KR2F-GP SCD1U25V3ZY -1GP

P3_7/I2C_MDL_1 TXO3-
2
LVDS_CE 1 8
2009/12/23 41 TXO3+ 2N7002-11-GP G (R)
1
2
R543 LVDS_SDOUT 2 CE# VCC 7 LVDS_BL_ADJ 20 TXO3+ LCD_ENAVDD_GATE0 G
SO HOLD# P5_0/PWM0
2
LVDS_FLASH_WP 1 2 LVDS_FLASH_WP_1 3 6 LVDS_SPICLK LVDS_GPIOTOSB1 27 44 TXOC-
S
0R2-PT5-LILY -GP 4 WP# SCK 5 LVDS_SDIN LVDS_GPIOTOSB2 28 P5_1/PWM1 RTD2280L-GR-GP TXOC- 43 TXOC+ R929
GND SIO P5_2/PWM2 TXOC+
D
2
3
LVDS_LED 56 10KR2J-3-GP
P5_3/PWM3
1
R549 EC2 (R) LVDS_WPPRO 61 PANEL_ON 1 2 PANEL_ON_B 1 Q102 Q103

PM25LD010C-SCE-GP SC22P50V2JN-4GP LVDS_EESCL 62 P5_4 19 ISP_CLK PMBS3904-1-GP 2N7002-11-GP
10KR2J-3-GP
P5_5/PWM5 DDC_SCL/RX 18 ISP_DAT LCD_ENAVDD_GATE2 G
DDC_SDA/TX
2
2
72.25010.I01 KEY _PAD 57
1
Panel_SEL 58 P6_0/ADC0
72.25105.001 P6_1/ADC1
S
R548 59 15 ADC_REF PANEL_ON
1 2 AUTO_COLOR_R 60 P6_2/ADC2 ADC_RP 14
25 AUTO_COLOR_SIO P6_3 ADC_RN 0: PANEL POWER ON
ADC_GND
LDO_CTL
100R2J-2-GP 1: PANEL POWER OFF
HSYNC
VSYNC
DGND
DGND
DGND
AGND
XOUT
XIN
SC10P50V2JN-4-LL-GP
2/08 Rannie
52
16
17
1
2
32
31
29
3
C469 Slove panel will be flashed
1 2 LVDS_XTAL_IN when system power on
1
L44 R535 C467

11/03
LVDS_LDO_CTL
LVDS_XTAL_O1
LVDS_FLASH_WP
LVDS_XTAL_IN
3D3V_S0
2
1 2 1 2 2 1
RED_CONN
FCM1608CF-750T2-GP
RED_B
100R2F-L1-GP-U
RED_C R+
SCD047U10V2KX-2GP
R531
1MR2J-1-GP X5
2010/01/05
B B
(R) X-14D31818M-37GP
11/03 3D3V_S0
1
1
2
1
1
1 2 LVDS_XTAL_O 2 1 LVDS_XTAL_O1
AHS
R534 C466 (R) R136
AVS
75R2F-2-GP SC12P50V2JN-3GP R529 560R2J-3-GP 10KR2J-3-GP
1
C458
C465
2
R533 R532 SC10P50V2JN-4-LL-GP R103

2
2
1 2 R-_G1 1 2 R-_G 2 1 R- 10KR2J-3-GP BKLT_EN
0R0402-PAD 100R2F-L1-GP-U
SCD047U10V2KX-2GP
2
LVDS_GND
3
LVDS_BL_EN 1 R119 2BKLT_EN1 1 Q20
10KR2J-3-GP PMBS3904-1-GP
2
C464
L43 R530 000 12/24
1 2 1 2 2 1
GREEN_CONN
FCM1608CF-750T2-GP
GREEN_B
100R2F-L1-GP-U
GREEN_C G+
LVDS_CE IC before initial,the state is high
SCD047U10V2KX-2GP 00X
1
R527
75R2F-2-GP
C463 (R)
SC12P50V2JN-3GP 0X0 1 internal MCU
C462
0 ext MCU
2
R526 R525 3D3V_S0

2
1 2 G-_G1 1 2 G-_G 2 1 G- X00

0R0402-PAD 100R2F-L1-GP-U
SCD047U10V2KX-2GP
0XX 11/03 3D3V_S0
1
(R) R218
2
X0X 10KR2J-3-GP
C457
L42 R524 R544
2
BLUE_CONN 1 2 BLUE_B 1 2 BLUE_C 2 1 B+ 4K7R2J-2-GP
FCM1608CF-750T2-GP 100R2F-L1-GP-U R216
1
LVDS_CE
SCD047U10V2KX-2GP
1
LVDS_BL_ADJ 2 1 BKLT_ADJ
1
R523 C455 (R)

75R2F-2-GP SC12P50V2JN-3GP (R) 100R2J-2-GP
R545
C454
2
R521 R520 4K7R2J-2-GP

2
1 2 B-_G1 1 2 B-_G 2 1 B-
1
0R0402-PAD 100R2F-L1-GP-U 3D3V_S0
SCD047U10V2KX-2GP
1
R214
1KR2J-1-GP
A A
2
LCD_ID_0 R212 1 2 4K7R2J-2-GP Panel_SEL
LCD_ID_1 R210 1 2 2K2R2J-2-GP
LCD_ID_2 R209 1 2 1KR2J-1-GP

<Variant Name>
3/01 Rannie Wis tron Incorporate d

Hsichih, Taipei
Title
LVDS RTD2280
D Barbados 1B
5 4 3 2 1
A B C D E

5V_S0
ACZ_RST#_AUDIO
24 ACZ_RST#_AUDIO 5VA_S0
A
ACZ_SYNC_AUDIO

24 ACZ_SYNC_AUDIO +12V_S0 D10
ACZ_SDATAIN1

SSM5817SPT-GP

24 ACZ_SDATAIN1 5VA_S0 U27 500mA

ACZ_BITCLK_AUDIO AUD_AGND 1
24 ACZ_BITCLK_AUDIO VOUT
K
A
1
1 R764 2 ALC272_AVDD 2
GND
C333SC2D2U10V3ZY-1GP
ACZ_SDATAOUT_AUDIO 0R0402-PAD AUD_AGND D24 3 C336
24 ACZ_SDATAOUT_AUDIO VIN
1
1N4148W-1-GP SC10U10V5ZY-1GP

2
1
1
ACZ_SPKR C341
24 ACZ_SPKR C327 C328 ALC272_HP_OUT_R APL78L05EC-TRLGPU SC10U10V5ZY-1GP

4 4
2
K
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP (R)
SC2D2U10V3ZY-1GP
1
2
ALC272_HP_OUT_L V_12_CODEC AUD_AGND AUD_AGND AUD_AGND

1
(R) C329 C330
SC4D7U10V5ZY-3GP C765 C764
4040 MIC_R_JACK
1
AUD_AGND AUD_AGND SCD1U16V2ZY-2GP SC1U16V3KX-2GP SC4D7U25V5KX-GP
2
MIC_R_JACK (R)
MIC_L_JACK

MIC_L_JACK
R365 1 2 5K1R2F-2-GP
40 HP_OUT_JD AUD_AGND
ALC272_MIC1_VREFR
40 ALC272_HP_OUT_R AUDIO OUT TO SCALAR
2
D26
2 ALC272_MIC1_VREFRR
1102 Deleted BAW56-3-GP ALC272_MIC1_VREFR
2ALC272_MIC2_VREFRR
40 ALC272_HP_OUT_L
ALC272_SENSEB
ALC272_AVDD
1
CODEC_VREF
ALC272_CPVEE

ALC272_CBN
ALC272_CBP 1
3
C324

C332
AMP_OUT_L SC4D7U10V5ZY-3GP
2
AMP_OUT_R
AUD_AGND
1
36
35
34
33
32
31
30
29
28
27
26
25
U26 R773
4K7R2J-2-GP R770
LOUT1-R/PORT-D-R
HPOUT-R/PORT-I-R
CBN
MIC1-VREFO
LOUT1-L/PORT-D-L
HPOUT-L/PORT-I-L
AVSS1
AVDD1
VREF
SENSE-B
CPVEE
CBP
4K7R2J-2-GP
1
1102 Deleted
1
37 24

MONO-OUT LINE1-R/PORT-C-R
3 ALC272_AVDD 38 23 3

AVDD2 LINE1-L/PORT-C-L

40
40
MIC_IN#
HP_OUT_JD
MIC_IN#
HP_OUT_JD
R356
39
LOUT2-L/PORT-A-L MIC1-R/PORT-B-R
22 PORT_B_R C318 1 2 SC10U10V5ZY-1GP MIC_R_JACK 40
2 1 CODEC_JDREF 40 21 PORT_B_L C313 1 2 SC10U10V5ZY-1GP
JDREF MIC1-L/PORT-B-L MIC_L_JACK 40
20KR2F-L-GP 41 20 EXT_MIC 5VA_S0
LOUT2-R/PORT-A-R LINE2-VREFO
42 19
AVSS2 MIC2-VREFO

2
43 18
AUD_AGND NC#43 ALC272 LINE1-VREFO R763 (R)

44 17 10KR2J-3-GP
DMIC-CLK3/4 MIC2-R/PORT-F-R
45 (LQFP-48) 16 1
AUD_BEEP1
R345
2
1102 Deleted SPDIFO2 MIC2-L/PORT-F-L
1
EAPD
38 EAPD 46 15 10KR2J-3-GP
DMIC-CLK1/2 LINE2-R/PORT-E-R
D
GPIO0/DMIC-DATA1/2
GPIO1/DMIC-DATA3/4
(R)
EAPD 47 14 Q82
AMP_SPKR_L EAPD LINE2-L/PORT-E-L
2N7002-11-GP

38 AMP_SPKR_L 48 13 ALC272_SENSEA R355 1 2 20KR2F-L-GP G
MIC_IN# 40 (R)
SPDIFO1 SENSE-A
SDATA-OUT
PCBEEP-IN
SDATA-IN
DVDD-IO
AMP_SPKR_R
RESET#
BITCLK
38 AMP_SPKR_R
S
2
DVDD
SYNC
DVSS
DVSS
R765
10KR2J-3-GP
ALC272-GR-GP
10
11
12
(71.AL272.B0G)
1
C302
2 2
R344
3D3V_S0 AUD_PC_BEEP 2 1 AUD_BEEP 1 2 AUD_PC_BEEP
HDA_SDIN1_RES
24 ACZ_SPKR
1
10KR2J-3-GP SCD1U16V2ZY-2GP
ACZ_RST#_AUDIO 24 R346 C303
(R) 10KR2J-3-GP SCD01U16V2KX-3GP
ACZ_SYNC_AUDIO 24
2
(R)
1
2
SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP ACZ_SDATAIN_RTL_ALC272 2 R347 1 33R2J-2-GP

C301 C306 ACZ_SDATAIN1 24
ACZ_BITCLK_AUDIO 24
1
ACZ_SDATAOUT_AUDIO 24
1114
R352 1 2 0R0402-PAD 3D3V_S0
AMP_OUT_L R886 1 2 0R0402-PAD AMP_SPKR_L
AUD_AGND AMP_OUT_R R887 1 2 0R0402-PAD AMP_SPKR_R

2
1
R888 R889 C304
C323 2 1 SCD1U16V2ZY-2GP (R) 4K32R3F-L-GP 4K32R3F-L-GP SCD1U16V2ZY-2GP
1 (R) (R) 1
<Core Design>
2
1
AUD_AGND AUD_AGND Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
AUD_AGND AUDIO CODEC-ALC272
Custom
Barbados 1B
A B C D E
5 4 3 2 1
Mini PCI-E Connector

Full_Mini PCI-E CARD
Half_Mini PCI-E CARD
24 USBP1P
24 USBP1N
24 USBP0P
24 USBP0N
8 CLK_PCIE_MINI2#
8 CLK_PCIE_MINI2
D D
16 PCIE_X1_TXP0
16 PCIE_X1_TXN0
16 PCIE_X1_RXP0
16 PCIE_X1_RXN0
8 CLK_PCIE_MINI1#
TV-TUNER
8 CLK_PCIE_MINI1
Wireless Card(Present support EP/SP)

3/12 3/12
Rannie modify Rannie modify
H=6.7MM
16 PCIE_X1_TXP1
3D3V_S0
16 PCIE_X1_TXN1
H=6.7MM
3D3V_S0
16 PCIE_X1_RXP1 MINI2
16 PCIE_X1_RXN1 MINI1 53
53 NP1
NP1 0R2J-2-GP 1D5V_S0_EP/SP 2 1
1D5V_S0_EP/SP 2 1 MINI1_WAKE# R351 1 (R) 2
PCIE_WAKE# 24 4 3
8,21,24,28,41,55 SMBCLK 4 3 6 5
8,21,24,28,41,55 SMBDATA 6 5 8 7
BC_PWR MINI1_CLKREQ# 8
8 7 WLAN_ACT 36 BC_DATA 10 9
MINI2_CLKREQ# 8
10 9 BC_CLK 12 11 CLK_PCIE_MINI1#
12 11 CLK_PCIE_MINI2# BC_RESET 14 13 CLK_PCIE_MINI1
14 13 CLK_PCIE_MINI2 16 15
16 15 R364
(R) 1 2 (R)
1 2 10KR2J-3-GP 18 17 BC_DETECT
R833 10KR2J-3-GP 18 17 20 19
20 19 TP15 TPAD28 25 TV_EN 22 21 R366 0R2-PT5-LILY-GP
25 WIFI_RF_EN 22 21 R831 0R2-PT5-LILY-GP 35,41 MINIPCIE_RST# R367 1 (R) 2 0R0603-PAD MINI3_3D3V_S0 24 23 PCIE_C_RXN1 1 2 PCIE_X1_RXN1
35,41 MINIPCIE_RST# 3D3V_S0
1 R827 2 MINI2_3D3V_S0 24 23 PCIE_C_RXN2 1 2 PCIE_X1_RXN0 26 25 PCIE_C_RXP1 1 2 PCIE_X1_RXP1
3D3V_S0
C 0R0603-PAD 26 25 PCIE_C_RXP2 1 2 PCIE_X1_RXP0 28 27 R368 0R2-PT5-LILY-GP C
28 27 R830 0R2-PT5-LILY-GP SMBCLK 30 29
SMBCLK 30 29 SMBDATA 32 31 PCIE_X1_TXN1
SMBDATA 32 31 PCIE_X1_TXN0 34 33 PCIE_X1_TXP1
34 33 PCIE_X1_TXP0 USBP1N 36 35
USBP0N 36 35 USBP1P 38 37
USBP0P 38 37 MINI2_PIN_GND 40 39 MINI1_PIN_3D3V 1 R373 2
3D3V_S0
40 39 MINI2_PIN_3D3V 1 R464 2 42 41 0R0603-PAD
3D3V_S0
42 41 0R0603-PAD 44 43
44 43 TPAD28 TP13 LED_WPAN# 46 45
42 WLAN_LED# 46 45 48 47
2
48 47 50 49
50 49 R471 52 51
3D3V_S0
52 51 0R0402-PAD NP2
3D3V_S0
NP2 54
54
1
SKT-MINI52P-29-GP
SKT-MINI52P-29-GP
(62.10043.741)
(62.10043.741)
3D3V_S0 1D5V_S0_EP/SP
3D3V_S0 1D5V_S0_EP/SP
1
C914 C917 C933 C918
1
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP SCD1U16V2ZY-2GP
2
(R) C311 C908 C869

SCD1U16V2ZY-2GP SC10U10V5ZY-1GP SCD1U16V2ZY-2GP
2
B B
G16
1 2
1D5V_S0 GAP-CLOSE-PWR-2U-GP 1D5V_S0_EP/SP
G17
1 2
GAP-CLOSE-PWR-2U-GP
G15
1 2
GAP-CLOSE-PWR-2U-GP
G14
1 2
GAP-CLOSE-PWR-2U-GP
01/27
Rannie:
BCAS1
BC_DATA 2 1
BC_CLK 4 3 BC_DETECT
BC_PWR 6 5 BC_RESET
DVD-CONN6D-S2-GP
(21.61165.203)
A A
<Variant Name>
Hsichih, Taipei
Title
MINI PCIE Slot
C
Barbados 1B
5 4 3 2 1
5 4 3 2 1
RGB Topology For User Switch and Debugger

17 VGA_RED
VGA_RED Default RS760L VGA
VGA_GREEN
17 VGA_GREEN
VGA_BLUE
17 VGA_BLUE
MXM 5V_S0 12/29
RED_CONN R143 CRT1
1 25V_S0_VGAR 2 1
M_RED GREEN_CONN 0R0402-PAD
D 55 M_RED 4 3
D
M_GREEN BLUE_CONN RED_CONN 6 X 5 5VDDCCLK_CON

55 M_GREEN 8 7
GREEN_CONN 5VDDCDA_CON
M_BLUE BLUE_CONN 10 9 VSYNC_5V_CON
55 M_BLUE
1
12 11 HSYNC_5V_CON
Resistor R146 R135 R118
co-lay VGA Conn. DVD-CONN12D-FP12GP
2
150R2J-L1-GP-U 150R2J-L1-GP-U 21.62698.206,
H/VSYNC 150R2J-L1-GP-U
11pin -1#3,
2.0mm pitch
17 VSYNC_NB
VSYNC_NB
RS760L
HSYNC_NB
17 HSYNC_NB
GMCH_VSYNC
55,58 GMCH_VSYNC
GMCH_HSYNC
55,58 GMCH_HSYNC
3D3V_S0
H/VSYNC
DDC_CLK/DATA RGB DDC_CLK/DATA
1
R104
VGA_PCH_DDCSCL 10KR2J-3-GP R108
17 VGA_PCH_DDCSCL 10KR2J-3-GP GMCH_VSYNC R142 10R2J-2-GP 2 (M)
VGA_PCH_DDCSDA
17 VGA_PCH_DDCSDA
2
GMCH_DDC_DATA R105 10R2J-2-GP 2 (M)
2
C DDC_DATA_VGA C
GMCH_DDC_DATA VGA_PCH_DDCSDA R106 10R2J-2-GP 2 (UMA)
55 GMCH_DDC_DATA
GMCH_DDC_CLK
55 GMCH_DDC_CLK
M_RED R100 10R2J-2-GP 2 (M)
RED_CONN VSYNC_NB R145 10R2J-2-GP 2 (UMA) VSYNC_3V_CON
VGA_RED R116 10R2J-2-GP 2 (UMA)
GMCH_DDC_CLK R109 10R2J-2-GP 2 (M)
M_GREEN R129 10R2J-2-GP 2 (M) DDC_CLK_VGA
R110 10R2J-2-GP 2 (UMA)
GPIO VGA_GREEN R134 10R2J-2-GP 2 (UMA)
GREEN_CONN VGA_PCH_DDCSCL
M_BLUE R140 10R2J-2-GP 2 (M) BLUE_CONN
VGA_BLUE R144 10R2J-2-GP 2 (UMA)
GMCH_HSYNC R137 10R2J-2-GP 2 (M) HSYNC_3V_CON
HSYNC_NB R133 10R2J-2-GP 2 (UMA)
Switch Signal to RTD2280L

01/28
28 5VDDCCLK_CON
5VDDCCLK_CON
01/28
5VDDCDA_CON Rannie: VGA path 2
28 5VDDCDA_CON
Rannie: VGA path 1
VSYNC_5V_CON
B 28 VSYNC_5V_CON B
HSYNC_5V_CON R944 1 2 0R2J-2-GP
28 HSYNC_5V_CON
(R)
RED_CONN
28 RED_CONN
GREEN_CONN
28 GREEN_CONN
28 BLUE_CONN
BLUE_CONN 5V_S0 5V_S0 DDC_CLK_VGA S
Q93
D
3/24
5VDDCCLK_CON
2N7002-11-GP
G
1
C372 D3
1
SCD1U16V2ZY-2GP 1N4148W-1-GP
3D3V_S0 (R) U8 C58
2
SCD1U16V2ZY-2GP
K
2
1 8 BYP (R) VCC5_DDC_PH

VCC_SYNC BYP R945 1 2 0R2J-2-GP
1
1
2 3 BLUE_CONN (R)
VCC_VIDEO VIDEO_1 4 GREEN_CONN R95 R128
7 VIDEO_2 5 RED_CONN 2K2R2J-2-GP 2K2R2J-2-GP
3D3V_S0 VCC_DDC VIDEO_3
1
DDC_DATA_VGA S D 5VDDCDA_CON
C493 14 HSYNC_5V_CON Q94
SYNC_OUT1
2
SCD1U16V2ZY-2GP HSYNC_3V_CON 13 16 VSYNC_5V_CON 2N7002-11-GP 3D3V_S0

SYNC_IN1 SYNC_OUT2
2
(R) VSYNC_3V_CON 15
SYNC_IN2
1
9 5VDDCDA_CON
DDC_DATA_VGA 10 DDC_OUT1 12 5VDDCCLK_CON R890
DDC_CLK_VGA 11 DDC_IN1 DDC_OUT2
1KR2J-1-GP
DDC_IN2 6
GND
2
1
ISP_EN_N
IP4772CZ16-1-GP C59
1
(R) SC470P50V2KX-3GP C952
2
(R) SCD1U16V2ZY-2GP
2
VSYNC_3V_CON R8911 (R) 2 0R0402-PAD VSYNC_5V_CON
A A
HSYNC_3V_CON R8921 (R) 2 0R0402-PAD HSYNC_5V_CON
Hsichih, Taipei
Title
VGA Switch
C Barbados 1B

5 4 3 2 1
5 4 3 2 1
SATA_CD_ROM
SATA_HD
D SATA1 D
16
14 7
SATA_RXP0 13 6 SATA_RXP1
SATA_RXN0 12 5 SATA_RXN1
11 4
SATA_TXN0 10 3 SATA_TXN1
SATA_TXP0 9 2 SATA_TXP1
8 1
15
SKT-SATA14P-4-GP
C873 1 2 SCD01U16V2KX-3GP SATA_RXP1

25 SATA_RXP1_C
C877 1 2 SCD01U16V2KX-3GP SATA_RXN1
25 SATA_RXN1_C
C887 1 2 SCD01U16V2KX-3GP SATA_TXP1
25 SATA_TXP1_C
C884 1 2 SCD01U16V2KX-3GP SATA_TXN1
25 SATA_TXN1_C
C885 1 2 SCD01U16V2KX-3GP SATA_RXP0
25 SATA_RXP0_C
C888 1 2 SCD01U16V2KX-3GP SATA_RXN0
25 SATA_RXN0_C
C893 1 2 SCD01U16V2KX-3GP SATA_TXP0
25 SATA_TXP0_C
C891 1 2 SCD01U16V2KX-3GP SATA_TXN0
25 SATA_TXN0_C
C 3.5" SATA HDD power connector C
11/03 Slim SATA ODD power connector

+12V_S0 5V_S0 +12V_S0
11/30
1
C364
SATAPWR1
1
C370
SCD1U25V3ZY-1-LL-GP
SC10U25V6KX-1GP
Delete ODD POWER CONN.
2
2 Because it could be combined in other conn.
3
4
5
5V_S0
1
DVD-CON5-14-GP C386 C392
(21.61168.105) 3D3V_S0 SCD1U10V2KX-4-LL-GP SC10U10V5ZY-1GP
2
11/03
B B
A A
<Variant Name>
Hsichih, Taipei
Title
SATA CONN
C
Barbados 1B
5 4 3 2 1
5 4 3 2 1
R429 0R2J-2-GP R433 1 2 0R2J-2-GP

(R) 1 2 (R)
CN3 Check Footprint CN4
Check Footprint
REAR 4 USB PORT 11/02 11/02 11/02 11/02 6
SHIELD#6
6
SHIELD#6
3
5 5
USBP8N TR1 USBP8N_EXT USBP9P TR2 USBP9P_EXT 4 SHIELD#5 4 SHIELD#5
USBP8P_EXT 3 GND USBP9P_EXT 3 GND
USBP8P USBP8P_EXT USBP9N USBP9N_EXT USBP8N_EXT 2 D+ USBP9N_EXT 2 D+
DLW21SN900SQ2LUGP-DUMMY USBVCC89 1 D- USBVCC89 1 D-
VBUS VBUS
DLW21SN900SQ2LUGP-DUMMY (68.00201.141)
(68.00201.141)
1
C957 C959
SKT-USB6-1-GP SKT-USB6-1-GP
SC10U10V5ZY-1-LL-GP C958 SC10U10V5ZY-1-LL-GP C960
SC22U10V6ZY-2GP SC22U10V6ZY-2GP
2
R431 1 2 0R2J-2-GP
D D
R4301 20R2J-2-GP (R)
(R)
2/10 Rannie 2/10 Rannie

USB PORT X4 Check Footprint CN5
Check Footprint CN6
6
5 SHIELD#6 6
USBVCC89 4 SHIELD#5 5 SHIELD#6
USBP7P_INT 3 GND 4 SHIELD#5
F3
VCC5_USB 1 2 USBVCC89_1 1 L35 2 USBVCC89 USBP7N_INT 2 D+ USBP6P_INT 3 GND
D- D+
1
USBVCC67 1 USBP6N_INT 2
VBUS D-
1
POLYSW-1D5A8V-2-GP 0R0805-PAD USBVCC67 1
VBUS
1
R463 R443
24 USBP9P
1
1KR3J-L1-GP 10KR2J-3-GP C411 TC23 TC26 C961
24 USBP9N SKT-USB6-1-GP
1
SCD1U16V2ZY-2LLGP E470U6D3VM-10GP E100U16VM-32-GP SC10U10V5ZY-1-LL-GP C963 C962
SKT-USB6-1-GP
2
11/02 (R) (R) SC22U10V6ZY-2GP SC10U10V5ZY-1-LL-GP C964
SCD1U16V2ZY-2LLGP
24 USBP8P
2
OC*89 09.1071D.0FL SC22U10V6ZY-2GP
24 USBP8N
2
1
1
24
24
USBP7P
USBP7N
C401
R442
15KR2J-1-GP Colay
(R)
2
24 USBP6P 2/10 Rannie
2
24 USBP6N 2/10 Rannie
2/10 Rannie
For ESD
OC*89
24 OC*89
24 OC*67
OC*67
11/02 IP4220CZ6-GP
C C
USBP8P_EXT 1 6 USBP8N_EXT
ESD I/O1 ESD I/O4
USBP9P_EXT
2
3 GND
ESD I/O2
VP
ESD I/O3
5
4
USBVCC89
USBP9N_EXT 11/02
1
D15 C406
SCD1U16V2ZY-2LLGP
2
R437 1 2 0R2J-2-GP
(R) R435 1 2 0R2J-2-GP
(R)
4
3
USBP7P TR3 USBP7P_INT
USBP6P TR4 USBP6P_INT
USBP7N USBP7N_INT
USBP6N USBP6N_INT
DLW21SN900SQ2LUGP-DUMMY
(68.00201.141) DLW21SN900SQ2LUGP-DUMMY
1
(68.00201.141)
1
2
B B
R436 1 2 0R2J-2-GP
(R) R434 1 2 0R2J-2-GP
(R)
11/02
VCC5_USB VCC5_USB
USBVCC67
VCC5_USB 1
F2
2 USBVCC67_1 1 L34 2USBVCC67 For ESD
1
1
POLYSW-1D5A8V-2-GP 0R0805-PAD
1
IP4220CZ6-GP
R456
1KR3J-L1-GP
R439
10KR2J-3-GP C404 TC22 TC27 11/02
SCD1U16V2ZY-2LLGP E470U6D3VM-10GP E100U16VM-32-GP USBP6P_INT 1 6 USBP6N_INT
ESD I/O1 ESD I/O4
2
(R) (R) 2 5 USBVCC67

SCD1U16V2ZY-2LLGP
GND VP
2
OC*67 USBP7P_INT 3 4 USBP7N_INT

ESD I/O2 ESD I/O3
1
09.1071D.0FL
1
R440
1
C399 15KR2J-1-GP D16 C410
(R)
Colay 2009/06/03
2
Add ESD diode

2
2
SCD1U16V2ZY-2LLGP
A A
<Variant Name>
Hsichih, Taipei
Title
FRONT USB HEADER
C
Barbados 1B
5 4 3 2 1
5 4 3 2 1
3/12 Rannie 0R2J-2-GP

11/093D3V_EuP 1 2
01/29 R930 (R)
Lenovo suggestion
1
24 USBP11P 10/100M Lan Transformer R935 SPEED_100*_L 1
D37
24 USBP11N
8K2R2J-3-GP
3SPEED_100*_L_F 1
R481
2 Check Footprint
24
24
USBP10P
USBP10N U49 0R3J-0-U-GP
SPEED_100*_L_1
RJ1
2010/01/05
2
LAN_100LED_CTRL 2
7 10 RJ45-1 12
YELLOW
LINK*_ACTIVITY_L_1
39 TRD0P
-
8 TD+ TX+ 9 RJ45-2 8 11 2 1
39 TRD0N BAT54A-7-F-1-GP (83.00054.R81) +
V_3P3_LAN
TD- TX- 7 R479 330R2J-3-GP
1 R931 (R) RJ45-4 6
24 OC*1011 6 RD+ 2 TRD1P 39 3D3V_EuP 1 2 5
XRF_RDC
14 CT RD- TRD1N 39 4 13
XFR_RXC RJ45_GND
11 CT 16 3
RJ45_GND
LAN_100LED_CTRL XFR_CMT RJ45-3 0R2J-2-GP RJ45-3
D 25 LAN_100LED_CTRL 3 CT RX+ 15 2
D
XRF_TDC RJ45-4 RJ45-2
CT RX-
1
LAN_LINKLED_CTRL D38
25 LAN_LINKLED_CTRL 1 1 10
R936 LINK*_ACTIVITY_L RJ45-1 - SPEED_100*_L_1
2
XFORM-238-GP 8K2R2J-3-GP 9 2 1
V_3P3_LAN
+
(68.68167.301) 3 LINK*_ACTIVITY_L_1 GREEN
R484 330R2J-3-GP
R946
SKT-JACK-361-GP
2
LAN_LINKLED_CTRL 2 75R5J-GP
2LAN_TERMINAL2 1
D44 BAT54A-7-F-1-GP (83.00054.R81)
D43
1 2 H16 S30-A230X
1
S30-A230X
HOLE S30-A230X
C924 C923
S30-A230X
R511 1 2 0R0603-PAD
1
1
XFR_RXC R894 1 2 75R5J-GP LAN_TERMINAL1 1 2 C934 1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
RJ45_GND R517 0R0603-PAD
1
SC1500P2KV8KX-LL-GP C989 R504 1 2 0R0603-PAD
RJ45_GND SC1500P2KV8KX-LL-GP R842 1 2 0R0603-PAD
RJ45_GND
2
1
1208 size R841 1
1
2
2
0R0603-PAD
XFR_CMT R895 1 2 75R5J-GP H16 connected to GND for LAN ESD protector R843 0R0603-PAD
RJ45_GND RJ45_GND
D45
SPEED_10*_L
39 SPEED_10*_L 1 2
SPEED_100*_L
39 SPEED_100*_L
S30-A230X
LINK*_ACTIVITY_L
39 LINK*_ACTIVITY_L S30-A230X
39 TRD0P
TRD0P 2010/01/05 U860
39 TRD0N
TRD0N LAN Surge Solution RJ45-2 1
2
10
9
RJ45-1
R899 3 8
1 2 SURGE1_GND 11
TRD1P
39 TRD1P 4 7
C PBY201209T-221Y-N-GP C
TRD1N (R) 5 6
39 TRD1N
V_3P3_LAN V_3P3_LAN RJ45_GND TCLAMP3302N-TCT-GP-U
D18 (R) D17 (R) (R)
2 2
SPEED_100*_L_1 3 LINK*_ACTIVITY_L 3
1 1 U856
RJ45-4 1 10 RJ45-3
2 9
BAV99-4-GP BAV99-4-GP
1
R893 3 8
C432 C428 1 2 SURGE2_GND 11
SC470P50V3JN-2LL-GP SC470P50V3JN-2LL-GP
2
PBY201209T-221Y-N-GP 4 7
5 6
2/10 Rannie 2/10 Rannie (R)
RJ45_GND TCLAMP3302N-TCT-GP-U
(R)
R485 0R2J-2-GP
1 2 R754 1 2 0R2J-2-GP
(R) (R) U858
3/12 Rannie 2 1 TRD0N
4 NC#2 I/O_LINES#1 3 TRD0P
5 NC#4 I/O_LINES#3 7 TRD1N
NC#5 I/O_LINES#7
1
3
6 9 TRD1P
USBP10P TR5 USBP10P_EXT USBP11P TR8 USBP11P_EXT 8 NC#6 I/O_LINES#9 R874
B NC#8 B
10 0R0805-PAD
USBP10N USBP10N_EXT USBP11N USBP11N_EXT NC#10 11 SURGE3_GND 1 2
GND
DLW21SN900SQ2LUGP-DUMMY DLW21SN900SQ2LUGP-DUMMY
(68.00201.141) (68.00201.141) RCLAMP3304N-GP-U
4
R482 1 2 0R2J-2-GP R753 1 2 0R2J-2-GP

(R) (R)
11/02 01/27
11/02 11/02 Rannie: change USB connector type from SMD to DIP
F4 USBVCC1011
VCC5_USB 1 2 USBVCC1011_1 1 L36 2 USBVCC1011 CN7 CN8
1
6 6
POLYSW-1D5A8V-2-GP R446 0R0805-PAD USBVCC1011 1 USBVCC1011 1
1
10KR2J-3-GP
C442 TC24 TC28 USBP10N_EXT 2 USBP11N_EXT 2
SCD1U16V2ZY-2LLGP E470U6D3VM-10GP E100U16VM-32-GP 3 3
11/05 USBP10P_EXT USBP11P_EXT
SCD1U16V2ZY-2LLGP
1 2
4 4
Side 2 USB PORT OC*1011
Colay
(R)
09.1071D.0FL 5 5
1
R438
(2/3) C402
(R)
15KR2J-1-GP
2/10 Rannie
SKT-USB-97-U1GP SKT-USB-97-U1GP
2
USBVCC1011 USBVCC1011
For ESD
1
IP4220CZ6-GP C965 C966 C967 C968
IP4220CZ6-GP
11/02 USBP10P_EXT 1
ESD I/O1 ESD I/O4
6 USBP10N_EXT
SC10U10V5ZY-1-LL-GP SC22U10V6ZY-2GP SC10U10V5ZY-1-LL-GP SC22U10V6ZY-2GP
2
1 6 2 5 USBVCC1011
A 2 ESD I/O1 ESD I/O4 5 USBVCC1011 3 GND VP 4 A
USBP11P_EXT 3 GND VP 4 USBP11N_EXT ESD I/O2 ESD I/O3
ESD I/O2 ESD I/O3
2/10 Rannie 2/10 Rannie
1
D19 C441
1
D25 C414
SCD1U16V2ZY-2LLGP
<Variant Name>
2
SCD1U16V2ZY-2LLGP
2
ESD protection Wistron Incorporated

Hsichih, Taipei
Title
FRONT USBX2 + RJ45
C
Barbados 1B
Date: Sunday, April 25, 2010 Sheet 34 of 62
5 4 3 2 1
A B C D E
3D3V_S0 V_3_CARD
V_3_1394_O
From VT6325
CLK_PCIE_CR_P MEM_CARD1
8 CLK_PCIE_CR_P CLK_PCIE_CR_N R687 Internal LDO
8 CLK_PCIE_CR_N
S
4K7R2J-2-GP 23 25 CRIO14
SD_VCC SD_DAT0
1
1 2CRIO18_R G 14 29
PCIE_RXP4
CRIO18
R752
Layout: Close to Card 33 MS_VCC SD_DAT1 10
CRIO8
CRIO10
16 PCIE_RXP4 XD_VCC SD_DAT2
16 PCIE_RXN4
PCIE_RXN4 AO3413-GP
Q78
0R3J-0-U-GP
(R)
connector SD_DAT3
11 CRIO9
8 12
16 PCIE_TXP4
PCIE_TXP4
Layout: Close CRIO0
XD_D0 SD_CMD
CRIO11_SD
2
PCIE_TXN4 V_3_CARD V_3_CARD CRIO1 9 24 CRIO12
16 PCIE_TXN4 XD_D1 SD_CLK
MINIPCIE_RST#
to VT6325 CRIO2_XD
CRIO3
26
27 XD_D2 SD_CD_SW
36
35
CRIO15
CRIO7_SDWP
30,41 MINIPCIE_RST# CRIO4 28 XD_D3 SD_WP_SW
XD_D4
2
CRIO5 30
4 XD_D5 4
1
R694 C801 C767 C766 CRIO6 31 19 CRIO5
C755 C834 (R) C797 CRIO7 32 XD_D6 MS_DATA0 20 CRIO6
10KR2J-3-GP XD_D7 MS_DATA1
C855 18 CRIO4
MS_DATA2
2
SCD1U16V2ZY-2GP SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP CRIO10 1 16 CRIO3
XD_R/B MS_DATA3
1
SC1U10V3ZY-6GP SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP CRIO9 2
CRIO11_XD_CE 3 XD_RE 21 CRIO7_MSBS
CRIO13 4 XD_CE MS_BS 17 CRIO16
CRIO19 5 XD_CLE MS_INS 15 CRIO2_SCLK
CRIO8 6 XD_ALE MS_SCLK
CRIO14 7 XD_WE
V_3_1394_O 3D3V_S0 V_3_1394_A CRIO11 1 R723 2 CRIO11_SD CRIO17 34 XD_WP 13
XD_CD_SW 4IN1_GND 22
1
L70
2
+3.3V 0R0402-PAD
NP1 4IN1_GND 38
FCM1608KFG-301T05-GP 1 R747 2 CRIO11_XD_CE NP2 NP1 4IN1_GND 37
NP2 4IN1_GND
1
C854 C983 0R0402-PAD
C785 C848 C815 C851 C774 C786 C788 C832 SC4D7U10V5ZY-3-LL-GP
2 (R) CARDBUS36P-1-GP
2
SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP SC1U10V3ZY-6GP SCD1U16V2ZY-2GP CRIO7 1 R684 2 CRIO7_SDWP
SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 0R0402-PAD
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2/10 Rannie 1 R716 2 CRIO7_MSBS
0R0402-PAD
CRIO2 1 R699 2 CRIO2_XD

VCORE_1394_A 0R0402-PAD
VCORE_1394
1 R720 2
+1.2V 1
L69
2 +1.2V 0R0402-PAD
CRIO2_SCLK
1 FCM1608KFG-301T05-GP
1
V_3_CARD
C828 C846 C821 C784 C775 C787 C795
CRIO14 R733 1 2 4K7R2J-2-GP
2
2
CRIO8 R736 1 2 4K7R2J-2-GP
SC1U10V3ZY-6GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP SCD1U16V2ZY-2GP CRIO10 R730 1 2 4K7R2J-2-GP
SCD1U16V2ZY-2GP SC1U10V3ZY-6GP SCD1U16V2ZY-2GP CRIO9 R726 1 2 4K7R2J-2-GP
3 CRIO11 R722 1 2 4K7R2J-2-GP 3
CRIO13 R740 1 (R) 2 4K7R2J-2-GP

CRIO19 R737 1 (R) 2 4K7R2J-2-GP
CRIO14 R735 1 (R) 2 4K7R2J-2-GP
1394 port Common Choke Front 4pin 1108 Check Footprint

U47 R748 1 2 0R2J-2-GP R750 1 2 0R2J-2-GP
VIA VT6325 3D3V_S0

22
VCC1 CRIO0
45 CRIO0 TPB0- TPBN0 TPA0- TPAN0
FIRE1
1 46 CRIO1 6
43 VCC2 CRIO1 47 4
VCC3 CRIO2
CRIO2
Close to FIRE1 TPAP0
3
48 CRIO3 TPAN0 3
42 CRIO3 49 CRIO4 TPBP0 2
41 VDD33I CRIO4 50 CRIO5
V_3_1394_O VDD33O CRIO5 52 CRIO6 TR7 TPBN0 1
51 CRIO6 53 CRIO7 ACM2012H-900-GP-DUMMY 5
V_3_CARD VCCCR1 CRIO7 (R)
58 54 CRIO8
VCCCR2 CRIO8 55 ACM2012H-900-GP-DUMMY
CRIO9
CRIO9
TR6
68.00201.141 Murata (R)
SKT-1394-4P-52-GP
23 56 CRIO10
VCORE_1394
2 VDDC1 CRIO10 57 CRIO11 69.10087.011 Chilisin
VDDC2 CRIO11
4
44 59 CRIO12
VDDC3 CRIO12 60
CRIO13
CRIO13 TPB0+ TPBP0 TPA0+ TPAP0 If using 6pin CONN, please
28 61 CRIO14
VDDC4 CRIO14 62 CRIO15 R749 1 2 0R2J-2-GP R751 1 2 0R2J-2-GP separate shielding GND and
CRIO15
V_3_1394_A
29
VDDA CRIO16
63 CRIO16 signal GND.
35 3 CRIO17
VDDAP0 CRIO17 4 CRIO18
10 CRIO18 5 CRIO19
14 VCCAH_RX CRIO19 17
VCCAH_MAIN CRIO20 Pin17 is floating
6
2 VCORE_1394_A VCCA_TX 2
9 38 TPA0-
VCCA_RX XTPAM0 39 TPA0+ TPBIAS0 C853 1 2
XTPAP0 36
XTPBM0
TPB0- XCPS Definition: SCD33U16V3KX-1GP
PCIE_RXP4 SCD1U16V2ZY-2GP2 1 C791 PCIE_1394_TXP 7 37 TPB0+
PETP0 XTPBP0 For 6pin type of 1394, mount 11kohm res to +12V.
1
PCIE_RXN4 SCD1U16V2ZY-2GP2 1 C790 PCIE_1394_TXN 8
PETN0
PCIE_TXP4 11
PERP0 XI
31 XI_1394 For 4pin type, unmount 11kohm res. R757 R758
PCIE_TXN4 12 30 XO_1394 R743 54D9R2F-L1-GP 54D9R2F-L1-GP
PERN0 XO 33 XREXT_1394 1 2 Both of type need mount 1kohm to GND.
5K6R2F-2-GP R704 1 2 PEX_REXT 13 XREXT 34 XCPS_1394 5K6R2F-2-GP
PEX_REXT XCPS0
2
MINIPCIE_RST# 18 40 TPBIAS0 XCPS_1394
R711 1 2 CLKREQ_N_1394 19 PERST# XTPBIAS0 TPB0-
3D3V_S0 CLKREQ#
1
4K7R2J-2-GP 26 SDA_1394 TPB0+
CLK_PCIE_CR_P 15 SDA 27 SCL_1394 R746
CLK_PCIE_CR_N 16 REFCLK+ SCL 1KR2F-3-GP
REFCLK- 32 VT6325_REG_EN R738 1 2 TPA0-
NC#32 4K7R2J-2-GP TPA0+
R710
2
20
1 2 EE_EN 21 GPIO1 64
Near the chip
EE_EN VSS
1
Disable EEPROM (R) 24
GRSTZ_1394 25 TEST 65 R756 R755
function Mount 4.7kohm 4K7R2J-2-GP GRST# GND 54D9R2F-L1-GP 54D9R2F-L1-GP
1
C825
EEPROM Enable Unmount VT6325-GP
For ESD protection C865
2
SC1U10V3ZY-6GP
1104 1 2
2
SC270P50V2JN-2GP
CLOSE TO connector D32 1D8V 1394_PD1 1 R759 2
1102 Modify TPAP0 1

ESD I/O1 ESD I/O4
6 TPAN0 4K99R2F-L-GP
2 5
GND VP
1
3 4
C867
TPBP0 TPBN0
XI_1394 ESD I/O2 ESD I/O3
SCD1U16V2ZY-2GP
2
XO_1394 1 2 C807 IP4220CZ6-GP
SCD1U16V2ZY-2GP
3D3V_S0
X6
1 2 U46
1 1
R714 8 1
X-24D576MHZ-52GP VCC E0
2 1 WP_1394 7 2
WC# E1
1
C837 C845 510R2J-1-GP SCL_1394 6 3

SC12P50V2JN-3-LL-GP SC12P50V2JN-3-LL-GP SDA_1394 5 SCL E2 4
SDA VSS <Core Design>
2
M24C02-WMN6TP-GP-U
Wistron Corporation
23.30032.281 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
2/08 Rannie VT6325 1394/CARD READER
C
Barbados 1B
A B C D E

10/30
3D3V_WEBCAM

3D3V_S0
2009/12/23 0R2-PT5-LILY-GP
U15
(R) C274
1 R8 2 USBP4N_INT 3D3V_WEBCAM 1 5 1 2
SCD1U16V2ZY-2GP
24 USBP4N 2 OUT IN
0R2-PT5-LILY-GP SC4D7U10V3KX-GP
1 R1 2 USBP4P_INT 3 GND 4 VCC5_USB R311 1 (R) 2 0R3J-0-U-GP
24 USBP4P NC#3 EN
1
EC1 WEBCAM_EN 25
USBVCCTP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
F1
G5240B1T1U-GP 1 2 USBVCCTP
VCC5_USB
1
74.05240.A7F C286 C281
(R) FUSE-1D5A6V-11GP
1
3D3V_WEBCAM 3D3V_S0
2
C277
SC10U10V5ZY-1GP
2
1 2
R224 0R3J-0-U-GP
(R) Touch panel USBVCCTP
3D3V_WEBCAM
MULTITP1
WEBCAM1
USBP4N_INT 2 1 USBP4P_INT TP_DET# 1
24 TP_DET#
4 3 2
WEBCAM_DET# 6 5 USBP5P 3
23 WEBCAM_DET# 24 USBP5P
USBP5N 4
24 USBP5N
5
DVD-CONN6D-S2-GP
(21.61165.203)
10/30 DVD-CON5-14-GP
10/30 (21.61168.105)
()* $"%
()* #
&"'" &"'"
( !"% ( !"%
( !""% ( !""%
0201 Rannie modify

3/24 BT_POWER

3D3V_S5 3D3V_S5 10/30 CN9
1
3D3V_EuP 2
2
3 USBP3P_INT
R509 4 USBP3N_INT
10KR2J-3-GP 5 BT_LED_PWR
BT_LED_PWR 42
2
6 WLAN_ACT
WLAN_ACT 30
S
R902 7 BT_RESET_OUT
BT_RESET_OUT 42
1
10KR2J-3-GP BT_POWER_CTL#1 G 8
(R) Q65 BT_POWER
JWT-CON8-S4-GP
1
AO3413-GP
D
Q67
R941 (R) 2N7002-11-GP
25 BT_PWR_EN
2 1 G
2009/12/23 10/30
1KR2J-1-GP
S
24 USBP3N R507 1 2 USBP3N_INT

R942 C447 0R2-PT5-LILY-GP
2 1 SC1U10V3ZY-6GP R508 1 2 USBP3P_INT
24,41,46,48 SLP_S4* 24 USBP3P
2
0R2-PT5-LILY-GP
1KR2J-1-GP

!
" !
<Core Design>
Wistron Corporation
Title
CAMERA/BT/NEXT WINDOW
C
Barbados 1B
5 4 3 2 1
VCC5_USB
R497 F5
1 2 KB_PWR_1 1 2 KB_PWR
0R0603-PAD
POLYSW-1D5A8V-2-GP
2
C445
SCD1U16V2ZY-2LLGP
(R) D35 (R) D34
1
4
3
D RN4 2 2 D
SRN4K7J-8-GP
3 3
41 SIO_KCLK SIO_KCLK
SIO_KDAT 1 1
41 SIO_KDAT
1
2
ISP_CLK BAV99-4-GP BAV99-4-GP
28 ISP_CLK
28 ISP_DAT ISP_DAT
2009/12/29 2009/12/29
1
C453 C450
150pF_50V 150pF_50V
C C
2
0402 0402
NPO NPO
SKT1
7 500mA,300ohm@100MHZ
3 FCM1608KFG-301T05-GP
5 SIO_KCLK_CON SIO_KCLK_CON L38 1 2 SIO_KCLK
SIO_KDAT_CON L40 1 2 SIO_KDAT
1 SIO_KDAT_CON FCM1608KFG-301T05-GP
2 ISP_CLK
6 ISP_DAT
2
4 KB_PWR C452 C449
8 2009/12/29 SC47P50V2JN-3GP SC47P50V2JN-3GP
1
MINDIN-6P-10-GP
B B
<Variant Name>
A A
Hsichih, Taipei
Title
PS2 KB/MS
B
Barbados 1B
5 4 3 2 1
5 4 3 2 1
5V_S0 5V_S0_AMP 2/08 Rannie

R422
1 2
1
0R0805-PAD C954 C955 C956
SC10U10V5ZY-1GP SC10U10V5ZY-1GP SCD01U16V2KX-3GP
(R) (R) (R)
2
D D
U859
AMP_SPKR_L SCD1U50V3KX-GP 1 2 C938 PORTE_SPK_L_C 1 24 PORTE_SPK_R_C C939 1 2 SCD1U50V3KX-GP AMP_SPKR_R

LINN RINN
SCD1U50V3KX-GP 1 2 C940 2008_LINP 2 23 2008_RINP C941 1 2 SCD1U50V3KX-GP
LINP RINP
TPA2008_SD1# 3 22 2008_BYPASS C942 1 2 SC1U10V3ZY-6GP
SHUTDOWN# BYPASS
4 21
5V_S0_AMP PVDDL PVDDR
5 20
SPKR_L+
LOUTP ROUTP
SPKR_R+
3W Speaker
C943 1 2 SC1U10V3ZY-6GP 6 19
PGNDL PGNDR
7 18 C944 1 2 SC1U10V3ZY-6GP CN14
C945 1 2SC10U10V5ZY-1GP PGNDL PGNDR SPKR_L+_C 2
SPKR_L- 8 17 SPKR_R- SPKR_L- L80 1 2 HCB1608KF-330-GP SPKR_L-_C SPKR_L-_C 1
LOUTN ROUTN
AMP_SPKR_L 9 16 SPKR_L+ L81 1 2 HCB1608KF-330-GP SPKR_L+_C JWT-CON2-S11-GP
29 AMP_SPKR_L PVDDL PVDDR 5V_S0_AMP
3D3V_S0 SPKR_R- L82 1 2 HCB1608KF-330-GP SPKR_R-_C (21.61210.102)
2008_COSC 10 15 SPKR_R+ L83 1 2 HCB1608KF-330-GP SPKR_R+_C
AMP_SPKR_R COSC NC#15
29 AMP_SPKR_R
1
2008_ROSC 11 14 TP_VOLUME HCB1608KF-330T30
ROSC VOLUME
1
R882 Z=33 ohm,Rdc=0.04 ohm CN15
EAPD C946 12 13 1KR2F-3-GP C947 C948 C949 C950 SPKR_R+_C 2
29 EAPD 25 AGND VDD 5V_S0_AMP I=3A ,0603 1
SC220P50V2KX-3GP SPKR_R-_C
GND
2
1
1
2
TPA2008_SD TPA2008D2PWPR-GP C951 JWT-CON2-S11-GP
40 TPA2008_SD
R883 SC1U10V3ZY-6GP SC1000P50V3JN-GP-U SC1000P50V3JN-GP-U (21.61210.102)
2
120KR3F-GP SC1000P50V3JN-GP-U SC1000P50V3JN-GP-U
1
TPA2008_SD#
25 TPA2008_SD#
R884
2
10KR2F-2-GP
C C
2
5V_S0_AMP
2
R938
10KR2J-3-GP
1
5V_S5
12/30 2
TPA2008_SD1#
R870 5V_S5
10KR2J-3-GP
2
Q63
1
2N7002-11-GP R762
D
10KR2J-3-GP Q88
TPA2008_SD G 2N7002-11-GP
1
EAPD# G
B B
S
D
S
Q89 Q83
2N7002-11-GP 2N7002-11-GP
R871
TPA2008_SD# 1 2 TPA2008_SD#_R G EAPD G
0R2-PT5-LILY-GP
S
S
TPA3113_SD#(GPIO52) TPA3111D2 EAPD TPA3111D2
L Disable L Disable
H Enable H Enable
A A
<Variant Name>
Hsichih, Taipei
Title
POWER DELIVERY CHART
C
Barbados 1B
5 4 3 2 1
5 4 3 2 1
1102
Need to Modify
check Xtal spec!!
25MHz XTAL EEPROM
72.93C46.N01
LAN_XTALO 1 R432 2
72.93C46.T01
XTAL-25MHZ-96GP
1KR2J-1-GP
X4 1 2 LAN_XTALI
D LAN_EECS D
R458
1 2
10MR2J-L-GP
1
C419 C418 Need to check F/W.
SC15P50V2JN-2-GP SC15P50V2JN-2-GP
2
R444
LAN_EEDI 1 2
V_3P3_LAN
3KK6R2J-GP
Default Value of LEDS1,0 = 11
V_1P2_LAN 12/29
11/11 For EuP
R59 1 2 LAN_DDSR
0R0402-PAD
3D3V_EuP V_3P3_LAN
PCIE X1 RX FROM RS780L LAN_DDSR LAN_DDSR
1
C 1 R483 2 V_3P3_LAN C930 C
0R0805-PAD C928
1
PCIE_GLAN_RXP 1 2 C385 PCIE_LAN_TXP_ICH SC1U10V3ZY-6-LL-GP SCD1U25V3ZY-1-LL-GP
16 PCIE_GLAN_RXP
2
SCD1U10V2KX-4-LL-GP C427 C396 C412 C420 (R)
PCIE_GLAN_RXN 1 2 C384 PCIE_LAN_TXN_ICH SC4D7U10V5ZY-3-LL-GP SCD1U16V2ZY-2LLGP R466
16 PCIE_GLAN_RXN
2
SCD1U10V2KX-4-LL-GP 0R2J-2-GP
SCD1U16V2ZY-2LLGP SCD1U16V2ZY-2LLGP (R)
Close to Pin 1,29,37 R460 V_3P3_LAN

1 2
LAN_DDSR_44
2K49R2F-GP
LINK*_ACTIVITY_L
PCIE X1 TX FROM RS780L
LAN_XTALO
LAN_RSET
LAN_DDSR
LAN_XTALI
PCIE_TXP_LAN V_1P2_LAN_E
16 PCIE_GLAN_TXP Close to Pin 19
PCIE_TXN_LAN LAN_1P2_OUT
16 PCIE_GLAN_TXN
1
C922 1 C920
1
SC1U10V3ZY-6-LL-GP SC1U10V3ZY-6-LL-GP
C417 U33
48
47
46
45
44
43
42
41
40
39
38
37
2
SCD1U16V2ZY-2LLGP RTL8103EL-GR-GP
RSET
VCTRL12A
GND
VCTRL12D
NC#44
NC#43
CKXTAL2
CKXTAL1
NC#40
NC#39
LED0
VDD33
V_1P2_LAN
1 36
LAN CLOCK V_1P2_LAN V_3P3_LAN
TRD0P 2
3
AVDD33
MDIP0
DVDD12
LED1/EESK
35
34
LAN_EESK 1 R452
1 R447
2 0R0402-PAD
2 0R0402-PAD
SPEED_100*_L
TRD0N LAN_EEDI SPEED_10*_L
4 MDIN0 LED2/EEDI/AUX 33
NC#4 LED3/EEDO
1
TRD1P 5 32 LAN_EECS
8 KG_GFX_CLKP MDIP1 EECS
C383 C395 C398 C415 TRD1N 6 31
SCD1U25V3ZY-1-LL-GP
SCD1U25V3ZY-1-LL-GP
SCD1U25V3ZY-1-LL-GP
SCD1U25V3ZY-1-LL-GP
GND 7 MDIN1 GND 30

8 KG_GFX_CLKN GND DVDD12 V_1P2_LAN
2
8 29
NC#8 VDD33 V_3P3_LAN
9 28 RTL_ISOLATE_N
10 NC#9 ISOLATE# 27 PLTRST*_LAN
V_1P2_LAN DVDD12 PERST#
B 11 26 WOL B
12 NC#11 LANWAKE# 25 -LAN_CLKREQ TPAD28 TP14
REFCLK_M
REFCLK_P
NC#12 CLKREQ#
RST*
DVDD12
GNDTX
VDDTX
NC#23
NC#24
HSON
HSOP
HSIN
HSIP
GND
23 PLTRST*_LAN
13
14
15
16
17
18
19
20
21
22
23
24
Close to Pin 10,13,30,36
V_1P2_LAN
11/11 For EuP
PCIE_LAN_TXP_ICH
PCIE_LAN_TXN_ICH
WAKE ON LAN In layout
PCIE_TXP_LAN
PCIE_TXN_LAN
KG_GFX_CLKN
KG_GFX_CLKP
1. The trace length between R105 and 8103EL pin1 must be
within 200mil. 2/08 realtek suggestion
3D3V_S0
24 WOL 2. C57 to R584 must be within 200mil. 3D3V_S0
3. The trace width from VDD33 to pin45 should>40mils.
1
4. Power plane for pin48 and around ground trace. R420 R920
1KR2J-1-GP 1KR2J-1-GP
In position: V_1P2_LAN_E
1. Pin48 should be near R449, and then 0.1uF(C56).
2
SPEED_10*_L RTL_ISOLATE_N -LAN_CLKREQ
SPEED_10*_L
2. Pin 45 should be near 0.1u F(C57).
1
SPEED_100*_L
34 SPEED_100*_L R421 R415
LINK*_ACTIVITY_L 15KR2J-1-GP 1KR2J-1-GP
34 LINK*_ACTIVITY_L
(R)
2
TRD0P
34 TRD0P
TRD0N
34 TRD0N
TRD1P
A 34 TRD1P A
TRD1N
34 TRD1N
<Variant Nam e>
Hsichih, Taipei
Title
FAST 10/100 LAN RTL8103

Cus tom
Barbados 1B
5 4 3 2 1
5 4 3 2 1
2/05 rannie modify

ALC272_HP_OUT_L R371 1 2 15R3-GP HP_OUT_L_C
HP_OUT_R_C
ALC272_HP_OUT_R R377 1 2 15R3-GP

5V_S5

1
C342 C343

SC220P50V2KX-3GP
SC220P50V2KX-3GP
D11 D12
D D
1
(R) (R)
2
R425 Normal: open, Jack in: short
MLVG04025R0QV05BP-GP
10KR2J-3-GP

AUD_AGND AUD_AGND
R426
2

2
MUTE_LO# 1 2 MUTE_LO*_1 1 Q53
PMBS3906-GP AUD_AGND AUD_AGND

HPOUT1
4K7R2J-2-GP
29 MIC_L_JACK
3
NP2
29 MIC_R_JACK NP1
5

HP_OUT_JD 4
METAL
HP_OUT_R_C 3

ALC272_MUTE

12/30 6
HP_OUT_L_C 2

29 ALC272_HP_OUT_L
ALC272_HP_OUT_L
ALC272_HP_OUT_R
1
29 ALC272_HP_OUT_R R375
3
ALC272_MUTE 1 2 ALC272_MUTE_R_R 1 Q47
AUDIO-JK185-GP
JACK DETECT 4K7R2J-2-GP
PMBS3904-1-GP
2
(22.10265.371)
MIC_IN# AUD_AGND
29 MIC_IN#
HP_OUT_JD AUD_AGND
29 HP_OUT_JD
3
R370
1 2 ALC272_MUTE_L_R 1 Q46
PMBS3904-1-GP
TPA2008_SD 4K7R2J-2-GP
38 TPA2008_SD
2
5V_S5
12/30 AUD_AGND
1
01/04 R455
100KR2J-1-GP

D31
2
FRONT MIC JACK (21/22)

C C
K A MUTE_LO#

1N4148W-1-GP MICJK1
3
R448 (R) NP2

TPA2008_SD 1 2 1 Q59 NP1
MMBT3904-7-F-GP 5
10KR2J-3-GP MIC_IN# 4
METAL
2
MIC_L_JACK R828 1 2 100R2J-2-GP MIC_IN_L_JK MIC_IN_R_JK 3

6
MIC_IN_R_JK MIC_IN_L_JK 2
1
TPA3113_SD(GPIO52) HEADER PHONE MIC_R_JACK R832 1 2 100R2J-2-GP
1
AUDIO-JK185-GP
1
L Enable C927 C925 D28 D30
SC220P50V2KX-3GP
SC220P50V2KX-3GP
(R) (R)
H Disable AUD_AGND
2
AUD_AGND AUD_AGND
AUD_AGND AUD_AGND
D29 D9
B B
2 MIC_L_JACK 2 HP_OUT_L_C
3 3
1 MIC_R_JACK 1 HP_OUT_R_C
AUD_AGND AUD_AGND
AZ2025-02S-GP AZ2025-02S-GP

A A
<Variant Name>
Hsichih, Taipei
Title
POWER DELIVERY CHART
C
Barbados 1B
5 4 3 2 1
5 4 3 2 1
Fan Controller 11/03 2009/12/23

SuperIO Power-Save SuperIO power monitoring inputs
$ %"& $ Please set R value depend on what you need.
3D3V_S0
CPU_FAN_TACH

$"'
7 CPU_FAN_TACH 3D3V_EuP
CPU_FAN_CTRL
7 CPU_FAN_CTRL
1
REAR_FAN_TACH
( )$ $
7 REAR_FAN_TACH
PWRGD3V_150MS R275 2 1 1KR2J-1-GP
7 REAR_FAN_CTRL
REAR_FAN_CTRL
2009/12/23 3D3V_S0 L18
11/04R238 1D5V_MEM
!)"*$#
SRN10KJ-6-GP RSMRST#_SIO R695 1 2 4K7R2J-2-GP SIO_VIN4 1 2
RN3 (R)
2
LPC_LAD3 1 8 AVCC3
LPC interface
!
"# $
10KR2F-2-GP
2
LPC_LAD2 2 7
D D
LPC_LFRAME# LPC_LAD1 3 6 SLP_S4* R277 1 (R) 2 4K7R2J-2-GP C255
23 LPC_LFRAME#
D
LPC_LAD0 LPC_LAD0 4 5 SCD1U16V2ZY-2GP
23 LPC_LAD0
1
2
1
23 LPC_LAD1 LPC_LAD1 LPC_PME_N R274 1 2 4K7R2J-2-GP Q30
LPC_LAD2 2N7002-11-GP C236 C227
23 LPC_LAD2
23 LPC_LAD3
LPC_LAD3 RN1 SLP_S3* R259 1 (R) 2 4K7R2J-2-GP SIO_PSON_N G SCD1U16V2ZY-2GP SC22U6D3V5MX-2GP
2
24 KBRCIN#
24 KA20GATE
KBRCIN#
KA20GATE
LPC_LFRAME#
KBRCIN#
1
2
4
3
SIO_GND
11/06 V_CPU
S
CLK_PCI_SIO
23 CLK_PCI_SIO R248
23 PLTRST*_SIO
PLTRST*_SIO SRN10KJ-5-GP SIO_PWNBTN_N R271 1 2 4K7R2J-2-GP G10
1
INT_SERIRQ SIO_VIN5 1 2HM_V_CPU 2 1
23 INT_SERIRQ
INT_SERIRQ 2 R229 1 SIO_GP10 R26 2 (R) 11KR2J-1-GP R221
2
3D3V_S5 330R3J-L-GP
1KR2J-1-GP
2009/12/23 C256 10KR2F-2-GP
GAP-CLOSE-PWR
KA20GATE 2 R236 1 SIO_EUP_EN R844 1 2 4K7R2J-2-GP SCD1U16V2ZY-2GP
1
SIO_KCLK
37 SIO_KCLK
37 SIO_KDAT SIO_KDAT 1KR2J-1-GP
24 RSMRST#_SIO
RSMRST#_SIO
SIO_PSON_N R689 1 2 4K7R2J-2-GP
3D3V_EuP
SIO_GND
11/04 5V_S0
44 SIO_PSON_N
SIO_PSON_N
11/04 MINIPCIE_RST# 2 R226 1 R921 1 2 4K7R2J-2-GP
3D3V_S5
SIO_VIN1 1
R234
2HM_V_5V 2
G9
1
PWRGD3V_150MS (R)
49 PWRGD3V_150MS
1
1KR2J-1-GP 6K8R2F-2-GP GAP-CLOSE-PWR
42 SIO_PWRLED_N
SIO_PWRLED_N
2/10 Rannie C252
SCD1U16V2ZY-2GP R922
1
SIO_PWNBTN_N 3D3V_S0 10KR2F-2-GP
24 SIO_PWNBTN_N
RN7 AVCC3
2
1 4
42 PWRBTN_N
PWRBTN_N SIO_PWRLED_N
SIO_IRTX 2 3 1
RN2
8 RTS1_N
SIO_VIN1
R678 1 2 10KR2J-3-GP SIO_GND SIO_GND
2/10 Rannie
3D3V_EuP 3D3V_S0
LPC_PME_N 2 7 SOUT1 SIO_VIN4
24 LPC_PME_N 3 6
SRN10KJ-5-GP DTR1_N SIO_VIN5
SLP_S3* RN6 3D3V_EuP 4 5 RI1_N SYS_THERM
24,46 SLP_S3*
SIO_MCLK 1 4 HWM_REF
ATXPG
2 3
24,36,46,48 SLP_S4*
SLP_S4* SIO_MDAT SRN10KJ-6-GP CPU_THERMDA
SuperIO Tempurature
10 CPU_THERMDA
CPU_THERMDA
CPU_THERMDC SRN10KJ-5-GP
5V? HWM_REF
10 CPU_THERMDC
1
C GPU_DPLUS C266 HWM_REF C
2
55 GPU_DPLUS GPU_DMINUS
55 GPU_DMINUS SC1U10V2KX-1-LL-GP R258
2
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
10KR2F-2-GP
R851 1 0R2-PT5-LILY-GP
2 LPC_SMI*_R 11/07 U18 10K 1%
VREF
GNDD
VIN1/VCC
RI1#
DCD1#
DTR1#
SIN1
SOUT1
DSR1#
RTS1#
AVCC3
ATXPG/VIN3
VIN4
VIN5
VIN6
TMPIN1
24 LPC_SMI*
1
SIO_GND SYS_THERM
12/30 11/03
1
SIO_CLK48
11/14 3D3V_S5 RT1
2
8 SIO_CLK48 1 48 GPU_DPLUS NTC-10K-28-GP
2 CTS1# TMPIN2 47 CPU_THERMDC C261
G11 G19
CPU_FAN_TACH 3 3VSB TSD- 46 1 2 SCD1U16V2ZY-2GP
FAN_TAC1 GNDA SIO_GND
2
2
CPU_FAN_CTRL 4 45 RSMRST#_SIO 2 1
C260 REAR_FAN_TACH 5 FAN_CTL1 RSMRST#/CIRRX1/GP55 44 SIO_GP10 GAP-CLOSE-PWR
SMBCLK R834 1 2 0R2J-2-GP (R) SIO_SCL1 SCD1U16V2ZY-2GP REAR_FAN_CTRL 6 FAN_TAC2/GP52 PCIRST3#/GP10 43 SIO_MCLK CAP Under Memory Dimm
8,21,24,28,30,55 SMBCLK FAN_CTL2/GP51 MCLK/GP56 COPPER-CLOSE
1
8,21,24,28,30,55 SMBDATA
SMBDATA R850 1 2 0R2J-2-GP (R) SIO_SDA1 SIO_EUP_EN
7
8 GNDD
5VSB_CTRL
64-LQFP MDAT/GP57
KCLK/GP60
42
41
SIO_MDAT
SIO_KCLK SIO_GND SIO_GND
LPC_SMI*_R 9 40 SIO_KDAT GPU_DPLUS
10 GP21 KDAT/GP61 39
3/16 Rannie modify 2/04 Rannie modify SIO_PWRLED_N
11 GP20 3VSBSW#/GP40 38
PCHSM_C/PECI/AMDTSI_C
3D3V_S5 SIO_IRTX PWRGD3V_150MS
CIRTX1 PWRGD3_150MS
2
MINIPCIE_RST# 12 37 SLP_S4*
30,35 MINIPCIE_RST# PCIRST2#/GP11 SUSC#/GP53
13 36 SIO_PSON_N C269
PCHSM_D/AMDTSI_D
14 3VSB PSON#/GP42 35 PWRBTN_N
VCORE PANSHW#/GP43 PWRBTN_N 42 SC2K2P-GP
2
1
C237 PLTRST*_SIO 15 34 LPC_PME_N R280
SCD1U16V2ZY-2GP INT_SERIRQ 16 LRESET PME#/GP54 33 SIO_PWNBTN_N GPU_DMINUS 1 2
SERIRQ PWRON#/GP44
1
C750 0R0402-PAD
1
SYS_3VSB
SCD022U16V2KX-3-LL-GP
LFRAME#
01/27
PCICLK
SUSB#
KRST#
2
CLKIN
GNDD
GA20
VBAT
3VSB
LAD0
LAD1
LAD2
LAD3
Rannie: IDT FAE suggestion that add a 4.7kohm
resistor between 3D3V_EuP and SYS_3VSB
3D3V_S5
2/04 Rannie modify IT8758E-GP 3D3V_EuP CPU_THERMDC
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
2
If without use these pins, Please pull-up. Don't let it floating CAP close to IT8758
1.Pin 54:VIN3/ATXPG R66 R303
B 4K7R2J-2-GP 0R2J-2-GP B
2.Pin 32:SUSB#
3.Pin 23/ Pin 58/ Pin 60/ Pin 62 LPC_LFRAME# SLP_S3* 11/03 VBAT (R)
1
4.Pin55 need 2.8V LPC_LAD0
LPC_LAD1
2
LPC_LAD2 CPU_THERMDA
3D3V_S5
1
LPC_LAD3 2 C259 C760
2
Note:use EUP function:Pin32/Pin33/Pin34/Pin37/Pin39/Pin45 pull high to SYS_3VSB. KBRCIN# C345 SCD1U16V2ZY-2GP
1
KA20GATE SCD1U16V2ZY-2GP SC1U10V2KX-1-LL-GP C267
2
CLK_PCI_SIO
If not use PECI, pin 27 28 could be SC2K2P-GP
1
1
SIO_CLK48 CPU_THERMDC
confiqured as SMBus. The trace between IT8758(Pin25) & oscillator
SIO_SDA1
(output) must Thicken and Shorten. In addition to
that, the trace spacing must broaden. SIO_SCL1
5V_S5 5V_EUP 3D3V_S5 3D3V_EUP

For Suspend power Always Exist For Suspend power
Always Exist 1 (R) 2 0R5J-5-GP when system in S5 1 (R) 2 0R5J-5-GP when system in S5
R671 R676
ID max =
Q74
2.5A ID max = 2.5A 3D3V_EuP
AO3413-GP Q72
AO3413-GP
S D
EuP Controller signal
1
EuP Controller signal S D
R679
1
47KR2J-2-GP PWRGD3V_150MS
3D3V_EUP_EN#_R G
1
(R)
G
1
R219 R914
1
3
100KR2J-1-GP C230 4K7R2J-2-GP R675 R915
1
PM_SLP_S3#_2 1
SC1U10V3ZY-6GP
5v_EUP_EN#_R
100KR2J-1-GP C744 4K7R2J-2-GP Q77

2
SC1U10V3ZY-6GP
(R) PMBS3904-1-GP
2
(R) (R)
2
2
R266
A R223 SLP_S3* 1 2 PM_SLP_S3#_1 1 Q76 A
24,46 SLP_S3*
3D3V_EUP_EN# 1 2 R673 PMBS3904-1-GP
5V_EUP_EN# 1 2 10KR2J-3-GP (R)
2
10KR2J-3-GP (R)
10KR2J-3-GP
D
Q73 C224
<Variant Name>
D
2N7002-11-GP Q75 C749

2N7002-11-GP
2
SIO_EUP_EN G SC1U10V3ZY-6GP
2
SIO_EUP_EN G SC1U10V3ZY-6GP 21F, 88, Hsin Tai Wu Rd

Hsichih, Taipei
S
Title
SIO ITE8758E
C
Barbados 1B
5 4 3 2 1
5 4 3 2 1
FP_DETECT HFP not inserted (Internal Pull-High)

KEY_PAD
28 KEY_PAD
25 ICH_SATA_LED*
ICH_SATA_LED*
FP_DETECT LFP inserted
D D
WLAN_LED#
30 WLAN_LED#
BT_LED_PWR

36 BT_LED_PWR

LVDS_LED
Solution 1

28 LVDS_LED
0126 Rannie modify 3D3V_S0 BT_POWER
FP_DETECT

23 FP_DETECT
1
R495 SCD1U10V2KX-4-LL-GP
4K7R2J-2-GP C422 SB-Lily requested.
WLAN_LED#_CTRL (R) U37 (R) (R)
25 WLAN_LED#_CTRL
2
SW-TACT-4P-10-GP 1 5
NC#1 VCC
1
BTN7 R494
3 1 BTN6_N_R 2 1 BT_RESET_BTN 2
LVDS_LED_CTRL A CN12
25 LVDS_LED_CTRL 33R2J-2-GP 3 4 BT_RESET_OUT FP_DETECT 2 1
GND Y BT_RESET_OUT 36
1
4 2 (R)
C434 SNAHC1G14DBVR-GP BT_LED_PWR_R 4 3 ICH_SATA_LED*
BT_LED_PWR_CTRL SCD1U16V2ZY-2GP WLAN_LED#_R 6 5 KEY_PAD
25 BT_LED_PWR_CTRL
2
(R) LVDS_LED_R 8 7
3D3V_S0
3/12 DVD-CONN8D-S7-GP
Solution 2 (21.61165.204)
1
BT_POWER C451 SCD1U16V2ZY-2LLGP
0126 Rannie modify
2
2
R877
C 4K7R2J-2-GP R932 (R) 3D3V_S0 C
Q92 3D3V_S0 1 2
1
2/1 R878 PMBS3906-GP
Low:On
1
2 1 1
BT_RESET_B 0R2J-2-GP R939
25 BT_RESET_DET
R879 High:Off 8K2R2J-3-GP
1
4K7R2J-2-GP D39
3
BT_RESET_E 1 2 BT_RESET_R R880 1 2 100R2J-2-GP R885 WLAN_LED# 1
2
8K2R2J-3-GP
1
1K8R2-GP 3 WLAN_LED#_R
1
R881
1
8K2R2J-3-GP C937 WLAN_LED#_CTRL 2
SCD1U16V2ZY-2GP C986
2
BAT54A-7-F-1-GP SC180P50V2JN-1GP
2
(83.00054.R81) (R)
R933 (R) 3D3V_S0

3D3V_S0 1 2
1
Low:On 0R2J-2-GP R940
High:Off 8K2R2J-3-GP
1
D40
R896 LVDS_LED 1
2
8K2R2J-3-GP
3 LVDS_LED_R
1
LVDS_LED_CTRL 2
3D3V_S5 C987
PWRBTN BUTTON with BAT54A-7-F-1-GP SC180P50V2JN-1GP
2
(83.00054.R81) (R)
White LED
D21
1N4148W-1-GP
R934 (R)
3D3V_EuP 1 2
1 K
Low:Off 0R2J-2-GP
B
R515 High:On D41 RB751V-40-2-GP B
1
100KR2J-1-GP
R897 BT_LED_PWR A K
PWRBTN1 8K2R2J-3-GP
R518
2
4 (R) D42 RB751V-40-2-GP BT_LED_PWR_R
1 2 PWRBTN_N_R 1
41 PWRBTN_N
1
BT_LED_PWR_CTRL A K
1
2 C988
C443 100R2F-L1-GP-U 3 SC180P50V2JN-1GP
2
SC1U16V3KX-2GP 5 (R)
2
3/12 For DFT

MLX-CON3-9-GP
R917 1 2
2/06 Rannie modify 3D3V_EuP
(R)
330R3J-GP
VCC5_USB R916 1 2 680R3J-3-GP
(R) PWR_LED_EN#_P1
R919 2 1 1KR2J-1-GP
24 BLINK
D
Q99
2N7002-11-GP
R506 2 1 1KR2J-1-GP PWR_LED_EN#1 G
41 SIO_PWRLED_N
1
C446 (R)
S
A SC4D7U10V5ZY-3-LL-GP A
2
Title
Block Diagram
C
Key_Pad/LED/PWRBTN 1B

5 4 3 2 1
5 4 3 2 1
2/03 Rannie modify Adaptor in to generate DCBATOUT

Adaptor IN

DCBATOUT
AD_JK
DCIN1
D U36 D
1 AD_JK 1 S D 8 (R)
1
2 S D 7 C416
3 S D 6 SCD1U50V3ZY-GP
K
2 4 5
DC in
AD+_2 G D
2
D20
SC1U50V5ZY-1-GP
1
SHELL 3 C437 P4SMA24A-GP AO4407A-GP
1
4 SCD1U50V3KX-GP C431 R491 U35 (R)
2
5 SCD1U50V3KX-LL-GP 1 8
C436
S D
100KR2J-1-GP
2
1
A
6 (R) 2 7
3
S
S
D
D 6 11A,11mohm <14mohm
4 5
DC-JACK215-GP-U AD+_2 G D
Vgs=-20 , 14mohm <18
2
AO4407A-GP
mohm Vgs=-10
1
R492
56KR2F-GP
2
1107 Modify
C
Wistron pattern C
DCBATOUT
EMC Solution
1
C970 C971 C972 C973 C974 C975
SCD1U50V3KX-LL-GP SCD1U50V3KX-LL-GP SCD1U50V3KX-LL-GP SCD1U50V3KX-LL-GP SCD1U50V3KX-LL-GP SCD1U50V3KX-LL-GP
2
(R) (R) (R) (R) (R) (R)
1
C976 C977 C978 C979 C980 C981
B SCD01U50V2KX-1-LL-GP SCD01U50V2KX-1-LL-GP SCD01U50V2KX-1-LL-GP SCD01U50V2KX-1-LL-GP SCD01U50V2KX-1-LL-GP SCD01U50V2KX-1-LL-GP B
2
(R) (R) (R) (R) (R) (R)
2/10 Rannie
A A
<Variant Name>
Hsichih, Taipei
Title
ATX/PCIRST/SPI
Custom
Barbados 1B

5 4 3 2 1
11/16 5V_S5 5V_EUP 3/22
1
(R)
3D3V_EuP +12V_S0 R903 R904
0R3J-L-GP 0R0603-PAD-1-GP
2
12V_PWR +12V_S0
2
R490
10KR2J-3-GP R487 (R) 1589_VCC_1 DCBATOUT_1589
1KR2J-1-GP DCBATOUT DCBATOUT_1589 R822 1 2 0R0805-PAD
A
1
2
1
12V_PGOOD R465 D14
46 12V_PGOOD 2D2R5J-1-GP RB751V-40-2-GP
1
R409 1 2 0R0805-PAD
R489 (R) C421 C413 R472 2 1 UPB201212T-800Y-N-GP (R)
1589_BT1 K
1
3KR2J-2-GP SC10U25V6KX-1GP SC10U25V6KX-1GP C915
2
(R) SC10U25V6KX-1GP
1
C433 R488 2 1 UPB201212T-800Y-N-GP R402 1 2 0R0805-PAD
2
SC1U16V3KX-2GP
2
Iomax=4A
1589_VCC
1
R473
U38 2D2R3J-2-GP
10.0uH, DCR=30.4mohm, Idc=5.2A
OCP>6A
1589_FB 8 6
FB VCC
2
1589_VOS 9 Q55 12V_PWR
VOS
1
12V_PGOOD 10 R451 1 S1 D1 8
PGOOD 1 L28
1589_BOOT C426 1 2SCD1U50V3KX-GP 10KR2J-3-GP
BOOT
1
2 1589_LX 1589_LG12 2 G1 D1 7 1 2
LX
1
R496 R500 (R) 3 1589_UG

158R2F-GP C439 5 UG 4 1589_LG 2 R453 1 1589_LG12 IND-10UH-197-GP
2K21R2F-GP GND LG
2
SCD01U16V2KX-3GP 11 7 1589_COMP 0R0805-PAD 1589_LX 3 S2 D2 6
GND COMP/EN#
2
1
2
2 R457 1 1589_UG1 4 G2 D2 5 R424 TC20

NCP1589AMNTWG-GP-U 0R0805-PAD 2D2R5J-1-GP E100U16VM-32-GP
2
1
(09.1071D.0FL)
1589_LX1_SNB
R459 SI4214DDY-GP
2
R499 18K7R2F-GP
3K3R2F-2-GP DCBATOUT_1589
C438 1 2 SCD22U16V3KX-2-GP 1589_CP1 1 2
2
C435 84.04214.037 SI4214DDY
1
2 1 Vgs @ 4.5V,
2009/12/30 R498
1
Id = 5.9A, 10R2F-L-GP 100uF/16.0V, ESR=24.0mohm
1
C403 C397
SC1KP50V2KX-1GP Rds(on) = 19.0~23.0mohm, SCD1U50V3KX-GP
2
Qg = 7.1~11nC
2
SC1500P50V3KX-GP
C440 SCD01U16V2KX-3GP R505

75R2F-2-GP
1 2 1589_FB1 1 2
R503
1 2 12V_PWR_SENSE
2K21R2F-GP
R1
1
R501
158R2F-GP
Vout=0.8*(R1+R2)/R2 CWH
D
2
Q64
G 2N7002-11-GP
41 SIO_PSON_N
S
3D3V_S0
5V_S0
+12V_S0
SIO_PSON_N
SIO_PSON_N = -(SLP_S3*) <Core Design>
SLP_S3_N Wistron Corporation

SLP_S4_N Title
+12V
SIO_PWRBTN_N Custom
Catalina 1B
5 4 3 2 1
+3VSB/+5VSB
84.04128.037 SI4128DYP 84.04712.A37 SI4712DY 84.04128.037 SI4128DYP 84.04712.A37 SI4712DY
Vgs @ 4.5V, Vgs @ 4.5V, Vgs @ 4.5V, Vgs @ 4.5V,
Id = 6.0A, Id = 8.2A, Id = 6.0A, Id = 8.2A,
Rds(on) = 24.0~30.0mohm, Rds(on) = 13.0~16.5mohm, Rds(on) = 24.0~30.0mohm, Rds(on) = 13.0~16.5mohm,
Qg = 3.8~6.0nC Qg = 8.3~12.5nC V_19_3_5V
Qg = 3.8~6.0nC Qg = 8.3~12.5nC
DCBATOUT V_19_3_5V
1
D R445 2 1 UPB201212T-800Y-N-GP R413 D
V_19_3_5V 2D2R5J-1-GP
(R)
R428 2 1 UPB201212T-800Y-N-GP V_19_3_5V
2
V_19_3_5V_VIN
SCD01U50V2KX-1GP
C408 C382 C409 C929
1
1
SC10U25V6KX-1GP SCD01U50V2KX-1GP SC10U25V6KX-1GP SC10U25V6KX-1GP C366 C926 C394 C921 C387
1
SCD1U50V3KX-GP SC10U25V6KX-1GP SC10U25V6KX-1GP SC10U25V6KX-1GP SC10U25V6KX-1GP
2
D 8
D 7
D 6
D 5
5
6
7
8
2
2
D
D
D
D
Q54 Q52
C371
16
SI4128DY-T1-GE3-GP SI4128DY-T1-GE3-GP
M2
VIN
C361 C362
Iomax=6A Iomax=8A
SCD1U50V3KX-GP 2D2R5J-1-GP SCD1U50V3KX-GP
G
S
S
S
S
S
S
G
3.3uH, DCR=10.8mohm, Idc=10.0A
1
2
3
4
4
3
2
1
1 2 8205A_BOOT2_R R395 1 2 2D2R5J-1-GP 8205A_BOOT2 9 22 8205A_BOOT1 R396 1 2 8205A_BOOT1_R 1 2
SB3V_PWR BOOT2 BOOT1
3.3uH, DCR=10.8mohm, Idc=10.0A L37 L25
IND-3D3UH-135-GP 8205A_UGATE2_R R829 1 2 2D2R5J-1-GP 8205A_UGATE2 10 21 8205A_UGATE1 R823 1 2 2D2R5J-1-GP 8205A_UGATE1_R IND-3D3UH-135-GP SB5V_PWR
UGATE2 UGATE1
1 2 8205A_PHASE2 11 20 8205A_PHASE1 1 2
PHASE2 PHASE1
R414 1 2 0R0805-PAD 12 19 8205A_LGATE1 R405 1 2 0R0805-PAD
C931 C932 0202 8205A_LGATE2_R 8205A_LGATE2
LGATE2 LGATE1
8205A_LGATE1_R
0202
1
ST100U6D3VBM-7GP ST220U6D3VDM-15GP C425 G23
D 8
D 7
D 6
D 5
(R) SC10U6D3V3MX-LL-GP
1126 8205A_VO2 7
VO2 VO1
24 8205A_VO1
GAP-CLOSE-PWR-3-GP
C393 C400
2
1
U32 ST220U6D3VDM-15GP ST100U6D3VBM-7GP C919
G24 SI4712DY-T1-GE3-GP 8205A_FB2 5 2 8205A_FB1 (R) SC10U6D3V3MX-LL-GP
FB2 FB1
5
6
7
8
R407 1 2 820KR2F-GP (R)
2
D
D
D
D
GAP-CLOSE-PWR-3-GP
2
2
R406 1 2 100KR2J-1-GP 8205A_EN 13 23
S
S
S
G
V_19_3_5V EN PGOOD
R412 1 2 10KR2F-2-GP
V_3D3V_ALW
1
2
3
4
6 1
0202 C347 (R) 8205A_VREF 8205A_ENTIP2
ENTRIP2 ENTRIP1
8205A_ENTIP1
SCD22U6D3V2KX-1GP
2 1 3 15
220uF/6.3V, ESR=27mohm
100uF/6.3V, ESR=35mohm 220uF/6.3V, ESR=27mohm Q62
G
S
S
S
VREF PGND SI4712DY-T1-GE3-GP
3/18 100uF/6.3V, ESR=35mohm
4
3
2
1
8205A_TONSEL 4 25
TONSEL GND
0202
C 14 18 C
SKIPSEL NC#18
8205A_SKIPSEL
1
R819 1 2 0R2J-2-GP SB5V_PWR 5V_S5
VREG3
VREG5
8205A_VREF
1
3D3V_S5 SB3V_PWR R384
1
R389 0R2J-2-GP V_3D3V_ALW R817 1 2 0R2J-2-GP R416 1 2 0R0805-PAD
R838 1 2 0R0805-PAD 6K65R2F-GP (R)
R820 1
(R)
2 0R2J-2-GP RT8205AGQW-GP
R383
0R2J-2-GP
Close to VFB R423 1 2 0R0805-PAD
Pin (pin2)
2
17
R837 1 2 0R0805-PAD 8205A_FB2_R (R) (R)
2
1
C353 R427 1 2 0R0805-PAD
1
2
R836 1 2 0R0805-PAD Close to VFB SC18P50V2JN-1-GP 8205A_FB1_R R387
(R) R826 1 2 0R2J-2-GP C352 30KR2F-GP R419 1 2 0R0805-PAD
Pin (pin5) 8205A_VREF
1
R839 1 2 0R0805-PAD (R) SC18P50V2JN-1-GP
2
R825 1 2 0R2J-2-GP (R) R441 1 2 0R0805-PAD

V_3D3V_ALW
2
2
R824 1 2 0R2J-2-GP
(R)
1
1
R385
10KR2F-2-GP R382
G13
20KR2F-L-GP
G12 1 2 3D3V_AUX_8205A 5V_AUX_8205A 1 2
V_3D3V_ALW V_5_ALW
2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
2
1
1
C356 C367
SC10U6D3V3MX-LL-GP SC10U6D3V3MX-LL-GP
2
B B
GND VREF VREG3 VREG5

OCP
SKIPSEL PWM SKIP 00A AUTOSKIP 00A AUTOSKIP 8205A_ENTIP1 R818 1 2 165KR2F-GP
8205A_ENTIP2 R821 1 2 133KR2F-GP

2009/12/30
TONSEL 200k/CH1 330k/CH1 400k/CH1 400k/CH1
250k/CH2 375k/CH2 500k/CH2 500k/CH2
USB_PHY_1.2VSB Place near SB

1104 U22
APL5602R-12VI-TRL-GP
GND TAB
3D3V_EuP
VOUT
GND
VIN
0.4A (Max)
1
2
3
1
C279
SC1U10V3ZY-6-LL-GP
A
2
A
C284
SC10U10V5ZY-1-LL-GP
1D2V_S5
2
<Core Des ign>
1104 Wistron Corporation

21F, 88, Sec.1, Hs in Tai Wu Rd., Hs ichih,
Taipei Hs ien 221, Taiwan, R.O.C.
Title
RT8205A_3V&5V
A2
Catalina 1B
5 4 3 2 1
5 4 3 2 1
Run Time Power It might be cost down in SB.
11/16 Modify
DCBATOUT
1
R403 Ryan suggest to ADD
47KR2J-2-GP
5V_S5
2
U31
D D
1
5V_S0_EN2 R411 1 2 5V_S0_EN 4 5
R400 10KR2J-3-GP 3 6
G D
100KR2J-1-GP 2 7
S D
1
C377 1 8
S D
D
S D
SCD1U50V3KX-GP
1
Q51 AO4468-GP
2
2N7002-11-GP R410 5V_S0
5V_S0_EN1 G 100KR2J-1-GP
1
Q49 C365
2
2N7002-11-GP SCD1U16V2ZY-2LLGP
1
R408
R394 4K7R2J-2-GP
12V_PGOOD R399 1 2 PWRGD_PS_BUF_5V G 100KR2J-1-GP
44 12V_PGOOD
2
0R2-PT5-LILY-GP
2
2009/12/29 5V_S0_EN
2009/12/23
DCBATOUT
1
R514 R58
47KR2J-2-GP 0R2J-2-GP
3D3V_S5
(R)
2
U40
1
3D3V_S0_EN2 R510 1 2 3D3V_S0_EN 4 5
R513 10KR2J-3-GP 3 6
G D
100KR2J-1-GP 2 7
S D
1
C448 1 8
S D
D
S D
SCD1U50V3KX-GP
1
C Q85 AO4468-GP C
2
2N7002-11-GP R516 3D3V_S0
3D3V_S0_EN1G 100KR2J-1-GP
1
Q84 C444
2
1
R840
R512 4K7R2J-2-GP
44 12V_PGOOD 12V_PGOOD R502 1 2 PWRGD_PS_BUF_3D3V G 100KR2J-1-GP
2
0R2-PT5-LILY-GP
2
2009/12/29
11/02 Modify
R467 1 2 0R0603-PAD 19V_PUMP_B_1
DCBATOUT
1
R468 Ryan suggest to ADD
47KR2J-2-GP
1D5V_MEM
2
U39
1 USB_EN4 R469 1 2 USB_EN6 4 5
3 6
R461 10KR2J-3-GP
IDmax =0.75A
G D
100KR2J-1-GP 2 7
S D
1
1 8
C430
For Mini-PCIE
S D
D
S D
SCD1U50V3KX-GP
2
1
Q57 AO4468-GP
2
2N7002-11-GP R480 1D5V_S0
USB_EN3 G 100KR2J-1-GP
1
Q58 C429
D
2
1
B
R493 B
R454 4K7R2J-2-GP
24,41 SLP_S3*
SLP_S3* R462 1 2 PWRGD_PS_BUF_D_5 G 100KR2J-1-GP
2
0R2-PT5-LILY-GP
S
2009/12/29
11/02 Modify
R486 1 2 0R0603-PAD 19V_PUMP_B
DCBATOUT
Ryan suggest to ADD
1
R477
47KR2J-2-GP
5V_S5
2
U34
1
USB_EN2 R470 1 2 USB_EN 4 5

3 6
R476 10KR2J-3-GP
IDmax = 6A
G D
100KR2J-1-GP 2 7
S D
1
1
C424 1 8
For USB
S D
D
S D
SCD1U50V3KX-GP
2
Q61 AO4468-GP
2
2N7002-11-GP R478 VCC5_USB

USB_EN1 G 100KR2J-1-GP
C423
D
Q60 SCD1U16V2ZY-2LLGP
1
2N7002-11-GP
R475
A
24,36,41,48 SLP_S4* SLP_S4* R474 1 2 PWRGD_PS_BUF_D_4 G 100KR2J-1-GP A
0R2-PT5-LILY-GP
S
<Variant Name>
2009/12/29 Wistron Incorporated

Hsichih, Taipei
Title
Run Time Power
C
Barbados 1B
5 4 3 2 1
5 4 3 2 1
D D
1P2V_PWRGD
8,49 1P2V_PWRGD
+1P1V_VDDC(NB)
02/02
5V_S5 5V_S0
DCBATOUT_1D1V DCBATOUT
1
(R)
R75 R905
0R0603-PAD-1-GP 0R3J-L-GP R11 2 1
UPB201212T-800Y-N-GP
(R)
2
C25 C471 C470 C28 R12 2 1 UPB201212T-800Y-N-GP
1
SCD1U50V3KX-GP SC10U25V6KX-1GP SC10U25V6KX-1GP SC10U25V6KX-1GP
C Q5 C27 C
2
84.04809.036 NTD4809 NTD4809NT4G-GP SC10U25V6KX-1GP
Vgs @ 4.5V,
2
D
1
R28 1 2 249KR2F-GP Id = 45.0A,

R74 C37
Rds(on) = 11.0mohm,
1
2D2R5J-1-GP SC1U10V3ZY-6GP G 1
C15 Qg =11.0~13.0nC
SCD1U50V3KX-GP
2
3
M1 RT8209AGQW-GP
8209A_1D1VTON 16 13 8209A_1D1VBOOT R22 2 1 2D2R5J-1-GP 1D1VBOOT_1 1 2 R14 S
TON BOOT 12 8209A_1D1VUGATE 8209A_1D1VUGATE 2 1 2D2R5J-1-GP 1D1V_UG12
8209A_1D1VDDP 9 UGATE 11 8209A_1D1VPHASE
2 VDDP PHASE 8
Iomax=14A
8209A_1D1VDD 8209A_1D1VLGATE
VDD LGATE
PGND
7
R49 4K7R2F-GP 1.5uH, DCR=3.8mohm, Idc=16.0A 02/02
OCP>21A
1
4 3 8209A_1D1VFB 1 2
8209A_1D1VCS 10 PGOOD FB 1 8209A_1D1V_VOUT
CS VOUT
NC#17
14
2009/12/23
GND
NC#14
2
C45 15 5 L2 1 2IND-1D5UH-52-GP
EN/DEM NC#5 +1P1V_VDDC
1
SC1U10V3ZY-6GP
1
R56 C30 2 1 SCD1U16V2KX-3GP
1D1V_PWR_EN
6
17
16K9R2F-GP (R) R50 TC2 TC1
1
Q18 2D2R5J-1-GP C44 ST330U2D5VDM-9GP
1
E820U2D5VM-7-GP
(09.8271N.09L)
NTD4806NT4G-GP SC10U10V5ZY-1-LL-GP (R)
2
2
R63 C23 84.04806.036 NTD4806 D
1D1V_SNB1 2
2
1
1
10KR2F-2-GP SCD1U16V2KX-3GP G1
Vgs @ 4.5V,
2009/12/23 (R)
Id = 59.0A, G 1
GAP-CLOSE-PWR
2
2
Rds(on) = 7.5mohm,
2
Qg = 15.0~23.0nC
3
S C31
1
1P2V_PWRGD R29 1 2 0R2-PT5-LILY-GP SC1500P50V3KX-GP 820uF/2.5V, ESR=7.0mohm
C17
1
SCD1U16V2KX-3GP
Vout = 0.75*(1+R_Top/R_GND)
2
(R) R91 2 1 0R0805-PAD 1D1V_LG12
B = 0.75*(1+10k/10k) +1P1V_VDDC V_1P1
B
2
R78 1 2 0R0805-PAD
R84 1 2 0R0805-PAD
R79 1 2 0R0805-PAD
C24
SCD1U16V2KX-3GP R82 1 2 0R0805-PAD
1
(R)
R83 1 2 0R0805-PAD
2
R80 1 2 0R0805-PAD
R81 1 2 0R0805-PAD
R85 1 2 0R0805-PAD
A A
<Variant Name>
11/06 Wistron Incorporated

Hsichih, Taipei
Title
CHIPSET CORE POWER (V_1P1)
C
Barbados 1B
5 4 3 2 1
5 4 3 2 1
02/02
1D5V_S3_RT8209A
5V_S5 5V_EUP
1
(R)
R761 R906 DCBAT OUT _1D5V_S3 DCBAT OUT
0R0603-PAD-1-GP 0R3J-L-GP
D 2 1 UPB201212T -800Y-N-GP D
L27
2
C369 C374 C357 C368 C376 C916 C373 L26 2 1 UPB201212T -800Y-N-GP
1
SCD1U50V3KX-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
2
2
84.00474.037 SIR474DP
5
6
7
8
5
6
7
8
Vgs @ 4.5V,
D
D
D
D
D
D
D
D
Id = 12.0A,
1
R3531 2 249KR2F-GP
R760 C316
Rds(on) = 10.0~12.0mohm,
1
2D2R5J-1-GP SC1U10V3ZY-6GP
C320 Qg = 8.0~12.0nC (R)
SCD1U50V3KX-GP Q50 Q48
G
S
S
S
G
S
S
S
2
2
U25 RT 8209AGQW-GP SIR474DP-T 1-GE3-GP SIR474DP-T 1-GE3-GP
4
3
2
1
4
3
2
1
8209A_1D5VT ON 16 13 8209A_1D5VBOOT R357 2 1 2D2R5J-1-GP 1D5VBOOT _1 1 2
TON BOOT 12 8209A_1D5VUGAT E R813
8209A_1D5VDDP 9 UGATE 11 8209A_1D5VPHASE 8209A_1D5VUGAT E 2 1 2D2R5J-1-GP 1D5V_UG12 1D5V_UG12
2 VDDP PHASE 8
Iomax= 20A
8209A_1D5VDD 8209A_1D5VLGAT E
VDD LGATE 7
PGND
2010/01/06 02/02
OCP>30A
1
1 2 8209A_1D5PGOOD 4 3 8209A_1D5VFB R350 1 2 10K2R2F-GP 0.45uH, DCR=1.1mohm, Idc=25.0A
3D3V_S0 PGOOD FB
8209A_1D5VCS 10 1 8209A_1D5V_VOUT
CS VOUT
NC#17
C868 R349 (R) 14
GND
NC#14
2
SC1U10V3ZY-6GP 1KR2J-1-GP 15 5 L24 1 2 IND-D45UH-14-GP
EN/DEM NC#5 1D5V_PWR
1
C3052 1 SCD1U16V2KX-3GP
02/02 R360
6
17
11K5R2F-GP (R) R369 T C17 T C18
1D5V_PWR_EN
1
2D2R5J-1-GP C344
E820U2D5VM-7-GP
(09.8271N.09L)
E820U2D5VM-7-GP
(09.8271N.09L)
SC10U10V5ZY-1-LL-GP
5
6
7
8
5
6
7
8
R343 C308 84.00840.037 SIR840DP
2
1
1
D
D
D
D
D
D
D
D
10KR2F-2-GP SCD1U16V2KX-3GP G22
SLP_S4* (R)
Vgs @ 4.5V, GAP-CLOSE-PWR
1D5V_SNB1
24,36,41,46 SLP_S4*
Id = 18.0A,
2
Rds(on) = 5.8~6.7mohm,
2
Qg = 21.5~33.0nC
11/26
S
S
S
S
S
S
G
G
C C
Q44 Q45 C334
4
3
2
1
4
3
2
1
1
3D3V_S5 SIR840DP-GP SIR840DP-GP SC1500P50V3KX-GP 820uF/2.5V, ESR=7.0mohm
C312
1
SCD1U16V2KX-3GP
Vout = 0.75*(1+R_Top/R_GND)
2
(R) R363 2 1 0R0805-PAD 1D5V_LG12 1D5V_LG12
1
R325 = 0.75*(1+10k/10k)
2
20K_5%
0402
2
1
DDR_ENC1
R340 (R)
D
0R2J-2-GP
1D5V_PWR 1D5V_M EM
Q42
2
G 2N7002 C307
SOT -23 SCD1U16V2KX-3GP R378 1 2 0R0805-PAD
1
(R)
S
R392 1 2 0R0805-PAD
2
D
R401 1 2 0R0805-PAD
SLP_S4* G Q43
2N7002
SOT -23 R397 1 2 0R0805-PAD
S
C293
1
0.1uF_16V
0402 R388 1 2 0R0805-PAD
X7R
2
(R) R380 1 2 0R0805-PAD
R404 1 2 0R0805-PAD
B B
DDR3_MEM_VTT
0D75V_Iomax=1.0A 1D5V_M EM
1
1D5V_M EM C348
SC10U6D3V3M X-LL-GP U28 APL5331KAC-T RLGP
2
1 8 5V_EuP
VIN NC#8
1
2 7
R386 3 GND NC#7 6
1KR2F-3-GP 4 VREF VCNTL 5
GND
VOUT NC#5
1
C354
2
DDRVT T _REF SC1U10V3ZY-6GP
2
1
1
C355 R391
SC1U10V3ZY-6GP 1KR2F-3-GP
2
V_SM _VT T
2
A A
1
C359
1
SC10U6D3V3M X-LL-GP C360

<Variant Nam e>
T C25 SC1U10V3ZY-6GP
2
2
SE330U6D3VM -3GP
(R) 21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
T itle
DDR & TERM POWER
Custom
Barbados 1B
5 4 3 2 1
5 4 3 2 1
+1P2V_SBNB
D
5V_S0
1106 D
1D5V_MEM
3D3V_S0
1
BC2 C233
Iomax=3A
SC1U10V2KX-1-LL-GP C232 SC10U6D3V3MX-LL-GP
1
SC10U6D3V3MX-LL-GP Place to Bottom Side
2
R211
100KR2J-1-GP V_1D2V_PWR V_1P2
Vo=0.8*(1+(R1/R2)) V_1D2V_PWR
6
U14
VCNTL
1P2V_PWRGD 7 5 R201 1 2 0R0805-PAD
POK VIN 9
VIN R199 1 2 0R0805-PAD
Vo=1.2088V
VRM_PWRGD 1 2 5912_EN_1D2V 8 3
R215 EN VOUT 4 R200 1 2 0R0805-PAD
0R0402-PAD VOUT
1
2 5912_FB_1D2V
GND
FB R213 C189 C188 TC13
1P2V_PWRGD 10R2F-L-GP SC10U6D3V5MX-3-LL-GP SC10U6D3V5MX-3-LL-GP ST220U2D5VBM-2GP
8,47 1P2V_PWRGD
2
5912_FB_1D2V_R 1 2 (R)
1
APL5912-KAC-GP
1
R217 C223
1
52K3R2F-L-GP SC27P50V2JN-2-GP
SLP_S3*
24,41,46 SLP_S3*
2
VRM_PWRGD
5,50 VRM_PWRGD
C C
1
PWRGD3V_150MS R222
41 PWRGD3V_150MS
100KR2J-1-GP
2
V_VCORE_EN
50 V_VCORE_EN
1104
CPU_VDDA
SIO_THRMTHIP#
SIO_THRMTHIP#
Iomax=0.2A
3D3V_S0
1104 2D5V
1
1104 C13
SC10U6D3V3MX-LL-GP
1
U2
5
VIN VOUT
2
2
3D3V_S0 3 GND 4 5312BP
SHDN# BP
1
APL531230BI-GP C38 C29 C26
SCD01U16V2KX-3GP SC10U6D3V3MX-LL-GP SCD01U16V2KX-3GP C39
R23
(R)
2
1 2 2.5V_EN SC22U6D3V5MX-2GP
B
10KR2J-3-GP
PWM EN 1126
3D3V_S5
1104 B
1119 PWRGD3V_150MS 1
R21
2 3D3V_S0
2
R34
10KR2J-3-GP
10KR2J-3-GP
2
(R)
1
R38
10KR2J-3-GP
1104 2D5V
R33
1
2 1 V_VCORE_EN_N
V_VCORE_EN 50
10KR2J-3-GP D36 RB751V-40-2-GP
D
3
A K
+1P8V 3D3V_S0 5V_S0

CPU_VDDA_RUN_PG 1 Q10
PMBS3904-1-GP G
Q11
2N7002-11-GP
CPU_THERMTRIP#_SB 10,24
2
Thermal Protection
S
Iomax=1.0A
1
1
C247
SC10U6D3V3MX-LL-GP
BC4
SC1U10V2KX-1-LL-GP
2/10 Rannie
3D3V_S0
2
2
1D8V
U17
R232
0R0805-PAD 5
1 2 V_1P8_R 4 VIN#5 6
VOUT #4 VCNT L R261
3 7
R230 1 215K4R2F-GP V_1P8_FB 2 VOUT #3 POK 8 V_1P8_PCIE_EN 2 1
A 1 FB EN 9 A
GND VIN#9 3D3V_S0
1
C246 C249
SC10U6D3V3MX-LL-GP C243 SC10U6D3V3MX-LL-GP 10KR2J-3-GP
1
(R) SCD1U16V2KX-3GP C244 1 2 SC150P50V2JN-3GP APL5930KAI-TRG-GP (R)

2
C265
(R) SCD1U16V2KX-3GP
<Variant Name>
2
1
1119
R231
12KR2F-L-GP
Vo=0.8*(1+(R1/R2)) R262 Wistron Incorporated
1 2 PWRGD3V_150MS 21F, 88, Hs in Tai Wu Rd
Hs ichih, Taipei
2
10KR2J-3-GP Title
LDO & OTHER PWM
(R)
Custom
Barbados 1B
5 4 3 2 1
5V_S0 Q17
G
+12V_S0 2N7002-11-GP
+12V_S0
S D
100R2J-2-GP
11/06
1
R93
5V_S0 R251
100KR2J-1-GP 11/07 3D3V_S0 11/04 1D5V_MEM 1D5V_MEM
1 2 0R5J-5-GP
12VMON 1 2
(R) R76
1
(R)
2
VRM_PWRGD SCD1U16V2KX-3-LL-GP
R282 V_5393 C50
2
10KR2F-2-GP
1
(R) VRM_PWRGD_G2 Fix SVID
1
D
2
1
1 2 R48 R39 R88
1
Q34 R13 1KR2J-1-GP R45 1KR2J-1-GP C46 SC4D7U10V5ZY-3-LL-GP
VRM_PWRGD_G1 1 Q33 (R) 2N7002-11-GP 300R2J-4-GP 1KR2J-1-GP 1KR2J-1-GP C21
2
PMBS3904-1-GP G (R) R87 SCD1U16V2KX-3-LL-GP
2
1 (R) 2
22
11
2
1
10KR2F-2-GP U3 AGND_VCORE
S
1
41 43
VCCB
VCC
12VMON
5,49 VRM_PWRGD PWRGOOD VDD_DRVON DRV_EN 51
R281 R30 1 2 0R2-PT5-LILY-GP HT_CPU_PWRGD_R 37 48
2K2R2F-GP 5,24,61 SB_PWRGD 38 PWROK VDD_G1 14 VCORE_G1 51
V_VCORE_EN
ENABLE VDD_CS1N CS1N 51
1
(R) TP19 TP-2 1 TP_VID0_PWM 35 13 VDD_CS1 1 R72 2 CS1
36 VID0 VDD_CS1 CS1 51
100KR2F-L1-GP C40
10 CPU_VID1/SEL VID1
2
40 R57 C42 (R) SCD1U16V2KX-3-LL-GP

10 CPU_VID2/SVD SVD/VID2
2
39 CS11 2 1 2 (R)
10 CPU_VID3/SVC 1 25 SVC/VID3
TP20 TP-2 TP_VID4_PWM 1K8R2F-GP SCD22U10V2KX-1GP
TP18 TP-2 1 TP_VID5_PWM 26 VID4 47 V_CPU
R86 1 2 0R2J-2-GP CPU_PSI_C* 12 VID5 VDD_G2 16
10 CPU_PSI*
(R)
VDD_DIFFOUT 9
PSI_L VDD_CS2N
VDD_CS2
15 11/07
4K7R2J-2-GP C51 VDD_DIFFOUT
R94 1 2 VDD_COMP_1
1 2 3
VDD_COMP
SC2K2P-GP VDD_COMP
SC680P50V2KX-2-LL-GP
V_VCORE_EN 1 R117 2 VDD_COMP_2 1 2 1 2 46
49 V_VCORE_EN VDD_G3 18 VCORE_G3 51
75R2F-2-GP C48 SC22P50V2JN-4-LL-GP
VDD_CS3N CS3N 51
1
C54 (R) VDD_FB 4 17 VDD_CS3 1 R61 2 CS3
V_CPU (R) VDD_FB VDD_CS3 CS3 51
VRM_PWRGD 100KR2F-L1-GP C32
5,49 VRM_PWRGD 1 R96 2 1 R92 2 VDD_DROOP 5 R55 (R) SCD1U16V2KX-3-LL-GP
CPUPWRGD C35
10,23 CPUPWRGD VDD_DROOP
2
1
1KR2F-3-GP 10KR2F-2-GP CS31 2 1 2 (R)
R111 <F7> 1K8R2F-GP SCD22U10V2KX-1GP
CPU_VID1/SEL 51R2F-2-GP 2009/04/24 change to 2.62k ohm for output inductance RC matching
10 CPU_VID1/SEL 45
CPU_VID2/SVD V_CPU
10 CPU_VID2/SVD VDD_G4
CPU_VID3/SVC R112 1 2 0R2-PT5-LILY-GP VDD_VS+ 6 20
10 CPU_VID3/SVC 10 CPU_CORE_FB VDD_VS+ VDD_CS4N
2
19
R113 1 2 0R2-PT5-LILY-GP C49 VDD_VS- 7 VDD_CS4
10 CPU_CORE_FB* VDD_VS-
1
CPU_PSI* SC1KP50V2KX-1GP
10 CPU_PSI*
R114
51R2F-2-GP 1 2
51 DRV_EN
DRV_EN 12/29
1
(R) OCP ~ 30A +12V_S0
01/21
2
VCORE_G1 C52 (R) (R) C53 42 VDD_NB_EN
51 VCORE_G1 NB_DRVON 44
CS1N SCD1U16V2KX-3-LL-GP SCD1U16V2KX-3-LL-GP VDD_NB_G
51 CS1N NB_G
2
CS1 24 VDD_NB_CSN
51 CS1 NB_CSN
1
NB_DIFFOUT 28 23 NB_CS 1 2
R35
NB_DIFFOUT NB_CS
1
51 VCORE_G3
VCORE_G3 02/02 1
C456
R522 2 NB_COMP_1
1 2 NB_COMP34
NB_COMP
20KR2F-L-GP C20
SCD1U16V2KX-3-LL-GP
C57
(R)
C56
(R)
2
CS3N 2K4R2F-GP SC2K2P-GP 1
VDD_NB_CS 2
R36 1 2 C22 (R)
51 CS3N
2
CS3 (R) C1(R) C459 2K05R2F-GP SCD22U10V2KX-1GP SC470P50V3JN-2GP
51 CS3 1 R17 2 NB_COMP_2
1 2 1 2
8
01/21
VDD_OFFSET
2009/04/24
1
R98
2
SC470P50V3JN-2GP
75R2F-2-GP SC100P50V2JN-3-LL-GP change to 2.62k ohm
33 VDD_OFFSET 5V_S0
SC1500P50V2KX-2GP NB_FB 0R2J-2-GP
1 R16 2 1 R528 2 NB_DROOP 32

NB_FB
29 NB_OFFSET
for output inductance
RC matching
1
(R)R7
2
11/07
NB_DROOP NB_OFFSET 5V_S0
10KR2F-2-GP 0R2J-2-GP
1
V_CPU_NB 1KR2F-3-GP (R) (R)
NB_VS+ 31
PAD_GND
CPU_CORE_FB 1 NB_VS- 30 NB_VS+ R18 R97
10 CPU_CORE_FB NB_VS-
ROSC
CPU_CORE_FB* R3 10 V_FIX 1 2 10KR2F-2-GP
GND
10 CPU_CORE_FB* V_FIX 5V_S0
ILIM
2
51R2F-2-GP 2D2R5J-1-GP 10KR2F-2-GP
2
R130
CPU_NB_FB_P R4 1 2 0R2-PT5-LILY-GP NCP5393MNR2G-GP-U (R) SCD1U16V2KX-3-LL-GP
ROSC
10 CPU_NB_FB_P 10 CPU_NB_FB_P
2
21
27
2
49
CPU_NB_FB_N R115 C55
10 CPU_NB_FB_N
2
R5 1 2 0R2-PT5-LILY-GP 0R2J-2-GP
10 CPU_NB_FB_N
1
1
C7
1
R6 SC1KP50V2KX-1GP
51R2F-2-GP
12/29
ILIM
1 2 R44
34KR2F-GP
G2
2
(R) AGND_VCORE BOTTOM PAD
1 2
1 2
C6 C8 CONNECT TO
SCD1U16V2KX-3-LL-GP (R) (R) SCD1U16V2KX-3-LL-GP R47 GND Through
COPPER-CLOSE
2
16KR2F-GP 8 VIAs
OCP ~ 164A
20kohm
2
AGND_VCORE
AGND_VCORE
V_19_CPU
5V_S0
11/07
C461 C460 C733
1
SC10U25V6KX-1GP SC10U25V6KX-1GP SC10U25V6KX-1GP
A
5
6
7
8
2
D23 C751
D
D
D
D
RB551V30-GP SCD1U50V3KX-GP Q28

SIR474DP-T1-GE3-GP
R188
K
R677 2D2R5J-1-GP
2 1 NB_PH_BOOT_R 1 2 2 1 DRVHNB_R
G
S
S
S
1
1R5J-2-GP 02/02
4
3
2
1
V_CPU_NB
U16 R192
R239 10KR2F-2-GP L12
2D2R3J-2-GP 5359_BST 1 8 DRVHNB IND-D36UH-19-GP
BST DRVH
2
VDD_NB_G 2 7 VOUTNB 1 2
VDD_NB_EN 1 2 VDD_NB_EN_R 3 PWM SW 6
EN GND
1
2 1 5359_VCC 4 5 DRVLNB
+12V_S0 VCC DRVL R195
1
R235 2D2R5J-1-GP TC9
1
1
2D2R5J-1-GP NCP5359DR2G-GP TC12
5
6
7
8
5
6
7
8
E820U2D5VM-7-GP
(09.8271N.09L)
E820U2D5VM-7-GP
(09.8271N.09L)
C245
2
D
D
D
D
D
D
D
D
SC1U16V3KX-2GP G8 G7
2
2
COPPER-CLOSE COPPER-CLOSE
VCPU_SB
2
VDD_NB_CSN
Q26 Q29
VDD_NB_CS
SIR840DP-GP SIR840DP-GP
S
S
S
S
S
S
G
C184
4
3
2
1
4
3
2
1
SC1500P50V3KX-GP
820uF/2.5V, ESR=7.0mohm
2
DRVLNB
<Variant Name>
Hsichih, Taipei
Title
VCORE NCP5393 (1)
C
Barbados 1B
V_19_CPU
V_19_CPU DCBATOUT
5V_S0
11/07
R227 2 1 UPB201212T-800Y-N-GP
1
C9 C10 C477
1
SC10U25V6KX-1GP SC10U25V6KX-1GP SC10U25V6KX-1GP C745
02/02
1
D1 SC10U25V6KX-1GP R228 2 1 UPB201212T-800Y-N-GP
2
RB551V30-GP
5
6
7
8
2
D
D
D
D
C33 R90 Q13
K
R40 SCD1U50V3KX-GP 1R5J-2-GPSIR474DP-T1-GE3-GP
2D2R5J-1-GP 2 1 DRVH1_R
2 1 PH1_BOOT_R 1 2 0.375V~1.55V/65W
02/02
G
S
S
S
4
3
2
1
U1 R67 820uF/2.5V, ESR=7.0mohm V_CPU
R53 10KR2F-2-GP L5
2D2R3J-2-GP PH1_BOOT 1 8 DRVH1 R27 IND-D36UH-19-GP
BST DRVH
2
VCORE_G1 2 7 VOUT1 2D2R5J-1-GP 1 2
DRV_EN 1 2 DRV_EN_R1 3 PWM SW 6
EN GND
1
2 1 PWM1_VCC 4 5 DRVL1
+12V_S0 VCC DRVL
1
R536 TC5 TC3
1
2D2R5J-1-GP NCP5359DR2G-GP G3 G4
5
6
7
8
5
6
7
8
E820U2D5VM-7-GP
(09.8271N.09L)
E820U2D5VM-7-GP
(09.8271N.09L)
COPPER-CLOSE COPPER-CLOSE
1VOUT1_SB 2
D
D
D
D
D
D
D
D
1
2
C468
2
SC1U16V3KX-2GP
2
C2
S
S
S
S
S
S
G
G
Q6 Q7 SC1500P50V3KX-GP
CS1N
4
3
2
1
4
3
2
1
DRV_EN SIR840DP-GP SIR840DP-GP
CS1
50 DRV_EN
VCORE_G1
50 VCORE_G1
2
DRVL1
CS1
50 CS1
CS1N
50 CS1N
V_19_CPU
5V_S0 11/07
VCORE_G3
50 VCORE_G3
C63 C83 C494
1
CS3 SC10U25V6KX-1GP SC10U25V6KX-1GP SC10U25V6KX-1GP
50 CS3
CS3N D2
50 CS3N
5
6
7
8
RB551V30-GP
2
D
D
D
D
Q23
C43 SIR474DP-T1-GE3-GP
K
R73 SCD1U50V3KX-GP
R158
2D2R5J-1-GP
2 1 PH3_BOOT_R 1 2 2 1 DRVH3_R
02/02
G
S
S
S
1
1R5J-2-GP
4
3
2
1
U7 R157 V_CPU
R99 10KR2F-2-GP L11 820uF/2.5V, ESR=7.0mohm
2D2R3J-2-GP PH3_BOOT 1 8 DRVH3 R152 IND-D36UH-19-GP
BST DRVH
2
VCORE_G3 2 7 VOUT3 2D2R5J-1-GP 1 2
1 2 DRV_EN_R3 3 PWM SW 6
EN GND
1
2 1PWM3_VCC 4 5 DRVL3
+12V_S0 VCC DRVL TC7 TC6 (R)
1
R132 TC8
E820U2D5VM-7-GP
(09.8271N.09L)
E820U2D5VM-7-GP
(09.8271N.09L)
2D2R5J-1-GP NCP5359DR2G-GP G6 E820U2D5VM-7-GP
1
5
6
7
8
5
6
7
8
COPPER-CLOSE G5
VOUT3_SB 2
2
D
D
D
D
D
D
D
D
C60 COPPER-CLOSE
SC1U16V3KX-2GP
2
2
S
S
S
S
S
S
G
G
Q22 Q25 C91
CS3N
4
3
2
1
4
3
2
1
1
SIR840DP-GP SIR840DP-GP SC1500P50V3KX-GP
CS3
DRVL3
<Variant Name>
Hsichih, Taipei
Title
VCORE NCP5393 (2)
C
Barbados 1B
5 4 3 2 1
D D
2009/12/23
DCBATOUT
1
R848
47KR2J-2-GP
C (M) 1D5V_MEM C
2
U50 (M)
1
MVDD_EN2 R847 1 2 MVDD_EN 4 5
R849 10KR2J-3-GP 3 6
G D
100KR2J-1-GP (M) 2 7
S D
1
(M) C935 1 8
S D
D
S D
SCD1U50V3KX-GP
1
Q86 (M) AO4468-GP
2
2N7002-11-GP
MVDD_EN1 G (M)
R845
100KR2J-1-GP
+MVDD
Iomax=8A
(M) OCP>12A
2
Q87 C936
1
2N7002-11-GP SCD1U16V2ZY-2LLGP R637
1
(M) (M) TC4 10KR2J-3-GP
R846 ST330U2D5VDM-9GP (M)
2
G 100KR2J-1-GP (R)
53,61 8208A_PGOOD_VGA
1
(M)
2/16 Rannie
2
2/10 Rannie
B B
A DIS / UMA A
Wistron Corporation
RT8209E_1D5V_VRAM
Title

A3
JV71-TR8 1B
5 4 3 2 1
5 4 3 2 1
02/02 RT8208A for VGA

5V_S5 5V_S0
DCBATOUT DCBATOUT_8208A_VGA Iomax=16A, OCP>24A
1
(R) (M)
R907 R908 L61 2 1 UPB201212T-800Y-N-GP
0R0603-PAD-1-GP 0R3J-L-GP DCBATOUT_8208A_VGA
D
(R) 84.00474.037 SIR474DP D
2
L65 2 1 UPB201212T-800Y-N-GP
Vgs @ 4.5V,
Id = 12.0A,
1
C710 (M)
Rds(on) = 10.0~12.0mohm, SCD1U50V3KX-GP C201 (M) C717 (M) C222 (M) C200 (M)
Qg = 8.0~12.0nC SC10U25V6KX-1GP SC10U25V6KX-1GP SC10U25V6KX-1GP SC10U25V6KX-1GP
2
1
5
6
7
8
1
D
D
D
D
C542 (M) R603
SC1U10V2KX-1-LL-GP 10R2F-L-GP U11
(M) SIR474DP-T1-GE3-GP
2
2 R584 1 2 249KR2F-GP
8208A_VDD_VGA
G
S
S
S
(M)
1
C540
4
3
2
1
SC1U10V2KX-1-LL-GP (M) C533 R635
3D3V_S0 (M) U44 R581 SCD1U50V3KX-GP 2D2R5J-1-GP
2
2D2R5J-1-GP 8208A_HGATE_VGA 2 1 HGATE_VGA

8208A_TON_VGA 16 13 8208A_BOOT_VGA 2 1 8208A_R_BOOT_VGA 1 2 1uH, DCR=2.9mohm, Idc=18.0A 330uF/2.5V, ESR=9.0mohm
TON BOOT
2
8208A_VDDP_VGA 9 VGA_CORE_PWR
VDDP 12 L13
R162
UGATE
8208A_HGATE_VGA (M) 2009/12/30
100KR2F-L1-GP 8208A_VDD_VGA 2 11 8208A_PHASE_VGA (M) (M) 1 2
VDD PHASE 8 8208A_LGATE_VGA
LGATE (M)
IND-1UH-93-GP
1
5
6
7
8
5
6
7
8
1
8208A_PGOOD_VGA 4 7 84.00840.037 SIR840DP C610 (M) TC10 (M) TC11 (M)
52,61 8208A_PGOOD_VGA PGOOD G0 PWRCNTL_0 55
1
D
D
D
D
D
D
D
D
1 2 8208A_CS_VGA 10 3 8208A_FB_VGA R647 SC10U10V5ZY-1-LL-GP ST330U2D5VDM-9GP ST330U2D5VDM-9GP
2010/01/07 R591 (M) CS FB 14 Vgs @ 4.5V, (M)
G1 PWRCNTL_1 55
6K8R2F-2-GP
D1
5 8208A_D1_VGA Id = 18.0A, 2D2R5J-1-GP
2
VDDC_EN R580 1 2 0R2-PT5-LILY-GP 8208A_EM/DEM_VGA 15 6 8208A_D0_VGA
61 VDDC_EN EM/DEM D0 Rds(on) = 5.8~6.7mohm,
VGA_SNB12
(M) G18
C520 8208A_GND_VGA 17 1 8208A_VOUT_VGA Qg = 21.5~33.0nC GAP-CLOSE-PWR
S
S
S
S
S
S
G
G
GND VOUT
1
4
3
2
1
4
3
2
1
2
(R) (M) U9 (M)U10
RT8208AGQW-GP SIR840DP-GP SIR840DP-GP
2
SCD1U16V2KX-3GP
1
8208A_VOUT_VGA
1
C C704 (M) (R) (R) VGA_CORE_PWR +VDDC C
SC1500P50V3KX-GP R588 C535 C532
SC10P50V2JN-4GP
SC10P50V2JN-4GP
10KR2F-2-GP R166 1 (M) 2 0R0805-PAD
2
(M)
R165 1 (M) 2 0R0805-PAD
2
8208A_FB_VGA R170 1 (M) 2 0R0805-PAD
R171 1 (M) 2 0R0805-PAD
1
R597 R589 R598 R169 1 (M) 2 0R0805-PAD
150KR2F-L-GP 49K9R2F-L-GP 44K2R2F-1-GP
(M) (M) (M) R168 1 (M) 2 0R0805-PAD
8208A_D0_VGA 2
8208A_D1_VGA 2
2010/01/07 R167 1 (M) 2 0R0805-PAD
AMD Release
GPIO20/G1 GPIO15/G0
PWRCNTL_1 PWRCNTL_0 Voltage
1 1 1.12V
1 0 1.07V
0 1 0.95V
0 0 0.9V
B B
A A
Wistron Corporation
Title
RT8208A for VGA CORE

C
JV71-TR8 1B
5 4 3 2 1
5 4 3 2 1
U855A
PEG_RXP[15..0]
PEG_TXP[15..0] 16 PEG_RXP[15..0]
16 PEG_TXP[15..0] PEG_RXN[15..0]
PEG_TXN[15..0] 16 PEG_RXN[15..0]
16 PEG_TXN[15..0] PEG_TXP0 AF30 AH30 PEG_RXP0_1 1 2 PEG_RXP0
C694
PEG_TXN0 AE31 PCIE_RX0P PCIE_TX0P AG31 PEG_RXN0_1 SCD1U16V2KX-3GP 1 2 PEG_RXN0
PCIE_RX0N PCIE_TX0N C692 SCD1U16V2KX-3GP
(M)
(M)
PEG_TXP1 AE29 AG29 PEG_RXP1_1 C689 1 2 PEG_RXP1
PEG_TXN1 AD28 PCIE_RX1P PCIE_TX1P AF28 PEG_RXN1_1 SCD1U16V2KX-3GP 1 2 PEG_RXN1
D D
(M)
(M)
PEG_TXP2 AD30 AF27 PEG_RXP2_1 C695 1 2 PEG_RXP2
PEG_TXN2 AC31 PCIE_RX2P PCIE_TX2P AF26 PEG_RXN2_1 SCD1U16V2KX-3GP 1 2 PEG_RXN2
(M)
(M)
PEG_TXP3 AC29 AD27 PEG_RXP3_1 C679 1 2 PEG_RXP3
PEG_TXN3 AB28 PCIE_RX3P PCIE_TX3P AD26 PEG_RXN3_1 SCD1U16V2KX-3GP 1 2 PEG_RXN3
(M)
(M)
PEG_TXP4 AB30 AC25 PEG_RXP4_1 C672 1 2 PEG_RXP4
PEG_TXN4 AA31 PCIE_RX4P PCIE_TX4P AB25 PEG_RXN4_1 SCD1U16V2KX-3GP 1 2 PEG_RXN4
PCI EXPRESS INTERFACE

(M)
(M)
PEG_TXP5 AA29 Y23 PEG_RXP5_1 C663 1 2 PEG_RXP5
PEG_TXN5 Y28 PCIE_RX5P PCIE_TX5P Y24 PEG_RXN5_1 SCD1U16V2KX-3GP 1 2 PEG_RXN5
(M)
(M)
PEG_TXP6 Y30 AB27 PEG_RXP6_1 C651 1 2 PEG_RXP6
PEG_TXN6 W31 PCIE_RX6P PCIE_TX6P AB26 PEG_RXN6_1 SCD1U16V2KX-3GP 1 2 PEG_RXN6
(M)
(M)
PEG_TXP7 W29 Y27 PEG_RXP7_1 C632 1 2 PEG_RXP7
PEG_TXN7 V28 PCIE_RX7P PCIE_TX7P Y26 PEG_RXN7_1 SCD1U16V2KX-3GP 1 2 PEG_RXN7
(M)
(M)
PEG_TXP8 V30 W24 PEG_RXP8_1 C623 1 2 PEG_RXP8
PEG_TXN8 U31 PCIE_RX8P PCIE_TX8P W23 PEG_RXN8_1 SCD1U16V2KX-3GP 1 2 PEG_RXN8
C PCIE_RX8N PCIE_TX8N C617 SCD1U16V2KX-3GP C
(M)
(M)
PEG_TXP9 U29 V27 PEG_RXP9_1 C614 1 2 PEG_RXP9
PEG_TXN9 T28 PCIE_RX9P PCIE_TX9P U26 PEG_RXN9_1 SCD1U16V2KX-3GP 1 2 PEG_RXN9
(M)
(M)
PEG_TXP10 T30 U24 PEG_RXP10_1 C586 1 2 PEG_RXP10
PEG_TXN10 R31 PCIE_RX10P PCIE_TX10P U23 PEG_RXN10_1 SCD1U16V2KX-3GP 1 2 PEG_RXN10
(M)
(M)
PEG_TXP11 R29 T26 PEG_RXP11_1 C580 1 2 PEG_RXP11
PEG_TXN11 P28 PCIE_RX11P PCIE_TX11P T27 PEG_RXN11_1 SCD1U16V2KX-3GP 1 2 PEG_RXN11
(M)
(M)
PEG_TXP12 P30 T24 PEG_RXP12_1 C573 1 2 PEG_RXP12
PEG_TXN12 N31 PCIE_RX12P PCIE_TX12P T23 PEG_RXN12_1 SCD1U16V2KX-3GP 1 2 PEG_RXN12
(M)
(M)
PEG_TXP13 N29 P27 PEG_RXP13_1 C555 1 2 PEG_RXP13
PEG_TXN13 M28 PCIE_RX13P PCIE_TX13P P26 PEG_RXN13_1 SCD1U16V2KX-3GP 1 2 PEG_RXN13
(M)
(M)
PEG_TXP14 M30 P24 PEG_RXP14_1 C546 1 2 PEG_RXP14
PEG_TXN14 L31 PCIE_RX14P PCIE_TX14P P23 PEG_RXN14_1 SCD1U16V2KX-3GP 1 2 PEG_RXN14
(M)
(M)
PEG_TXP15 L29 M27 PEG_RXP15_1 C539 1 2 PEG_RXP15
PEG_TXN15 K30 PCIE_RX15P PCIE_TX15P N26 PEG_RXN15_1 SCD1U16V2KX-3GP 1 2 PEG_RXN15
B (M) B
(M)
CLOCK
AK30
8 PCIE_REFCLKP PCIE_REFCLKP
AK32
8 PCIE_REFCLKN PCIE_REFCLKN +1.0V_REG
Check!! R629 (M) 1K27R2F-L-GP

CALIBRATION
(M) Y22 VGA_PCIE_CALRP 1 2
R621 PCIE_CALRP
2 1 VGA_PWRGOOD N10 AA22 VGA_PCIE_CALRN 1 2
1KR2J-1-GP PWRGOOD PCIE_CALRN
R633 (M) 2KR2F-3-GP
CEDAR_RST#1 2 PLT_RST1#_M92_1 AL27
R208 0R2J-2-GP (R) PERSTB
1
CEDAR-GP
C205 (M)
SC68P50V2JN-1GP
(M)
2
+VDDR3
MXMRST# 1 2
1
R202 (R)
A
10KR2J-3-GP
For meeting requirement of DIS / UMA A
2
U12
+VDDR3
5
VCC B
1
2
MXM_PWRGD
MXMRST#
MXM_PWRGD 61 "Power and Reset rail up in 20 ms" Wistron Corporation
A MXMRST# 23,62 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
CEDAR_RST# 4 3 Taipei Hsien 221, Taiwan, R.O.C.

Y GND C215 (R)
SCD1U10V2KX-4-LL-GP Title
Cedar PCIE
2
74AHC1G08GW-GP-U
(R)
A3
B305 1B
5 4 3 2 1
5 4 3 2 1
Check!!
DVPDATA [3:2:1:0] for VRAM type
selection H/W strap
Should provide VRAM Table for VBios
U855B U855F
request
DVPDATA [3:0]
+1.8V_REG AF2 LVDS CONTROL AB11
0000 512MB DDR3 Hynix-H5TQ1G63BFR-12C (800MHz) TXCAP_DPA3P AF4 VARY_BL AB12
0001 512 DDR3 Samsung-K4W1G1646E-HC12 (800MHz) Y11
AE9 DVCLK
TXCAM_DPA3N
AG3
Integrated TMDS2 Interface DIGON
DVDATA_[11:0]
L9
N9
DVCNTL_0
DVCNTL_1
DVCNTL_2
DVO DPA
TX0P_DPA2P
TX0M_DPA2N
AG5
AH3
Note: AH20
If this interface is not used, all signal outputs can be
D D
DVO pixel bus. AE8 TX1P_DPA1P AH1 TXCLK_UP_DPF3P AJ19
Initialization Behavior: These signals are inputs AD9 DVDATA_12 TX1M_DPA1N TXCLK_UN_DPF3N
DVDATA_11
2
during reset (no reference clock is required). After
reset, the default states are output low (0 V).
R640 R645 R190 R193
AC10
AD7
AC8
DVDATA_10
DVDATA_9
TX2P_DPA0P
TX2M_DPA0N
AK3
AK1 unconnected. Power, ground,and DPxx_CALR TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
AL21
AK20
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
(R) (R) (R) (R)
AC7
AB9
DVDATA_8
DVDATA_7
DVDATA_6
TXCBP_DPB3P
TXCBM_DPB3N
AK5
AM3 MUST remain connected. TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
AH22
AJ21
1
AB8
AB7 DVDATA_5 AK6 AL23
MEM_ID3 AB4 DVDATA_4 TX3P_DPB2P AM5 TXOUT_U2P_DPF0P AK22
MEM_ID2 AB2 DVDATA_3 DPB TX3M_DPB2N TXOUT_U2N_DPF0N
MEM_ID1 Y8 DVDATA_2 AJ7 AK24
MEM_ID0 Y7 DVDATA_1 TX4P_DPB1P AH6 TXOUT_U3P AJ23
DVDATA_0 TX4M_DPB1N TXOUT_U3N
AK8
Internal pull-down TX5P_DPB0P
TX5M_DPB0N
AL7 LVTMDP
AL15
W6 DPC TXCLK_LP_DPE3P AK14
V6 DPC_PVDD TXCLK_LN_DPE3N
DPC_PVSS V4 AH16
AC6 TXCCP_DPC3P U5 TXOUT_L0P_DPE2P AJ15
AC5 DPC_VDD18#1 TXCCM_DPC3N TXOUT_L0N_DPE2N
DPC_VDD18#2 W3 AL17
AA5 TX0P_DPC2P V2 TXOUT_L1P_DPE1P AK16
AA6 DPC_VDD10#1 TX0M_DPC2N TXOUT_L1N_DPE1N
DPC_VDD10#2 Y4 AH18
Must be tied high if not used. TX1P_DPC1P
TX1M_DPC1N
W5 TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
AJ17
+VDDR3 +VDDR3 U1 AA3 AL19

W1 DPC_VSSR#1 TX2P_DPC0P Y2 TXOUT_L3P AK18
U3 DPC_VSSR#2 TX2M_DPC0N (M) TXOUT_L3N
Y6 DPC_VSSR#3 J8 1 2
AA1 DPC_VSSR#4 DPC_CALR
DPC_VSSR#5 R614
1
It's strap for GDDR3-136ball R186 (M) R185 (M)

150R2F-1-GP CEDAR-GP
Need to Clarify 4K7R2J-2-GP 4K7R2J-2-GP

M_RED
I2C
2
C LCD_EDID_CLK R1 M_GREEN C
+VDDR3 LCD_EDID_DAT R3 SCL
SDA M_BLUE (M) (M) (M)
AM26
R M_RED 31
1
AK26
R648
R650
R658
GENERAL PURPOSE I/O
U6 RB
58 GPIO_VGA_00 U10 GPIO_0 AL25
58 GPIO_VGA_01 GPIO_1 G M_GREEN 31
2
T10 AJ25 R670 1 2 0R0402-PAD
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
58 GPIO_VGA_02 U8 GPIO_2 GB
R187 SMBDATA
8,21,24,28,30,41 SMBDATA GPIO_3_SMBDATA
2
10KR2J-3-GP SMBCLK U7 AH24
8,21,24,28,30,41 SMBCLK GPIO_4_SMBCLK B M_BLUE 31
T9 AG25
T8 GPIO_5_AC_BATT BB
(M)
2/24 Rannie (M)
GPIO_6
DAC1
1
1 R628 2 10KR2J-3-GP GPIO_VGA_07_BLON T7 AH26 AVSSQ

GPIO_7_BLON HSYNC GMCH_HSYNC 31,58
GPIO_8_ROMSO R619 1 (M) 2 33R2J-2-GP GPIO_8_ROMSO_R P10 AJ27
GPIO_8_ROMSO VSYNC GMCH_VSYNC 31,58
Therm al_int GPIO_VGA_09 R180 1 (M) 2 33R2J-2-GP GPIO_VGA_09_R P4
58 GPIO_VGA_09 GPIO_9_ROMSI
GPIO_10_ROMSI R182 1 (M) 2 33R2J-2-GP GPIO_10_ROMSI_R P2 R666 499R2F-2-GP
N6 GPIO_10_ROMSCK AD22 VGA_RSET 1 (M) 2
58 GPIO_VGA_11 N5 GPIO_11 RSET DAC2_VDD2DI +1.8V_REG DAC1_AVDD +1.8V_REG
58 GPIO_VGA_12 N3 GPIO_12 AG24
58 GPIO_VGA_13 GPIO_13 AVDD
65mA DAC1_AVDD
L67
Y9 AE22 AVSSQ 1 2
R672 1 2
PWRCNTL_0 N1 GPIO_14_HPD2 AVSSQ 0R0402-PAD
GPIO_15_PWRCNTL_0
1
PWRCNTL_0 M4 AE23 100mA C747 (M) C746 C748 C726 C729 C718 C735 SBY100505T-121Y-N-GP
53 PWRCNTL_0 GPIO_16_SSIN VDD1DI DAC1_VDD1DI
1
Therm al_int R6 AD23 (M)
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SCD1U16V2KX-3GP SCD1U16V2KX-3GP SC1U6D3V2KX-GP (M) (M) (M) (M)
R606 W10 GPIO_17_THERMAL_INT VSS1DI (R) (R)
GPIO_18_HPD3
2
3KR2J-2-GP GPIO19_CTF M2 AVSSQ
(M) (M)
62 GPIO19_CTF PWRCNTL_1 P8 GPIO_19_CTF AM12
1R626 2 10KR2J-3-GP VGA_BB_EN P7 GPIO_20_PWRCNTL_1 R2 AK12
GPIO_21_BB_EN R2B
2
N8
58 GPIO_VGA_22 N7 GPIO_22_ROMCSB AL11 AVSSQ
GPIO_23_CLKREQB G2 AJ11
PWRCNTL_1
3/17 Del TP L6 G2B
53 PWRCNTL_1 JTAG_TRSTB
1
L5 AK10 DAC2_A2VDD +VDDR3 DAC1_VDD1DI +1.8V_REG

R579 L3 JTAG_TDI B2 AL9 L20
3KR2J-2-GP L1 JTAG_TCK B2B 1 2
R220 1 2
(M) K4 JTAG_TMS 0R0402-PAD
JTAG_TDO
1
TESTEN K7 AH12 C226 (M) C229 (R) C228 (R) C225 (R) C240 (M) C239 (M) C241 (M) SBY100505T-121Y-N-GP
TESTEN C
2
TESTEN_LEGACY AF24 AM10 SCD1U16V2KX-3GP SCD1U16V2KX-3GP SC1U6D3V2KX-GP SC10U6D3V3MX-GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SC10U6D3V3MX-GP (M)
TESTEN_LEGACY Y
1
AJ9
COMP
2
(M) 10KR2J-3-GP 10KR2J-3-GP (R) AB13 DAC2
R617 R207 W8 GENERICA AL13
GENERICB H2SYNC HSYNC_DAC2 58
B W9 AJ13 B
3/17 Del TP GENERICC V2SYNC VSYNC_DAC2 58
2
W7
AD10 GENERICD 100mA
GENERICE_HPD4 AD19
VDD2DI DAC2_VDD2DI
+1.8V_REG AC14 AC19
PX_EN AB16 HPD1 VSS2DI DAC2_A2VDDQ +1.8V_REG
PX_EN
2
130mA L66
1
R657 AE20 1 2 DPLL_PVDD

A2VDD DAC2_A2VDD
(M) R665 1KR2J-1-GP 2mA C738 L19
1
499R2F-2-GP VREFG VOLTAGE DIVIDER IS (R) AE17 SCD1U16V2KX-3GP SBY100505T-121Y-N-GP 1 2
A2VDDQ DAC2_A2VDDQ +1.8V_REG
(VREFG = VDDR4,5(1.8V) / 3 = 0.6V) (M) C739 (M)
1
AE19 SC1U6D3V2KX-GP SBY100505T-121Y-N-GP

A2VSSQ
2
2
(R) (M)
2
VGA_VREFG AC16 R649 (M) C741 (M) C740 (R) C743 (M) C742 (M)
VREFG AG13 VGA_R2SET 1 2 SC10U6D3V3MX-GP SC10U6D3V3MX-GP SCD1U16V2KX-3GP SCD01U16V2KX-3GP
R2SET
1
715R2F-GP
1
(M) R664 C719 (M)
249R2F-GP SCD1U16V2KX-3GP
2
DPLL_PVDD DDC/AUX AE6

75mA PLL/CLOCK DDC1CLK AE5
DDC1DATA
2
AF14
DPLL_VDDC AE14 DPLL_PVDD AD2
DPLL_PVSS AUX1P AD4
125mA AUX1N
AD14 AC11
DPLL_VDDC DDC2CLK AC13 DPLL_VDDC
DDC2DATA L63
XTALIN AM28 AD13 1 2
XTALOUT AK28 XTALIN AUX2P AD11 +1.0V_REG
XTALOUT AUX2N SBY100505T-121Y-N-GP
AC22 AD20 (M)
XO_IN DDCCLK_AUX3P
2
AB22 AC20 C728 (R) C720 (M) C722 (R) C723
XO_IN2 DDCDATA_AUX3N SC10U6D3V3MX-GP SC1U10V2KX-1-LL-GP SCD1U16V2KX-3GP SCD01U16V2KX-3GP
AE16
DDCCLK_AUX5P GMCH_DDC_CLK 31 (M)
1
AD16
DDCDATA_AUX5N GMCH_DDC_DATA 31
AC1
GPU_DPLUS T4 THERMAL DDC6CLK AC3
20mA 41 GPU_DPLUS GPU_DMINUS T2 DPLUS DDC6DATA
41 GPU_DMINUS DMINUS
SERIAL EEPROM 512K/1M
TSVDD
+1.8V_REG
+VDDR3
A 1TS_FDD R5 A
TP-2 TP6 TS_FDO
AD17
TSVDD 2/24
2
C216 C209 R204 AC17

TSVSS
1
SC1U6D3V2KX-GP SCD1U16V2KX-3GP 1MR2J-1-GP R674 (M)
(M) (M) (M) 4K7R2J-2-GP C752
X1
1
U45 SCD1U16V2ZY-2GP
2
CEDAR-GP DIS / UMA
2
3 2 GPIO_VGA_22 1 8
GPIO_8_ROMSO 2 CS# VCC 7
25 GPU_WP#
GPU_WP# R943 2 1 10R2F-L-GP 3 SO
WP#
HOLD#
SCK
6 GPIO_10_ROMSI Wistron Corporation
1
4 5
4 1
(R)
GND SI
GPIO_VGA_09
2009/12/23 21F, 88, Sec.1, Hs in Tai Wu Rd., Hs ichih,
3/24 R868
1
4K7R2J-2-GP
1
C212 (R) AT25F512B-SSH-T-GP A 256MB MEMORY APERTURE SIZE

SC8P250V2CC-LL-GP (M) C213 (M)
CAN BE DEFINED USING A SEPARATE
Title
Cedar IO
2
(M) XTAL-27MHZ-58-GP SC8P250V2CC-LL-GP

ROM OR STRAPPING
2
82.30034.461 (M) Size Docum ent Num ber Rev

2ND = 82.30034.701 1B
A2
B305
5 4 3 2 1
5 4 3 2 1
D D
U855D TBD U855E
MEM I/O
+MVDD (VDDR1: TBDmA @ 1.5V) PCIE MXM_PCIE_VDDR B1 +1.8V_REG
H13 AB23 1 2 AA27 A3
H16 VDDR1#1 PCIE_VDDR#1 AC23 PBY201209T-221Y-N-GP AB24 PCIE_VSS#1 GND#1 A30
VDDR1#2 PCIE_VDDR#2 PCIE_VSS#2 GND#2
1
1
H19 AD24 AB32 AA13
SC1U6D3V2KX-GP
C596
SC1U6D3V2KX-GP
C479
SC1U6D3V2KX-GP
C593
SC1U6D3V2KX-GP
C484
SC1U6D3V2KX-GP
C62
SC10U6D3V3MX-GP C74
C527
SC10U6D3V3MX-GP C487
C481
SC10U6D3V3MX-GP C65
C66
SC10U6D3V3MX-GP C121
C485
SC10U6D3V3MX-GP C72
C82
SCD1U16V2KX-3GP
C207
SCD1U16V2KX-3GP
C696
SC1U6D3V2KX-GP
C208
SC1U6D3V2KX-GP
C691
SC1U6D3V2KX-GP
C206
SC10U6D3V3MX-GP
C725
SC4D7U6D3V3KX-GP
C211
J10 VDDR1#3 PCIE_VDDR#3 AE24 AC24 PCIE_VSS#3 GND#3 AA16
VDDR1#4 PCIE_VDDR#4 (M) PCIE_VSS#4 GND#4
J23 AE25 AC26 AB10
VDDR1#5 PCIE_VDDR#5 PCIE_VSS#5 GND#5
2
2
(M) (M) (M) (M) (M) (M) (M) (M) (M) (M) J24 AE26 (R) (R) (M) (M) (M) (M) (M) AC27 AB15
J9 VDDR1#6 PCIE_VDDR#6 AF25 AD25 PCIE_VSS#6 GND#6 AB6
K10 VDDR1#7 PCIE_VDDR#7 AG26 AD32 PCIE_VSS#7 GND#7 AC9
K23 VDDR1#8 PCIE_VDDR#8 AE27 PCIE_VSS#8 GND#8 AD6
K24 VDDR1#9 PCIE_VDDC AF32 PCIE_VSS#9 GND#9 AD8
K9 VDDR1#10 L23
(PCIE_VDDC: 2.0A @ 1.0V) +1.0V_REG
AG27 PCIE_VSS#10 GND#10 AE7
VDDR1#11 PCIE_VDDC#1 PCIE_VSS#11 GND#11
1
1
L11 L24 AH32 AG12
SC1U6D3V2KX-GP
C77
SC1U6D3V2KX-GP
C490
SC1U6D3V2KX-GP
C496
SC1U6D3V2KX-GP
C508
SC1U6D3V2KX-GP
C515
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1
L12 L25 K28 AH10
SC1U6D3V2KX-GP
C637
SC1U6D3V2KX-GP
C219
SC1U6D3V2KX-GP
C220
SC1U6D3V2KX-GP
C581
SC1U6D3V2KX-GP
C629
SC1U6D3V2KX-GP
C217
SC1U6D3V2KX-GP
C218
SC10U6D3V3MX-GP
C199
SC4D7U6D3V3KX-GP
C194
L13 VDDR1#13 PCIE_VDDC#3 L26 K32 PCIE_VSS#13 GND#13 AH28
2
2
(M) (M) (M) (M) (M) (M) (M) (M) (M) (M) L20 M22 L27 B10
2
L21 N22 M32 B12
L22 VDDR1#16 PCIE_VDDC#6 N23 (M) (M) (M) (M) (M) (M) (M) (M) (M) N25 PCIE_VSS#16 GND#16 B14
VDDR1#17 PCIE_VDDC#7 N24 Overlap N27 PCIE_VSS#17 GND#17 B16
PCIE_VDDC#8 R22 P25 PCIE_VSS#18 GND#18 B18
PCIE_VDDC#9 T22 P32 PCIE_VSS#19 GND#19 B20
LEVEL PCIE_VDDC#10 U22 R27 PCIE_VSS#20 GND#20 B22
PCIE_VDDC#11 V22 T25 PCIE_VSS#21 GND#21 B24
+1.8V_REG L64 (VDD_CT: 17mA @ 1.8V) VDD_CT TRANSLATION
PCIE_VDDC#12 PCIE_VSS#22 GND#22
1 2 AA20 T32 B26
AA21 VDD_CT#1 U25 PCIE_VSS#23 GND#23 B6
VDD_CT#2 (VDDC: TBDmA @ TBDV) +VDDC
PCIE_VSS#24 GND#24
1
AB20 AA15 U27 B8

SC10U6D3V3MX-GP
C721
SC1U6D3V2KX-GP
C706
SCD1U16V2KX-3GP
C714
SBY100505T-121Y-N-GP
AB21 VDD_CT#3 VDDC#1 N15 V32 PCIE_VSS#25 GND#25 C1
(M) (R)
VDD_CT#4
CORE
VDDC#2 PCIE_VSS#26 GND#26
1
N17 W25 C32
SC1U6D3V2KX-GP
C613
SC1U6D3V2KX-GP
C659
SC1U6D3V2KX-GP
C611
SC1U6D3V2KX-GP
C616
SC1U6D3V2KX-GP
C641
SC1U6D3V2KX-GP
C618
SC1U6D3V2KX-GP
C615
SC1U6D3V2KX-GP
C678
SC1U6D3V2KX-GP
C639
SC1U6D3V2KX-GP
C631
C C
2
(M) (M) R13 W26 E28

VDDC#4 R16 W27 PCIE_VSS#28 GND#28 F10
+VDDR3 L16 (VDDR3: 60mA @ 3.3V) VDDR3 I/O
2
1 2 AA17 R18 (M) (M) (M) (M) (M) (M) (M) (M) (M) (M) Y25 F12
SBY100505T-121Y-N-GP AA18 VDDR3#1 VDDC#6 Y21 Y32 PCIE_VSS#30 GND#30 F14
VDDR3#2 VDDC#7 PCIE_VSS#31 GND#31
1
(M) AB17 T12 F16

SC10U6D3V3MX-GP
C202
SC1U6D3V2KX-GP
C214
(M)
(M) AB18 VDDR3#3 VDDC#8 T15 GND#32 F18
VDDR3#4 VDDC#9 GND#33
1
T17 F2
SC1U6D3V2KX-GP
C658
SC1U6D3V2KX-GP
C652
SC1U6D3V2KX-GP
C619
SC1U6D3V2KX-GP
C628
SC1U6D3V2KX-GP
C608
SC1U6D3V2KX-GP
C630
SC1U6D3V2KX-GP
C622
SC1U6D3V2KX-GP
C669
SC1U6D3V2KX-GP
C673
VDDC#10 GND#34
2
V12 T20 F20

VDDR4 Y12 VDDR4#1 VDDC#11 U13 M6 GND#35 F22
L58 (VDDR4: TBDmA @ 1.8V) VDDR4#2 VDDC#12 GND#56 GND#36
2
1 2 U12 U16 (M) (M) (M) (M) (M) (M) (M) (M) (M) N11 F24
VDDR4#3 VDDC#13 U18 N12 GND#57 GND#37 F26
VDDC#14 GND#58 GND#38
1
AA11 V21 N13 F6

SC1U6D3V2KX-GP
C671
SCD1U16V2KX-3GP
C670
AA12 NC#1 VDDC#15 V15 N16 GND#59 GND#39 F8
(M)
GND
POWER
NC#2 VDDC#16 GND#60 GND#40
1
CHECK CRB V17 N18 G10
SC10U6D3V3MX-GP
C126
SC10U6D3V3MX-GP
C664
SC10U6D3V3MX-GP
C656
SC10U6D3V3MX-GP
C132
SC10U6D3V3MX-GP
C635
SC10U6D3V3MX-GP
C129
VDDC#17 GND#61 GND#41
2
(M) V11 V20 N21 G27

(R) U11 NC#3 VDDC#18 Y13 P6 GND#62 GND#42 G31
NC#4 VDDC#19 GND#63 GND#43
2
Y16 (M) (M) (M) (M) (M) (M) P9 G8
VDDC#20 Y18 R12 GND#64 GND#44 H14
VDDC#21 M11 R15 GND#65 GND#45 H17
VDDC#22 M12 R17 GND#66 GND#46 H2
MEM CLK VDDC#23 R20 GND#67 GND#47 H20
GND#68 GND#48
2009/12/23 L17
NC_VDDRHA
T13
T16 GND#69 GND#49
H6
J27
L16 T18 GND#70 GND#50 J31
NC_VSSRHA T21 GND#71 GND#51 K11
T6 GND#72 GND#52 K2
MXM_PCIE_PVDD U15 GND#73 GND#53 K22
L17 (PCIE_PVDD: 40mA @ 1.8V) PLL
GND#74 GND#54
1 2 AM30 U17 K6
SBY100505T-121Y-N-GP PCIE_PVDD R21 U20 GND#75 GND#55
BIF_VDDC#1 GND#76
1
(M) U21 U9
SC10U6D3V3MX-GP
C192
SC1U6D3V2KX-GP
C190
SCD1U16V2KX-3GP
C191
MPV18 BIF_VDDC#2 V13 GND#77

L8 V16 GND#78
(M) NC_MPV18 GND#79
2
(M) (R) V18

Y10 GND#80
+VDDC Y15 GND#81
SPV18
ISOLATED (VDDCI : TBDmA @ VDDC) GND#82
CORE I/O M13 Y17 A32
H7 VDDCI#1 M15 Y20 GND#83 VSS_MECH#1 AM1
B SPV18 VDDCI#2 GND#84 VSS_MECH#2 B
1
(MPV18: 75mA @ 1.8V) M16 R11 AM32
SCD1U16V2KX-3GP
C654
SCD1U16V2KX-3GP
C653
SCD1U16V2KX-3GP
C662
SCD1U16V2KX-3GP
C620
SC10U6D3V3MX-GP
C123
SC4D7U6D3V3KX-GP
C118
+1.8V_REG L55
1 2 VDDCI#3 M17 T11 GND#85 VSS_MECH#3
VDDCI#4 M18 GND#86
VDDCI#5
1
2
SPV10 M20
SC10U6D3V3MX-GP
C588
SC10U6D3V3MX-GP
C591
SC1U6D3V2KX-GP
C589
SCD1U16V2KX-3GP
C590
SBY100505T-121Y-N-GP (R) (R) (R) (R) (M) (M)

H8 VDDCI#6 M21
(M)
SPV10 VDDCI#7 N20 Overlap
VDDCI#8
2
(M) (M) (M) (R) J7 CEDAR-GP

SPVSS
L53 (SPV18: 50mA @ 1.8V) CEDAR-GP

1 2
1
1
SC10U6D3V3MX-GP
C548
SC1U6D3V2KX-GP
C550
SCD1U16V2KX-3GP
C549
(M)
2
(M) (M) (R)
SPVSS
+1.0V_REG L54 (SPV10: 100mA @ 1.0V)

1 2
1
1
SC10U6D3V3MX-GP
C571
SC1U6D3V2KX-GP
C572
SCD1U16V2KX-3GP
C570
(M)
(M)
2
(M) (R)
SPVSS
A A
Wistron Corporation
Title
Cedar IO
C
B305 1B
5 4 3 2 1
5 4 3 2 1
D D
TBD TBD
U855G
DP E/F POWER DP A/B POWER

DPAB_VDD18
+1.8V_REG (M) B5 (DPEF_VDD18: 400mA @ 1.8V) DPEF_VDD18 (DPAB_VDD18: 260mA @ 1.8V) B2 +1.8V_REG
1 2 AG15 AE11 1 2
C PBY201209T-221Y-N-GP AG16 DPE_VDD18#1 DPA_VDD18#1 AF11 PBY201209T-221Y-N-GP C
DPE_VDD18#2 DPA_VDD18#2
1
1
SC10U6D3V3MX-GP
C734
SC1U6D3V2KX-GP
C732
SC1U6D3V2KX-GP
C731
SC10U6D3V3MX-GP
C210
SC1U6D3V2KX-GP
C204
SC1U6D3V2KX-GP
C203
(M) (M) (M)
(M)
DPEF_VDD10 DPAB_VDD10
2
2
AG20 AF6
AG21 DPE_VDD10#1 DPA_VDD10#1 AF7
DPE_VDD10#2 DPA_VDD10#2
AG14 AE1
AH14 DPE_VSSR#1 DPA_VSSR#1 AE3
DPE_VSSR#2 DPA_VSSR#2 (DPAB_VDD10: 220mA @ 1.0V) B4 +1.0V_REG
+1.0V_REG B3 (M) (DPEF_VDD10: 240mA @ 1.0V) AM14 AG1 1 2
1 2 AM16 DPE_VSSR#3 DPA_VSSR#3 AG6 PBY201209T-221Y-N-GP
DPE_VSSR#4 DPA_VSSR#4
1
AM18 AH5
SC10U6D3V3MX-GP
C703
SC1U6D3V2KX-GP
C701
SC1U6D3V2KX-GP
C702
PBY201209T-221Y-N-GP (M) (M)
DPE_VSSR#5 DPA_VSSR#5
1
(M)
SC10U6D3V3MX-GP
C242
SC1U6D3V2KX-GP
C231
SC1U6D3V2KX-GP
C235
(M)
(M) (M) (M)
2
2
AF16 AE13
AG17 DPF_VDD18#1 DPB_VDD18#1 AF13
DPF_VDD18#2 DPB_VDD18#2
AF22 AF8
AG22 DPF_VDD10#1 DPB_VDD10#1 AF9
DPF_VDD10#2 DPB_VDD10#2
(M) (M)
(M)
AF23 AF10
AG23 DPF_VSSR#1 DPB_VSSR#1 AG9
AM20 DPF_VSSR#2 DPB_VSSR#2 AH8
AM22 DPF_VSSR#3 DPB_VSSR#3 AM6
AM24 DPF_VSSR#4 DPB_VSSR#4 AM8
DPF_VSSR#5 DPB_VSSR#5
150R2F-1-GP 150R2F-1-GP
R663 R639
1 (M) 2 DPEF_CALR AF17 AE10 DPAB_CALR 1 2
DPEF_CALR DPAB_CALR (M)
+1.8V_REG L62 (DPEF_PVDD: 40mA @ 1.8V) DPEF_PVDD DPAB_PVDD (DPAB_PVDD: 40mA @ 1.8V) L60 +1.8V_REG
1 2 AG18 DP PLL POWER AG8 1 2
AF19 DPE_PVDD DPA_PVDD AG7
DPE_PVSS DPA_PVSS
1
1
SC10U6D3V3MX-GP
C711
SC1U6D3V2KX-GP
C700
SC1U6D3V2KX-GP
C705
SC10U6D3V3MX-GP
C709
SC1U6D3V2KX-GP
C713
SC1U6D3V2KX-GP
C712
SBY100505T-121Y-N-GP (M) (M) (M) SBY100505T-121Y-N-GP
B B
(M) (M)
DPEF_PVDD DPAB_PVDD
2
2
R651 1 2 0R0402-PAD AG19 AG10
AF20 DPF_PVDD DPB_PVDD AG11
DPF_PVSS DPB_PVSS
DPEF_PVSS
DPEF_PVSS DPAB_PVSS
CEDAR-GP
If DPEF ports are not used (i.e no LVDS): (M)

(M) (M)
DNI B10113, C5855, C5856, B10115, C5861, C5862, B10119, C5874, C5875 and R6080.
DNI U27, Q27 and C27. 1 2
R646
Install 0R resistors on C5857, C5863 and C5873. 0R0402-PAD
DPAB_PVSS
A A
DIS / UMA
Wistron Corporation
Title
DP POWER_GND
A2
JV71-TR8 1B
5 4 3 2 1
5 4 3 2 1
U855C
59 M_MDA[63..0] M_MAA[12..0] 59
M_MDA0 K27 K17 M_MAA0
M_MDA1 J29 DQA_0 MAA_0 J20 M_MAA1
M_MDA2 H30 DQA_1 MAA_1 H23 M_MAA2
M_MDA3 H32 DQA_2 MAA_2 G23 M_MAA3
M_MDA4 G29 DQA_3 MAA_3 G24 M_MAA4
M_MDA5 F28 DQA_4 MAA_4 H24 M_MAA5
MEMORY INTERFACE
M_MDA6 F32 DQA_5 MAA_5 J19 M_MAA6
M_MDA7 F30 DQA_6 MAA_6 K19 M_MAA7
M_MDA8 C30 DQA_7 MAA_7 J14 M_MAA8
M_MDA9 F27 DQA_8 MAA_8 K14 M_MAA9
M_MDA10 A28 DQA_9 MAA_9 J11 M_MAA10
M_MDA11 C28 DQA_10 MAA_10 J13 M_MAA11
M_MDA12 E27 DQA_11 MAA_11 H11 M_MAA12
For SSTL-1.8/SSTL-2/DDR1/GDDR1: 0.5 * VDDR1. G26 DQA_12 MAA_12 G11
M_MDA13 BA2
D For DDR3/GDDR3/GDDR4/GDDR5: 0.7 * VDDR1. M_MDA14 D26 DQA_13 MAA_13/BA2 J16 BA0
BA2 59
D
F25 DQA_14 MAA_14/BA0 L15 BA0 59
M_MDA15 BA1
A25 DQA_15 MAA_15/BA1 BA1 59
M_MDA16
M_MDA17 C25 DQA_16 E32 M_DQMA#0
DIVIDER RESISTORS GDDR5 GDDR3 DDR3 DQA_17 DQMA_0
M_MDA18 E25 E30 M_DQMA#1
M_MDA19 D24 DQA_18 DQMA_1 A21 M_DQMA#2
M_MDA20 E23 DQA_19 DQMA_2 C21 M_DQMA#3
MVREF 1.5V 1.8/1.5V 1.5V F23 DQA_20 DQMA_3 E13
M_MDA21 M_DQMA#4
M_MDA22 D22 DQA_21 DQMA_4 D12 M_DQMA#5
M_MDA23 F21 DQA_22 DQMA_5 E3 M_DQMA#6
MVREF TO PWR 40.2R 40.2R 40.2R M_MDA24 E21 DQA_23 DQMA_6 F4 M_DQMA#7
M_MDA25 D20 DQA_24 DQMA_7
M_MDA26 F19 DQA_25 H28 M_QSA0
MVREF TO GND 100R 100R 100R M_MDA27 A19 DQA_26 RDQSA_0 C27 M_QSA1
M_DQMA#[7..0] 59
M_MDA28 D18 DQA_27 RDQSA_1 A23 M_QSA2
M_MDA29 F17 DQA_28 RDQSA_2 E19 M_QSA3
M_MDA30 A17 DQA_29 RDQSA_3 E15 M_QSA4
+MVDD M_MDA31 C17 DQA_30 RDQSA_4 D10 M_QSA5
M_MDA32 E17 DQA_31 RDQSA_5 D6 M_QSA6
M_MDA33 D16 DQA_32 RDQSA_6 G5 M_QSA7
M_MDA34 F15 DQA_33 RDQSA_7
DQA_34 M_QSA[7..0] 59
1
M_MDA35 A15 H27 M_QSA#0

R556 M_MDA36 D14 DQA_35 WDQSA_0 A27 M_QSA#1
(M) 40D2R2F-GP M_MDA37 F13 DQA_36 WDQSA_1 C23 M_QSA#2
M_MDA38 A13 DQA_37 WDQSA_2 C19 M_QSA#3
M_MDA39 C13 DQA_38 WDQSA_3 C15 M_QSA#4
DQA_39 WDQSA_4
2
M_MDA40 E11 E9 M_QSA#5

M_MDA41 A11 DQA_40 WDQSA_5 C5 M_QSA#6
M_MDA42 C11 DQA_41 WDQSA_6 H4 M_QSA#7
M_MDA43 F11 DQA_42 WDQSA_7
DQA_43 M_QSA#[7..0] 59
1
R560 M_MDA44 A9 L18 ODTA0

C9 DQA_44 ODTA0 K16 ODTA0 59
C497 C499 M_MDA45 ODTA1
F9 DQA_45 ODTA1 ODTA1 59
100R2F-L1-GP-U
(M) SCD01U16V2KX-3GP SCD1U16V2KX-3GP M_MDA46

DQA_46
2
(M) (R) M_MDA47 D8 H26 CLKA0

DQA_47 CLKA0 CLKA0 59
M_MDA48 E7 H25 CLKA#0
DQA_48 CLKA0B CLKA#0 59
2
M_MDA49 A7
M_MDA50 C7 DQA_49 G9 CLKA1
F7 DQA_50 CLKA1 H9 CLKA1 59
M_MDA51 CLKA#1 (M)
A5 DQA_51 CLKA1B CLKA#1 59
M_MDA52
E5 DQA_52 G22 R141
M_MDA53 RASA#0
C3 DQA_53 RASA0B G17 RASA#0 59 1 2
M_MDA54 RASA#1 VGA_DRAM_RST#
E1 DQA_54 RASA1B RASA#1 59 MEM_RST 59
C M_MDA55 C
DQA_55
1
+MVDD M_MDA56 G7 G19 CASA#0 680R2F-GP
DQA_56 CASA0B CASA#0 59
1
M_MDA57 G6 G16 CASA#1 R147
DQA_57 CASA1B CASA#1 59
M_MDA58 G1 10KR2F-2-GP C85
M_MDA59 G3 DQA_58 H22 CSA#0_0 (M) SC68P50V2JN-1GP
DQA_59 CSA0B_0 CSA#0_0 59
1
2
M_MDA60 J6 J22 (M)
DQA_60 CSA0B_1
2
R557 M_MDA61 J1
40D2R2F-GP M_MDA62 J3 DQA_61 G13 CSA#1_0
J5 DQA_62 CSA1B_0 K13 CSA#1_0 59
(M) M_MDA63
DQA_63 CSA1B_1
2
MVREFDA K26 K20 CKEA0

J26 MVREFDA CKEA0 J17 CKEA0 59
MVREFSA CKEA1
+MVDD MVREFSA CKEA1 CKEA1 59
(M) (M) C500 R615 1 (M) 2 243R2F-2-GP MBM_CALRN0 J25 G25 WEA#0
MEM_CALRN0 WEA0B WEA#0 59
1
R612 1 2 243R2F-2-GP MBM_CALRP0 K25 H10 WEA1#

SCD01U16V2KX-3GP
R561 (R) (M)

MEM_CALRP0 WEA1B WEA#1 59
SCD1U16V2KX-3GP
C498
100R2F-L1-GP-U
G14
RSVD#2 G20 M_MAA14 59
RSVD#3 M_MAA13 59
2
VGA_DRAM_RST# L10
DRAM_RST
K8
CLKTESTA 11/06 CONFIGURATION STRAPS
L7
CLKTESTB
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
3/17 Del TP CEDAR-GP THEY MUST NOT CONFLICT DURING RESET
PIN STRAPS STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS Default Setting
External Thermal Sensor

TX_PWRS_ENB GPIO0 Trans m itter Power Savings Enable GPIO0 and GPIO1
0: 50% Tx output sw ing(Internal Pull-down) pulls ups need to be 1
1: Full Tx output sw ing s tuffed with Q5536 if
s ys tem board is
TX_DEEMPH_EN GPIO1 PCIE Trans m itter De-em phas is Enable controlling the PCIE 1
+VDDR3 0: Tx de-emphasis disabled (Internal Pull-down) s wing.
1: Tx de-emphasis enabled
R632 1 (M) 2 10KR2J-3-GP BIF_GEN2_EN_A GPIO2 PCIE Gen2 Enable 1

55 GPIO_VGA_00
R634 1 (M) 2 10KR2J-3-GP 0: Advertises the PCIE device as 2.5GT/s capable at pow er-on
(Internal Pull-down)
B 55 GPIO_VGA_01 1: Advertises the PCIE device as 5.0GT/s capable at pow er-on B
R627 1 (M) 2 10KR2J-3-GP BIF_VGA DIS GPIO9 VGA Control GPIO9 pull up needs 0
55 GPIO_VGA_02
0: VGA controller capacity enabled to be s tuffed with
1: VGA controller capacity disabled (for multi-GPU) Q5537 if s ys tem
R178 1 (R) 2 10KR2J-3-GP board is controlling
55 GPIO_VGA_09
the VGA capacity
R176 1 (R) 2 10KR2J-3-GP

55 GPIO_VGA_11 1 2 10KR2J-3-GP
R173 (R) ROMIDCFG[2:0] GPIO[13:11] Serial ROM type or Memory Aperture Size Select (Internal Pull-down) XXX
55 GPIO_VGA_12 1 2 10KR2J-3-GP
R174 (M) If GPIO22 = 0, defines memory aperture size
55 GPIO_VGA_13
If GPIO22 = 1, defines ROM type
100 - 512Kbit M25P05A (ST)
1 2 10KR2J-3-GP 101 - 1Mbit M25P10A (ST)
R624 (M)
55 GPIO_VGA_22 101 - 2Mbit M25P20 (ST)
101 - 4Mbit M25P40 (ST)
101 - 8Mbit M25P80 (ST)
100 - 512Kbit Pm25LV512 (Chingis)
101 - 1Mbit Pm25LV010 (Chingis)
BIOS_ROM_EN GPIO22 Enable external BIOS ROM device (Internal Pull-down) 0
R659 1 (R) 2 10KR2J-3-GP 0: Disabled
31,55 GMCH_VSYNC 1 2 10KR2J-3-GP
R660 (R) 1: Enabled
31,55 GMCH_HSYNC
0203: Rannie modify AUD[1]

AUD[0]
HSYNC
VSYNC
00 - No audio function
01 - Audio for DP only
XX
10 - Audio for DP and HDMI if dongle is detected

11 - Audio for both DP and HDMI
R205 1 (R) 2 10KR2J-3-GP HDMI must only be enabled on systems that are legally entitled. It is the
55 VSYNC_DAC2 responsibility of the system designer to ensure that the system is entitled to
R206 1 (R) 2 10KR2J-3-GP support this feature.
55 HSYNC_DAC2
VIP_DEVICE_STRAP_ENA V2SYNC VIP Device Strap Enable (Internal Pull-down) 0
0: Slave VIP host port devices present
1: No slave VIP host port devices reporting presence
Res erved H2SYNC Reserved (Internal Pull-down) 0
Reserve Parts Internal use only. THIS PAD HAS AN INTERNAL PULL- DOWN
AND MUST BE 0 V AT RESET.
The pad may be left unconnected, how ever, if it is connected
A to additional logic on the board, the logic A
must not allow this signal to be driven or pulled to any
value except GND at reset.
Wistron Corporation
Title
Madison Memory / Straps
A2
JV71-TR8 1B
5 4 3 2 1
5 4 3 2 1
72.51G63.C0U gDDRIII 64M*16 800MHz VRAM 54nm (Orion die) FBGA96P HYNIX H5TQ1G63BFR-12C
72.41164.H0U gDDR3 64M*16 800MHz VRAM E die FBGA 96P SAMSUNG K4W1G1646E-HC12
D D
58 M_MDA[63..0]
M_MDA0
CHANNEL A: 256MB/512MB DDR3
M_MDA1 AFBRAM5 AFBRAM6 AFBRAM7 AFBRAM8
M_MDA2
M_MDA3 VREFC_U1 M8 E3 M_MDA29 VREFC_U2 M8 E3 M_MDA17 VREFC_U3 M8 E3 M_MDA58 VREFC_U4 M8 E3 M_MDA32
M_MDA4 VREFD_U1 H1 VREFCA DQL0 F7 M_MDA25 VREFD_U2 H1 VREFCA DQL0 F7 M_MDA23 VREFD_U3 H1 VREFCA DQL0 F7 M_MDA62 VREFD_U4 H1 VREFCA DQL0 F7 M_MDA36
M_MDA5 VREFDQ DQL1 F2 M_MDA31 VREFDQ DQL1 F2 M_MDA18 VREFDQ DQL1 F2 M_MDA57 VREFDQ DQL1 F2 M_MDA34
M_MDA6 M_MAA0 N3 DQL2 F8 M_MDA24 M_MAA0 N3 DQL2 F8 M_MDA19 M_MAA0 N3 DQL2 F8 M_MDA61 M_MAA0 N3 DQL2 F8 M_MDA37
M_MDA7 M_MAA1 P7 A0 DQL3 H3 M_MDA28 M_MAA1 P7 A0 DQL3 H3 M_MDA21 M_MAA1 P7 A0 DQL3 H3 M_MDA56 M_MAA1 P7 A0 DQL3 H3 M_MDA33
M_MDA9 M_MAA3 N2 A2 DQL5 G2 M_MDA30 M_MAA3 N2 A2 DQL5 G2 M_MDA20 M_MAA3 N2 A2 DQL5 G2 M_MDA59 M_MAA3 N2 A2 DQL5 G2 M_MDA35
M_MDA11 M_MAA5 P2 A4 DQL7 M_MAA5 P2 A4 DQL7 M_MAA5 P2 A4 DQL7 M_MAA5 P2 A4 DQL7
M_MDA12 M_MAA6 R8 A5 M_MAA6 R8 A5 M_MAA6 R8 A5 M_MAA6 R8 A5
M_MDA13 M_MAA7 R2 A6 D7 M_MDA15 M_MAA7 R2 A6 D7 M_MDA2 M_MAA7 R2 A6 D7 M_MDA47 M_MAA7 R2 A6 D7 M_MDA50
M_MDA14 M_MAA8 T8 A7 DQU0 C3 M_MDA11 M_MAA8 T8 A7 DQU0 C3 M_MDA6 M_MAA8 T8 A7 DQU0 C3 M_MDA43 M_MAA8 T8 A7 DQU0 C3 M_MDA53
M_MDA15 M_MAA9 R3 A8 DQU1 C8 M_MDA14 M_MAA9 R3 A8 DQU1 C8 M_MDA0 M_MAA9 R3 A8 DQU1 C8 M_MDA46 M_MAA9 R3 A8 DQU1 C8 M_MDA51
M_MDA16 M_MAA10 L7 A9 DQU2 C2 M_MDA10 M_MAA10 L7 A9 DQU2 C2 M_MDA4 M_MAA10 L7 A9 DQU2 C2 M_MDA42 M_MAA10 L7 A9 DQU2 C2 M_MDA52
M_MDA17 M_MAA11 R7 A10/AP DQU3 A7 M_MDA12 M_MAA11 R7 A10/AP DQU3 A7 M_MDA3 M_MAA11 R7 A10/AP DQU3 A7 M_MDA44 M_MAA11 R7 A10/AP DQU3 A7 M_MDA49
M_MDA18 M_MAA12 N7 A11 DQU4 A2 M_MDA9 M_MAA12 N7 A11 DQU4 A2 M_MDA7 M_MAA12 N7 A11 DQU4 A2 M_MDA41 M_MAA12 N7 A11 DQU4 A2 M_MDA54
M_MDA19 M_MAA13 T3 A12/BC DQU5 B8 M_MDA13 M_MAA13 T3 A12/BC DQU5 B8 M_MDA1 M_MAA13 T3 A12/BC DQU5 B8 M_MDA45 M_MAA13 T3 A12/BC DQU5 B8 M_MDA48
M_MDA20 M_MAA14 T7 A13 DQU6 A3 M_MDA8 M_MAA14 T7 A13 DQU6 A3 M_MDA5 M_MAA14 T7 A13 DQU6 A3 M_MDA40 M_MAA14 T7 A13 DQU6 A3 M_MDA55
M_MDA21 M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7
M_MDA22 A15 A15 A15 A15
M_MDA23 +MVDD +MVDD +MVDD +MVDD
M_MDA24 M2 B2 M2 B2 M2 B2 M2 B2
58 BA0 BA0 VDD#B2 58 BA0 BA0 VDD#B2 58 BA0 BA0 VDD#B2 58 BA0 BA0 VDD#B2
M_MDA25 N8 D9 N8 D9 N8 D9 N8 D9
58 BA1 BA1 VDD#D9 58 BA1 BA1 VDD#D9 58 BA1 BA1 VDD#D9 58 BA1 BA1 VDD#D9
M_MDA26 M3 G7 M3 G7 M3 G7 M3 G7
58 BA2 BA2 VDD#G7 58 BA2 BA2 VDD#G7 58 BA2 BA2 VDD#G7 58 BA2 BA2 VDD#G7
M_MDA27 K2 K2 K2 K2
M_MDA28 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
M_MDA29 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
M_MDA30 J7 VDD#N1 N9 J7 VDD#N1 N9 J7 VDD#N1 N9 J7 VDD#N1 N9
58 CLKA0 K7 CK VDD#N9 R1 58 CLKA0 K7 CK VDD#N9 R1 58 CLKA1 K7 CK VDD#N9 R1 58 CLKA1 K7 CK VDD#N9 R1
M_MDA31
58 CLKA#0 K9 CK VDD#R1 R9 58 CLKA#0 K9 CK VDD#R1 R9 58 CLKA#1 K9 CK VDD#R1 R9 58 CLKA#1 K9 CK VDD#R1 R9
M_MDA32
58 CKEA0 CKE VDD#R9 58 CKEA0 CKE VDD#R9 58 CKEA1 CKE VDD#R9 58 CKEA1 CKE VDD#R9
M_MDA33
M_MDA34
M_MDA35 K1 A1 K1 A1 K1 A1 K1 A1
58 ODTA0 L2 ODT VDDQ#A1 A8 58 ODTA0 L2 ODT VDDQ#A1 A8 58 ODTA1 L2 ODT VDDQ#A1 A8 58 ODTA1 L2 ODT VDDQ#A1 A8
M_MDA36
58 CSA#0_0 J3 CS VDDQ#A8 C1 58 CSA#0_0 J3 CS VDDQ#A8 C1 58 CSA#1_0 J3 CS VDDQ#A8 C1 58 CSA#1_0 J3 CS VDDQ#A8 C1
M_MDA37
58 RASA#0 K3 RAS VDDQ#C1 C9 58 RASA#0 K3 RAS VDDQ#C1 C9 58 RASA#1 K3 RAS VDDQ#C1 C9 58 RASA#1 K3 RAS VDDQ#C1 C9
M_MDA38
58 CASA#0 L3 CAS VDDQ#C9 D2 58 CASA#0 L3 CAS VDDQ#C9 D2 58 CASA#1 L3 CAS VDDQ#C9 D2 58 CASA#1 L3 CAS VDDQ#C9 D2
M_MDA39
58 WEA#0 WE VDDQ#D2 E9 58 WEA#0 WE VDDQ#D2 E9 58 WEA#1 WE VDDQ#D2 E9 58 WEA#1 WE VDDQ#D2 E9
M_MDA40
M_MDA41 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
M_MDA42 M_QSA3 F3 VDDQ#F1 H2 M_QSA2 F3 VDDQ#F1 H2 M_QSA7 F3 VDDQ#F1 H2 M_QSA4 F3 VDDQ#F1 H2
M_MDA43 M_QSA1 C7 DQSL VDDQ#H2 H9 M_QSA0 C7 DQSL VDDQ#H2 H9 M_QSA5 C7 DQSL VDDQ#H2 H9 M_QSA6 C7 DQSL VDDQ#H2 H9
M_MDA44 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9
M_MDA45
C M_MDA46 M_DQMA#3 E7 A9 M_DQMA#2 E7 A9 M_DQMA#7 E7 A9 M_DQMA#4 E7 A9 C
M_MDA47 M_DQMA#1 D3 DML VSS#A9 B3 M_DQMA#0 D3 DML VSS#A9 B3 M_DQMA#5 D3 DML VSS#A9 B3 M_DQMA#6 D3 DML VSS#A9 B3
M_MDA48 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
M_MDA49 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
M_MDA50 M_QSA#3 G3 VSS#G8 J2 M_QSA#2 G3 VSS#G8 J2 M_QSA#7 G3 VSS#G8 J2 M_QSA#4 G3 VSS#G8 J2
M_MDA51 M_QSA#1 B7 DQSL VSS#J2 J8 M_QSA#0 B7 DQSL VSS#J2 J8 M_QSA#5 B7 DQSL VSS#J2 J8 M_QSA#6 B7 DQSL VSS#J2 J8
M_MDA52 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
M_MDA53 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
M_MDA54 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
M_MDA55 T2 VSS#P1 P9 T2 VSS#P1 P9 T2 VSS#P1 P9 T2 VSS#P1 P9
58 MEM_RST RESET VSS#P9 58 MEM_RST RESET VSS#P9 58 MEM_RST RESET VSS#P9 58 MEM_RST RESET VSS#P9
M_MDA56 T1 T1 T1 T1
M_MDA57 L8 VSS#T1 T9 L8 VSS#T1 T9 L8 VSS#T1 T9 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
1
M_MDA58
1
1
M_MDA59 R551 R577
M_MDA60 R161 B1 240R2F-1-GP B1 R127 B1 240R2F-1-GP B1
M_MDA61 240R2F-1-GP VSSQ#B1 B9 (M) VSSQ#B1 B9 240R2F-1-GP VSSQ#B1 B9 (M) VSSQ#B1 B9
M_MDA62 (M) VSSQ#B9 D1 VSSQ#B9 D1 (M) VSSQ#B9 D1 VSSQ#B9 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
2
M_MDA63 D8 D8 D8 D8
2
2
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
58 M_MAA[14..0] L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
M_MAA0 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
M_MAA1 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
M_MAA2 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
M_MAA3 100-BALL 100-BALL 100-BALL 100-BALL
M_MAA4 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
M_MAA5 H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
M_MAA6
M_MAA7
(M) (M) (M) (M)
M_MAA8
M_MAA9
M_MAA10
M_MAA11
M_MAA12 +MVDD +MVDD +MVDD +MVDD
M_MAA13
M_MAA14
1
1
(M) (M)
58 M_DQMA#[7..0]
(M) R159 (M) R553 R121 R576
M_DQMA#0 4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP
2
2
M_DQMA#1 VREFC_U1 VREFC_U2 VREFC_U3 VREFC_U4
M_DQMA#2
1
1
M_DQMA#3
1
1
M_DQMA#4 C106 C486 R552 C76
M_DQMA#5 SCD1U16V2KX-3GP R160 SCD1U16V2KX-3GP 4K99R2F-L-GP SCD1U16V2KX-3GP R120 C511 R575
M_DQMA#6 (M) 4K99R2F-L-GP (M) (M) (M) 4K99R2F-L-GP SCD1U16V2KX-3GP 4K99R2F-L-GP
2
2
M_DQMA#7 (M) (M) (M) (M)
2
2
B 58 M_QSA[7..0] B
M_QSA0
M_QSA1
M_QSA2 +MVDD +MVDD +MVDD +MVDD
M_QSA3
M_QSA4
1
1
M_QSA5
M_QSA6
M_QSA7 (M) (M)
(M) R131 (M) R573 R574 R554
58 M_QSA#[7..0]
4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP
2
2
M_QSA#0 VREFD_U1 VREFD_U2 VREFD_U3 VREFD_U4
M_QSA#1
1
1
M_QSA#2
1
1
M_QSA#3 C78 R122 C507 R572 C517 R578 C492 R555
M_QSA#4 SCD1U16V2KX-3GP 4K99R2F-L-GP SCD1U16V2KX-3GP 4K99R2F-L-GP SCD1U16V2KX-3GP 4K99R2F-L-GP SCD1U16V2KX-3GP 4K99R2F-L-GP
M_QSA#5 (M) (M) (M) (M) (M) (M) (M) (M)
2
2
M_QSA#6
2
2
M_QSA#7
58 CLKA0
2
R123
56R2J-4-GP
(M)
+MVDD
1
RAM_CLK_R0 1 2 C79
2
SCD01U16V2KX-3GP
R124 (M) C105 C489 C488 C512 C109 C115 C509 C112 C111 C491 C476 C61 C478 C75 C108 C482 C483
56R2J-4-GP C480
1
1
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
58 CLKA#0
1
2
(M)
58 CLKA1
2
R126
(M)
56R2J-4-GP (M) (M) (M) (M) (M) (M) (M) (M) (M) (M)
(M) +MVDD (M) (M) (M) (M) (M) (M) (M)
2 1
RAM_CLK_R1 1 2 C80
R125 SCD01U16V2KX-3GP C84 C64 C117 C113 C114 C68 C81 C73 C495 C104 C110 C86 C609 C96 C70 C67 C69
A A
56R2J-4-GP (M) C71
1
1
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
58 CLKA#1
1
2
(M)
DIS / UMA
(M)
(M) (M) (M) (M)
(M) (M) (M) (M) (M) (M) (M) (M) (M) (M)
(M) (M) (M) Wistron Corporation
Title
VRAM ( 3 of 4 ) A0
D
JV71-TR8 1B
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserved
B B
A DIS / UMA A
Wistron Corporation
Title
VRAM Rank 2 (Reserve)
A3
B305 1B
5 4 3 2 1
5 4 3 2 1
POWER UP SEQUENCE (not to scale) R237 1 (R) 2 0R5J-5-GP
Q31 (M)
3D3V_S0 AO3413-GP +VDDR3
(M)
S D R203 1 2
5K1R2F-2-GP VDDC_EN 53
1
BC1 (R)
SC1U10V2KX-1-LL-GP
G
3D3V_S0
PWR_EN (M)
ID max = 2.5A
2
+PWR_SRC
1
C257
SC1U10V3ZY-6GP
R267
D D
2
10KR2J-3-GP
(M)
R265
2
VDD3EN# 1 2
+5VRUN (M)
10KR2J-3-GP
1
C262 (M)
2
(M) SC1U10V3ZY-6GP
+3VRUN Q32 (M)
R260 2N7002-11-GP
2 1 G
62 CTFb
> 1ms
1KR2J-1-GP
S
PWR_EN HFine
LOver-temperature GPU_PWR_EN_#
VDDR3, A2VDD +VDDR3 should ramp before or simultaneously with +VDDC.
D
(M)
+VDDR3 +VDDC should ramp before +1.8V_REG and +1.0V_REG. Q36 (M)
R279 2N7002-11-GP
2 1 G
5,24,50 SB_PWRGD
1KR2J-1-GP
S
VDDC, VDDCI
+VDDC
HSystem Power rail up sucessfully
LSystem Power rail up fail
C
VDDR1, MVDDQ/C C
+MVDD
VDDR4, VDD_CT, TSVDD, PCIE_VDDR, PCIE_PVDD, DPLL_PVDD, DPx_PVDD,

+1.8V_REG DPx_VDD18, MPV18, SPV18, AVDD, VDD1DI, A2VDDQ, VDD2DI
2009/12/23
PCIE_VDDC, DPLL_VDDC, DPx_VDD10, SPV10
+1.0V_REG
+1.0V_REG AND +1.8V_REG RAMP UP SEQUENCE CAN BE INTERCHANGED.
< 20ms
PWR_GODD +1P8V For GPU 3D3V_S0

2009/12/23
5V_S0 3D3V_S0
< 90ms
1
Iomax=1.3A
1
C782 BC5 (M) R700
SC10U6D3V3MX-LL-GP SC1U10V2KX-1-LL-GP 10KR2J-3-GP
(M)
2
+1.8V_REG
2
U20
R250
0R0805-PAD 5
B VIN#5 B
1 2 V_1P8_GPU_R 4 6
3 VOUT#4 VCNTL 7 R294
1.0V_REG_EN
R246 1 215K4R2F-GP V_1P8_GPU_FB 2 VOUT#3 POK 8 V_1P8_GPU_EN 2 1
1 FB EN 9 8208A_PGOOD_VGA 52,53
GND VIN#9 3D3V_S0
1
C264 C263
10KR2J-3-GP
SC10U6D3V3MX-LL-GP C254 SC10U6D3V3MX-LL-GP
2009/12/23
1
(R) SCD1U16V2KX-3GP C258 1 2 SC150P50V2JN-3GP APL5930KAI-TRG-GP (R)
2
C272
(R) SCD1U16V2KX-3GP
1
2
R249
Vo=0.8*(1+(R1/R2))
02/02 1D5V_MEM 3D3V_S0
12KR2F-L-GP
High Enable
2
+1.0V_REG
+1.0V_REG
1
R909 R910 R911

5V_S0
C196 SC10U6D3V3MX-LL-GP
0R0805-PAD 0R0805-PAD 0R5J-5-GP
Iomax=1.7A
C221 SCD1U16V2KX-3GP
(R)
1
SC10U6D3V3MX-LL-GP
C195
2
(M) (M) (M)

+1.0V_REG_VIN
2
1
BC3 (M)
SC1U10V2KX-1-LL-GP
2010/01/07
2
+1.0V_REG
02/02
1
C238 (M)
SC10U6D3V3MX-LL-GP R912 (M)
6
U13 0R0805-PAD
2
1 2
VCNTL
7 5
54 MXM_PWRGD POK VIN
VIN
9 R197 (M) VOUT = Vref x (1 + R1/R2)
1.0V_REG_EN 8
EN VOUT
3 V_1P0_R 1
0R0805-PAD
2 Vref = 0.8V
A 4 A
VOUT R196
3KR2J-2-GP
1
(R) 2 V_1P0_FB 2 1 (R) (M) (M)

GND
C234 FB C198 C185 C197

SCD1U16V2KX-3GP DIS / UMA
C186 SC10U6D3V3MX-LL-GP SCD1U16V2KX-3GP SC10U6D3V3MX-LL-GP
2
SC27P50V2JN-2-GP
1
(M)
APL5912-KAC-GP
(M) 1 2 Wistron Corporation
1
R198
2010/01/07 Taipei Hsien 221, Taiwan, R.O.C.
12KR2F-L-GP
(M)
Title
GPU PWR Sequence
Vo=0.8*(1+(R1/R2))
2

R1/R2 = 0.25 C
B305 1B
5 4 3 2 1
5 4 3 2 1
Critial Temperature Fault

3D3V_S0
+12V_S0 DCBATOUT R9
2009/12/23 1 2
2
(M) (R) (M)
C12
SC1U10V2KX-1-LL-GP
C11
SC1U10V2KX-1-LL-GP
R43 R19
4D7R3J-L1-GP
D
20KR2J-L2-GP 20KR2J-L2-GP
Q4
2N7002-11-GP (M)
1
G (M) (M)
1
1KR2J-1-GP
S
R15
2
0R2J-2-GP 3D3V_S0
D D
1 R37 2 1 Q8 1 PMBS3906-GP
23,54 MXMRST# Q1 (R)
(M) CTF_SET2
2
1
1
(M) PMBS3904-1-GP (M)
HFine
3
2
R2 R101
3
470KR2F-GP
R42
20KR2J-L2-GP 1 Q9 (M)
10KR2J-3-GP
(M) LOver-temperature
1
(M)
2
(M) PMBS3904-1-GP R64
2
10KR2J-3-GP CTFb 61
(M)
3
R69
2
1 2 CTF_VCNTL 1 R70 2 1 Q19
5K1R2F-2-GP (M)
SC1U6D3V2KX-GP
C34
PMBS3904-1-GP
1KR2J-1-GP
2
(M) R65
3
3D3V_S0 100KR2J-1-GP (M) R71
2
CTF_GATED2 1 R24 2 CTF_SET3 1 Q12 (M) (M) 100KR2J-1-GP
2 (M) (M)
2
HOver-temperature R25
1KR2J-1-GP
PMBS3904-1-GP
2
5K1R2F-2-GP
LFine (M) (M)
1
R20
3
3
2 (M) 1 CTF_TRIP 1 Q3 1 Q2 CTF_FB_CNTL 1 2
55 GPIO19_CTF
(M) (M)
2
PMBS3904-1-GP PMBS3904-1-GP R51

2K2R2J-2-GP
2
2
CTF SHOULD BE R10 5K1R2F-2-GP
ACTIVE HI. 1KR2J-1-GP (M)
(M)
1
R52 2 1 0R2J-2-GP
CTF Bypass (R)

C C
B B
A A
DIS / UMA
Wistron Corporation
Title
CTF/PPLAY
C
B305 1B
5 4 3 2 1

4 AMD RS780L+SB710 Block Diagram. AMD 45W - CPU AM3 - Athlon II. HyperTransport LINK AMD RS780L. HyperTransport LINK CPU I - F INTEGRATED GRAPHICS

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4 AMD RS780L+SB710 Block Diagram. AMD 45W - CPU AM3 - Athlon II. HyperTransport LINK AMD RS780L. HyperTransport LINK CPU I - F INTEGRATED GRAPHICS

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8 7 6 5 4 3 2 1

SHEET AMD RS780L+SB710 PROJECT NAME:B305

Sheet 8 EXTERNAL CLOCK GENERATOR GENERATOR

Sheet 9 CPU HT INTERFACE SO-DIMM2 HyperTransport

Sheet 11 CPU MEM_A 1920 x 1080 for 21.5"

Sheet 15 RS780L-HT LINK0 I/F INTEGRATED GRAPHICS

Sheet 19 NB 5th (Reserved) RGB

Sheet 24 SB710-ACPI/GPIO/USB/AZALIA VIA

Sheet 36 USB device Rear IO AZALIA HD AUDIO

Sheet 41 ITE 8758E

Sheet 57 Cedar ( 4 of 5 ) DP POWER

Sheet 59 VRAM Rank1 PS2 KB/MS

Sheet 62 CTF/PPLAY Size

RT8209A SIR840DP*2 Imax=20A Imax=20A APL5912 Imax=3A Imax=4.5A

SIR840DP*2 Imax=34A SB CORE 0.6A

PWM CLOCK (S0, S1)

NCP5393M 2 Phase Design 1.2V S5 PW 0.22A

+MVDD 3.3V S5 PW 0.01A

3D3V_S0 LDO 1D8V(NB)

2 PAIR MEM CLK

VIN PGOOD 18 SB_PWRGD

VIN PGOOD 12 3D3V_S5

RT8105 POWER PCIRST_OUT2#/GP12(96)

SLP_S4* 10 2 PANSHW#(35) 5VSB_CTRL(8) 3

RESET/POWER GOOD MAP

5 4 3 2 Date: Saturday, April 24,

IMG_GPIO13 E20 CPU_SIC

<Variant Nam e>

2nd FAN 11/03 Delete 3PIN CTRL Schematic

H17 H13 H22 H15

PCB MOUNTING HOLES-PTH

H5 H6 H7 H8 H9 H23 H24 H10

GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A GEN315R158-8-F-A

Wis tron Incorporate d

510R2J-1-GP H9 CPU_TEST28_L 1 CPU_TEST24 2

LAYOUT: PLACE WITHIN 1 INCH OF CPU C18 L30

1 TP_MEM_A_CLK7_P AG21 AE14 MEM_MA_DATA63

<Variant Nam e>

C575 C161 C154

SCD01U16V2KX-3GP SCD01U16V2KX-3GP SCD01U16V2KX-3GP

VDD DECOUPLING CAP BRIDGE-CAP

C644 C645 C646 C648 C647

SC10U6D3V5MX-3-LL-GP SC10U6D3V5MX-3-LL-GP SC10U6D3V5MX-3-LL-GP SC4D7U10V5ZY-3-LL-GP SC4D7U10V5ZY-3-LL-GP

C604 C564 C565 C649 C605 C522

SC4D7U10V5ZY-3-LL-GP SCD01U16V2KX-3GP SCD01U16V2KX-3GP

C688 (R) SC2D2U6D3V2MX-GP

SC22U6D3V5MX-2GP -- CHIP CAP C 22U 6.3V M0805 X5R

GFX_TX0P (M) C150 1 2 SCD1U10V2KX-4-LL-GP PEG_TXP0

23 A_RX0P A_RX0P (71.RS780.M15) VCC_NB=VCC1D1V

GFX_TX0,TX1,TX2 and TX3

RS780L-PCIE LINK I/F

Date: Saturday, April 24, 2010 Sheet 16 of 62

SC2D2U6D3V3M X-1-GP (71.RS780.M15)

Selects Loading of STRAPS From EEPROM

or use default values if not connected

24 SUS_ST AT E# SUS_ST AT E# 3D3V_S0 11/04 3D3V_S0 11/04 3D3V_S0 11/04

<Variant Nam e>

2ND = 68.00216.161 C99 C519 C513 C505 D22 P9

SC4D7U6D3V3KX-GP SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP SCD1U10V2KX-4-LL-GP V9

C666 C179 C682 C677 C167 C690

C510 VDD18_MEM_1 AE11 H11 1 2

1.8V 25mA RS780L-GP C536 C538

Date: Saturday, April 24, 2010 Sheet 18 of 62