North South University

Course Outline

CSE 332 Computer Organization and Architecture

Course Schedule/Timing: Lecture – 3 Hours/week, Lab – 3 Hours/week

Instructor: Tanzilur Rahman (Tnr)

Office: SAC 1022
Office Hours: Check My Routine
E-mail : tanzilur.rahman@northsouth.edu
Phone: 02-55668200 Ext. 6182
Course Web: https://sites.google.com/site/neuro11school/

Lecture Time: ST 9:40 – 11:10

Lecture Room: TBA

Lab Room: Digital Microprocessor Laboratory, 5th Floor of SAC Building

Course Description:
Simply, a computer is a set of components (Processor, Memory and Storage, Input/Output
Devices) interconnected (by Bus) in such a way as to enable the executionof a program (set of
instructions) stored in memory.
This course introduces students to the basic concepts of computers, their design and how they
work. It encompasses the definition of the machine's instruction set architecture, its use in
creating a program, and its implementation in hardware. The course addresses the bridge
between gate logic and executable software, and includes programming both in assembly
language (representing software) and HDL (representing hardware).
We will study modern computer principles using a typical processor and emphasize system-level
issues, understanding process performance, and the use of abstraction as atool to manage
complexity. We then learn how e-cient memory systems are designed to work closely with the
processor. Next, we study input/output (I/O) systems which bring the processor and memory
together with a wide range of devices. Finally, we introduce systems with many processors.

Course Objective:
The objectives of this course are

1. to develop basic understanding of computer organization: roles of processors, main

memory, and input/output devices.
2. to evaluate/measure the performance of a computing system for comparing with other
similar systems
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3. to familiar with architectural design concepts related to different building blocks of a

processor.
4. to employ specialized knowledge of subsystems like data-path, memory and control unit
components to design a RISC processing element
5. to define processor specification and instruction set architecture.
6. to understand memory organization, including cache structures and virtual memory
schemes.

Course Learning Outcomes (COs):

Upon Successful completion of this course, students will be able to:

Sl. CO Description Weightage (%)

CO1 explain computer organization: roles of processors, main 10%
memory, and input/output devices.
CO2 evaluate the performance of a computing system 10%
CO3 analyze instruction set architecture and different building 40%
blocks of processor for designing more efficient processors
CO4 Design an instruction set architecture and subsystems of 40%
central processing unit.

Mapping of CO-PO

Sl. CO Description Program Bloom’s Delivery methods Assessment

Outcome taxonomy and activities tools
domain/level
(C: Cognitive
P: Psychomotor
A: Affective)
explain computer organization: roles
a C1 Lectures,Notes Quiz
of processors, main memory, and
CO1
input/output devices.

evaluate the performance of a C5 Lectures,Notes Quiz/Exam

CO2
computing system d
CO3 analyze instruction set architecture
and different building blocks of
processor for a C4 Lectures, Project
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Notes,Lab Report/Assignment
Design an instruction set
CO4 architecture and subsystems of c C6 Lectures,Notes,La Project
central processing unit. b demonstration

Pre-requisites CSE 231 Corequisites CSE 332L

Textbook:
Computer Organization and Design
By David A. Patterson, John L. Hennessy, 5thed

Reference:
Any good textbook on Digital Logic Design

Distribution of Points:

*Digital Laboratory ------------------------------------ 20 %

Attendance ---------------------- 5%
Project & Assignment --------------------------------- 25 %
Quizzes ------------------------------------------------- 10 %
Term Examination --------------------------------------- 15 %
Final Examination (comprehensive) ---------------------- 25 %

*Must obtain 60% marks in CSE332L

Make-up Policy:
No make-up testes for the missed Term Examinations and Quizzes.

Course Topics Chapter Min.

(4th Ed.) Coverage
The history of computers. Computer generations. 1.1-1.4 3 hours
Computer families and developments,
Computer Performance: Performance metrics &
evaluation
Instruction set Design: 2.1-2.7 6 hours
  Instruction representation. 
  Addressing modes.
  Instructions for making decisions
Arithmetic for computers: Ch. 3 6 hours
   ALU Design and Implementation
   Multiplication Unit
  Floating Point
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Datapath and Control: 4.1-4.5, 4.10 6 hours

  Register transfer and Interconnection Structures
  Data path Design
  ASM Chart and Control Unit Design
  Single and Multi-cycle CPU Data-path Design
Pipelining 4.1-4.5, 4.10 6 hours
  Data Hazards
  Stalls, Forwarding, Scheduling
  Branch hazards, Dynamic Prediction
CPU Control Unit
  Design and Implementation 6 hours

Memory:  5.1-5.6 3 hours

 Memory hierarchy
  Principle of locality
  Caches and their performance issues
 Virtual memory

Course components:
 
1. Lectures: Attendance and participation of all of them is strongly encouraged.

2. Laboratory: You must pass in your lab to attain a passable grade in theory. 20% marks from
your lab will be directly added to your theory 

3. Assignments:  You will be given some design assignments. You will use pen and papers and
tools to solve those problems.

4. Projects: You will have to submit a hardware design project at the end of the semester. You
will work on the project as a group.

5. Exams: There will be one midterm, one final exam and no make-ups. 

Semester Calendar
Week Activity To be covered
W1 Lecture Intro, L1, L2
W2 Lecture L2, L3.1
W3 Lecture, Quiz Q1, L3.1, L3.2
W4 Lecture L3.2, L4.1
W5 Lecture, Quiz Q2, L4.1, L4.2
W6 Lecture, Midterm L5.1, M
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W7 Lecture -----------
W8 Lecture Review L5.1, L5.2
W9 Lecture, Quiz L6.1, Q3
W10 Lecture, L6.2, L7
W11 Lecture, Quiz L7, Q4
W12 Lecture L8, Review
W13 Lecture, Final Exam Review, Final Exam

Design Your Own CPU

One of the course objective is to be able to design a complete CPU system. It starts with
learning about ISA, advanced ALU, data path and control, pipelining in theory. In order to make
this learning more effective a step by design of the complete CPU system is carried out through
pen and paper, simulation tools, hardware etc. Students work in a group and try to develop
small pieces and finally connect them together to get their cpu as explained in the following
diagram.

Further details are explained in Project Outline.