LCD TV: Service Manual

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LCD TV
SERVICE MANUAL
CHASSIS : LD91B
MODEL : 32LH5000 32LH5000-ZB

MODEL : 32LH5010 32LH5010-ZD
MODEL : 32LH5020 32LH5020-ZE
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL61862201 (0904-REV00) Printed in Korea

CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ..................................................................................3
SPECIFICATION ........................................................................................6
ADJUSTMENT INSTRUCTION .................................................................9
BLOCK DIAGRAM...................................................................................14
EXPLODED VIEW .................................................................................. 15
SVC. SHEET ...............................................................................................
Copyright ©2009 LG Electronics. Inc. All right reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1W), keep the resistor 10mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer, AC Volt-meter
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
shock. such as WATER PIPE,
To Instrument's CONDUIT etc.
0.15uF
Leakage Current Cold Check(Antenna Cold Check) exposed
With the instrument AC plug removed from AC source, connect an METALLIC PARTS
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC 1.5 Kohm/10W
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc. When 25A is impressed between Earth and 2nd Ground
If the exposed metallic part has a return path to the chassis, the for 1 second, Resistance must be less than 0.1 Ω
measured resistance should be between 1MΩ and 5.2MΩ.
*Base on Adjustment standard
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service unit under test.
manual and its supplements and addenda, read and follow the 2. After removing an electrical assembly equipped with ES
SAFETY PRECAUTIONS on page 3 of this publication. devices, place the assembly on a conductive surface such as
NOTE: If unforeseen circumstances create conflict between the aluminum foil, to prevent electrostatic charge buildup or
following servicing precautions and any of the safety precautions on exposure of the assembly.
page 3 of this publication, always follow the safety precautions. 3. Use only a grounded-tip soldering iron to solder or unsolder ES
Remember: Safety First. devices.
4. Use only an anti-static type solder removal device. Some solder
General Servicing Precautions removal devices not classified as "anti-static" can generate
1. Always unplug the receiver AC power cord from the AC power electrical charges sufficient to damage ES devices.
source before; 5. Do not use freon-propelled chemicals. These can generate
a. Removing or reinstalling any component, circuit board electrical charges sufficient to damage ES devices.
module or any other receiver assembly. 6. Do not remove a replacement ES device from its protective
b. Disconnecting or reconnecting any receiver electrical plug or package until immediately before you are ready to install it.
other electrical connection. (Most replacement ES devices are packaged with leads
c. Connecting a test substitute in parallel with an electrolytic electrically shorted together by conductive foam, aluminum foil
capacitor in the receiver. or comparable conductive material).
CAUTION: A wrong part substitution or incorrect polarity 7. Immediately before removing the protective material from the
installation of electrolytic capacitors may result in an leads of a replacement ES device, touch the protective material
explosion hazard. to the chassis or circuit assembly into which the device will be
installed.
2. Test high voltage only by measuring it with an appropriate high CAUTION: Be sure no power is applied to the chassis or circuit,
voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged
Do not test high voltage by "drawing an arc". replacement ES devices. (Otherwise harmless motion such as
3. Do not spray chemicals on or near this receiver or any of its the brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity
4. Unless specified otherwise in this service manual, clean sufficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10% (by volume) Acetone and 90% (by 1. Use a grounded-tip, low-wattage soldering iron and appropriate
volume) isopropyl alcohol (90%-99% strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500°F to 600°F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500°F to 600°F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500°F to 600°F)
Some semiconductor (solid-state) devices can be damaged easily b. First, hold the soldering iron tip and solder the strand against
by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors and component lead and the printed circuit foil, and hold it there
semiconductor "chip" components. The following techniques only until the solder flows onto and around both the
should be used to help reduce the incidence of component component lead and the foil.
damage caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. splashed solder with a small wire-bristle brush.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through Circuit Board Foil Repair
which the IC leads are inserted and then bent flat against the Excessive heat applied to the copper foil of any printed circuit
circuit foil. When holes are the slotted type, the following technique board will weaken the adhesive that bonds the foil to the circuit
should be used to remove and replace the IC. When working with board causing the foil to separate from or "lift-off" the board. The
boards using the familiar round hole, use the standard technique following guidelines and procedures should be followed whenever
as outlined in paragraphs 5 and 6 above. this condition is encountered.
Removal At IC Connections
1. Desolder and straighten each IC lead in one operation by gently To repair a defective copper pattern at IC connections use the
prying up on the lead with the soldering iron tip as the solder following procedure to install a jumper wire on the copper pattern
melts. side of the circuit board. (Use this technique only on IC
2. Draw away the melted solder with an anti-static suction-type connections).
solder removal device (or with solder braid) before removing the
IC. 1. Carefully remove the damaged copper pattern with a sharp
Replacement knife. (Remove only as much copper as absolutely necessary).
1. Carefully insert the replacement IC in the circuit board. 2. carefully scratch away the solder resist and acrylic coating (if
2. Carefully bend each IC lead against the circuit foil pad and used) from the end of the remaining copper pattern.
solder it. 3. Bend a small "U" in one end of a small gauge jumper wire and
3. Clean the soldered areas with a small wire-bristle brush. carefully crimp it around the IC pin. Solder the IC connection.
(It is not necessary to reapply acrylic coating to the areas). 4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
"Small-Signal" Discrete Transistor copper pattern. Solder the overlapped area and clip off any
Removal/Replacement excess jumper wire.
1. Remove the defective transistor by clipping its leads as close as
possible to the component body. At Other Connections
2. Bend into a "U" shape the end of each of three leads remaining Use the following technique to repair the defective copper pattern
on the circuit board. at connections other than IC Pins. This technique involves the
3. Bend into a "U" shape the replacement transistor leads. installation of a jumper wire on the component side of the circuit
4. Connect the replacement transistor leads to the corresponding board.
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder 1. Remove the defective copper pattern with a sharp knife.
each connection. Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
Power Output, Transistor Device 2. Trace along the copper pattern from both sides of the pattern
Removal/Replacement break and locate the nearest component that is directly
1. Heat and remove all solder from around the transistor leads. connected to the affected copper pattern.
2. Remove the heat sink mounting screw (if so equipped). 3. Connect insulated 20-gauge jumper wire from the lead of the
3. Carefully remove the transistor from the heat sink of the circuit nearest component on one side of the pattern break to the lead
board. of the nearest component on the other side.
4. Insert new transistor in the circuit board. Carefully crimp and solder the connections.
5. Solder each transistor lead, and clip off excess lead. CAUTION: Be sure the insulated jumper wire is dressed so the
6. Replace heat sink. it does not touch components or sharp edges.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range 3. Test method

This specification is applied to the LCD TV used LD91B 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety: CE, IEC/EN60065
2. Requirement for Test - EMC:CE, IEC
Each part is tested as below without special appointment.
1) Temperature : 25±5ºC (77±9ºF), CST : 40±5ºC

2) Relative Humidity : 65±10%
3) Power Voltage : Standard input voltage (100-240V@50/60Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. Electrical specification
- Module General Specification
No Item Specification Remark
1 Screen Device 32” wide color display module LCD
2 Aspect Ratio 16:9
3 LCD Module 32” TFT LCD FHD 100Hz LGD
4 Storage Environment Temp. : -20 ~ 60 deg
Humidity : 10 ~ 90 %
5 Input Voltage AC100-240V~, 50/60Hz
6 Power Consumption FHD 100Hz Typ : 118.5W, Max : 131W
7 Module Size 760.0 (H) x 450.0 (V) x 48.0 (D)
8 Pixel Pitch 0.36375 mm(D)
9 Back Light 14EEFL
10 Display Colors 1.06Billion(FHD LGD),16.7M (others)
11 Coating 3H, AG
5. Chroma& Brightness
- Module optical specification
No. Item Specification Min. Typ. Max. Remark

1. Viewing Angle<CR>10> Right/Left/Up/Down 178 Degree
2. Luminance Luminance (cd/m2) 400 500
Variation - 1.3 MAX /MIN
3. Contrast Ratio CR 900 1300
4. CIE Color Coordinates White WX 0.279
WY 0.292 Typ
RED Xr 0.638 ±0.03
Yr 0.334
Green Xg 0.291
Yg 0.607
Blue Xb 0.145
Yb 0.062
1) Standard Test Condition (The unit has been ‘ON’)

2) Stable for approximately 30 minutes in a dark environment at 25±2°…
3) The values specified are at approximate distance 50Cm from the LCD surface
4) Ta=25±2°C, VLCD=12.0V, fV=60Hz, Dclk=74.25MHz VBR_A=1.65V,ExtVBR_B=100%
6. Component Video Input (Y, CB/PB, CR/PR)

Specification
No Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.5 60 HDTV 1080p
7. RGB (PC)
Specification
No Proposed Remark
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60Hz, 852*480 60Hz
-> 640*480 60Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA
7. 1280*1024 63.595 60.0 108.875 SXGA FHD model
8. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
8. HDMI Input (PC/DTV)

(1) DTV Mode
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P
(2) PC Mode
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1280*768 47.78 59.87 79.5 WXGA HDCP
6. 1360*768 47.72 59.8 84.75 WXGA HDCP
7. 1280*1024 63.595 60.0 108.875 SXGA HDCP/FHD model
8. 1920*1080 67.5 60.00 138.625 WUXGA HDCP/FHD model
ADJUSTMENT INSTRUCTION
1. Application Range 4) Click “Connect” tab. If “Can’t” is displayed, check
connection between computer, jig, and set.
This specification sheet is applied to all of the LCD TV with
LD91B chassis. (2) (3)
2. Designation
1) The adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
2) Power Adjustment: Free Voltage Please Check the Speed :
To use speed between
3) Magnetic Field Condition: Nil. from 200KHz to 400KHz
4) Input signal Unit: Product Specification Standard
5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25±5ºC 5) Click “Auto” tab and set as below
Relative humidity : 65±10% 6) Click “Run”.
Input voltage : 220V, 60Hz 7) After downloading, check “OK” message.
6) Adjustment equipments: Color Analyzer (CA-210 or CA- (4)
110), DDC Adjustment Jig equipment, SVC remote
filexxx.bin
controller (5)
7) Push The “IN STOP KEY” - For memory initialization.
(7) ……….OK
Case1 : Software version up
1. After downloading S/W by USB, TV set will reboot (6)
automatically
2. Push “In-stop” key
3. Push “Power on” key
4. Function inspection * USB DOWNLOAD
5. After function inspection, Push “I n-stop” key. 1) Put the USB Stick to the USB socket
Case2 : Function check at the assembly line 2) Automatically detecting update file in USB Stick
1. When TV set is entering on the assembly line, Push - If your downloaded program version in USB Stick is Low,
“In-stop” key at first. it didn’t work. But your downloaded version is High, USB
2. Push “Power on” key for turning it on. data is automatically detecting
-> If you push “Power on” key, TV set will recover 3) Show the message “Copying files from memory”
channel information by itself.
3. After function inspection, Push “In-stop” key.
3. Main PCB check process

* APC - After Manual-Insult, executing APC
* Boot file Download

1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
2) Set as below, and then click “Auto Detect” and check “OK”
message
If “Error” is displayed, Check connection between
computer, jig, and set.
3) Click “Read” tab, and then load download file (XXXX.bin)
by clicking “Read”
(1)
fi lexxx.bin
4) Updating is staring. 3.1. ADC Process
(1) ADC
• Input signal : Component 480i
• Signal equipment displays.
Adjustment pattern
- Component 480I
MODEL: 209 in Pattern Generator(480i Mode)
PATTERN : 65 in Pattern Generator(MSPG-925 SERIES)
• After enter Service Mode by pushing “ADJ” key,

• Enter Internal ADC mode by pushing “G” key at “5. ADC
Calibration”
5) Fishing the version uploading, you have to put USB stick

and “AC Power” off.
6) After putting “AC Power” on and check updated version on
<Caution> Using ‘power on’ button of the Adjustment R/C ,
your TV.
power on TV.
* If downloading version is more high than your TV have,
* ADC Calibration Protocol (RS232)
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t Item CMD1 CMD2 Data0
have a DTV/ATV test on production line. Adjust A A 0 0 When transfer the ‘Mode In’,
‘Mode In’ Carry the command.
* After downloading, have to adjust Tool Option again. ADC Adjust A D 1 0 Automatically adjustment
1) Push "IN-START" key in service remote controller (The use of a internal pattern)
2) Select “Tool Option 1” and Push “OK” button.
3) Punch in the number. (Each model hax their number) Adjust Sequence
Model Tool option1 Tool option2 Tool option3 Tool option4 • aa 00 00 [Enter Adjust Mode]
• xb 00 40 [Component1 Input (480i)]
32LH50xx 16833 3110 53156 3584
• ad 00 10 [Adjust 480i Comp1]
• xb 00 60 [RGB Input (1024*768)]
4) Completed selecting Tool option. • ad 00 10 [Adjust 1024*768 RGB]
• aa 00 90 End Adjust mode
* Required equipment : Adjustment R/C.
3.2. Function Check

(1) Check display and sound
- Check Input and Signal items. (cf. work instructions)
1) TV
2) AV (SCART1/SCART2/ CVBS)
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60hz)
5) HDMI
6) PC Audio In
* Display and Sound check is executed by Remote controller.
Copyright ©2009 LG Electronics. Inc. All right reserved. - 10 - LGE Internal Use Only
4. Total Assembly line process ** Caution **
Color Temperature : COOL, Medium, Warm.
4.1. Adjustment Preparation One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
· W/B Equipment condition adjust other two lower than C0.
CA210 : CH 9, Test signal : Inner pattern (85IRE) (when R/G/B Gain are all C0, it is the FULL Dynamic Range
· Above 5 minutes H/run in the inner pattern. (“power on” key of Module)
of adjust remote control)
Cool 11,000k ºK X=0.276(±0.002)
* Manual W/B process using adjusts Remote control.
• After enter Service Mode by pushing “ADJ” key,
Y=0.283(±0.002) <Test Signal> • Enter White Balance by pushing “ G ” key at “6. White
Medium 9,300k ºK X=0.285(±0.002) Inner pattern Balance”.
Y=0.293(±0.002) (216gray,85IRE)
Warm 6,500k ºK X=0.313(±0.002)
Y=0.329(±0.002)
* Connecting picture of the measuring instrument

(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment R/C POWER ON ->
Enter the mode of White-Balance, the pattern will come out.
* After done all adjustments, Press “In-start” button and

Full White Pattern CA-210
compare Tool option and Area option value with its BOM, if
COLOR it is correctly same then unplug the AC cable. If it is not
ANALYZER
TYPE: CA-210 same, then correct it same with BOM and unplug AC cable.
For correct it to the model’s module from factory JIG model.
* Push The “IN STOP KEY” after completing the function
RS-232C Communication
inspection.
* Auto-control interface and directions

4.2. DDC EDID Write (RGB 128Byte )
1) Adjust in the place where the influx of light like floodlight • Connect D-sub Signal Cable to D-sub Jack.
around is blocked. (illumination is less than 10ux). • Write EDID Data to EEPROM(24C02) by using DDC2B
2) Adhere closely the Color Analyzer (CA210) to the module protocol.
less than 10cm distance, keep it with the surface of the • Check whether written EDID data is correct or not.
Module and Color Analyzer’s Prove vertically.(80~100°). * For SVC main Ass’y, EDID have to be downloaded to Insert
3) Aging time Process in advance.
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 5minutes. 4.3. DDC EDID Write (HDMI 256Byte)
- Using ‘no signal’ or ‘full white pattern’ or the others, • Connect HDMI Signal Cable to HDMI Jack.
check the back light on. • Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.
• Auto adjustment Map(RS-232C) • Check whether written EDID data is correct or not.
RS-232C COMMAND * For SVC main Ass’y, EDID have to be downloaded to Insert
[CMD ID DATA] Process in advance.
Wb 00 00 White Balance Start
Wb 00 ff White Balance End 4.4. EDID DATA
RS-232C COMMAND MIN CENTER MAX 1) All Data : HEXA Value
2) Changeable Data :
[CMD ID DATA] (DEFAULT)
*: Serial No : Controlled / Data:01
Cool Mid Warm Cool Mid Warm **: Month : Controlled / Data:00
R Gain jg Ja jd 00 172 192 192 255 ***:Year : Controlled
****:Check sum
G Gain jh Jb je 00 172 192 192 255
B Gain ji Jc jf 00 192 192 172 255
R Cut 64 64 64 128
G Cut 64 64 64 128
B Cut 64 64 64 128
- Auto Download 1) FHD RGB EDID data
• After enter Service Mode by pushing “ADJ” key, 0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D ⓐ ⓑ
• Enter EDID D/L mode.
10 ⓒ 01 03 68 73 41 78 0A CF 74 A3 57 4C B0 23
• Enter “START” by pushing “OK” key.
20 09 48 4C A1 08 00 81 80 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 7E 8A 42 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
70 ⓓ 00 ⓔ
80 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
90 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
A0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
B0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
C0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
D0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
F0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
2) FHD HDMI EDID data

0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D ⓐ ⓑ
* Edid data and Model option download (RS232) 10 ⓒ 01 03 80 73 41 78 0A CF 74 A3 57 4C B0 23
20 09 48 4C A1 08 00 81 80 61 40 45 40 31 40 01 01
Item CMD1 CMD2 Data0 30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
Download A A 0 0 When transfer the ‘Mode In’, 40 45 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 7E 8A 42 00 00 1E 00 00 00 FD 00 3A
‘Mode In’ Carry the command. 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
Download A E 00 10 Automatically Download 70 ⓓ 01 ⓔ
80 02 03 26 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
(The use of a internal pattern)
90 22 15 01 26 15 07 50 09 57 07 ⓕ
A0 ⓕ E3 05 03 01 01 1D 80 18 71 1C 16 20 58 2C
B0 25 00 7E 8A 42 00 00 9E 01 1D 00 80 51 D0 0C 20
- Manual Download C0 40 80 35 00 7E 8A 42 00 00 1E 02 3A 80 18 71 38
* Caution D0 2D 40 58 2C 45 00 7E 8A 42 00 00 1E 66 21 50 B0
1) Use the proper signal cable for EDID Download E0 51 00 1B 30 40 70 36 00 7E 8A 42 00 00 1E 00 00
- Analog EDID : Pin3 exists F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F9
- Digital EDID : Pin3 exists
2) Never connect HDMI & D-sub Cable at the same time. * Detail EDID Options are below
3) Use the proper cables below for EDID Writing ⓐ Product ID
4) Download HDMI1, HDMI2, separately because HDMI1 is
different from HDMI3 Model Name HEX EDID Table DDC Function
For Analog EDID For HDMI EDID FHD Model 0001 01 00 Analog/Digital
HD Model 0000 00 00 Analog/Digital
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
ⓑ Serial No: Controlled on production line.

ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘02’ -> ‘02’
Year : ‘2009’ -> ‘13’
ⓓ Model Name(Hex):
Item Condition Data(Hex) MODEL MODEL NAME(HEX)
Manufacturer ID GSM 1E6D all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
Version Digital : 1 01
Revision Digital : 3 03 ⓔ Checksum: Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)
INPUT MODEL NAME(HEX)
HDMI1 67030C001000B82D
HDMI2 67030C002000B82D
HDMI3 67030C003000B82D
HDMI4 67030C003000B82D
4.5. Outgoing condition Configuration * Manual Download (Model Name and Serial Number)
- When pressing IN-STOP key by SVC remocon, Red LED are If the TV set is downloaded by OTA or Service man, sometimes
blinked alternatively. And then Automatically turn off. model name or serial number is initialized.(Not always)
(Must not AC power OFF during blinking) There is impossible to download by bar code scan, so It
need Manual download.
1) Press the ‘instart’ key of ADJ remote controller.
4.6. Internal pressure 2) Go to the menu ‘5.Model Number D/L’ like below photo.
Confirm whether is normal or not when between power 3) Input the Factory model name(ex 42LH4000-ZA) or Serial
board's ac block and GND is impacted on 1.5kV(dc) or number like photo.
2.2kV(dc) for one second
5. Serial number D/L

• press “Power on” key of service remocon.
(Baud rate : 115200 bps)
• Connect RS232 Signal Cable to RS-232 Jack.
• Write Serial number by use RS-232.
• Must check the serial number at the Diagnostics of SET UP
menu. (Refer to below).
4) Check the model name Instart menu -> Factory name
displayed (ex 42LH4000-ZA)
5) Check the Diagnostics (DTV country only) -> Buyer model
displayed (ex 42LH4000)
5.1. Signal TABLE

CMD LENGTH ADH ADL DATA_1 ... Data_n CS DELAY
CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +…+ Data_n
Delay : 20ms
5.2. Command Set

No. Adjust mode CMD(hex) LENGTH(hex) Description
1 EEPROM WRITE A0h 84h+n n-bytes Write (n = 1~16)
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model Name and Serial Number write in
EEPROM,.
5.3. method & notice

A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing
Technology Group.
C. Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0.
LCD
Panel
FRC
BUF_TS_CLK/ ERR/ SYN/ DATA[0] 4Ch LVDS ( 10 b it)
LVDS ( 10 b it) LGE7329A
Buffer
I C502
IC900
74LVC541A
CI_TS_DATA[ 0: 7] DDR_A_D[ 0: 15] DDR2 SDRAM
DDR_A_A[ 0: 12] ( 512Mb )
FE_TS_DATA[ 0: 7] PCM_D[ 0: 7 ] -> CI_DATA[ 0: 7]
IC1001
DDR_B_D[ 16: 31]

Tu ner
-> CI_MDI[ 0: 7]
CI Slot
DDR_B_A[ 0: 12] DDR2 SDRAM
( P5 00 )
TU10 00
CI_ADDR[ 0: 7] PCM_A[ 0:7] ( 512Mb )
( TDFW-G235 D1 )
IC1000
Buff er
I C501
Reset 74LX1G14C KIA7027
74LCX244
( IC108) ( IC101)
FE_VMAIN Sc hm it t Trig g er Voltage D etector
Serial Flash Serial Flas h
FE_ VOUT
Copyright ©2009 LG Electronics. Inc. All right reserved.

IC103 IC104
F-SCART Fo r Bo o t Fo r Trit o n
SC1_CVBS_IN SDDR_D[ 0: 15] DDR2 SDRAM
SC1_R/ G/ B Mst ar S6 ( 1Gb )
SDDR_A[ 0: 12]
H-SCART DTV/ MNT_VOUT IC300
SC2_CVBS_I LGE3369A TDDR_D[ 0: 15] DDR2 SDRAM
N TDDR_A[ 0: 12] ( 512Mb )
AV3 AV_CVBS_IN
IC301
- 14 -
( DVIX) PCM_A[ 0: 7] NAND Flash EEPROM
COMPONENT AT24C512
COMP_Y/Pb/ Pr HYNIX
( IC105)
IC102
EEPROM
RGB DSUB_ R/ G/ B ( IC100) I2C
AT24C512
DSUB_H/ VSYNC ( HDCP) IC107
BLOCK DIAGRAM
I2S Dig it al am p
SC1/ 2_L/ R_IN, FE_AM_AUDIO, AUDIO IN L/ R
( NTP3100L)
AV_L/ R_IN, COMP_L/ R_IN, PC_L/ R_IN
IC701
USB_DM/ DP USB USB Po wer MP6211DH

USB Po w er
Head
HP_L/ ROUT IC402
TPA6110A HPD1/ 2/ 3/ 4,
Pho ne IC700
HDMI_CEC
5V_HDMI_1/ 2/ 3/ 4
RS-232C HDMI
RGB_TX/ RX
MAX3232 CDR HDMI4 TMDS[ 0: 7] ( Dat a, Clo c k ( + /-) ) 1/ 2/ 3/
IC403 4
SPDIF SPDIF_OUT
HDMI1/ 2/ 3 TMDS[ 0: 7] (Data, Cloc k (+/ -)) HDMI S/ W
( TMDS351)
IC603
LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
400
32LH5000
520
805 540
530
550
900
801
806
804
802
803
200
32LH5010
32LH5020
200N
200T
A10
120
A2
122
121
310
500
300
510
Copyright LG Electronics. Inc. All right reserved. - 15 - LGE Internal Use Only
IC102
+3.3V HY27US08121B-TPCB +3.3V
NAND FLASH MEMORY VOLTAGE DETECTOR
C105
10uF 6.3V *Mstar reset:Active high reset
NC_1 NC_28
1 48
/PF_CE0
H : Serial Flash NC_2 NC_27
2 47
L : NAND Flash PCM_A[0-7]
/PF_CE1 NC_3 NC_26 +3.3V_ST
3 46
H : 16 bit
NC_4 NC_25
3
1
1K
L : 8 bit 4 45
3.9K
AR102 JTP-1127WEM
NC_5 I/O7 PCM_A[7]
5 44 SW100
470
R107
NC_6 I/O6 PCM_A[6]
4
2
6 43
R111
R105 OPT 1K
R1540
R/B I/O5 PCM_A[5]
/F_RB 7 42
1386 WON IC100 X100 080923_Time Delay
RE I/O4 PCM_A[4] C102 10uF 0 R116 12MHz C111
/PF_OE 8 41 LGE3369A (Saturn6 Non RM)
CE NC_24 22 6.3V
/PF_CE0 9 40 R193 20pF
PCM_D[0-7]
NC_7 NC_23 1M
10 39 IC101 D4 HWRESET B3
1K
XIN C112
NC_8 PRE KIA7427F A3 R172 0
C103 11 38 VCC 1 3 OUT XOUT
OPT
PCM_D[0] AC16 20pF
0.1uF VCC_1 VCC_2 PCMD0/CI_D0
12 37 2 PCM_D[1] AA15 E6 R173 0
R112
C101 R115 PCMD1/CI_D1 TESTPIN/GND
VSS_1 VSS_2 C106 0.1uF 0.022uF GND 10K PCM_D[2] AA16
13 36 16V PCMD2/CI_D2
PCM_D[3] AC6
NC_9 NC_22 PCMD3/CI_D3
14 35 PCM_D[4] Y10 AE11 R1524 33 SPI_DI G12
PCMD4/CI_D4 SPI_DI
NC_10 NC_21 PCM_D[5] Y11 AF12 SPI_DO
15 34 PCMD5/CI_D5 SPI_DO
PCM_D[6] Y12 AE12 R1525 33 SPI_CS
CLE NC_20 PCMD6/CI_D6 /SPI_CS
16 33 PCM_A[0-14] PCM_D[7] Y13 AD11 R1526 33 SPI_CK
/PF_CE1 AR103 PCMD7/CI_D7 SPI_CK
ALE I/O3 PCM_A[3]
PF_ALE 17 32 PCM_A[0] AB16
WE I/O2 PCM_A[2] PCM_A[1] PCM_A0/CI_A0
18 31 AC15
/PF_WE PCM_A[2] PCM_A1/CI_A1
WP I/O1 PCM_A[1] AC14
19 30 PCM_A[3] PCM_A2/CI_A2
AB14
+3.3V_ST +3.3V NC_11 I/O0 PCM_A[0] PCM_A[4] PCM_A3/CI_A3
AC12 B5
R1539
1K
20 29 R174 0
PCM_A[5] PCM_A4/CI_A4 USB_DP_1
NC_12 NC_19 22 AB8 A5 R175 0
21 28 PCM_A[6] PCM_A5/CI_A5 USB_DM_1
AC13 AC10

R178 0 SIDE_USB_DM
NC_13 NC_18 PCM_A[7] PCM_A6/CI_A6 USB_DM_2 4:AJ6
R114 22 27 AA9 AB10 R179 0
10K
R103
OPT PCM_A[8] PCM_A7/CI_A7 USB_DP_2 SIDE_USB_DP 4:AJ5
R151 NC_14 NC_17 AB5
0 PCM_A8/CI_A8 R132 R133 SIDE_USB
PF_WP 23 26 PCM_A[9] AA4 15K 15K
C NC_15 NC_16 PCM_A[10] PCM_A9/CI_A9 OPT
24 25 V4 OPT
R1509 PCM_A[11] PCM_A10/CI_A10
0 B Q100 Y4
KRC103S PCM_A[12] PCM_A11/CI_A11 +3.3V_ST
OPT AB9
OPT PCM_A[13] PCM_A12/CI_A12
E AA7
PCM_A[14] PCM_A13/CI_A13
AD6
PCM_A14/CI_A14 PM GPIO Assignment Recommended by MStar
10K
R195
R1510 33 AA14 E5
PCM_RST PCM_RST/CI_RST GPIO_PM0/GPIO134 WARM_LED_ON 8:B11
R1511 33 AB18 F5 R1520 100
+3.3V /PCM_CD PCM_CD/CI_CD GPIO_PM1/GPIO135 DBG_TX
+3.3V IC103 Y5 G5 R184
EEPROM IC105: EAN43352801(ATMEL SHRINK) R1512 33 100 INV_CTL
W25X32VSSIG /PCM_OE /PCM_OE GPIO_PM2/GPIO136 8:M10
Serial FLASH MEMORY R1513 33 AB15 H5 R185 100 PANEL_CTL OPT 100
/PCM_REG PCM_REG/CI_CLK GPIO_PM3/GPIO137 8:Q8 R182 POWER_DET
for BOOT IC105 +3.3V
0IMMRMP008A(MICROCHIP) R1514 33 AA10 F6 R186 100 POWER_ON/OFF1
/PCM_WAIT
R1533
4.7K
PCM_WAIT/CI_WACK GPIO_PM4/GPIO138 8:P5
L102
M24512-WMW6 R1515 33 AC8 G6
CS VCC /PCM_IRQA /PCM_IRQA DBG_RX
SPI_CS 1 8 GPIO_PM5/INT1/GPIO139
R1516 33 AC7 H6 R1523 100
/PCM_WE /PCM_WE GPIO_PM6/INT2/GPIO140 POWER_DET
+3.3V $0.76 E0 VCC AA5 AC17
1 8 C100 /PCM_IOWR R1517 33 R188 100
DO HOLD PCM_IOWR/CI_WR GPIO131/LDE/SPI_WPn1 LVDS_SEL 10:AA4
SPI_DO R1530 0.1uF R1518 33 W4 AB17 OPT
2 7 /PCM_IORD R187 100
0.1uF
$0.418 AR100 PCM_IOR/CI_RD GPIO130/LCK ISP_TXD
E1 WC
C104
33 2 7 R1519 33 T4 AF11
10K
Copyright © 2009 LG Electronics. Inc. All right reserved.

/PCM_CE
R104
/PCM_CE GPIO132/LHSYNC/SPI_WPn
WP CLK /PF_CE0 AE6 AA18
R101 0 3 6 SPI_CK C4 /PF_CE0 GPIO60/PCM2_RESET/RX1
E2 SCL 22 AF6 AA17 R167 100
3 6 R110 /PF_CE1 FE_BOOSTER_CTL 10:AA4
EEPROM_SCL E19;T19;Y13 D6 /PF_CE1 GPIO62/PCM2_CD_N/TX1
Flash_WP_1
C AA12 R159 100
R100 /PF_OE Flash_WP_1 A11
0 GND DIO SDA
C4 22 /PF_OE
R102 B 4 5 SPI_DI 0 VSS 4 5 /PF_WE AR101 AA11 R1535 0 SDA1
EEPROM_SDA E20;T19;Y14 D7 /PF_WE T22
OPT C107 C108 R113 22 PF_ALE AC9 R1536 0 SCL1
D6 PF_ALE T22
Q101 E 8pF 8pF Y14
KRC103S PF_WP
OPT OPT A7 PF_AD15
OPT /F_RB AB11 E7 R1537 22 FE_TUNER_SCL
C3 22 F_RBZ LHSYNC2/I2S_OUT_MUTE/RX1
AC18 R1534 100 OPC_EN 11:N20
LVSYNC/GPIO133
EEPROM_SCL R162 0 F8 C6 R1538 22 FE_TUNER_SDA
E16;E19;T19 UART2_TX/SCKM GPIO79/LVSYNC2/TX1
EEPROM_SDA R163 0 D11 F9 R108 22
E16;E20;T19 UART2_RX/SDAM UART2_RX/GPIO84 5V_HDMI_3
R164 0 AB21 F10
SDA0 DDCR_DA UART2_TX/GPIO85 USB_OCD 4:AG3
MCU BOOT STRAP DIMMING R165 0 AC21 A6 R169 22
HDCP EEPROM +3.3V SCL0 DDCR_CK UART1_RX/GPIO86 5V_HDMI_1
Addr:10101-- 10 : BOOT 51 B6 R170 22
UART1_TX/GPIO87 5V_HDMI_2
11 : BOOT RISC R140 22 J1 AF5
ISP_RXD DDCA_CLK GPIO42/PCM2_CE_N PCM_5V_CTL 5:D24
+3.3V R141 22 J2 AF10 R127 100 CI_TS_DATA[0-7]
ISP_TXD DDCA_DA GPIO43/PCM2_IRQA_N AV_CVBS_DET 4:M4
R142 22 W5
R1545 100 DBG_RX UART_RX2
IC107 PWM0 R143 22 V5 AA8 CI_TS_DATA[0]
CAT24WC08W-T A_DIM DBG_TX UART_TX2
C114 TS0_D0
R158 Y8 CI_TS_DATA[1]
4.7K 0.1uF R198 R1501 R1544 100 TS0_D1
A0 VCC 1K PWM_DIM PWM2 Y9 CI_TS_DATA[2]
1 8 1K TS0_D2
$0.199 PWM0 AB7 CI_TS_DATA[3]
A1 2 7 WP R109 4.7K TS0_D3
E16;T19;Y13 AA6 CI_TS_DATA[4]
EEPROM_SCL PWM1 C1500 C1501 TS0_D4
A2 SCL R161 22 AB6 CI_TS_DATA[5]
3 6 1uF 2.2uF TS0_D5
R199 R1500 OPT U4 CI_TS_DATA[6]
VSS SDA OPT TS0_D6
4 5 1K 1K AC5 CI_TS_DATA[7]
R171 22 EEPROM_SDA OPT OPT TS0_D7
AC4 CI_TS_SYN
E16;T19;Y14 TS0_SYNC 5:D10
AD5 CI_TS_VAL
TS0_VLD 5:D10
AB4 CI_TS_CLK
TS0_CLK 5:D10
AB19 BUF_TS_DATA[0]
TS1_D0 5:V22
AA20 BUF_TS_SYN
TS1_SYNC 5:V22
PWM0 AB13 AC19
I2C +3.3V_TUNER PWM0 TS1_VLD BUF_TS_VAL_ERR 5:V21
+5V_GENERAL AB12 AA19
+3.3V PWM1 PWM1 BUF_TS_CLK
TS1_CLK 5:V21
AD12
11:AE17 PWM2 PWM2
R150 22 AA13 C10 R154 100
PWM3 ET_TXD0 SCART2_DET
OPT B11 R177 100
ET_TXD1 SC_RE2 9:N25
A4 A9 R183 100
11:Y9 KEY1 SAR0 ET_TX_CLK SC_RE1 9:N24
R1505
4.7K
R1504
4.7K
R1506
1.2K
R1507
1.2K
B4 C11
R1503
2.2K
R1502
2.2K
R124
4.7K
R125
4.7K
11:Y10 KEY2 SAR1 ET_RXD0 SIDE_HP_MUTE 7:G26
F4 C9
LED_ON SAR2 ET_RXD1 HP_DET
FE_TUNER_SDA R1550 100 E4 B10 R190 100
AI13;10:I9 EEPROM_SDA 7:G25;7:R15;9:AI24;9:AI25 SB_MUTE SAR3 ET_TX_EN EDID_WP 6:AI16;6:AL7;6:AL12
E16;E20;Y14 R146 0 C4 A10 R191 100
AI13;10:I9 FE_TUNER_SCL IR IRIN ET_MDC BIT_SEL 9:AI24
EEPROM_SCL E16;E19;Y13 B9
FE_DEMOD_SDA R122 0 11:X16;11:AD14 ET_MDIO
10:I12 SDA0 T21;Y14 A11
R123 0 ET_COL MODEL_OPT_3
FE_DEMOD_SCL SCL0 R106 100 AC11
10:I12 T21;Y14 R153 100
HPD3 GPIO44 SCART1_DET
MEMC_SDA R130 0
11:J8 SDA0 T21;Y14
MEMC_SCL R131 0 9:AI24 SCART2_MUTE R156 100 D9
11:Q8 SCL0 T21;Y14 GPIO96
AMP_RST R157 100 D10
SDA_SUB/AMP R128 0 7:F6 GPIO88
7:F12;11:AG10 SDA1 AK12 D7
R129 0 MODEL_OPT_1 R189 0
7:F13;11:AG9 SCL_SUB/AMP SCL1 AK12 GPIO90/I2S_OUT_MUTE
R168 0 E11
MODEL_OPT_2 GPIO91
R160 100 E8
8:C6 ERROR_OUT GPIO97
MODEL OPTION R166 100 E10
7:R15 NTP_MUTE GPIO98
R126 0 D6
MODEL_OPT_0 GPIO99
R148 100 D5
COMP_DET GPIO103/I2S_OUT_SD3
R147 100 C5
POWER DETECT DSUB_DET GPIO102
+3.3V
+24V +12V
R1603 R1605 R1607 R1609
3.3K 3.3K 3.3K 3.3K
OPT
32
R1521 +3.3V_ST
37~47 R1612 100
3.6K MODEL_OPT_0
R1528 SEL2_HDMI_SW
2.7K
1% MEMC_RESET R1600 100 MODEL_OPT_1
R1543
10K
IC1500
KIA7042AF
I 1 3 O MODEL OPTION +3.3V
POWER_DET FE_AGC_SPEED_CTL R1601 100 MODEL_OPT_2
2
32
R1527 R1529 G /FE_RESET R1611 100 MODEL_OPT_3 PIN NAME PIN NO. HIGH LOW R152
1K 1.8K 4.7K
1% 37~47 MODEL_OPT_0 D6 LCD PDP OPT
R1604 R1606 R1608 R1610
3.3K 3.3K 3.3K 3.3K B9(FHD) FRC NO_FRC
OPT OPT MODEL_OPT_1 D7
OPT B9(HD) LVDS_B LVDS_A A7 R192 100
GPIO67 USB_CTL 4:AL4
MODEL_OPT_2 E11 LED_NORMAL LED_MOVING B8 R155 100 SCART1_MUTE 9:AI25
GPIO68
MODEL_OPT_3 B9 FHD HD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX57644501 2008.12.12
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN_1 1 12

+1.26V_VDDC
C2028 C2002 C243 C246 C249 C252 C257 C264 C275 C281 C289 C294 C297 C2000 C2001 C2003 C2005 C219 C220 C261 C268 C270 C278 C280 C282 C290 C295 C298 C299
10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
+3.3V
+3.3V_VDDP +1.8V_DDR
L210
BLM18PG121SN1D
C2004 C2026 C276 C265 C258 C253 C250 C247 C244 C241 C2027 C242 C245 C248 C251 C254 C259 C266 C277 C283 C291 C296
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
IC100
LGE3369A (Saturn6 Non RM)
+1.26V_VDDC

F1 RXACKP AE16 IC100 VDDC : 970mA
6:X15 CK+_HDMI_SW LVA0P MEMC_RXE0+ 002:Z22;009:S28
F2 RXACKN AD16 LGE3369A (Saturn6 Non RM)
6:X14 CK-_HDMI_SW LVA0M MEMC_RXE0- 002:Z22;009:S28
G2 RXA0P AD15
6:X15 D0+_HDMI_SW LVA1P MEMC_RXE1+ 002:Z23;009:R28
G3 RXA0N AF16
6:X15 D0-_HDMI_SW LVA1M MEMC_RXE1- 002:Z22;009:R28 E16 D16
H3 AF15 VDDC_1
D1+_HDMI_SW RXA1P GND_2
6:X16 LVA2P MEMC_RXE2+ 002:Z23;009:R28 E17 VDDC_2 D17
D1-_HDMI_SW G1 RXA1N AE15 GND_3
6:X16 LVA2M MEMC_RXE2- 002:Z23;009:R28 E18 VDDC_3 D18
H1 RXA2P AD13 GND_4
6:X17 D2+_HDMI_SW LVA3P MEMC_RXE3+ 002:Z25;009:Q28 F7 D19
H2 AF14 VDDC_4
D2-_HDMI_SW RXA2N GND_5
6:X17 LVA3M MEMC_RXE3- 002:Z25;009:Q28 L9 VDDC_5 D20
R207 0 A1 DDCD_A_DA AF13 GND_6
6:X13;6:AL14 DDC_SDA_SW LVA4P MEMC_RXE4+ 002:Z26;009:Q28 L10 H18
B2 AE13 VDDC_6
DDC_SCL_SW R208 0 DDCD_A_CK GND_7
6:X13;6:AL13 LVA4M MEMC_RXE4- 002:Z25;009:Q28 L11 VDDC_7 H19
R247 100 A2 HOTPLUG_A GND_8
6:J6 HPD1 VDDC_8 H20
AE14
LVACKP MEMC_RXEC+ 002:Z24;009:Q28 VDDC_9 J20
C3 RXBCKP AD14
LVACKM MEMC_RXEC- 002:Z24;009:R28 L12 VDDC_10 K20
B1 RXBCKN GND_9
L13 VDDC_11 L20
C1 RXB0P AE20 GND_10
LVB0P MEMC_RXO0+ 002:Z17;009:U28 L14 VDDC_12 M20
C2 AD20 GND_11
LVDS OUT
RXB0N MEMC_RXO0- L15 P7
LVB0M 002:Z17;009:V28 VDDC_13
D2 RXB1P AD19 GND_12
LVB1P MEMC_RXO1+ 002:Z18;009:U28 L16 VDDC_14 R7
D3 RXB1N AF20 GND_13
HDMI
LVB1M MEMC_RXO1- 002:Z18;009:U28 L17 GND_14 VDDC_15 T7
E3 AF19

RXB2P MEMC_RXO2+ L18 T22
LVB2P 002:Z18;009:U28 GND_15
D1 RXB2N AE19 VDDC_16
LVB2M MEMC_RXO2- 002:Z18;009:U28 M9 GND_16 U7
E1 DDCD_B_DA AD17 VDDC_17
LVB3P MEMC_RXO3+ 002:Z20;009:T28 U20
F3 DDCD_B_CK AF18 VDDC_18
LVB3M MEMC_RXO3- 002:Z20;009:T28 M10 GND_17 U22
R201 100 E2 HOTPLUG_B AF17 VDDC_19
6:J6 HPD2 LVB4P MEMC_RXO4+ 002:Z21;009:S28 M11 GND_18 V7
AE17 VDDC_20
LVB4M MEMC_RXO4- 002:Z21;009:T28 M12 V22
AE8 RXCCKP GND_19 VDDC_21
6:X15 CK+_HDMI4 M13 W11
AD8 RXCCKN AE18 GND_20 VDDC_22
6:X14 CK-_HDMI4 LVBCKP MEMC_RXOC+ 002:Z19;009:T28 M14 W12
AD9 RXC0P AD18 GND_21 VDDC_23
6:X15 D0+_HDMI4 LVBCKM MEMC_RXOC- 002:Z19;009:T28 M15 W19
AF8 RXC0N GND_22 VDDC_24
6:X15 D0-_HDMI4 M16 W20
AF9 RXC1P GND_23 VDDC_25
6:X16 D1+_HDMI4 M17 W22
AE9 RXC1N GND_24 VDDC_26
6:X16 D1-_HDMI4 Y22
AE10 RXC2P AA3 C229 2.2uF VDDC_27
6:X17 D2+_HDMI4 AUR0 SC1_R_IN 9:J12 M18
AD10 RXC2N Y1 C230 2.2uF GND_25 +3.3V_VDDP VDDP : 102.3mA
6:X17 D2-_HDMI4 AUL0 SC1_L_IN 9:J10 N4
R248 0 AE7 DDCD_C_DA AE1 C2006 2.2uF GND_26
6:X13;6:AL14 DDC_SDA_4 AUR1 N9 H9
R249 0 AF7 DDCD_C_CK AF3 C2007 2.2uF GND_27 VDDP_1
6:X13;6:AL13 DDC_SCL_4 AUL1 N10 H10
R200 100 AD7 HOTPLUG_C AE3 C2008 2.2uF GND_28 VDDP_2
6:W11 HPD4 AUR2 SC2_R_IN 9:AE11 N11 H11
R204 100 J3 CEC AUL2 AE2 C2009 2.2uF GND_29 VDDP_3
6:AM25 HDMI_CEC SC2_L_IN 9:AE10 N12 H12
AA1 C2011 2.2uF GND_30 VDDP_4
AUR3 AV_R_IN 4:M6 N13 N20
AB1 C2012 2.2uF GND_31 VDDP_5
AUL3 AV_L_IN 4:M5 N14 P20
AB2 C2013 2.2uF GND_32 VDDP_6
AUR4 COMP_R_IN 4:K15 W9
N2 AC2 C2014 2.2uF VDDP_7
AUDIO IN
SC1_ID HSYNC0/SC1_ID COMP_L_IN N15 W10 +3.3V
9:P8 AUL4 4:K13 +3.3V_S6
R210 47 N1 VSYNC0/SC1_FB AB3 C2015 2.2uF GND_33 VDDP_8
9:O6 SC1_FB AUR5 PC_R_IN 4:Z5 N16
R211 47 C200 0.047uF P2 RIN0P/SC1_R AC3 C2016 2.2uF GND_34 AVDD_AU : 36.11mA
9:J6 SC1_R AUL5 PC_L_IN 4:Z6 N17 L209
R212 47 C201 0.047uF R3 GIN0P/SC1_G GND_35 BLM18PG121SN1D
9:J8 SC1_G FE_SIF 10:P13 N18 W7
R213 47 C202 0.047uF R1 BIN0P/SC1_B GND_36 AVDD_AU
9:J9 SC1_B P4 +1.8V_DDR
R214 470 C203 1000pF P3 SOGIN0/SC1_CVBS GND_37
E21;9:O4 SC1_CVBS_IN P9 C284 C293
SCART_RGB
R215 47 C204 0.047uF P1 RINM W3 C231 0.1uF R241 47 GND_38
SIF0P P10 G12
R216 47 C205 0.047uF T3 BINM W2 C232 0.1uF R242 47 GND_39 AVDD_DDR_1 0.1uF 0.1uF
SIF0M G13
R217 47 C206 0.047uF R2 GINM AVDD_DDR_2
H13
AVDD_DDR_3
R243 R244 P11 H14
F11 R266 100 GND_40 AVDD_DDR_4
10K 10K SPDIF_IN 5V_HDMI_4 P12 H15
R246 22 K3 HSYNC1/DSUB_HSYNC E9 R230 100 GND_41 AVDD_DDR_5
4:C22 DSUB_HSYNC SPDIF_OUT SPDIF_OUT 4:T11 P13 H16
R245 22 K2 VSYNC1/DSUB_VSYNC GND_42 AVDD_DDR_6
4:C22 DSUB_VSYNC P14 W14
R218 47 C212 0.047uF L1 RIN1P/DSUB_R GND_43 AVDD_DDR_7
4:C26 DSUB_R P15 W15
R219 47 C207 0.047uF L3 GIN1P/DSUB_G GND_44 AVDD_DDR_8
4:C24 DSUB_G P16 W16
R220 47 C213 0.047uF K1 BIN1P/DSUB_B GND_45 AVDD_DDR_9
DSUB
4:C23 DSUB_B P17 W17
R221 470 C208 1000pF L2 SOGIN1 AF1 R237 100 GND_46 AVDD_DDR_10 +3.3V_S6 AVDD_MEMPLL : 23.77mA
AUOUTR0/HP_ROUT HP_ROUT 7:G21 P18 W18
AF2 R238 100 GND_47 AVDD_DDR_11
AUOUTL0/HP_LOUT HP_LOUT 7:G19
AD3 R239 100
AUOUTR1/SC1_ROUT SCART1_Rout 9:T14 R4 H17
R222 47 C214 0.047uF V1 RIN2P/COMP_PR+ AD1 R240 100 SCART1_Lout GND_48 AVDD_MEMPLL_1
4:K13 COMP_Pr AUOUTL1/SC1_LOUT 9:S12 R9 T20
R223 47 C215 0.047uF V2 GIN2P/COMP_Y+ AC1 R250 100 SCART2_Rout GND_49 AVDD_MEMPLL_2 C262 C269 C273
4:K11 COMP_Y AUOUTR2/SC2_ROUT 9:AN15 R10 V20
R224 47 C216 0.047uF U1 BIN2P/COMP_PB+ AD2 R251 100 SCART2_Lout GND_50 AVDD_MEMPLL_3
4:K12 COMP_Pb AUOUTL2/SC2_LOUT 9:AM13 R11 0.1uF
COMP
R225 470 C209 1000pF V3 GND_51 0.1uF 0.1uF
SOGIN2 R12
AUDIO OUT
R284 100 J5 GND_52 +3.3V_S6 AVDD_LPLL : 4.69mA

SC2_ID VSYNC2 R13
9:P8
R252
22K
R253
22K
R254
22K
R255
22K
R256
22K
C2017
0.01uF
C2018
0.01uF
C2020
0.01uF
C2021
0.01uF
C2022
0.01uF
C2023
0.01uF
R257
22K
GND_53
R14
A8 R231 22 GND_54
I2S_OUT_MCK AUDIO_MASTER_CLK 7:F7 R15 R20
B7 R232 22 GND_55 AVDD_LPLL
R205 47 C210 0.047uF U3 CVBS1/SC1_CVBS I2S_OUT_WS MS_LRCK 7:F12 +3.3V_AVDD_MPLL
E17;9:O4 SC1_CVBS_IN C7 R233 22
R206 47 C211 0.047uF U2 I2S_OUT_BCK MS_SCK 7:F12 R16 C279
SC2_CVBS_IN CVBS2/SC2_CVBS D8 R234 22
9:AE2 GND_56
R226 47 C217 0.047uF T1 CVBS3/SIDE_CVBS I2S_OUT_SD MS_LRCH 7:F12 R17 H7
4:M2 AV_CVBS_IN C8 R274 100 GND_57 AVDD_MPLL 0.1uF
R227 47 C218 0.047uF T2 I2S_IN_SD C236 C237 C238 C239 R18
CVBS
VCOM1 SEL1_HDMI_SW GND_58
22pF 22pF 22pF 22pF T5 C2029 C2025
OPT OPT OPT OPT GND_59 0.1uF 10uF
T9 6.3V
M1 CVBS4/S-VIDEO_Y GND_60
C235 0.1uF T10 AVDD_33 : 281mA
M2 CVBS6/S-VIDEO_C K4 C223 0.1uF GND_61
VCLAMP T11 +3.3V_AVDD
H4 C233 GND_62
REFP T12 L206
R235 47 C2024 0.047uF N3 CVBS5 J4 GND_63 BLM18PG121SN1D
REFM 0.1uF J7
R236 47 C2019 0.047uF M3 CVBS7 G4 R229 390 AVDD_33_1
REXT C234 0.1uF T13 K7
1% +3.3V GND_64 AVDD_33_2 C263 C271 C274 C260 C267 C286
T14 L7
R228 100 C221 0.047uF W1 CVBS0/RF_CVBS Check GND_65 AVDD_33_3
10:AA8 FE_VMAIN T15 M7 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
R209 100 C222 0.047uF Y3 VCOM0 AE5 C224 0.1uF GND_66 AVDD_33_4
AUCOM T16 N7
AE4 GND_67 AVDD_33_5 +3.3V_S6
AUVRM T17
Y2 CVBSOUT0/SC2_MNTOUT AF4 C225 10uF 6.3V GND_68
9:AL4 DTV/MNT_VOUT AUVRP T18
TV/MNT
AA2 CVBSOUT1 AD4 C226 0.1uF GND_69
FE_VSCART_OUT AUVAG U5 W8
C227 1uF GND_70 AVDD_DM
W13 +3.3V_S6
C228 4.7uF GND_71 C2030
Y21
GND_72
AA23 H8 AVDD_DM : 0.03mA
GND_73 AVDD_USB 0.1uF
C256
C240
2.2uF 0.1uF
Close to IC
as close as possible
081212_MSTAR request
AVDD_OTG : 22.96mA
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN_2 2 12

DDR2 1.8V By CAP - Place these Caps near Memory
+1.8V_DDR +1.8V_DDR
C302 C323
0.1uF 0.1uF
C325
C327
C329
0.1uF
C330
C331
C332
C334
C336
C337
C338
C339
C340
C341
C324
C326
C328
C342
C314
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C303
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C304
C305
C306
C307
C308
C310
C312
C313
C315
C316
C317
C318
C319
C320
0.1uF
0.1uF
Close to DDR Power Pin Close to DDR Power Pin
+1.8V_DDR
+1.8V_DDR +1.8V_DDR

1K 1%
R345
1K
1%
R301
R321
1K 1%
1%
C333 C335
0.1uF
0.1uF
IC300 0.1uF 0.1uF IC301
1%
R322
R343
1K
0.1uF
IC100
1K
HY5PS1G1631CFP-S6 LGE3369A (Saturn6 Non RM) H5PS5162FFR-S6C
R302 1K 1%
C311
C301
C309
C300 0.1uF
SDDR_D[0] DQ0 G8 J2 VREF AR300 D15 VREF J2 G8 DQ0 TDDR_D[0]
SDDR_A[5] ADDR2_A[5] A_MVREF
SDDR_D[1] DQ1 G2 AR303 G2 DQ1 TDDR_D[1]
SDDR_A[3] ADDR2_A[3] BDDR2_A[9] TDDR_A[9]
SDDR_D[2] DQ2 H7 H7 DQ2 TDDR_D[2]
M8 A0 SDDR_A[0] SDDR_A[1] ADDR2_A[1] ADDR2_A[0] C13 T26 BDDR2_A[0] BDDR2_A[3] TDDR_A[3] TDDR_A[0] A0 M8
SDDR_D[3] DQ3 H3 A_DDR2_A0 B_DDR2_A0 H3 DQ3 TDDR_D[3]
A1 SDDR_A[1] SDDR_A[10] 56 56 ADDR2_A[10] ADDR2_A[1] A22 AF26 BDDR2_A[1] BDDR2_A[1] TDDR_A[1] TDDR_A[1] A1
DQ4 M3 M3 DQ4
SDDR_D[4] H1 A_DDR2_A1 B_DDR2_A1 H1 TDDR_D[4]
M7 A2 SDDR_A[2] ADDR2_A[2] B13 T25 BDDR2_A[2] BDDR2_A[10] 56 TDDR_A[10] TDDR_A[2] A2 M7
SDDR_D[5] DQ5 AR301 A_DDR2_A2 B_DDR2_A2 DQ5 TDDR_D[5]
H9 A3 C22 AF23 BDDR2_A[3] AR304 A3 H9
N2 SDDR_A[3] SDDR_A[9] ADDR2_A[9] ADDR2_A[3] TDDR_A[3] N2
SDDR_D[6] DQ6 F1 A_DDR2_A3 B_DDR2_A3 F1 DQ6 TDDR_D[6]
N8 A4 SDDR_A[4] SDDR_A[12] ADDR2_A[12] ADDR2_A[4] A13 T24 BDDR2_A[4] TDDR_A[4] A4 N8
BDDR2_A[5] TDDR_A[5]

SDDR_D[7] DQ7 F9 A_DDR2_A4 B_DDR2_A4 F9 DQ7 TDDR_D[7]
N3 A5 SDDR_A[5] SDDR_A[7] ADDR2_A[7] ADDR2_A[5] A23 AE23 BDDR2_A[5] TDDR_A[5] A5 N3
SDDR_D[8] DQ8 A_DDR2_A5 B_DDR2_A5 BDDR2_A[12] TDDR_A[12] DQ8 TDDR_D[8]
C8 A6 AR302 C12 R26 BDDR2_A[6] A6 C8
N7 SDDR_A[6] ADDR2_A[6] BDDR2_A[7] 56 TDDR_A[7] TDDR_A[6] N7
SDDR_D[9] DQ9 C2 SDDR_A[0] ADDR2_A[0] A_DDR2_A6 B_DDR2_A6 C2 DQ9 TDDR_D[9]
A7 SDDR_A[7] ADDR2_A[7] B23 AD22 BDDR2_A[7] AR305 TDDR_A[7] A7
SDDR_A[0-12]
TDDR_D[0-15]
DQ10 P2 SDDR_A[2] ADDR2_A[2] TDDR_A[0] P2 DQ10

SDDR_D[10] D7 A_DDR2_A7 B_DDR2_A7 BDDR2_A[0] D7 TDDR_D[10]
SDDR_D[0-15]
ADDR2_A[0-12]
P8 A8 SDDR_A[8] ADDR2_A[8] B12 R25 BDDR2_A[8] TDDR_A[8] A8 P8
SDDR_D[11] DQ11 D3 SDDR_A[4] ADDR2_A[4] A_DDR2_A8 B_DDR2_A8 BDDR2_A[2] TDDR_A[2] D3 DQ11 TDDR_D[11]
P3 A9 SDDR_A[9] ADDR2_A[9] C23 AC22 BDDR2_A[9] TDDR_A[9] A9 P3
TDDR_A[0-12]
SDDR_D[12] DQ12 D1 SDDR_A[6] 56 ADDR2_A[6] A_DDR2_A9 B_DDR2_A9 BDDR2_A[4] TDDR_A[4] D1 DQ12 TDDR_D[12]
BDDR2_A[0-12]
M2 A10/AP SDDR_A[10] ADDR2_A[10] B22 AD23 BDDR2_A[10] TDDR_A[10] A10/AP M2
SDDR_D[13] DQ13 SDDR_A[11] R319 56 ADDR2_A[11] A_DDR2_A10 B_DDR2_A10 BDDR2_A[6] 56 TDDR_A[6] DQ13 TDDR_D[13]
D9 A11 R24 BDDR2_A[11] A11 D9
P7 SDDR_A[11] ADDR2_A[11] A12 TDDR_A[11] P7
SDDR_D[14] DQ14 B1 SDDR_A[8] R320 56 ADDR2_A[8] A_DDR2_A11 B_DDR2_A11 BDDR2_A[11] R325 56 TDDR_A[11] B1 DQ14 TDDR_D[14]
R2 A12 SDDR_A[12] ADDR2_A[12] A24 AE22 BDDR2_A[12] TDDR_A[12] A12 R2
SDDR_D[15] DQ15 B9 A_DDR2_A12 B_DDR2_A12 BDDR2_A[8] R326 56 TDDR_A[8] B9 DQ15 TDDR_D[15]
+1.8V_DDR +1.8V_DDR
L2 BA0 SDDR_BA[0] 56 R303 ADDR2_BA[0] C24 AC23 BDDR2_BA[0] R327 56 TDDR_BA[0] BA0 L2
A_DDR2_BA0 B_DDR2_BA0
L3 BA1 SDDR_BA[1] 56 R304 ADDR2_BA[1] B24 AC24 BDDR2_BA[1] R328 56 TDDR_BA[1] BA1 L3
VDD5 A1 A_DDR2_BA1 B_DDR2_BA1 A1 VDD5
L1 BA2 SDDR_BA[2] 56 R305 ADDR2_BA[2] D24 AB22 BDDR2_BA[2] OPT R329 56 TDDR_BA[2] NC4 L1
VDD4 E1 A_DDR2_BA2 B_DDR2_BA2 E1 VDD4
22 R306 ADDR2_MCLK B14 V25 BDDR2_MCLK R330 22
VDD3 J9 A_DDR2_MCLK B_DDR2_MCLK J9 VDD3
VDD2 CK SDDR_CK TDDR_MCLK CK VDD2
M9 J8 J8 M9
OPT
OPT
150
R300
R344
150
VDD1 R1 K8 CK /SDDR_CK 22 R307 /ADDR2_MCLK A14 V24 /BDDR2_MCLK R331 22 /TDDR_MCLK CK K8 R1 VDD1
/A_DDR2_MCLK /B_DDR2_MCLK
K2 CKE SDDR_CKE 56 R308 ADDR2_CKE D23 AB23 BDDR2_CKE R332 56 TDDR_CKE CKE K2
A_DDR2_CKE B_DDR2_CKE
OPT +1.8V_DDR +1.8V_DDR
R346 4.7K R348 OPT 4.7K
0
0
OPT
R350
R351
VDDQ10 A9 K9 ODT OPT SDDR_ODT 56 R309 ADDR2_ODT D14 U26 BDDR2_ODT R333 56 ODT K9 A9 VDDQ10
R347 4.7K A_DDR2_ODT B_DDR2_ODT
VDDQ9 C1 L8 CS R349 OPT 4.7K CS L8 C1 VDDQ9
VDDQ8 C3 K7 RAS /SDDR_RAS 56 R310 /ADDR2_RAS D13 U25 /BDDR2_RAS R334 56 /TDDR_RAS RAS K7 C3 VDDQ8
/A_DDR2_RAS /B_DDR2_RAS
VDDQ7 C7 L7 CAS /SDDR_CAS 56 R311 /ADDR2_CAS D12 U24 /BDDR2_CAS R335 56 /TDDR_CAS CAS L7 C7 VDDQ7
/A_DDR2_CAS /B_DDR2_CAS
VDDQ6 C9 K3 WE /SDDR_WE 56 R312 /ADDR2_WE D22 AB24 /BDDR2_WE R336 56 /TDDR_WE WE K3 C9 VDDQ6
/A_DDR2_WE /B_DDR2_WE
VDDQ5 E9 E9 VDDQ5
VDDQ4 G1 G1 VDDQ4
F7 LDQS SDDR_DQS0_P 56 R313 ADDR2_DQS0_P B18 AB26 BDDR2_DQS0_P R337 56 TDDR_DQS0_P LDQS F7
VDDQ3 G3 A_DDR2_DQS0 B_DDR2_DQS0 G3 VDDQ3
B7 UDQS SDDR_DQS1_P 56 R314 ADDR2_DQS1_P C17 AA26 BDDR2_DQS1_P R338 56 TDDR_DQS1_P UDQS B7
VDDQ2 G7 A_DDR2_DQS1 B_DDR2_DQS1 G7 VDDQ2
VDDQ1 G9 G9 VDDQ1
F3 LDM SDDR_DQM0_P 56 R315 ADDR2_DQM0_P C18 AC25 BDDR2_DQM0_P R339 56 TDDR_DQM0_P LDM F3
A_DDR2_DQM0 B_DDR2_DQM0
B3 UDM SDDR_DQM1_P 56 R316 ADDR2_DQM1_P A19 AC26 BDDR2_DQM1_P R340 56 TDDR_DQM1_P UDM B3
A_DDR2_DQM1 B_DDR2_DQM1
VSS5 A3 A3 VSS5
VSS4 E3 E8 LDQS SDDR_DQS0_N 56 R317 ADDR2_DQS0_N A18 AB25 BDDR2_DQS0_N R341 56 TDDR_DQS0_N LDQS E8 E3 VSS4
A_DDR2_DQSB0 B_DDR2_DQSB0
VSS3 J3 A8 UDQS SDDR_DQS1_N 56 R318 ADDR2_DQS1_N B17 AA25 BDDR2_DQS1_N R342 56 TDDR_DQS1_N UDQS A8 J3 VSS3
A_DDR2_DQSB1 B_DDR2_DQSB1
VSS2 N1 N1 VSS2
AR306 AR310
VSS1 P9 SDDR_D[11] ADDR2_D[11] ADDR2_D[0] B15 W25 BDDR2_D[0] BDDR2_D[11] TDDR_D[11] P9 VSS1
R3 NC5 A_DDR2_DQ0 B_DDR2_DQ0 NC5 R3
SDDR_D[12] ADDR2_D[12] ADDR2_D[1] A21 AE26 BDDR2_D[1] BDDR2_D[12] TDDR_D[12]
R7 NC6 A_DDR2_DQ1 B_DDR2_DQ1 NC6 R7
SDDR_D[9] ADDR2_D[9] ADDR2_D[2] A15 W24 BDDR2_D[2] BDDR2_D[9] TDDR_D[9]
A_DDR2_DQ2 B_DDR2_DQ2
SDDR_D[14] 56 ADDR2_D[14] ADDR2_D[3] B21 AF24 BDDR2_D[3] BDDR2_D[14] TDDR_D[14]
VSSQ10 B2 A_DDR2_DQ3 B_DDR2_DQ3 AR311 B2 VSSQ10
NC1 AR307 ADDR2_D[4] C21 AF25 BDDR2_D[4] 56 NC1
VSSQ9 A2 SDDR_D[4] ADDR2_D[4] A_DDR2_DQ4 BDDR2_D[4] TDDR_D[4] A2 VSSQ9
B8 B_DDR2_DQ4 B8
E2 NC2 ADDR2_D[5] C14 V26 BDDR2_D[5] NC2 E2
VSSQ8 SDDR_D[3] ADDR2_D[3] A_DDR2_DQ5 B_DDR2_DQ5 BDDR2_D[3] TDDR_D[3] VSSQ8
A7 NC3 C20 AE25 NC3 A7
R8 SDDR_D[1] ADDR2_D[1] ADDR2_D[6] BDDR2_D[6] BDDR2_D[1] TDDR_D[1] R8
VSSQ7 D2 A_DDR2_DQ6 B_DDR2_DQ6 D2 VSSQ7
ADDR2_D[7] C15 W26 BDDR2_D[7]
VSSQ6 SDDR_D[6] 56 ADDR2_D[6] A_DDR2_DQ7 B_DDR2_DQ7 BDDR2_D[6] 56 TDDR_D[6] VSSQ6
D8 C16 Y26 D8
AR308 ADDR2_D[8] BDDR2_D[8] AR312
VSSQ5 E7 VSSDL SDDR_D[15] ADDR2_D[15] A_DDR2_DQ8 B_DDR2_DQ8 BDDR2_D[15] TDDR_D[15] VSSDL E7 VSSQ5
J7 ADDR2_D[9] C19 AD25 BDDR2_D[9] J7
VSSQ4 F2 SDDR_D[8] ADDR2_D[8] A_DDR2_DQ9 B_DDR2_DQ9 BDDR2_D[8] TDDR_D[8] +1.8V_DDR F2 VSSQ4
+1.8V_DDR ADDR2_D[10] B16 Y25 BDDR2_D[10]
VSSQ3 VSSQ3
BDDR2_D[0-15]
F8 SDDR_D[10] ADDR2_D[10] A_DDR2_DQ10 B_DDR2_DQ10 BDDR2_D[10] TDDR_D[10] F8

ADDR2_D[11] B20 AE24 BDDR2_D[11]
ADDR2_D[0-15]
VSSQ2 H2 SDDR_D[13] 56 ADDR2_D[13] A_DDR2_DQ11 B_DDR2_DQ11 BDDR2_D[13] TDDR_D[13] H2 VSSQ2
AR309 ADDR2_D[12] A20 AD26 BDDR2_D[12] AR313 56
VSSQ1 H8 J1 VDDL A_DDR2_DQ12 B_DDR2_DQ12 VDDL J1 H8 VSSQ1
SDDR_D[7] ADDR2_D[7] ADDR2_D[13] A16 Y24 BDDR2_D[13] BDDR2_D[7] TDDR_D[7]
SDDR_D[0] ADDR2_D[0] A_DDR2_DQ13 B_DDR2_DQ13 BDDR2_D[0] TDDR_D[0]
ADDR2_D[14] B19 AD24 BDDR2_D[14]
SDDR_D[2] ADDR2_D[2] A_DDR2_DQ14 B_DDR2_DQ14 BDDR2_D[2] TDDR_D[2]
ADDR2_D[15] A17 AA24 BDDR2_D[15]
SDDR_D[5] ADDR2_D[5] A_DDR2_DQ15 B_DDR2_DQ15 BDDR2_D[5] 56 TDDR_D[5]
56

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR2 3 12

AV
R400
JK402 0
AV_CVBS_IN
PPJ218-01 AMOTECH PC AUDIO
R411 C414
D406 47pF
[YL]O_SPRING 30V 75
4A 50V
+3.3V JK401
[YL]CONTACT PEJ024-01
5A
R401 3 E_SPRING
2A [YL]U_CAN 4.7K R409
AV_CVBS_DET T_TERMINAL1
AMOTECH 6A
[WH]C_LUG C404 1K
3B D403 0.1uF
5.6V 16V B_TERMINAL1
7A
2B [WH]U_CAN PC_R_IN 2:S16
D421 R451 R455
4 R_SPRING C422 15K 0
R413 AMOTECH R449
4C [RD]O_SPRING 10K 100pF
5.6V 470K R453
AV_L_IN 50V 10K
5 T_SPRING OPT
[RD]CONTACT AMOTECH
5C R410 C413
D404 R452
5.6V 470K 100pF B_TERMINAL2
R415
12K
7B 15K
[RD]U_CAN 50V PC_L_IN 2:S16
2C
R456
R414 T_TERMINAL2 D422 C424 R450 0
10K 6B AMOTECH
AV_R_IN 100pF 470K
5.6V 50V R454
AMOTECH OPT
8 SHIELD_PLATE 10K
D405
R408 C412
R417
12K
5.6V
470K 100pF
50V

+3.3V
COMPONENT Side USB (Minerva OPT)

R418
4.7K
R425 SPDIF OPTIC JACK
AMOTECH 1K
COMP_DET 1:AA22 IC402
D412 MP6211DH
JK400 +5V_USB_SIDE
5.6V +5V_GENERAL +5V_GENERAL OUT_3 GND
8 1
PPJ229-01
OUT_2 IN_1
7 2
2A [GN]1P_CAN
C405 C407 OUT_1 IN_2
6 3
R462 0.1uF 10uF

FLAG EN
4A [GN]CONTACT 1K OPT 5 4
0.1uF
C403
R419 JK403 USB_CTL R420

3A [GN]O_SPRING AMOTECH 0 1:AI26 10K
JST1223-001
COMP_Y 2:E20
D407 SPDIF_OUT
R426
2B [BL]1P_CAN 30V 75 GND
1
2:X18 R403
47 USB_OCD
5B [BL]C_LUG_L
AMOTECH COMP_Pb 2:E20 OPT VCC

2
ZD403 1:AI14
D408 R427
ADMC5M03200L_AMODIODE
2C [RD]1P_CAN1 75
30V C406
0.1uF VINPUT
Fiber Optic
3
16V
1
5C [RD]C_LUG_L
4
AMOTECH COMP_Pr 2:E20
JK405
D409 R428
2D [WH]1P_CAN 75 FIX_POLE
2
30V SIDE_USB_DM 1:AL8

R432 R435
5D [WH]C_LUG_L 10K 0
COMP_L_IN
KJA-UB-4-0004
2:S16
3
SIDE_USB_DP 1:AL7
D410 R429 C415
2E [RD]1P_CAN2 AMOTECH 1000pF D425
470K
USB DOWN STREAM
D426
R434
12K
5.6V 50V CDS3C05HDMI1
4
5.6V CDS3C05HDMI1
4E [RD]CONTACT 5.6V
5
R431 R436
3E [RD]O_SPRING 10K 0
COMP_R_IN 2:S16
D411
C417
AMOTECH R430
5.6V 1000pF
470K
R433
12K
50V
+5V_ST
D400
ENKMC2838-T112
A1
C
A2
IC400
CAT24C02WI-GT3 C400 RS232C
0.1uF +5V_ST
A0 VCC
16V
1 8
C425
R406 EDID_WP 1:AJ19 0.33uF
A1 WP R404 R412 R416 16V
2 7 2.2K
2.2K 10K 100
A2 SCL
3 6 ISP_RXD
[ PC ] C429
VSS SDA
0.33uF
4 5 ISP_TXD C428 16V
0.33uF
16V C430
C401 C402 0.047uF
18pF 18pF 25V
50V 50V
R444 R445
22
RIN2
DOUT2
V-
C2-
C2+
C1-
V+
C1+
22
8
7
6
5
4
3
2
1
D413 IC403
30V
MAX3232CDR
D414
30V
ADUC30S03010L_AMODIODE
0 R437 D419
2:E18 DSUB_VSYNC ADMC5M03200L_AMODIODE
9
10
11
12
13
14
15
16
5.6V
0 R440
2:E18 DSUB_HSYNC
D418
OPT
+3.3V
GND
VCC
ADMC5M03200L_AMODIODE
DIN2
DIN1
RIN1
5.6V +5V_ST
ROUT2
ROUT1
DOUT1
OPT
C431
R447 0.1uF
2:E19 DSUB_B
D415 4.7K 16V
C418 ADUC30S03010L_AMODIODE JP414 R448
OPT 30V DSUB_DET IR_OUT
R443
75
D420 1K
JP412 R446
0 ADMC5M03200L_AMODIODE
5.6V R457 R458 R461 OPT
0 D423
OPT 6.2K 6.2K R459 ADUC30S03010L_AMODIODE
OPT
100
OPT
30V
R460
100
2:E19 DSUB_G
JP413
C419 D416 DBG_TX
@maker
OPT ADUC30S03010L_AMODIODE
30V DBG_RX
R441
75
D424 OPT
11
12
13
14
15
ADUC30S03010L_AMODIODE
C426 220pF 50V 30V
16
6
7
8
9
10
C427 220pF 50V
1
2
3
4
5
2:E18 DSUB_R
C420 D417 P400 P401
OPT ADUC30S03010L_AMODIODE KCN-DS-1-0089
KCN-DS-1-0088
30V
R442
75
6
7
8
9
10
1
2
3
4
5

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. INTERFACE 4 12

DVB-CI SLOT
+5V_CI_ON
DVB-CI TS INPUT
CI_DATA[0-7] AR506
33 FE_TS_DATA[7]
CI_MDI[7] FE_TS_DATA[6]
CI_MDI[4]
+5V_GENERAL AR507 FE_TS_DATA[3]
C505 33
10uF
10V CI_MDI[2] FE_TS_DATA[1]
EAG41860101 CI_MDI[1] FE_TS_DATA[0]
FE_TS_DATA[0-7]
10K
R505
P500 CI_MDI[0]
CI_DATA[0-7]
/CI_CD1
C501 10067972-050LF
FE_TS_DATA[0-7]
0.1uF
16V 35 AR513
33
R511 100 36 CI_DATA[3] D14 CI_MISTRT FE_TS_SYN
37 3 CI_DATA[4] FE_TS_VAL_ERR
AR500 CI_MIVAL_ERR
33 38 4 CI_DATA[5]
CI_TS_DATA[4]
R517
10K
39 5 CI_DATA[6] FE_TS_CLK
CI_TS_DATA[5] CI_MCLKI
40 6 CI_DATA[7]
CI_TS_DATA[6]
CI_TS_DATA[7] 41 7 R515 47
/PCM_CE
42 8 CI_ADDR[10]
R508 10K 43 9 CI_OE
44 10 CI_ADDR[11]
CI_IORD
45 11 CI_ADDR[9] +5V_GENERAL
CI_IOWR
46 12 CI_ADDR[8]
47 13 CI_ADDR[13]
CI_MDI[0]
CI_ADDR[14]
10K
48 14
R518
CI_MDI[1]
CI_MDI[2] 49 15 CI_WE
50 16 R516 100
CI_MDI[3] /PCM_IRQA
0.1uF

C503 51 17
R513 0 R514 0 C509
52 18 C508
GND 0.1uF
OPT 53 19 OPT 0.1uF
CI_MDI[4] 16V
GND
CI_MDI[5] 54 20
55 21 CI_ADDR[12]
CI_MDI[6] DVB-CI HOST I/F
CI_ADDR[7] GND
CI_MDI[7] 56 22
R509 10K 57 23 CI_ADDR[6]
R503 47 58 24 CI_ADDR[5]
PCM_RST
R500 47 59 25 CI_ADDR[4] CI_DET
/PCM_WAIT
AR503 60 26 CI_ADDR[3]
REG
33 61 27 CI_ADDR[2]
CI_TS_CLK
CI_TS_VAL 62 28 CI_ADDR[1]
CI_TS_SYN 63 29 CI_ADDR[0] IC501 +3.3V_CI
64 30 CI_DATA[0] C511
65 31 CI_DATA[1] 0.1uF
CI_ADDR[0-14] 1OE VCC 16V
CI_TS_DATA[0] 66 32 CI_DATA[2] 1 20
33 TOSHIBA
CI_TS_DATA[1] 67 33
CI_TS_DATA[2]

68 34 1A1 2OE
CI_TS_DATA[3] PCM_A[0] 2 19
0
AR504 G2
2 G1
1 0ITO742440D
OPT
2Y4 1Y1
R510 100 CI_ADDR[7] 3 18 CI_ADDR[0]
/CI_CD2
R512
+5V_GENERAL GND
1A2 2A4
10K
4 17
R507
PCM_A[1] PCM_A[7]
GND
2Y3 1Y2
CI_ADDR[6] 5 16 CI_ADDR[1]
R506 GND
1A3 2A3
10K C502 6 15
PCM_A[2] PCM_A[6]
0.1uF
16V
TC74LCX244FT
2Y2 1Y3
CI_MISTRT
CI_MIVAL_ERR 1A4 2A2
PCM_A[3] 8 13 PCM_A[5]
CI_MCLKI 2Y1 1Y4

GND 2A1
10 11 PCM_A[4]
DVB-CI DETECT DVB-CI SERIAL BUFFER TS
+3.3V_CI +3.3V_CI +3.3V_CI
IC500
74LVC1G32GW
E12 CI_DATA[0] AR508 PCM_D[0]

B 1 5 VCC 33
/CI_CD2 CI_DATA[1] PCM_D[1]
A 2
/CI_CD1 16V CI_DATA[2] PCM_D[2]
10K
R520
GND 3 4 Y
C510
D4 CI_DATA[3] PCM_D[3]
0.1uF
IC502
AB9
GND
R519 74LVC541A(PW) AR509
CI_DET CI_DATA[4] 33 PCM_D[4]
CI_DATA[0-7]
47 CI_DATA[5] PCM_D[5]
R521
1:AA10 CI_DATA[6] PCM_D[6]
/PCM_CD OE1 VCC
PCM_D[0-7]
47 1 20 CI_DATA[7] PCM_D[7]
C512
0.1uF
AE5;10:J17 A0 OE2
FE_TS_CLK 2 19
PCM_D[0-7]
AE5;10:W19 R526
A1 Y0 47 CI_DATA[0-7]
FE_TS_VAL_ERR 3 18 BUF_TS_CLK
AE5;10:J17 R528
CI POWER ENABLE CONTROL A2 Y1 47
FE_TS_SYN 4 17 BUF_TS_VAL_ERR
AR510
R527 33
AG4;10:J17 A3 Y2 47 CI_ADDR[8] PCM_A[8]
FE_TS_DATA[0] 5 16 BUF_TS_SYN
CI_ADDR[9] PCM_A[9]
+5V_CI_ON R522 R525 CI_ADDR[10] PCM_A[10]
BUFFER
+5V_ST 10K A4 Y3 47
Q501 6 15 BUF_TS_DATA[0] CI_ADDR[11] PCM_A[11]
RSR025P03
S D R523
10K A5 Y4
7 14
R504 AR511
C500 22K C507 33
0.1uF G A6 Y5 CI_ADDR[12] PCM_A[12]
0.1uF R524 8 13
16V 16V 33K CI_ADDR[13] PCM_A[13]
CI_ADDR[14] PCM_A[14]
C504 A7 Y6
R529 9 12 /PCM_REG
10uF REG
2.2K
10V
C GND Y7
R502 10 11
10K B Q500
PCM_5V_CTL 2SC3052 AR512
33
CI_OE /PCM_OE
E
CI_WE /PCM_WE
R501
33K CI_IORD /PCM_IORD
CI_IOWR /PCM_IOWR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PCMCIA 5 12

5V_HDMI_1
HDMI EEPROM
C
R615
Q601 B 10K
2SC3052 HPD1
22 5V_HDMI_1 +5V_ST
E
C600
19
0.1uF
A2
A1
16V UI_HW_PORT2 ENKMC2838-T112
18 R612
1K D600
2K
C
17
R600
JP600
R610 22
16 DDC_SDA_1 IC600
2:E10;AL9 EDID_WP
DDC_SCL_1
CAT24C02WI-GT3
15 R611 22 +3.3V JP606
2:E10;AL9
JP601
14 R607
0 K19;X14;AH25 A0 VCC
D0+_HDMI2
D0-_HDMI2
CK+_HDMI2
CK-_HDMI2
DDC_SCL_2
DDC_SDA_2
D2+_HDMI2
D2-_HDMI2
D1+_HDMI2
D1-_HDMI2
CEC_REMOTE 1 8
13
2:E8
CK-_HDMI1 +5V_HDMI_SW R618
12 A1 WP 0 R626 R629
L600
2 7 C603
0.1uF 4.7K 4.7K
11 2:E8
CK+
10 A2 SCL
BLM18PG121SN1D
CK+_HDMI1 3 6
D0- 2:E9 DDC_SCL_1
9 R623 0
D605
30V
D0-_HDMI1 C608 C609 C610 C611 C612 C613 C614
MMBD301LT1G
EAG39789402
D0_GND 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF VSS SDA
8 4 5
C616 R621 0 DDC_SDA_1
D0+ 2:E8
7 0.1uF
D0+_HDMI1
D1- 2:E9
6 D1-_HDMI1
D1_GND
HPD3
A24
B24
VCC_8
A23
B23
GND_7
A22
B22
VCC_7
A21
B21
SCL2
SDA2
HPD2
VDD
5
D1+ 2:E9
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
4 D1+_HDMI1
D2- SDA3 A14
EDID_WP
2:E9 1 48
3 DDC_SDA_1 D2+_HDMI3
D2-_HDMI1 SCL3 47 B14
DDC_SCL_1 2
D2_GND D2-_HDMI3
2 GND_1 3 46 VCC_6 5V_HDMI_2
+5V_ST
D2+ 2:E9 B31 4 45 A13

1 CK-_HDMI1 D1+_HDMI3 IC602
D2+_HDMI1 A31 44 B13
CK+_HDMI1 5
A2
A1
VCC_1 GND_6 D1-_HDMI3 CAT24C02WI-GT3

6 IC603 43 JP611 ENKMC2838-T112
20 B32 A12
7 42 D602
D0-_HDMI1 TMDS351PAGR D0+_HDMI3
C
21 A32 8 41 B12 A0 VCC

D0+_HDMI1 D0-_HDMI3 1 8
GND_2 9 40 VCC_5
B33 10 39 A11 R640
D1-_HDMI1 CK+_HDMI3 A1 WP 0 R649
A33 38 B11 2 7 R646
GND D1+_HDMI1 11 C607
UI_HW_PORT1 CK-_HDMI3 0.1uF 4.7K 4.7K
J600 VCC_2 12 37 SCL1
DDC_SCL_3
B34 13 36 SDA1 A2 SCL
D2-_HDMI1 DDC_SDA_3 3 6 DDC_SCL_2
A34 14 35 HPD1
UI_HW_PORT1
UI_HW_PORT3
D2+_HDMI1 R645 0
R624 GND_3 15 34 EQ
5V_HDMI_2 4.7K VSS SDA
VSADJ 16 33 S2 4 5 DDC_SDA_2
+3.3V
1/10W R642 0
1%
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
C
R616
Q602 B 10K GND
Y4
Z4
Y3
Z3
Y2
Z2
Y1
Z1
S1
OPT
4.7K
R650
2SC3052 HPD2
22
VCC_3
GND_4
VCC_4
GND_5
E
SCL_SINK
SDA_SINK
HPD_SINK
C601 5V_HDMI_3
19 +5V_ST
0.1uF

R633
0
16V
18 R613
1K JP609
2K
A2
A1
17
R601
R603 22 2:E12;AL19 ENKMC2838-T112
DDC_SDA_2 D606
16
C
2:E12;AL18
15 22 DDC_SCL_2 SEL1_HDMI_SW IC6004
R604
CAT24C02WI-GT3 EDID_WP
14 R605 JP603 K8;X14;AH25 SEL2_HDMI_SW
0
CEC_REMOTE JP608
13 +3.3V
2:E11 A0 VCC
CK-_HDMI2 1 8
12
R641
11 2:E10 A1 WP 0 R644
CK+ 2 7 C615 R643
10 0.1uF 4.7K
CK+_HDMI2 4.7K
D2+_HDMI_SW
D2-_HDMI_SW
D1+_HDMI_SW
D1-_HDMI_SW
D0+_HDMI_SW
D0-_HDMI_SW
CK+_HDMI_SW
CK-_HDMI_SW
D0- 2:E11
9 D0-_HDMI2 A2 SCL R647 0
3 6
D0_GND DDC_SCL_3
4.7K
R651
4.7K
R652
8
EAG39789402
D0+ 2:E11 VSS SDA
7 D0+_HDMI2 DDC_SDA_SW 4 5
R648 0 DDC_SDA_3
D1- 2:E11 DDC_SCL_SW
6 D1-_HDMI2
D1_GND
5
D1+ 2:E11
4 D1+_HDMI2
D2- 2:E12
3 5V_HDMI_4
D2-_HDMI2 +5V_ST
D2_GND
2
A2
A1
D2+ 2:E12
1 D2+_HDMI2 ENKMC2838-T112
D601
C
20 SIDE HDMI IC601

21 CAT24C02WI-GT3 EDID_WP
JP607
HPD3
A24
B24
VCC_8
A23
B23
GND_7
A22
B22
VCC_7
A21
B21
SCL2
SDA2
HPD2
RESERVE2
5V_HDMI_4
A0 VCC
UI_HW_PORT2 1 8
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
J601
GND
SDA3 1 48 A14 R619
C A1 WP 0 R630
JACK_GND R617 SCL3 47 B14 2 7 C604 R628
2 0.1uF 4.7K
Q603 B 10K 4.7K
GND_1 3 46 VCC_6
2SC3052 HPD4
20 B31 4 45 A13 A2 SCL R620 0
3 6
E A31 44 B13 DDC_SCL_4
5V_HDMI_3 C602 5
19 VCC_1 6 43 GND_6
0.1uF IC603-*1 VSS SDA
16V B32 7 42 A12 4 5
18 R614 BU16027KV DDC_SDA_4
1K A32 41 B12 R622 0
C 8
2K
R634 17 GND_2 VCC_5
R602
10K R608 22 2:E14;AL14 9 40
JP604
Q604 B
2SC3052 HPD3 DDC_SDA_4 B33 10 39 A11
22 16
2:E15;AL13 A33 38 B11
11
E 15 DDC_SCL_4
VCC_2 SCL1
JP605
C606 R606 22 12 37
19 $0.26
0.1uF K19;K8;AH25 B34 13 36 SDA1
16V 14
18 R609 0 A34 HDMI S/W_rohm 35 HPD1
R635 CEC_REMOTE 14
1K 13 GND_3 RESERVE1
2K
JP610 2:E13 15 34
17
R636
R637 22 CK-_HDMI4 VSADJ 16 33 S2
12
16 DDC_SDA_3
11
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
DDC_SCL_3 CK+ 2:E13

15 R638 22 10 +3.3V_ST
CK+_HDMI4
D0- 2:E13
Y4
Z4
Y3
Z3
Y2
Z2
Y1
Z1
S1
14 JP602 9
R639 0 D0-_HDMI4
CEC_REMOTE D0_GND
VCC_3
GND_4
VCC_4
GND_5
13 8
EAG42463001
SCL_SILK
SDA_SILK
HPD_SILK
CK-_HDMI3 D0+ 2:E13 R627 R631

12 7
D0+_HDMI4 120K OPT
D1- 2:E14
11 6
CK+ D1-_HDMI4
10 CK+_HDMI3 D1_GND Q600 MMBD301LT1G
D0- 5 SSM6N15FU D603
9 D0-_HDMI3 D1+ 2:E14 30V
D0_GND 4
D1+_HDMI4
8
EAG39789402
D2- 2:E14 SOURCE1 DRAIN1
D0+ 3 HDMI_CEC 1 6
D2-_HDMI4 CEC_REMOTE
7 D0+_HDMI3 D2_GND
D1- 2
6 GATE1 GATE2
D1-_HDMI3 D2+ 2:E14 2 OPT 5
D1_GND 1
D2+_HDMI4
5
D1+ DRAIN2 SOURCE2 OPT
4 3 4
D1+_HDMI3 C605
D2- 0.1uF
3 D2-_HDMI3 16V
D2_GND
2
D2+ UI_HW_PORT4 R625 0 GND
1 D2+_HDMI3 GND
J602
20
21
J603
UI_HW_PORT3
GND

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 6 12

D704 R725 R705
1N4148W 12 12 SPK_L+ AB10
100V
+24V OPT C755
L704 0.01uF
C741 DA-8580 50V
1000pF C749 R730
EAP38319001 R734
50V 0.1uF 4.7K
2S 2F 50V 3.3
C745
C733 C729
0.1uF C725 C742 0.47uF SPEAKER_L
0.1uF 1000pF 50V
50V 10uF 50V 1S 1F R735
50V 35V
D705 C750 3.3
0.1uF R731
1N4148W R726 50V C756
R713 4.7K 0.01uF
100V 50V
OPT 12 12
C716 SPK_L- AB11
22000pF
50V C726
22000pF
50V
C727
0.1uF
R704 16V
100
1:AA21 AMP_RST
PGND1A_2
PGND1A_1
OUT1A_2
OUT1A_1
PVDD1A_2
PVDD1A_1
PVDD1B_2
PVDD1B_1
OUT1B_2
OUT1B_1
PGND1B_2
PGND1B_1
BST1B
VDR1B
C707
1000pF
56
55
54
53
52
51
50
49
48
47
46
45
44
43
50V R740 C730
0 BST1A 42 NC 0.1uF R727 R716
2:X21 AUDIO_MASTER_CLK C713 1 C732 SPK_R+ AB11
VDR1A VDR2A 16V D706 12
2 41 22000pF 12
0.1uF16V 1N4148W
RESET 40 BST2A 50V
+1.8V_AMP +3.3V 3 100V L705 C757
AD 4 39 PGND2A_2 OPT C743 DA-8580
+1.8V_AMP 1000pF 0.01uF
DVSS_1 38 PGND2A_1 50V EAP38319001 C746 C751 R732
C709 5 0.47uF 50V
2S 2F 50V 0.1uF 4.7K R736
0.1uF VSS_IO 6 IC701 37 OUT2A_2
50V 3.3 SPEAKER_R
CLK_I 7 36 OUT2A_1 C744
L701 1000pF
C708 VDD_IO 8 35 PVDD2A_2 50V 1S 1F
C705 1000pF R737
EAN60664001

L700 50V DGND_PLL 9 34 PVDD2A_1
100pF 3.3
R703
0
R708 AGND_PLL 33 PVDD2B_2 D707 C752 R733
50V 10 R728
1N4148W R719 0.1uF 4.7K C758
3.3K LFM 11 NTP-3100L 32 PVDD2B_1 0.01uF
100V 12
BLM18PG121SN1D
12 50V 50V
AVDD_PLL 12 31 OUT2B_2 OPT
SPK_R- AB12
DVDD_PLL OUT2B_1
BLM18PG121SN1D
13 30 C728 C720
TEST0 14 29 PGND2B_2 0.1uF 0.1uF
50V 50V
C700 C702
1uF 0.1uF C704 C706 +24V
10V 1uF 0.1uF
15
16
17
18
19
20
21
22
23
24
25
26
27
28
16V 10V 16V
WCK
BCK
SDA
SCL
+1.8V_AMP
DVDD
SDATA
FAULT
VDR2B
BST2B
C734 C735 C736
DVSS_2
10uF
0.1uF 0.1uF
PGND2B_1
35V
MONITOR_0
MONITOR_1
MONITOR_2
50V 50V
MCLK SDATA WCK BCK TP is necessory C760 C724
1uF C715 0.1uF C731
10V 0.1uF 16V
16V
22000pF
50V
R722 100

2:X21 MS_LRCH +3.3V_ST
R720 100 C721
2:X21 MS_LRCK 0.1uF
R721 100 16V
2:X21 MS_SCK
R709 100 R724
1:L22;11:AG10 SDA_SUB/AMP R718 100 10K D709
R710 100 ENKMC2838-T112
1:L22;11:AG9 SCL_SUB/AMP C A1
R729 SB_MUTE 1:AA19;G25;9:AI24;9:AI25
Q701 B C
C712 C714 R717
33pF 33pF 33K OPT 2SC3052 10K A2
NTP_MUTE 1:AA22
50V 50V E WAFER-ANGLE
L706
120-ohm
AE3 SPK_L+
4
L707
120-ohm
Monitor0_1_2 TP is necessory AE5 SPK_L-
3
L709
120-ohm
AE7 SPK_R+
2
L708
120-ohm
AE9 SPK_R-
1
P700
2A => 5A
EARPHONE AMP
HP_LOUT IC700
TPA6110A2DGNRG4
2:X19 +3.3V
+5V_EARPHONE
R711 C717
R712 0.22uF
BYPASS IN1- 20K 20K
1 8
C701 16V R707
R701 1uF C718 10K
10K GND VO1 100uF 16V
6.3V 2 7
D710 4
R714 C723 C761
5.6V
SHUTDOWN VDD 0.1uF 22uF
3 6 C719 1K AMOTECH
25V 3
C703 100uF
HP_ROUT 0.22uF R702 C710 16V HP_DET
16V 20K IN2- VO2 0.1uF
4 5 2
16V
R715 C722 D711 C762
2:X19 1
0.1uF AMOTECH 22uF
1K 5.6V
+5V_EARPHONE 25V 5
R706 +5V_EARPHONE +5V_GENERAL
D700
20K C711 ENKMC2838-T112 DJ-S3600LM
R742 100uF A1
JK700
10K C 16V C
R700 B A2
Q700
10K 2SC3052
C
E
R741 B Q705
HP_MUTE
10K 2SC3052
J25;M25
E
D708
ENKMC2838-T112
A1
1:AA19;R15;9:AI24;9:AI25 SB_MUTE
C
HP_MUTE
A2
1:AJ19 SIDE_HP_MUTE E23;M25

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AMP 7 12

+12V +12V
FROM LIPS & POWER B/D L810
BLM18PG121SN1D
+12V
C842 C845
C841 0.1uF 10uF
0.01uF 16V 16V R848
25V 100K
+5V_GENERAL OPT Q806
RSR025P03 +5V_HDMI_SW
+3.3V_ST S D
IC808
R818 MP2305DS
BackLight On/Off +5V_ST BLM18PG121SN1D
3.3K R842 C847 PANEL_POWER C868
10K 4.7uF 0.1uF L818
R814 G 16V
R822 +3.3V_ST R837 16V C853 BS SS
100 RT1P141C-T112 1 8
10K 22K
Q801 C864
R815 P800 +1.8V_DDR 1uF $0.28 0.1uF
C R804 R843 IN EN
R821 6.8K FW20020-24S 1.8K 25V 16V
INV_CTL 10K 2 7
10K B Q802 OPT 3 1 C860
R805 C848
2SC3052 R807 C1130 5.6nF R852
10K OPT 0.01uF 50V
33K 2 R806 C SW COMP 9.1K
. . R832 C839 25V 3 6
R823 E 1 2 OPT 0 C835
10K B Q805 22uF 0.47uF
10K . .
3 4 C R802 2SC3052 25V 25V
OPT +24V . 5 6 . 10K OPT C859 GND FB
Q800 B R810 0 C 4 5
. . R833 E 0.1uF
L804 7 8 2SC3052 10K R839
PANEL_CTL B Q804 16V R2 R853 +5V_GENERAL
CB3216UA121 . 9 10 . POWER_ON/OFF1 22K 12.4K R811
E 2SC3052 R847
. . R1 1% +5V_USB_SIDE
11 12 1:AK10 56K BLM18PG121SN1D
OPT E 1% 1
C813 . 13 14 . +5V_ST L821
C832 C821 Vout=0.923*(1+R1/R2) R801
68uF 68uF 0.1uF . 15 16 . L806
35V 35V 50V CB3216UA121
17 . 18 . L819 1 C809
C858 C850 C812
. 22UH 470uF
19 12 20 22uF 0.1uF 0.1uF
L829 16V 16V
21 11 14 22 16V 16V
BLM18PG121SN1D C802 C885
. C824 +3.3V +1.8V_DDR
23 13 24 0.1uF 0.1uF
OPC_OUT2 220uF
16V 16V
C834 16V +5V 450 mA
16V
0.1uF
OPT +12V L826
L807 C877
2.2uH
CB3216UA121 Vout=0.8*(1+R1/R2) 0.1uF
16V
R841
10K
R872

ERROR_OUT C807 R1 +12V
0 0.1uF C865 C826 R809
C820 5V SEPERATE FRC WITH TUNER 5V
16V 0.1uF 0.1uF 100uF 10.5K
OPT 16V 16V 16V 1% +12V
C829
1uF
R2 6.3V
R803
A_DIM R851 R859 22 R871 100K
4.7K PWM_DIM
8.2K
PGND2_2
SW2_2
SW2_1
EN2
FB2
OPT 22uF
1% C876 IC810
C818 OPC_OUT1 +5V_ST MP2305DS
20
19
18
17
16
6.3V
1uF BLM18PG121SN1D PGND2_1 1 15 ITH2 C823
C895 L828 0.1uF
L817 PVCC_1 2 14 AVCC 16V
OPT 0.1uF BS SS
BLM18PG121SN1D 10uF 1 8
16V
C878 PVCC_2 3 IC806 13 NC
R874 $0.28
BD9150MUV IN EN
PVCC_3 4 12 AGND
75K 2 7
10uF C862
R873 C863
C879 PGND1_1 5 11 ITH1 5.6nF R813
5% 0.01uF 50V
SW COMP 9.1K
56000 C816 25V 3 6
C804
6
7
8
9
10
22uF 0.47uF
5% C883 25V
25V
330pF GND FB
4 5
EN1
FB1
+3.3V_MEMC
22uF C882
SW1_1
SW1_2
Stand-by +3.3V C880 330pF R2 R850
12.4K

PGND1_2
+3.3V_AVDD
1%
1%
R1
33K
BLM18PG121SN1D
R849
L827
L805 L815
2.2uH BLM18PG121SN1D Vout=0.923*(1+R1/R2)
+5V_ST +3.3V_ST
GND
L808
C811 22UH C867 C869
Replaced Part GND
+3.3V_ST +3.3V_AVDD_MPLL 0.1uF 22uF 0.1uF
IC801 16V 16V 16V
L803 +3.3V
AP1117E33G-13 +3.3V_ST
BLM18PG121SN1D
IN $0.048 ADJ/GND
3 1
C815
C803 2 C806 C808 0.1uF
100uF R856 C825 +3.3V_CI
0.1uF OUT 0.1uF 16V
16V 16V 16V 4.7K 0.1uF
16V L814
R800 BLM18PG121SN1D
1:AK11 POWER_ON/OFF1
10K C852
0.1uF
10uF 16V +1.26V Core for FRC
C866
Vout=0.8*(1+R1/R2)
600mA
+3.3V Replaced Part
IC803
+1.8V_AMP
AP1117E18G-13
IN $0.048 ADJ/GND
3 1
+5V_GENERAL +3.3V_TUNER 50 mA +3.3V_MEMC
2
Replaced Part OUT C822 C827
C800 C814 100uF 0.1uF
IC809 100uF 0.1uF 16V
16V 16V IC802
AP1117E33G-13 16V
BD9130EFJ-E2 R844
IN $0.048 ADJ/GND 10K
3 1
C890 2 C893 C894 ADJ EN
C892 100uF +3.3V IC804 1 8
0.1uF OUT 0.1uF +1.2V_TUNER
100uF 16V AZ1117H-1.2TRE1 C320 MUST BE PLACED NEAR PVCC PIN
16V 16V $0.23
16V
VCC PVCC +1.26V_MEMC
IN OUT 2 7
3 $0.05 2 C830
180 mA
1 ITH SW
10uF L809
C801 C810 3 6 6.3V
ADJ/GND C884
100uF C805 100uF 0.1uF R829 2.2uH
16V 0.1uF 16V 16V
16V 18K GND PGND
4 5
C819 R834
C817 10K
10uF 0.1uF
C828 1% C831 C833
6.3V 16V 0.1uF 22uF
330pF R1 16V 16V
50V
S6 core 1.26 volt R835

17.4K
1%
+5V_ST
465 mA @85% efficiency R2
+3.3V
BLM18PG121SN1D
L812 Replaced Part R831 MAX 3A +1.8V_MEMC for DDR
1/16W
OPT 10K +1.26V_VDDC
R830
10K C891
Close to IC
415 mA @85% efficiency
1/16W 0.47uF
400 mA
Vout=0.8*(1+R1/R2) R825 25V
Close to IC 22K 1%
IC805
R824 MP2212DN
22K +3.3V_MEMC +1.8V_FRC_DDR
R1 $0.07
1%
4.9A 0.0150OHM 34MHZ IC807
FB EN/SYNC 1600 mA SC4215ISTRT
1 8
R827 Vout=0.8*(1+R1/R2)
75K L813
1/8W R2 3.6uH
GND SW_2 NC_1 GND R1/R2 : 27K / 20K => Vout=1.88
1% 2 7 1 8
$0.24 R1 R1/R2 : 15K / 12K => Vout=1.80
R838
12K
1/10W
1%
DEVELOPE NR8040T3R6N $0.195 R1/R2 : 12K / 9.1K => Vout=1.85

IN SW_1 OPT R836
Placed on SMD-TOP 3 6 C849 10K EN ADJ R1/R2 : 18K / 13K => Vout=1.90
C843 C856 2 7
22uF 22uF 0.1uF
10V 10V
BS VCC VIN VO
C837 4 5 C836
C838 3 6
C IN 22uF 22uF 10nF
OPT 50V Placed on SMD-TOP
NC_2 NC_3 C854 C855
4 5
1%
C846 C851 100uF 0.1uF

R862 47 100uF R2 16V
9.1K
0.1uF R861 16V

1/10W
16V 16V
R840
R826 1uF
10V
10 C840
1/10W 1uF
1% 6.3V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 8 12

SPI FLASH +3.3V_MEMC
PANEL_POWER
IC902
MEMC_RXE4+
MEMC_RXE4-
MEMC_RXE3+
MEMC_RXE3-
MEMC_RXEC+
MEMC_RXEC-
MEMC_RXE2+
MEMC_RXE2-
MEMC_RXE1+
MEMC_RXE1-
MEMC_RXE0+
MEMC_RXE0-
MEMC_RXO4+
MEMC_RXO4-
MEMC_RXO3+
MEMC_RXO3-
MEMC_RXOC+
MEMC_RXOC-
MEMC_RXO2+
MEMC_RXO2-
MEMC_RXO1+
MEMC_RXO1-
MEMC_RXO0+
MEMC_RXO0-
W25X20AVSNIG
10K
C903
0.1uF
R927
R925 56 CS VCC
1 8
M_SPI_CZ R928 R929
R926 56 DO HOLD
2 7
L907
M_SPI_DO 100 100
WP CLK R947 56
3 6
M_XTALO
M_XTALI
WP_FLASH_MEMC M_SPI_CK R931
CB3216PA501E
R930
GND DIO R948 56
4 5
M_SPI_DI 100 100
C951 C952 C953
R935 R936 +3.3V_MEMC 220uF
16V 1000pF 0.1uF
100 100
URSA_A0P
URSA_A0M
URSA_A1P
URSA_A1M
URSA_A2P
URSA_A2M
URSA_A3P
URSA_A3M
URSA_A4P
URSA_A4M
URSA_B0P
URSA_B0M
URSA_B1P
URSA_B1M
URSA_ACKP
URSA_ACKM
+3.3V_MEMC +3.3V_MEMC_AVDD R945 R946
100 100 BLM18PG121SN1D
R939 P900
R938 TF05-51S
L905
BLM18PG121SN1D 100 100 +3.3V_MEMC_AVDD
+1.26V_MEMC 1
Placed on SMD-TOP R942 R943 2
1uF
C904
C906
L904
0.1uF
3
100 100
4
10V
5
10V
6
16V
22uF
C901
10uF
C908
7
C939
0.1uF
8
10uF
10uF
9
10
C937
0.1uF
C914
C956 0.1uF
C912
URSA_B4M 11
R954 C907 10uF +3.3V_MEMC URSA_B4P 12

URSA_B3M 13
820 C905 URSA_B3P 14
15
URSA_BCKM 16
10uF 10V URSA_BCKP
RXE4+
RXE4-
RXE3+
RXE3-
RXECK+
RXECK-
RXE2+
RXE2-
RXE1+
RXE1-
RXE0+
RXE0-
AVDD_LVDS_2
VSS16
RXO4+
RXO4-
RXO3+
RXO3-
RXOCK+
RXOCK-
RXO2+
RXO2-
RXO1+
RXO1-
RXO0+
RXO0-
AVDD_LVDS_1
VSS_15
GPIO_4
GPIO_3
XTALO
XTALI
GPIO_2
GPIO_1
I2CM_SDA
I2CM_SCL
GPIO25
POL
POL_SI
TP
VSS14
AVDD_PLL
A0P
A0M
A1P
A1M
A2P
A2M
ACKP
ACKM
A3P
A3M
A4P
A4M
CPV
OE
B0P
B0M
B1P
B1M
REXT
+3.3V_MEMC 17
4.7K
4.7K
18
URSA_B2M 19
B1
A1
C1
C2
A2
B2
B3
A3
C3
C4
A4
B4
H8
B5
A5
C5
C6
A6
B6
B7
A7
C7
C8
A8
B8
H7
D4
D3
D5
D6
N7
G8
B9
A9
C9
D9
D7
URSA_B2P
OPT
OPT
F11
G11
K15
K16
B14
A14
E11
D13
D11
F10
C10
A10
B10
B11
A11
C11
C12
A12
B12
B13
A13
C13
C14
D12
R992 100 I2CS_SDA STH_S 20

R949 1K E1 D8
MEMC_SDA URSA_B1M 21
R993 100 I2CS_SCL STH_F
MEMC_SCL D1 D10 URSA_B1P 22
R970
R972 OPT 4.7K
GPIO8 F1 E10 STV URSA_B0M 23

R978
GPIO9 PDI URSA_B0P 24

C928 G1 E3 R955
0.1uF BIT_SEL 25
+3.3V_MEMC VSS1 K8 [E1] D2 BIST
R950 1K 22 OPT 26
OPT VDDC_1 E5 C15 B2P URSA_B2P URSA_A4M 27

GPIO12 GPIO14 [D1]
GPIO10 B2M URSA_B2M SCANNING BLU URSA_A4P 28
E2 B15 L908 URSA_A3M 29
URSAII LVDS TYPE GPIO11 F2 A15 BCKP URSA_BCKP
BLM18PG121SN1D URSA_A3P 30
LOW LOW GPIO12 BCKM URSA_BCKM
VENUS (MST7329N) F3 A16 OPC_OUT2 31
GPIO13 B3P URSA_B3P L909 URSA_ACKM 32
1K
G2 B16 BLM18PG121SN1D URSA_ACKP
R941
URSAII MINI LVDS TYPE 33
R940
LOW GPIO22 M4 C16 B3M URSA_B3M
HIGH
OPT
OPT 1K
34
M+S NORMAL 42"(MST7327N) GPIO23 B4P URSA_B4P OPC_EN
M5 D15 URSA_A2M 35
L910 URSA_A2P
GPIO14 B4M URSA_B4M 36
URSAII MINI LVDS TYPE G3 D16 BLM18PG121SN1D
HIGH LOW URSA_A1M 37
GPIO15 E4 F9 AVDD2 C949
M+S NORMAL 47"(MST7327N) OPC_OUT1 URSA_A1P 38
R957
R956
GPIO16 F4 G10 VSS13 URSA_A0M 39
1K
1K
L911 URSA_A0P
URSAII MINI LVDS TYPE GPIO17 C0P URSA_C0P 40
HIGH HIGH G4 E15 BLM18PG121SN1D
41
M+S GIP 37"(MST7327N) GPIO18 H4 E16 C0M 0.1uF URSA_C0M
PWM_DIM 42
GPIO19 J4 E14 C1P URSA_C1P 43
GPIO20 C1M URSA_C1M R967 44

+3.3V_MEMC K4 F14
45
L902 GPIO21 L4 F16 C2P URSA_C2P LVDS_SEL

22 OPT 46
C929 VDDP_1 C2M URSA_C2M OPT OPT OPT OPT OPT OPT OPT OPT
J6 F15 47
VSS2 CCKP URSA_CCKP 48

BLM18PG121SN1D H9 G15
OPT
10V
OPT
49
10uF
VSS3 CCKM URSA_CCKM
10uF
0
0
C957
0
0OPT
C958
0.1uF
K9 G16
C964
C963
0.1uF
C961
C960
C959
0.1uF
0.1uF
0.1uF 0.1uF
0.1uF
C962
0.1uF
50
0.1uF
0.1uF
+1.8V_FRC_DDR G14 C3P URSA_C3P 51
VDDC_2 F6 H14 C3M URSA_C3M 52

R971
C926
R973
R937
R979
C916
C917
URSA_DQ[20] DDR2_DQ20 H1 H16 C4P URSA_C4P
Placed on SMD-TOP URSA_DQ[19] DDR2_DQ19 H2 H15 C4M URSA_C4M
J15 D0P URSA_D0P
URSA_DQ[17] DDR2_DQ17 H3 J16 D0M URSA_D0M
16V
22uF
URSA_DQ[22] DDR2_DQ22 IC900 D1P URSA_D1P
URSA_DQ[0-31]
J1 J14
K14 D1M URSA_D1M
URSA_DQ[27] DDR2_DQ27 J2
URSA_DQ[28] DDR2_DQ28 J3 P901
C950
TF05-41S
C909
C919 0.1uF G9 VSS12
URSA_DQ[25] DDR2_DQ25 K1
MST7323S L14 D2P URSA_D2P
1
URSA_DQ[30] DDR2_DQ30 K2 L15 D2M 0.1uF URSA_D2M
2
AVDD_DDR1 K6 L16 DCKP URSA_DCKP URSA_D4M 3
DDR2_DQM3 DCKM URSA_DCKM URSA_D4P 4

URSA_DQM3 K3 M16 URSA_D3M 5
DDR2_DQM2 L1 F8 AVDD1 URSA_D3P
URSA_DQM2 6
C920 0.1uF VSS4 J8 M15 D3P URSA_D3P 7
DDR2_DQS2 D3M URSA_D3M URSA_DCKM 8

URSA_DQS2 L2 M14 URSA_DCKP 9
DDR2_DQSB2 L3 N16 D4P URSA_D4P
URSA_DQSB2 10
AVDD_DDR2 L6 N15 D4M C947 URSA_D4M URSA_D2M 11
VDDP_2 URSA_D2P 12
L8 URSA_D1M 13
VSS5 H10 H6 VDDC_5 URSA_D1P 14
DDR2_DQS3 GPIO24 0.1uF +3.3V_MEMC URSA_D0M
C927 0.1uF M1 N6 15
URSA_DQS3 URSA_D0P
DDR2_DQSB3 GPIO7 16
URSA_DQSB3 M2 E12
17
AVDD_DDR3 L7 D14 GPIO6
18
URSA_DQ[31] DDR2_DQ31 M3 F12 GPIO5 URSA_C4M 19
URSA_DQ[24] DDR2_DQ24 GPIO4 URSA_C4P 20

N1 E13 URSA_C3M 21
C921 0.1uF VSS6 J9 F13 GPIO3 URSA_C3P 22
URSA_DQ[26] DDR2_DQ26 GPIO2
1K
1K
N2 G13 23
R959
URSA_CCKM
R963
URSA_DQ[29] DDR2_DQ29 GPIO1 24

N3 H13 URSA_CCKP 25
AVDD_DDR4 L10 J13 GPIO0
26
URSA_DQ[23] DDR2_DQ23 P1 K12 PWM0 URSA_C2M 27
URSA_DQ[16] DDR2_DQ16 PWM1 URSA_C2P 28

R1 [N13] L12 URSA_C1M 29
URSA_DQ[18] DDR2_DQ18 T1 [L9] K13 SPI_CZ URSA_C1P
+3.3V_MEMC M_SPI_CZ 30
[N12] URSA_C0M
URSA_DQ[21] DDR2_DQ21 T2 M12 SPI_DO 31
[N5] M_SPI_DO URSA_C0P
DDR2_MCLK SPI_DI 32
R2 [N4] M13
1K
1K
URSA_MCLK M_SPI_DI 33
OPT
OPT
R960
R964
BLM18PG121SN1D DDR2_MCLKZ P2 L13 SPI_CK

URSA_MCLKZ M_SPI_CK 34
C925 0.1uF VSS7 GPIO30 35
G7 N14
AVDD_MEMPLL GPIO29 36
L903 L9 N13 37
MVREF GPIO28
N5 N12 38
DDR2_ODT 39
URSA_ODT N4 OPT
40
0.1uF C922
C913
10uF
R933 41
T3
R3
P3
T4
R4
J10
P4
T5
R5
P5
T6
R6
P6
T7
L11
R7
P7
T8
R8
P8
N8
K10
F7
T9
R9
K7
P9
T10
K11
R10
P10
T11
R11
J11
P11
T12
R12
P12
J7
H11
T13
R13
P13
T14
R14
P14
T15
R15
P15
T16
R16
P16
N9
N10
N11
M11
G6
0
42
0.1uF WP_FLASH_MEMC
GPIO8 PWM1 PWM0
VSS8
VSS9
VSS11
MCLKE
VSS10
RESET
VDDC_3
VDDP_3
GPIO26
GPIO27
VDDC_4
C923
DDR2_A0
DDR2_A2
DDR2_A4
DDR2_A6
DDR2_A8
DDR2_A1
DDR2_A5
DDR2_A9
DDR2_A7
DDR2_A3
TESTPIN
DDR2_A11
DDR2_WEZ
DDR2_BA1
DDR2_BA0
DDR2_A10
DDR2_A12
DDR2_DQ4
DDR2_DQ3
DDR2_DQ1
DDR2_DQ6
DDR2_DQ9
DDR2_DQ8
DDR2_DQ7
DDR2_DQ0
DDR2_DQ2
DDR2_DQ5
I2C HIGH LOW HIGH
DDR2_RASZ
DDR2_CASZ
AVDD_DDR5
AVDD_DDR6
DDR2_DQ11
DDR2_DQ12
DDR2_DQ14
AVDD_DDR7
DDR2_DQM1
DDR2_DQM0
DDR2_DQS0
DDR2_DQS1
DDR2_DQ15
DDR2_DQ10
DDR2_DQ13
DDR2_DQSB0
DDR2_DQSB1
DDR2_MCLK1
DDR2_MCLKZ1
+3.3V_MEMC
EEPROM HIGH HIGH LOW
C944
C938
0.1uF
0.1uF
0.1uF
XTAL SPI HIGH HIGH HIGH

R934 1M
C941
0.1uF
10K
R994
C945
10K
C932
C933
C934
C935
R951
C936
M_XTALO M_XTALI
X900 MEMC_RESET
12MHz 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
C900 C902
0
ISP Port for FRC

R953
15pF 15pF
P902
12507WR-04L
1uF
10K
C918
0.1uF
URSA_A[0]
URSA_A[2]
URSA_A[4]
URSA_A[6]
URSA_A[8]
URSA_A[11]
URSA_A[1]
URSA_A[10]
URSA_A[5]
URSA_A[9]
URSA_A[12]
URSA_A[7]
URSA_A[3]
R952
C924
1
2
URSA_DQ[4]
URSA_DQ[3]
URSA_DQ[1]
URSA_DQ[6]
URSA_DQ[11]
URSA_DQ[12]
URSA_DQ[9]
URSA_DQ[14]
URSA_DQ[15]
URSA_DQ[8]
URSA_DQ[10]
URSA_DQ[13]
URSA_DQ[7]
URSA_DQ[0]
URSA_DQ[2]
URSA_DQ[5]
URSA_DQ[0-31] 3 MEMC_SCL 001:F38;001:AE31
4 MEMC_SDA 001:F38;001:AE31
5
URSA_WEZ
URSA_BA1
URSA_BA0
URSA_RASZ
URSA_CASZ
URSA_DQM1
URSA_DQM0
URSA_DQS0
URSA_DQS1
URSA_MCLKE
URSA_DQSB0
URSA_DQSB1
URSA_MCLK1
URSA_MCLKZ1
URSA_A[0-12]

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MST7329N(FRC) 9 12

DDR2 1.8V By CAP - Place these Caps near Memory
+1.8V_FRC_DDR +1.8V_FRC_DDR +1.8V_FRC_DDR +1.8V_FRC_DDR
10V
10V
C1024
C1026
C1028
10uF
C1029
C1031
C1033
C1034
C1035
C1036
C1037
C1038
C1039
C1040

C1025
C1027
C1041
C1013
C1023
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C1002
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C1003
C1004
C1005
C1006
C1007
C1009
C1011
C1012
C1014
C1015
C1016
C1017
C1018
C1019
C1020
C1022
0.1uF
0.1uF
C1001
10uF
10uF
+1.8V_FRC_DDR +1.8V_FRC_DDR
1K 1%
R1001
R1037
1K 1%

010:AL20;009:AB4 URSA_DQ[0-31] URSA_DQ[0-31] 010:E20;009:AB4
URSA_A[0-12]
IC1000 IC1001
1K 1%
R1038
1K 1%
AR1000 AR1004
R1002
C1030
0.1uF
C1010
0.1uF
URSA_DQ[27] DDR_DQ[27] DDR_DQ[15] URSA_DQ[15]
URSA_DQ[28] DDR_DQ[28]
HYB18TC256160BF-2.5 HYB18TC256160BF-2.5 DDR_DQ[8] 56 URSA_DQ[8]
URSA_DQ[25] 56 DDR_DQ[25] DDR_DQ[10] URSA_DQ[10]
DDR_DQ[16] DQ0 G8 J2 VREF VREF J2 G8 DQ0 DDR_DQ[0]
AR1001 DDR_DQ[17] DQ1 G2 G2 DQ1 DDR_DQ[1] AR1005
DDR_DQ[18] DQ2 URSA_A[3] AR1010 DDRA_A[3] DQ2 DDR_DQ[2]
URSA_DQ[17] DDR_DQ[17] H7 A0 DDRB_A[0] DDRA_A[0] A0 H7 DDR_DQ[0] URSA_DQ[0]
M8 DDRB_A[10] AR1013 URSA_A[10] URSA_A[1] 22 DDRA_A[1] M8 56
DDR_DQ[19] DQ3 H3 H3 DQ3 DDR_DQ[3]
URSA_DQ[19] 56 DDR_DQ[19] M3 A1 DDRB_A[1] DDRA_A[1] A1 M3 DDR_DQ[2] URSA_DQ[2]
DDR_DQ[20] DQ4 DDRB_A[1] 22 URSA_A[1] URSA_A[10] DDRA_A[10] DQ4 DDR_DQ[4]
URSA_DQ[20] DDR_DQ[20] H1 A2 DDRB_A[2] DDRA_A[2] A2 H1 DDR_DQ[5] URSA_DQ[5]
DDR_DQ[21] DQ5 M7 DDRB_A[3] URSA_A[3] M7 DQ5 DDR_DQ[5]
H9 A3 DDRB_A[3] DDRA_A[3] A3 H9
AR1002 DDR_DQ[22] DQ6 N2 DDRB_A[9] URSA_A[9] URSA_A[9] DDRA_A[9] N2 DQ6 DDR_DQ[6] AR1006
URSA_DQ[31] DDR_DQ[31] F1 A4 DDRB_A[4] DDRA_A[4] A4 F1 DDR_DQ[11] URSA_DQ[11]
DDR_DQ[23] DQ7 N8 DDRB_A[12] AR1014 URSA_A[12] URSA_A[12] AR1011 DDRA_A[12] N8 DQ7 DDR_DQ[7]
URSA_DQ[24] DDR_DQ[24] F9 A5 DDRB_A[5] DDRA_A[5] A5 F9 DDR_DQ[12] 56 URSA_DQ[12]
DDR_DQ[24] DQ8 N3 DDRB_A[7] 22 URSA_A[7] URSA_A[7] 22 DDRA_A[7] N3 DQ8 DDR_DQ[8]
URSA_DQ[26] 56 DDR_DQ[26] C8 A6 DDRB_A[6] DDRA_A[6] A6 C8 DDR_DQ[9] URSA_DQ[9]
DDR_DQ[16-31]
DDR_DQ[0-15]
DDR_DQ[25] DQ9 N7 DDRB_A[5] URSA_A[5] URSA_A[5] DDRA_A[5] N7 DQ9 DDR_DQ[9]
DDRB_A[0-12]
URSA_DQ[29] DDR_DQ[29] C2 A7 DDRB_A[7] DDRA_A[7] A7 C2 DDR_DQ[14] URSA_DQ[14]
DDRA_A[0-12]
DDR_DQ[26] DQ10 P2 DDRB_A[0] URSA_A[0] URSA_A[2] DDRA_A[2] P2 DQ10 DDR_DQ[10]
D7 A8 DDRB_A[8] DDRA_A[8] A8 D7
AR1003 DDR_DQ[27] DQ11 P8 DDRB_A[2] AR1015 URSA_A[2] URSA_A[0] AR1012 DDRA_A[0] P8 DQ11 DDR_DQ[11] AR1007
URSA_DQ[23] DDR_DQ[23] D3 A9 DDRB_A[9] DDRA_A[9] A9 D3 DDR_DQ[6] URSA_DQ[6]
DDR_DQ[28] DQ12 P3 DDRB_A[4] 22 URSA_A[4] URSA_A[6] 22 DDRA_A[6] P3 DQ12 DDR_DQ[12]
URSA_DQ[16] DDR_DQ[16] D1 A10/AP DDRB_A[10] DDRA_A[10] A10/AP D1 DDR_DQ[1] 56 URSA_DQ[1]
DDR_DQ[29] DQ13 M2 DDRB_A[6] URSA_A[6] URSA_A[4] DDRA_A[4] M2 DQ13 DDR_DQ[13]
URSA_DQ[18] 56 DDR_DQ[18] D9 A11 DDRB_A[11] DDRA_A[11] A11 D9 DDR_DQ[3] URSA_DQ[3]
DDR_DQ[30] DQ14 P7 AR1017 AR1019 P7 DQ14 DDR_DQ[14]
URSA_DQ[21] DDR_DQ[21] B1 A12 DDRB_A[12] B_URSA_RASZ URSA_RASZ URSA_RASZ A_URSA_RASZ DDRA_A[12] A12 B1 DDR_DQ[4] URSA_DQ[4]
DDR_DQ[31] DQ15 R2 R2 DQ15 DDR_DQ[15]
B9 B_URSA_CASZ URSA_CASZ URSA_CASZ A_URSA_CASZ B9
DDRB_A[11] URSA_A[11] URSA_A[8] 22 DDRA_A[8]
+1.8V_FRC_DDR L2 BA0 DDRB_A[8] URSA_A[8] URSA_A[11] DDRA_A[11] BA0 L2
B_URSA_BA0 A_URSA_BA0 +1.8V_FRC_DDR
L3 BA1 22 BA1 L3
VDD_5 B_URSA_BA1 A_URSA_BA1 VDD_5
A1 R1005 22 R1024 22 A1
VDD_4 URSA_MCLK 009:J11 009:AB4 URSA_MCLK1 VDD_4
E1 E1
VDD_3 J9 J8 CK CK J8 J9 VDD_3
OPT
OPT
150
150
R1000
VDD_2 CK R1006 22 R1025 22 CK VDD_2
R1039
M9 K8 URSA_MCLKZ 009:J10 009:AB4 URSA_MCLKZ1 K8 M9

VDD_1 R1 K2 CKE CKE K2 R1 VDD_1
B_URSA_MCLKE 010:T10 010:V9 A_URSA_MCLKE
K9 ODT R1008 22 R1027 22 ODT K9

URSA_ODT 010:Y14;009:J10 010:Q14;009:J10 URSA_ODT
VDDQ_10 A9 L8 CS CS L8 A9 VDDQ_10
VDDQ_9 C1 K7 RAS RAS K7 C1 VDDQ_9
B_URSA_RASZ 010:R16 010:X16 A_URSA_RASZ
VDDQ_8 C3 L7 CAS CAS L7 C3 VDDQ_8
B_URSA_CASZ 010:R16 010:X16 A_URSA_CASZ
VDDQ_7 C7 K3 WE WE K3 C7 VDDQ_7
B_URSA_WEZ 010:T10 010:V8 A_URSA_WEZ
VDDQ_6 C9 C9 VDDQ_6
VDDQ_5 E9 E9 VDDQ_5
F7 LDQS R1012 56 R1031 56 LDQS F7
VDDQ_4 URSA_DQS2 009:J14 009:X4 URSA_DQS0 VDDQ_4
G1 UDQS R1013 56 R1032 56 UDQS G1
VDDQ_3 B7 URSA_DQS3 URSA_DQS1 B7 VDDQ_3
G3 009:J13 009:Y4 G3
VDDQ_2 G7 G7 VDDQ_2
VDDQ_1 G9 F3 LDM R1014 56 R1033 56 LDM F3 G9 VDDQ_1
URSA_DQM2 009:J15 009:X4 URSA_DQM0
B3 UDM R1015 56 R1034 56 UDM B3
URSA_DQM3 009:J15 009:W4 URSA_DQM1
VSS_5 A3 E8 LDQS R1016 56 R1035 56 LDQS E8 A3 VSS_5

URSA_DQSB2 009:J14 009:X4 URSA_DQSB0
VSS_4 E3 A8 UDQS R1017 56 R1036 56 UDQS A8 E3 VSS_4
URSA_DQSB3 009:J13 009:Y4 URSA_DQSB1
VSS_3 J3 J3 VSS_3
VSS_2 N1 N1 VSS_2
L1 NC_4 AR1016 NC_4 L1
VSS_1 P9 P9 VSS_1
NC_5 B_URSA_BA0 URSA_BA0 010:T9;009:S4 NC_5
R3 R3
NC_6 B_URSA_BA1 URSA_BA1 010:T9;009:R4 NC_6
R7 R7
010:Q14 B_URSA_MCLKE URSA_MCLKE 010:T9;009:T4
VSSQ_10 010:Q13 B_URSA_WEZ URSA_WEZ 010:T8;009:R4 VSSQ_10
B2 NC_1 22 NC_1 B2
VSSQ_9 A2 A2 VSSQ_9
B8 NC_2 AR1018 NC_2 B8
VSSQ_8 E2 E2 VSSQ_8
A7 NC_3 010:V10;009:S4 URSA_BA0 A_URSA_BA0 010:AA15 NC_3 A7
VSSQ_7 R8 R8 VSSQ_7
D2 +1.8V_FRC_DDR 010:V10;009:R4 URSA_BA1 A_URSA_BA1 010:AA15
+1.8V_FRC_DDR D2
VSSQ_6 D8 D8 VSSQ_6
010:V10;009:T4 URSA_MCLKE A_URSA_MCLKE 010:Z14
VSSQ_5 E7 VSSDL VSSDL E7 VSSQ_5
J7 010:V10;009:R4 URSA_WEZ A_URSA_WEZ 010:Y13 J7
VSSQ_4 22 VSSQ_4
F2 F2
VSSQ_3 F8 F8 VSSQ_3
VSSQ_2 H2 H2 VSSQ_2
VSSQ_1 H8 J1 VDDL VDDL J1 H8 VSSQ_1

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MST7327N DDR2 10 12

+3.3V
R1124
4.7K
SCART1_DET +3.3V
R1126 +12V
1K
D1110 C1113 L1104 +12V
5.6V 0.1uF BLM18PG121SN1D
OPT 16V
L1109
4.7K
BLM18PG121SN1D
C1145
R1122
E R1140 C1143 C1144
ISA1530AC1 0.1uF SCART2_DET
470 10uF 0.1uF
Q1119 50V R1159
35V 50V 1K C1104 C1139 C1141
SC1_CVBS_IN out_of_stock B C1105 0.1uF
23 10uF 0.1uF
R1117 C1108 0.1uF 35V 50V 50V
C1106 0 C
R1109 220pF R1174 16V
23 47pF
75 50V 47K E
50V OPT R1162
C1142 out_of_stock 470
47uF 23
22 Q1120 C R1133 ISA1530AC1
22 D1101 16V R1182 Q1109 B
30V GND 2SC3052 B 0
21 23 SC2_CVBS_IN
FE_VSCART_OUT C
21 OPT 0 C1125
C1119 R1166
20 R1113 R1139 220pF 47K
20 390 E 22 47pF Q1111
22 D1112 75 50V C1109
R1175 50V OPT
19 R1107 15K 30V 2SC3052 C 47uF
19 21 16V
D1106 75 C1107 R1138 21 OPT
18 B
D1102 30V 100uF 120 20 DTV/MNT_VOUT
18
30V 16V 20
17 OPT R1136 R1131
17 OPT 22 19 75 390 E
R1114 19 R1167
16 SC1_FB 15K
16 18
18 D1115 C1122
15 SC1_R R1161
17 30V 100uF 120
15 D1103 R1106 17 16V
14 30V R1104 75 OPT
14 16
OPT 75 16
13
13 15
15
12 R1105 R1134

12 0 14 0
14 REC_8
11 SC1_G
11 D1104 13
R1101 13 R1125
30V
. 10 75 62K
OPT 12
12 SC2_ID
. 9
11 R1132
11 11K
SC1_ID 2:E16
SC_ID 8 R1118 . 10
D1111 62K R1123
B 7 SC1_B
30V 11K . 9 R1137
D1109 R1102 75
6 OPT
LIN 30V 75 SC2_ID 8
OPT D1118
L1105
GND 5 30V R1121
. 7 120-ohm
OPT 10K
GND 4 SC2_L_IN
L_IN 6
L_OUT 3 R1110 D1116 C1120 C1123
GND 5 R1116
10K 5.6V OPT 330pF
R1127
12K
R_IN 2 SC1_L_IN 470K 50V

GND 4 OPT
L1101 C1103
R_OUT 1 R1103 120-ohm 330pF R1112
D1108 C1101 L_OUT 3
470K 50V 12K
5.6V OPT L1106
OPT R_IN 2 120-ohm R1128
10K
JK1100 R_OUT 1 SC2_R_IN

R1108 C1121 C1124
10K D1117
R1129
12K
R1115 OPT 330pF

SC1_R_IN 2:S14 5.6V 470K 50V
L1100
JK1101
C1102 OPT
D1107 120-ohm
R1100 C1100 330pF R1111
5.6V OPT 12K L1108
OPT 470K 50V R1164
BLM18PG121SN1D
0
DTV/MNT_L_OUT
C1112
L1102 1000pF
R1135 D1114 50V C1117
BLM18PG121SN1D
0 5.6V 4700pF
TV_L_OUT 002:P7 OPT
C1110
1000pF C1116
D1105 50V 4700pF L1107
5.6V BLM18PG121SN1D R1163
OPT 0
DTV/MNT_R_OUT
L1103
BLM18PG121SN1D R1160
0 C1114
TV_R_OUT 002:P7 C1118
1000pF
4700pF
D1113 50V
D1100 C1111 C1115 5.6V
5.6V 1000pF 4700pF
OPT
OPT 50V
IC1103
LM324D
R1191 R1196
2.2K 1 14 2.2K
TV_L_OUT 1 14 DTV/MNT_R_OUT
C1133 R1145 R1155 C1135

CONTROL P1304
33K 2 13 33K
OPT
10uF 10uF
OPT
2 13
R1194
470K
12507WS-12L
R1193
470K
16V 16V R1321
[SCART2 PIN 8] C1127
IR & LED 100
+12V 33pF 3 12 C1129 33pF SCL_SUB/AMP
R1147
10K
R1153
10K
ZD1300
R1143 3 12 CDS3C05HDMI1
R1157 +3.3V_ST
5.6K 5.6V
+12V SCART1_Lout SCART2_Rout 1 SCL
4 11 5.6K
4 11 R1322
C1126 100
R1144 R1158 SDA_SUB/AMP 2 SDA
0.1uF 5.6K 5 10 5.6K
50V SCART1_Rout 5 10 SCART2_Lout R1319 ZD1301
4.7K R1320 CDS3C05HDMI1
R1184 4.7K 5.6V 3 GND
R1146 R1156
15K R1185 R1187 C 33K 6 9 33K R1318 L1301
6 9 BLM18PG121SN1D
0 0 100
R1176 B Q1118 KEY1
R1178 4 KEY1
2SC3052 ZD1304
2K C1128 33pF 7 8 R1130 33pF
R1148
10K
R1154
10K
10K R1186 7 8 R1317 L1303 5.6V
OPT E R1190 R1197 100
12K R1188 2.2K 2.2K BLM18PG121SN1D AMOTECH
51K KEY2 5 KEY2
TV_R_OUT DTV/MNT_L_OUT
OPT
C
C1134 C1136
10uF ZD1302
OPT
B Q1117 10uF C1305 C1307 6

R1195
470K
5.6V
OPT
SC_RE1 5V_ST
R1192
470K
1:AJ19 2SC3052 16V 16V 0.1uF 0.1uF AMOTECH
R1177 R1180 L1313
1K E +5V_ST BLM18PG121SN1D
560 7 GND
OPT
C
R1325 100 8 WARM_ST
B Q1116 C1314 C1315
1:AJ19 SC_RE2 REC_8 AI8
2SC3052 TV_L_OUT +3.3V +3.3V_ST 0.1uF 1000pF
R1181 16V 50V R1305 WARM_LED_ON
R1179 1K E 100 IR
IR 9
680 Q1126 R1149
R1141
OPT 2SC3052 R1119 R1120 C1309
2K 10K
10K 100pF ZD1303 10 GND
10K 50V 5.6V
D1120 +5V_ST AMOTECH
Q1130 ENKMC2838-T112
A1 11 3.3V
RT1P141C-T112 SB_MUTE
TV_R_OUT C +3.3V L1314
+5V_ST
R1301 BLM18PG121SN1D
A2
3 1 SCART1_MUTE 10K 12 PWR_ON
R1151 IR-OUT
C1131 22 R1300
Q1127 2 IR_OUT R1303
2K 0.1uF IR-OUT 10K C1311 13
C1310
2SC3052 IR-OUT 1000pF
0.1uF
Q1300 C 10KR1302 16V 50V
2SC3052 B
IR-OUT E IR-OUT
C 47K R1304
DTV/MNT_L_OUT B R1323 100
Q1301 E IR-OUT
2SC3052 LED_ON
Q1128 R1150 IR-OUT
2SC3052
2K
D1119
RT1P141C-T112 ENKMC2838-T112
Q1131 A1
SB_MUTE
DTV/MNT_R_OUT C
A2
3 1 SCART2_MUTE
R1152 C1132
2
Q1129 0.1uF Zener Diode is
2K
2SC3052
close to wafer
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SCART 11 12

+5V_GENERAL
L1204
MLB-201209-0120P-N2
R1229
10
R1231
10K
TU1200 Q1202
TDFW-G235D E ISA1530AC1
R1230
2.2K
C1200
0.1uF
16V
ANT[5V] B
1 C
+5V_GENERAL C R1232
BB[CTR] Q1203 B 10K
2 L1201 FE_BOOSTER_CTL
MLB-201209-0120P-N2 2SC3052
GND_1
3 C1222 E
+B[5V] 0.01uF
4 C1207 C1208 C1209 25V
NC_1 100pF 0.1uF 68uF OPTION : RF AGC USE ONLY FOR SECAM
5 50V 16V 10V
RF_AGC OPT
6
TP[VT] C1212

7 C1210 47uF
NC_2 0.1uF 16V
8 R1207 47 16V
GND_2 FE_TUNER_SDA C
9 R1209 +5V_GENERAL
C1205
Q1200 B 10K
SDA_T 47pF FE_AGC_SPEED_CTL
10 50V 2SC3052
SCL_T R1208 47
11 E
FE_TUNER_SCL R1240 R1241
AIF_1 C1206 200 200
12 47pF
NC_3 50V
13
FE_VMAIN
Tuner PLL : 0xC2

Analog Tuner : 0x86
GND
14 E
VIDEO R1205 0 0
15 R1238
NC_4 R1239 B Q1205

16 1K
C ISA1530AC1
SIF C1216 OPT
TUNER 17
R1221
SDA 100pF 50V 33
18 FE_DEMOD_SDA
SCL
19 FE_DEMOD_SCL +5V_GENERAL
RST R1222
20 C1217 C1218 33
3.3V 47pF 47pF R1227
21 C1214 50V 470 R1228
0.1uF 50V
82
1.2V 16V FE_SIF
22 E
+3.3V_TUNER
ERR
23 C1215
0.1uF
MCL R1210 47 FE_TS_CLK B ISA1530AC1
24 16V
R1226 Q1201
R1225 C
D7 R1211 47 FE_TS_DATA[7] R1224 100K 4.7K
25
100
D6 R1212 47 FE_TS_DATA[6] /FE_RESET
26 C1219
D5 R1213 47 FE_TS_DATA[5] 0.1uF
27 16V
D4 R1214 47 FE_TS_DATA[4]
28
29
30
31
32
VAL R1219 47 FE_TS_VAL FE_TS_VAL
DVB-T : 1.8V(INTEL demod)

DVB-T/C : 1.2V(MICRONAS demod)
33
SYNC R1220 47 FE_TS_SYN
34
FE_TS_DATA[0-7],FE_TS_CLK,FE_TS_VAL,FE_TS_SYN DVB-CI DETECT
L1202
Digital Tuner : 0x1E

35 +3.3V_TUNER
MLB-201209-0120P-N2 +3.3V_TUNER
SHIELD C1221
0.1uF
16V IC1201
NL17SZ08DFT2G
+1.2V_TUNER FE_TS_VAL 1 5
FE_TS_ERR 2 C1227
0.1uF
3 4 16V
C1220
0.1uF GND R1245
16V FE_TS_VAL_ERR
47
R1223 0
FE_TS_ERR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER 12 12

LCD TV: Service Manual

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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 32LH5000 32LH5000-ZB

P/NO : MFL61862201 (0904-REV00) Printed in Korea

PRODUCT SAFETY ..................................................................................3

ADJUSTMENT INSTRUCTION .................................................................9

EXPLODED VIEW .................................................................................. 15

SVC. SHEET ...............................................................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer, AC Volt-meter

always perform an AC leakage current check on the exposed

1. Application range 3. Test method

1) Temperature : 25±5ºC (77±9ºF), CST : 40±5ºC

No. Item Specification Min. Typ. Max. Remark

1) Standard Test Condition (The unit has been ‘ON’)

6. Component Video Input (Y, CB/PB, CR/PR)

8. HDMI Input (PC/DTV)

3. Main PCB check process

* Boot file Download

• After enter Service Mode by pushing “ADJ” key,

5) Fishing the version uploading, you have to put USB stick

3.2. Function Check

* Connecting picture of the measuring instrument

* After done all adjustments, Press “In-start” button and

* Auto-control interface and directions

2) FHD HDMI EDID data

ⓑ Serial No: Controlled on production line.

Manufacturer ID GSM 1E6D all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20

5. Serial number D/L

5.1. Signal TABLE

5.2. Command Set

1 EEPROM WRITE A0h 84h+n n-bytes Write (n = 1~16)

5.3. method & notice

Only for training and service purposes

Copyright ©2009 LG Electronics. Inc. All right reserved.

USB_DM/ DP USB USB Po wer MP6211DH

LGE Internal Use Only

Only for training and service purposes

Copyright © 2009 LG Electronics. Inc. All right reserved.

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

LGE Internal Use Only

Only for training and service purposes

Copyright © 2009 LG Electronics. Inc. All right reserved.

R284 100 J5 GND_52 +3.3V_S6 AVDD_LPLL : 4.69mA

LGE Internal Use Only

Only for training and service purposes

Copyright © 2009 LG Electronics. Inc. All right reserved.

DQ10 P2 SDDR_A[2] ADDR2_A[2] TDDR_A[0] P2 DQ10

F8 SDDR_D[10] ADDR2_D[10] A_DDR2_DQ10 B_DDR2_DQ10 BDDR2_D[10] TDDR_D[10] F8

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

LGE Internal Use Only

Only for training and service purposes

COMPONENT Side USB (Minerva OPT)

R462 0.1uF 10uF

R419 JK403 USB_CTL R420

Copyright © 2009 LG Electronics. Inc. All right reserved.

30V SIDE_USB_DM 1:AL8

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

LGE Internal Use Only

Only for training and service purposes

Copyright © 2009 LG Electronics. Inc. All right reserved.

CI_MCLKI 2Y1 1Y4