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Electronic Design II
(EE124‐01) Lecture 3
HIU‐YUNG WONG
FEB. 3, 2020
hiuyung.wong@sjsu.edu, Office: ENG363
http://www.sjsu.edu/people/hiuyung.wong/index.html
SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 1
Outline
Non‐idealities in OpAmp
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2/3/2020
Announcement
I need to attend a conference on 2/17‐2/19. And report a research progress on 2/26. Let me know if you have
question and cannot come to the extra office hours
Wednesday (2/19) Friday (2/21)
Monday (2/17) Tuesday (2/18) Wednesday (2/26) Thursday (2/20) Friday (2/28)
Office Hour
09:00am ‐ 10:30am ENG 363 Office Hour
EE124 Lecture EE124 Lecture
ENG 341 ENG 341
Watch Pre‐recorded Watch Pre‐recorded
10:30am – 11:45am Video Video Office Hour
EE222 Lecture EE222 Lecture
3pm‐4:15pm ENG 301 ENG 301
Office Hour
4:15pm‐5:45pm ENG 363
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Article of the Day Non‐volatile => good for standalone
Small => Embedded
Resistive RAM is the epitome of an “emerging” memory in that, CMOS compatible, Low Power
for the most part, it’s still in the research and development
phase.
There are many small companies working to commercialize it,
such as Crossbar and Weebit Nano, and there’s also a lot of
research work being done at LETI, a technology research
institute of CEA Tech based in France.
At IEDM 2019, Leti presented research work outlining how it
has fabricated a fully integrated bio‐inspired neural network,
combining ReRAM‐based synapses and analog spiking neurons,
while measuring a 5x reduction in energy use compared to an
equivalent chip using formal coding. ReRAM maker Crossbar Inc., along with others, formed SCAiLE
(SCalable AI for Learning at the Edge),
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2/3/2020
What did we learn in the last lecture?
We practiced how to solve circuits involving OpAmp
◦ KCL + KVL + which equations?
◦ When can we use virtual short?
We realized that the techniques are applicable to complex
impedance too. We used it to solve Integrator and
Differentiator. Laplace transformation helps simplify the
process.
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Differentiator
Intuition: Why differentiator is a
high pass filter?
Vout R Inverse
1 R1C1s Laplace dVin
Vin 1 Vout R1C1
dt
C1s
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Differentiator with Pulse Input
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Voltage Adder
V V
V out R F 1 2
R1 R 2
Ao RF
V out V1 V 2 If R1 = R2=R
R
If Ao is infinite, X is pinned at ground, currents proportional to V1 and V2
will flow to X and then across RF to produce an output proportional to the
sum of two voltages.
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Pencil and paper time: Square‐Root Amplifier
2Vin
V out VTH
W
n C ox R1
L
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Nonideality 1: DC Offsets
Note how we place the polarity of VOS
Offsets in an op amp that arise from input stage mismatch cause the
input‐output characteristic to shift in either the positive or negative
direction (the plot displays positive direction).
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Effects of DC Offsets
Derivation: (What is V+?)
R
Vout 1 1 Vin Vos
R2
As it can be seen, the op amp amplifies the input as well as the offset,
thus creating errors.
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Offset in Integrator with Vin = 0
Vin = 0
Vout ~
1
R1C1
VOS dt
VOS
R1C1
t
You can also use virtual short and set V‐ = Vos and solve KCL to get similar results
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Solution to Integrator Offset Issue
At DC, what is Vout? What is the desired value of R2/R1?
What is the closed‐loop gain (now ignore offset, and it is
inverting input)
Vout R 1
2
Vin R1 R2C1s 1
Under what condition will it behave as an integrator?
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Nonideality 2: Input Bias Current
e.g.
Vin = 0
Vout R1I B2
Important only in Bipolar.
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Nonideality 3: Speed Limitation
V out
s A 0 s
Modeling V in 1 V in 2 1
1
What is the pole?
What is the unity‐gain bandwidth?
Due to internal capacitances, the gain of op amps begins to roll off.
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