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DATA SHEET

MOS FIELD EFFECT TRANSISTOR


2SK3570
SWITCHING
N-CHANNEL POWER MOS FET

DESCRIPTION ★ ORDERING INFORMATION


The 2SK3570 is N-channel MOS FET device that features a
PART NUMBER PACKAGE
low on-state resistance and excellent switching characteristics,
designed for low voltage high current applications such as 2SK3570 TO-220AB

DC/DC converter with synchronous rectifier. 2SK3570-S TO-262

2SK3570-ZK TO-263
FEATURES Note
2SK3570-Z TO-220SMD
•4.5V drive available.
Note TO-220SMD package is produced only in Japan.
•Low on-state resistance,
RDS(on)1 = 12 mΩ MAX. (VGS = 10 V, ID = 24 A)
•Low gate charge
QG = 23 nC TYP. (VDD = 16 V, VGS = 10 V, ID = 48 A)
•Built-in gate protection diode
•Surface mount device available

ABSOLUTE MAXIMUM RATINGS (TA = 25°C)

Drain to Source Voltage (VGS = 0 V) VDSS 20 V


Gate to Source Voltage (VDS = 0 V) VGSS ±20 V

Drain Current (DC) (TC = 25°C) ID(DC) ±48 A


Note
Drain Current (pulse) ID(pulse) ±160 A

Total Power Dissipation (TA = 25°C) PT1 1.5 W

Total Power Dissipation (TC = 25°C) PT2 29 W

Channel Temperature Tch 150 °C

Storage Temperature Tstg −55 to +150 °C

Note PW ≤ 10 µs, Duty Cycle ≤ 1%

The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.

Document No. D16256EJ2V0DS00 (2nd edition) The mark ! shows major revised points.
Date Published September 2002 NS CP (K)
Printed in Japan © 2002
2SK3570

ELECTRICAL CHARACTERISTICS (TA = 25°C)


Characteristics Symbol Test Conditions MIN. TYP. MAX. Unit

Zero Gate Voltage Drain Current IDSS VDS = 20 V, VGS = 0 V 10 µA


Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µA

Gate Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.5 V


Forward Transfer Admittance | yfs | VDS = 10 V, ID = 24 A 8.0 S
Drain to Source On-state Resistance RDS(on)1 VGS = 10 V, ID = 24 A 8.2 12 mΩ
RDS(on)2 VGS = 4.5 V, ID = 15 A 12.3 22 mΩ
Input Capacitance Ciss VDS = 10 V 930 pF

Output Capacitance Coss VGS = 0 V 360 pF


Reverse Transfer Capacitance Crss f = 1 MHz 250 pF
Turn-on Delay Time td(on) VDD = 10 V, ID = 24 A 13 ns
Rise Time tr VGS = 10 V 20 ns
Turn-off Delay Time td(off) RG = 10 Ω 39 ns

Fall Time tf 14 ns
Total Gate Charge QG VDD = 16 V 23 nC
Gate to Source Charge QGS VGS = 10 V 4 nC
Gate to Drain Charge QGD ID = 48 A 7 nC
Body Diode Forward Voltage VF(S-D) IF = 48 A, VGS = 0 V 1.1 V
Reverse Recovery Time trr IF = 48 A, VGS = 0 V 33 ns
Reverse Recovery Charge Qrr di/dt = 100 A/µs 25 nC

★ TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE

D.U.T.
D.U.T.
IG = 2 mA RL
RL VGS
VGS 90%
10% VGS
Wave Form
RG 0 PG. 50 Ω VDD
PG. VDD
VDS
90% 90%
VGS VDS
0 10% 10%
VDS 0
Wave Form
τ
td(on) tr td(off) tf

τ = 1 µs ton toff
Duty Cycle ≤ 1%

2 Data Sheet D16256EJ2V0DS


2SK3570

★ TYPICAL CHARACTERISTICS (TA = 25°°C)

DERATING FACTOR OF FORWARD BIAS TOTAL POWER DISSIPATION vs.


SAFE OPERATING AREA CASE TEMPERATURE
120 30
dT - Percentage of Rated Power - %

PT - Total Power Dissipation - W


100 25

80 20

60 15

40 10

20 5

0 0
0 25 50 75 100 125 150 175 0 25 50 75 100 125 150 175

TC - Case Temperature - °C TC - Case Temperature - °C

FORWARD BIAS SAFE OPERATING AREA


1000

ID(pulse)
R DS(on) limited PW = 10 µs
ID - Drain Current - A

100

100 µs
10
I D(DC) DC
1 ms

Power dissipation 10 m s
1 limited

T C = 25°C
Single pulse
0.1
0.1 1 10 100
VDS - Drain to Source Voltage - V

TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH


100
Rth(ch-A) = 83.3°C/W
rth(t) - Transient Thermal Resistance - °C/W

10

Rth(ch-C) = 4.31°C/W

0.1

Single pulse
0.01
10 µ 100 µ 1m 10 m 100 m 1 10 100 1000
PW - Pulse Width - s

Data Sheet D16256EJ2V0DS 3


2SK3570

DRAIN CURRENT vs. FORWARD TRANSFER CHARACTERISTICS


DRAIN TO SOURCE VOLTAGE
200 100
180
160
ID - Drain Current - A

ID - Drain Current - A
10
140
120 V GS = 10 V
100 1 T ch = 150°C
75°C
80 25°C
60 −55°C
4.5 V 0.1
40
20 V DS = 10 V
Pulsed
Pulsed
0 0.01
0 0.5 1 1.5 2 2.5 3 0 1 2 3 4 5
VGS - Gate to Source Voltage - V
VDS - Drain to Source Voltage - V

GATE CUT-OFF VOLTAGE vs. FORWARD TRANSFER ADMITTANCE vs.


CHANNEL TEMPERATURE DRAIN CURRENT
3 100
V DS = 10 V | yfs | - Forward Transfer Admittance - S
VGS(off) - Gate Cut-off Voltage - V

ID = 1 mA
2.5

2 10

T ch = 150°C
1.5 75°C
25°C
1 1 −55°C

0.5
V DS = 10 V
Pulsed
0 0.1
-50 0 50 100 150 0.1 1 10 100
Tch - Channel Temperature - °C
ID - Drain Current - A

DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT GATE TO SOURCE VOLTAGE
RDS(on) - Drain to Source On-state Resistance - mΩ

RDS(on) - Drain to Source On-state Resistance - mΩ

25 25
Pulsed
P u ls e d
20 20

15 V GS = 4.5 V 15

10 ID = 2 4 A
10 10 V

5 5

0 0
1 10 100 1000 0 5 10 15 20
ID - Drain Current - A
VGS - Gate to Source Voltage - V

4 Data Sheet D16256EJ2V0DS


2SK3570

DRAIN TO SOURCE ON-STATE RESISTANCE vs. CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
CHANNEL TEMPERATURE
RDS(on) - Drain to Source On-state Resistance - mΩ

20 10000

Ciss, Coss, Crss - Capacitance - pF


15 V G S = 4 .5 V
1000 C is s

10 10 V C oss
C rs s
100
5

ID = 2 4 A VGS = 0 V
P u ls e d f = 1 MHz
0 10
-5 0 0 50 100 150 0 .0 1 0 .1 1 10 100

Tch - Channel Temperature - °C VDS - Drain to Source Voltage - V

SWITCHING CHARACTERISTICS DYNAMIC INPUT/OUTPUT CHARACTERISTICS


100 20 10

VDS - Drain to Source Voltage - V

VGS - Gate to Source Voltage - V


td(on), tr, td(off), tf - Switching Time - ns

t d (o ff)
V D D = 16 V
16 8
10 V
tf
tr
t d (o n ) 12 6

10
V GS
8 4

4 2
VDD = 10 V
VGS = 10 V VDS I D = 48 A
RG = 10 Ω 0 0
1 0 5 10 15 20 25
0 .1 1 10 100
QG - Gate Change - nC
ID - Drain Current - A

SOURCE TO DRAIN DIODE REVERSE RECOVERY TIME vs.


FORWARD VOLTAGE DRAIN CURRENT
1000 1000
P u ls e d
trr - Reverse Recovery Time- ns
IF - Diode Forward Current - A

100

100
10 V GS = 10 V

0 V
1
10

0 .1
d i/ d t = 1 0 0 A / µ s
VGS = 0 V
0 .0 1 1
0 0 .5 1 1 .5 0 .1 1 10 100

VF(S-D) - Source to Drain Voltage - V ID - Drain Current - A

Data Sheet D16256EJ2V0DS 5


2SK3570

★ PACKAGE DRAWINGS (Unit: mm)

1) TO-220AB (MP-25) 2) TO-262 (MP-25 Fin Cut)

4.8 MAX.

1.0±0.5
10.6 MAX. 4.8 MAX.
3.0±0.3

φ 3.6±0.2 10 TYP. 1.3±0.2


1.3±0.2
10.0 TYP.
5.9 MIN.

8.5±0.2
15.5 MAX.
4
1 2 3
4

12.7 MIN.
1 2 3
1.3±0.2
6.0 MAX.

12.7 MIN.

1.3±0.2
0.75±0.3 0.5±0.2 2.8±0.2
2.54 TYP. 2.54 TYP.
0.75±0.1 0.5±0.2 2.8±0.2
1.Gate
2.54 TYP. 2.54 TYP.
2.Drain
1.Gate 3.Source
2.Drain 4.Fin (Drain)
3.Source
4.Fin (Drain)

Note
3) TO-263 (MP-25ZK) 4) TO-220SMD (MP-25Z)

10 TYP. 4.8 MAX.


1.35±0.3

10.0±0.2 4.45±0.2 1.3±0.2


No plating 0.4 1.3±0.2
8.4 TYP. 4
4
1.0±0.5

8.5±0.2
8.0 TYP.

9.15±0.2
15.25±0.5

0.025 to 1 2 3
0.25
3.0±0.5
1.1±0.4

1.4±0.2 P.
TY P.
R Y
0.5 R T
2.45±0.25

0.75±0.3 0.5±0.2
0 .8
2.54 TYP. 2.54 TYP.
0.5±
0.2
0.7±0.15
0 to
8o
1.Gate
2.54 2.Drain
0.25
3.Source
2.8±0.2

1 2 3
4.Fin (Drain)
1.Gate
2.Drain
3.Source
2.5

4.Fin (Drain)

Note This package is produced only in Japan.

EQUIVALENT CIRCUIT
Remark The diode connected between the gate and source of the transistor
Drain
serves as a protector against ESD. When this device actually used, an
additional protection circuit is externally required if a voltage exceeding
Body
Diode
the rated voltage may be applied to this device.
Gate

Gate
Protection Source
Diode

6 Data Sheet D16256EJ2V0DS


2SK3570

[MEMO]

Data Sheet D16256EJ2V0DS 7


2SK3570

• The information in this document is current as of September, 2002. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or
data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all
products and/or types are available in every country. Please check with an NEC sales representative
for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
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third parties by or arising from the use of NEC semiconductor products listed in this document or any other
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any
patents, copyrights or other intellectual property rights of NEC or others.
• Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
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responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third
parties arising from the use of these circuits, software and information.
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
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M8E 00. 4

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