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6, JUNE 2016
High Efficiency GaN 2.5 to 9 GHz Power Amplifiers
Realized in Multilayer LCP Hybrid Technology
J. R. Powell, D. J. Shepphard, and S. C. Cripps, Fellow, IEEE
Abstract—This letter presents wide bandwidth and high effi-
ciency hybrid balanced and push-pull amplifier circuit topologies
using Gallium Nitride (GaN) transistors and Liquid Crystal Poly-
mer (LCP) multilayer circuit techniques. Push-pull circuit config-
urations allow differential and common mode impedances to be
presented at even and odd harmonics independently, enabling the
continuous mode (class BJ) design space to be exploited. Push-pull
amplifiers display drain efficiencies > 40%, output power > 5 W
over a bandwidth of 3.5 to 8.5 GHz at 2 dB compression levels,
and under CW conditions. By comparison, although designed with
identical performance goals, a conventional quadrature balanced
amplifier performance is below that of the push-pull configuration.
Index Terms—Broadband amplifiers, liquid crystal, power
amplifier (PA).
I. I NTRODUCTION
W IDEBAND microwave power amplifiers (PAs) are criti-
cally important components in, for example, Electronic
Warfare (EW) and instrumentation applications. The compact
size, low life cycle cost, and reliability of solid state technology
makes its use attractive when compared with vacuum electron
devices. Moreover, GaN HEMT technology, with its improved
power density and thermal performance compared to GaAs, al-
lows for module power levels of several watts up to 10s of GHz.
The key performance metrics for PAs are output power, lin-
earity, and efficiency. Efficiency can be of particular importance
for amplifiers used in systems where primary power sources are
limited for both powering the amplifiers and providing active
cooling such as flight systems.
Various circuit design techniques have been reported aimed
at achieving high efficiency over an octave bandwidth or higher
using gallium-nitride (GaN) technologies. Non-uniform distrib-
uted PA MMICs have yielded 5 W output power with between
20 and 30% power added efficiency (PAE) over 2 to 15 GHz
at P3 dB [1]. Balanced MMICs yield 8.2 to 14.5 W and 18.1
to 46.1% PAE over 1 to 6 GHz [2]. A single ended matched
MMIC cell with 6.8 to 8 dB gain, yields a Pout > 5 W and
drain efficiency 43% to 59% from 7 to 14 GHz [3].
Manuscript received January 14, 2016; revised February 29, 2016; accepted
March 8, 2016. Date of publication May 9, 2016; date of current version June 3,
2016.
J. R. Powell is with Skyarna, Halesowen, West Midlands, B63 3TT, U.K.
(e-mail: Jeff.Powell@skyarna.com).
D. J. Shepphard and S. C. Cripps are with the School of Engineering,
Cardiff University, Cardiff, CF10 3XQ, U.K. (e-mail: crippssc@cf.ac.uk;
sheppharddj@cf.ac.uk).
Color versions of one or more of the figures in this letter are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LMWC.2016.2559502
1531-1309 © 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 26, NO.
Maximizing circuit efficiency for amplifiers with bandwidths
extending more than an octave presents inherent challenges; in
particular since efficiency enhancement techniques ordinarily
require careful selection of harmonic impedances, as well as
the fundamental signal [4]. Designing at greater than octave
bandwidth also presents the challenge of harmonic impedances
at the lower frequency points becoming the fundamental
impedances at the higher frequency points. This work also
recognizes the widespread use of the quadrature balanced con-
figuration to ease the cascadability of broadband stages.
Push-pull amplifier topologies allow a de-coupling of fun-
damental and harmonic matching circuit response, since even
harmonics and odd harmonics are presented as differential
and common-mode impedances respectively. This has been
demonstrated for inverse class F amplifier operation yielding
41.5 dBm, 10 dB gain, 55% PAE at P1 dB from 8 to 12 GHz for
a hybrid amplifier using multilayer substrates [5].
Realizing optimum performance for push-pull and balanced
amplifier topologies relies critically on achieving close to ideal
coupling structures. The limited number of low-loss metal
layers in the majority of standard MMIC processes requires
planar implementations of baluns and couplers, which constrain
the realizable design parameters such as coupling factor, inser-
tion loss, bandwidth, and impedance level [6]. Multilayer LCP
structures allow for low-loss broadside coupled elements which
can mitigate the limits of planar circuits.
In this letter a back-to-back comparison is presented for
balanced and push-pull hybrid RFPA circuits having band-
widths which approach a double octave facilitated through the
use of low-loss multilayer coupling circuits in LCP. Power
and efficiency performance of each amplifier are qualitatively
evaluated in the context of the impedance presented to the
fundamental and second harmonic at the transistor current
generator plane, as predicted by the Class BJ continuum of
modes framework [4], [7]. Each circuit had the design goal of
achieving maximum efficiency up to 9 GHz with more that 5 W
output power CW at P2 dB .
II. A MPLIFIER D ESIGN
A GaN high electron mobility transistor (HEMT) from
Quorvo (TGF2023-01) was selected, which can operate to
20 GHz. Extensive multi-harmonic active load-pull has been
performed on the device to verify the accuracy of the non-linear
model provided by the vendor. The transistors were mounted
using high thermal and electrical conductivity epoxy on a gold
plated aluminum metal carrier. The multilayer substrate stack
POWELL et al.: HIGH EFFICIENCY GaN 2.5 TO 9 GHz PAs REALIZED IN MULTILAYER LCP HYBRID TECHNOLOGY
Fig. 1. Multilayer substrate configuration.
Fig. 2. Output circuits for the (a) balanced and (b) push-pull hybrid amplifier.
Fig. 3. Measured input reflection and transmission response for the coupling
structure test-cells.
was bonded to the carrier, resulting in the vertical structure
shown in Fig. 1. Liquid crystal polymer (LCP) layers from
Rogers were used to form the substrate. Laser defined apertures
were used for conducting vias between layers and also to form
the pocket for the transistors.
Input and output coupler and balun structures were imple-
mented for the balanced and push-pull amplifiers respectively.
The 90 degree broadside coupler was formed using overlaid
metals in layers L1 & L2 (with reference to Fig. 1). The
Marchand balun was also formed using L1 & L2, with grounded
connections to L3. Input matching circuits were also included
between the couplers and transistors to provide gain equal-
ization, circuit stabilization and bias connection. Transistors
and di-cap matching and de-coupling components were wire
bonded to the metalized surface as shown in Fig. 2. SMA
launches were attached directly to fixings on the aluminum
carrier.
Measurements of the transmission and input reflection re-
sponse for both coupling structures are shown in Fig. 3—these
were obtained from RF on-wafer probeable test structures
included on the substrate panel, and de-embedded to the Red
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441
Fig. 4. Schematics of the circuit used to simulate the impedance at the
transistor current generator plane (a) balanced amplifier (b) push-pull amplifier
differential and common mode reflection coefficients.
Fig. 5. Simulated reflection coefficients for the (a) balanced and (b) push-pull
amplifier at the transistor current generator plane.
lines crossing the circuit photograph (Fig. 2). Both structures
were centered around 8 GHz. The coupler and balun geometries
were optimized to yield the best achievable amplifier circuit
performance compared to the design goals above.
Given the coupler and balun impedances, and along with
favorable device load-line resistance properties, the matching
designs become quite straightforward.
The drain-source capacitance CDS is absorbed into the
matching network and thus presents the desired optimum load
impedance, as used for the “Cripps PA design method” [7].
Fig. 5 shows the reflection coefficients for the matching
networks. For the balanced amplifier, the single ended response
for the matching network is plotted [Figs. 4(a) and 5(a)],
assuming perfect isolation between transistors at the coupler.
For the push-pull amplifier, differential and common modes
impedances are derived [Figs. 4(b) and 5(b)]. Γdd represents
the impedance seen at the fundamental. This impedance level
was chosen to maximize amplifier efficiency for the power
level required (5 W for the amplifier compared to the 6 W per
transistor specified for TGF2023-01), resulting in an increased
impedance, compared to the datasheet values, in order to reduce
the impact of the knee on efficiency. Γcc is the common mode
impedance seen at the even harmonics. Over this bandwidth
several loops close to the purely reactive region of the Smith
chart are observed—with the exception of a sharp resonance at
14.3 GHz associated with the biasing circuit, and some non-
zero real component of impedance, probably resulting from
circuit losses.
The class J amplifier continuous mode concept exploited
in these designs requires a reactive component at the
442
Fig. 6. Small signal gain output reflection for balanced and push-pull amplifier
hybrids.
Fig. 7. Large signal measurements and simulations for balanced and push-pull
hybrid circuits at P2 dB .
2nd harmonic, as approximately observed for the push-pull
amplifier at all frequencies, and for the balanced amplifier
above a fundamental frequency of 6 GHz [4]. It was noted
in [4] that combinations of fundamental and 2nd harmonic
impedances exist where high efficiency waveforms can not
be sustained. This is believed to be the reason for the dip in
efficiency observed between 4.5 and 6 GHz for the push-pull
amplifier, Fig. 7. The poorer power and efficiency performance
of the balanced amplifier up to 7.5 GHz is consistent with a
non-optimum 2nd harmonic impedance.
III. A MPLIFIER M EASURED R ESULTS
Measured small signal gain and output return losses are
plotted in Fig. 6, which show 8 to 10 dB gain and < 10 dB
return loss from 2.5 to 10 GHz for both amplifier types.
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IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 26, NO. 6, JUNE 2016
Large signal measurements are plotted in Fig. 7 under quasi
continuous wave condition (12.5 ms pulses at 125 ms repetition
rate). Drain and gate bias of 24 V and −2.4 V, respectively, were
applied to achieve class AB operation for both amplifier types.
The target power level of 5 W at 40% efficiency is observed
over a bandwidth of at least 3.5 to 8.5 GHz for the push-pull
amplifier. The balanced amplifier achieved greater than 4 W
and 30% efficiency in the same range. Both amplifier designs
were optimized using identical design goals. Accurate transistor
models from Quorvo yield close correlation between measured
results and circuit simulations, as shown in Fig. 7.
The improved performance of the push-pull amplifier config-
uration is attributable to the separation of the fundamental and
harmonic impedances due to the differential configuration.
IV. C ONCLUSION
This letter describes a back-to-back comparison of the per-
formance of balanced and push-pull GaN hybrid amplifiers
using multilayer coupling structures. Both amplifiers were de-
signed with the same target performance: > 5 W at P2 dB over
an octave bandwidth to 9 GHz. The improved performance
achieved for the push-pull amplifier is attributable to the differ-
ential and common mode impedance separation at the baluns,
seen by even and odd harmonics, respectively. As a result,
the push-pull amplifier is able to present fundamental and
2nd harmonic impedances at the output more consistent with
the class BJ continuous mode concept.
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